2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/init.h>
19 #include <linux/serio.h>
20 #include <linux/err.h>
21 #include <linux/rcupdate.h>
22 #include <linux/platform_device.h>
26 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28 MODULE_LICENSE("GPL");
30 static unsigned int i8042_nokbd;
31 module_param_named(nokbd, i8042_nokbd, bool, 0);
32 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
34 static unsigned int i8042_noaux;
35 module_param_named(noaux, i8042_noaux, bool, 0);
36 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
38 static unsigned int i8042_nomux;
39 module_param_named(nomux, i8042_nomux, bool, 0);
40 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
42 static unsigned int i8042_unlock;
43 module_param_named(unlock, i8042_unlock, bool, 0);
44 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
46 static unsigned int i8042_reset;
47 module_param_named(reset, i8042_reset, bool, 0);
48 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
50 static unsigned int i8042_direct;
51 module_param_named(direct, i8042_direct, bool, 0);
52 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
54 static unsigned int i8042_dumbkbd;
55 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
56 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
58 static unsigned int i8042_noloop;
59 module_param_named(noloop, i8042_noloop, bool, 0);
60 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
62 static unsigned int i8042_blink_frequency = 500;
63 module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
64 MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
67 static int i8042_nopnp;
68 module_param_named(nopnp, i8042_nopnp, bool, 0);
69 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
74 static int i8042_debug;
75 module_param_named(debug, i8042_debug, bool, 0600);
76 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
79 __obsolete_setup("i8042_noaux");
80 __obsolete_setup("i8042_nomux");
81 __obsolete_setup("i8042_unlock");
82 __obsolete_setup("i8042_reset");
83 __obsolete_setup("i8042_direct");
84 __obsolete_setup("i8042_dumbkbd");
88 static DEFINE_SPINLOCK(i8042_lock);
97 #define I8042_KBD_PORT_NO 0
98 #define I8042_AUX_PORT_NO 1
99 #define I8042_MUX_PORT_NO 2
100 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
102 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
104 static unsigned char i8042_initial_ctr;
105 static unsigned char i8042_ctr;
106 static unsigned char i8042_mux_present;
107 static unsigned char i8042_kbd_irq_registered;
108 static unsigned char i8042_aux_irq_registered;
109 static unsigned char i8042_suppress_kbd_ack;
110 static struct platform_device *i8042_platform_device;
112 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
115 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
116 * be ready for reading values from it / writing values to it.
117 * Called always with i8042_lock held.
120 static int i8042_wait_read(void)
124 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
128 return -(i == I8042_CTL_TIMEOUT);
131 static int i8042_wait_write(void)
135 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
139 return -(i == I8042_CTL_TIMEOUT);
143 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
144 * of the i8042 down the toilet.
147 static int i8042_flush(void)
150 unsigned char data, str;
153 spin_lock_irqsave(&i8042_lock, flags);
155 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
157 data = i8042_read_data();
159 dbg("%02x <- i8042 (flush, %s)", data,
160 str & I8042_STR_AUXDATA ? "aux" : "kbd");
163 spin_unlock_irqrestore(&i8042_lock, flags);
169 * i8042_command() executes a command on the i8042. It also sends the input
170 * parameter(s) of the commands to it, and receives the output value(s). The
171 * parameters are to be stored in the param array, and the output is placed
172 * into the same array. The number of the parameters and output values is
173 * encoded in bits 8-11 of the command number.
176 static int __i8042_command(unsigned char *param, int command)
180 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
183 error = i8042_wait_write();
187 dbg("%02x -> i8042 (command)", command & 0xff);
188 i8042_write_command(command & 0xff);
190 for (i = 0; i < ((command >> 12) & 0xf); i++) {
191 error = i8042_wait_write();
194 dbg("%02x -> i8042 (parameter)", param[i]);
195 i8042_write_data(param[i]);
198 for (i = 0; i < ((command >> 8) & 0xf); i++) {
199 error = i8042_wait_read();
201 dbg(" -- i8042 (timeout)");
205 if (command == I8042_CMD_AUX_LOOP &&
206 !(i8042_read_status() & I8042_STR_AUXDATA)) {
207 dbg(" -- i8042 (auxerr)");
211 param[i] = i8042_read_data();
212 dbg("%02x <- i8042 (return)", param[i]);
218 static int i8042_command(unsigned char *param, int command)
223 spin_lock_irqsave(&i8042_lock, flags);
224 retval = __i8042_command(param, command);
225 spin_unlock_irqrestore(&i8042_lock, flags);
231 * i8042_kbd_write() sends a byte out through the keyboard interface.
234 static int i8042_kbd_write(struct serio *port, unsigned char c)
239 spin_lock_irqsave(&i8042_lock, flags);
241 if (!(retval = i8042_wait_write())) {
242 dbg("%02x -> i8042 (kbd-data)", c);
246 spin_unlock_irqrestore(&i8042_lock, flags);
252 * i8042_aux_write() sends a byte out through the aux interface.
255 static int i8042_aux_write(struct serio *serio, unsigned char c)
257 struct i8042_port *port = serio->port_data;
259 return i8042_command(&c, port->mux == -1 ?
261 I8042_CMD_MUX_SEND + port->mux);
265 * i8042_start() is called by serio core when port is about to finish
266 * registering. It will mark port as existing so i8042_interrupt can
267 * start sending data through it.
269 static int i8042_start(struct serio *serio)
271 struct i8042_port *port = serio->port_data;
279 * i8042_stop() marks serio port as non-existing so i8042_interrupt
280 * will not try to send data to the port that is about to go away.
281 * The function is called by serio core as part of unregister procedure.
283 static void i8042_stop(struct serio *serio)
285 struct i8042_port *port = serio->port_data;
293 * i8042_interrupt() is the most important function in this driver -
294 * it handles the interrupts from the i8042, and sends incoming bytes
295 * to the upper layers.
298 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
300 struct i8042_port *port;
302 unsigned char str, data;
304 unsigned int port_no;
307 spin_lock_irqsave(&i8042_lock, flags);
308 str = i8042_read_status();
309 if (unlikely(~str & I8042_STR_OBF)) {
310 spin_unlock_irqrestore(&i8042_lock, flags);
311 if (irq) dbg("Interrupt %d, without any data", irq);
315 data = i8042_read_data();
316 spin_unlock_irqrestore(&i8042_lock, flags);
318 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
319 static unsigned long last_transmit;
320 static unsigned char last_str;
323 if (str & I8042_STR_MUXERR) {
324 dbg("MUX error, status is %02x, data is %02x", str, data);
328 * When MUXERR condition is signalled the data register can only contain
329 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
330 * it is not always the case. Some KBC just get confused which port the
331 * data came from and signal error leaving the data intact. They _do not_
332 * revert to legacy mode (actually I've never seen KBC reverting to legacy
333 * mode yet, when we see one we'll add proper handling).
334 * Anyway, we will assume that the data came from the same serio last byte
335 * was transmitted (if transmission happened not too long ago).
337 if (time_before(jiffies, last_transmit + HZ/10)) {
341 /* fall through - report timeout */
343 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
344 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
348 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
350 last_transmit = jiffies;
353 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
354 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
356 port_no = (str & I8042_STR_AUXDATA) ?
357 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
360 port = &i8042_ports[port_no];
362 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
364 dfl & SERIO_PARITY ? ", bad parity" : "",
365 dfl & SERIO_TIMEOUT ? ", timeout" : "");
367 if (unlikely(i8042_suppress_kbd_ack))
368 if (port_no == I8042_KBD_PORT_NO &&
369 (data == 0xfa || data == 0xfe)) {
370 i8042_suppress_kbd_ack = 0;
374 if (likely(port->exists))
375 serio_interrupt(port->serio, data, dfl);
378 return IRQ_RETVAL(ret);
382 * i8042_enable_kbd_port enables keybaord port on chip
385 static int i8042_enable_kbd_port(void)
387 i8042_ctr &= ~I8042_CTR_KBDDIS;
388 i8042_ctr |= I8042_CTR_KBDINT;
390 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
391 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
399 * i8042_enable_aux_port enables AUX (mouse) port on chip
402 static int i8042_enable_aux_port(void)
404 i8042_ctr &= ~I8042_CTR_AUXDIS;
405 i8042_ctr |= I8042_CTR_AUXINT;
407 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
408 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
416 * i8042_enable_mux_ports enables 4 individual AUX ports after
417 * the controller has been switched into Multiplexed mode
420 static int i8042_enable_mux_ports(void)
425 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
426 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
427 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
430 return i8042_enable_aux_port();
434 * i8042_set_mux_mode checks whether the controller has an active
435 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
438 static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
443 * Get rid of bytes in the queue.
449 * Internal loopback test - send three bytes, they should come back from the
450 * mouse interface, the last should be version.
454 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0)
456 param = mode ? 0x56 : 0xf6;
457 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
459 param = mode ? 0xa4 : 0xa5;
460 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
464 *mux_version = param;
470 * i8042_check_mux() checks whether the controller supports the PS/2 Active
471 * Multiplexing specification by Synaptics, Phoenix, Insyde and
475 static int __devinit i8042_check_mux(void)
477 unsigned char mux_version;
479 if (i8042_set_mux_mode(1, &mux_version))
483 * Workaround for interference with USB Legacy emulation
484 * that causes a v10.12 MUX to be found.
486 if (mux_version == 0xAC)
489 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
490 (mux_version >> 4) & 0xf, mux_version & 0xf);
493 * Disable all muxed ports by disabling AUX.
495 i8042_ctr |= I8042_CTR_AUXDIS;
496 i8042_ctr &= ~I8042_CTR_AUXINT;
498 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
499 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
503 i8042_mux_present = 1;
509 * The following is used to test AUX IRQ delivery.
511 static struct completion i8042_aux_irq_delivered __devinitdata;
512 static int i8042_irq_being_tested __devinitdata;
514 static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
517 unsigned char str, data;
519 spin_lock_irqsave(&i8042_lock, flags);
520 str = i8042_read_status();
521 if (str & I8042_STR_OBF) {
522 data = i8042_read_data();
523 if (i8042_irq_being_tested &&
524 data == 0xa5 && (str & I8042_STR_AUXDATA))
525 complete(&i8042_aux_irq_delivered);
527 spin_unlock_irqrestore(&i8042_lock, flags);
534 * i8042_check_aux() applies as much paranoia as it can at detecting
535 * the presence of an AUX interface.
538 static int __devinit i8042_check_aux(void)
541 int irq_registered = 0;
546 * Get rid of bytes in the queue.
552 * Internal loopback test - filters out AT-type i8042's. Unfortunately
553 * SiS screwed up and their 5597 doesn't support the LOOP command even
554 * though it has an AUX port.
558 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0x5a) {
561 * External connection test - filters out AT-soldered PS/2 i8042's
562 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
563 * 0xfa - no error on some notebooks which ignore the spec
564 * Because it's common for chipsets to return error on perfectly functioning
565 * AUX ports, we test for this only when the LOOP command failed.
568 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
569 (param && param != 0xfa && param != 0xff))
574 * Bit assignment test - filters out PS/2 i8042's in AT mode
577 if (i8042_command(¶m, I8042_CMD_AUX_DISABLE))
579 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) {
580 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
581 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
584 if (i8042_command(¶m, I8042_CMD_AUX_ENABLE))
586 if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS))
590 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
591 * used it for a PCI card or somethig else.
596 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
597 * is working and hope we are right.
603 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
604 "i8042", i8042_platform_device))
609 if (i8042_enable_aux_port())
612 spin_lock_irqsave(&i8042_lock, flags);
614 init_completion(&i8042_aux_irq_delivered);
615 i8042_irq_being_tested = 1;
618 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
620 spin_unlock_irqrestore(&i8042_lock, flags);
625 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
626 msecs_to_jiffies(250)) == 0) {
628 * AUX IRQ was never delivered so we need to flush the controller to
629 * get rid of the byte we put there; otherwise keyboard may not work.
638 * Disable the interface.
641 i8042_ctr |= I8042_CTR_AUXDIS;
642 i8042_ctr &= ~I8042_CTR_AUXINT;
644 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
648 free_irq(I8042_AUX_IRQ, i8042_platform_device);
653 static int i8042_controller_check(void)
655 if (i8042_flush() == I8042_BUFFER_SIZE) {
656 printk(KERN_ERR "i8042.c: No controller found.\n");
663 static int i8042_controller_selftest(void)
670 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
671 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
675 if (param != I8042_RET_CTL_TEST) {
676 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
677 param, I8042_RET_CTL_TEST);
685 * i8042_controller init initializes the i8042 controller, and,
686 * most importantly, sets it into non-xlated mode if that's
690 static int i8042_controller_init(void)
695 * Save the CTR for restoral on unload / reboot.
698 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
699 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
703 i8042_initial_ctr = i8042_ctr;
706 * Disable the keyboard interface and interrupt.
709 i8042_ctr |= I8042_CTR_KBDDIS;
710 i8042_ctr &= ~I8042_CTR_KBDINT;
716 spin_lock_irqsave(&i8042_lock, flags);
717 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
719 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
721 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
723 spin_unlock_irqrestore(&i8042_lock, flags);
726 * If the chip is configured into nontranslated mode by the BIOS, don't
727 * bother enabling translating and be happy.
730 if (~i8042_ctr & I8042_CTR_XLATE)
734 * Set nontranslated mode for the kbd interface if requested by an option.
735 * After this the kbd interface becomes a simple serial in/out, like the aux
736 * interface is. We don't do this by default, since it can confuse notebook
741 i8042_ctr &= ~I8042_CTR_XLATE;
747 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
748 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
757 * Reset the controller and reset CRT to the original value set by BIOS.
760 static void i8042_controller_reset(void)
765 * Disable MUX mode if present.
768 if (i8042_mux_present)
769 i8042_set_mux_mode(0, NULL);
772 * Reset the controller if requested.
775 i8042_controller_selftest();
778 * Restore the original control register setting.
781 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
782 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
787 * Here we try to reset everything back to a state in which the BIOS will be
788 * able to talk to the hardware when rebooting.
791 static void i8042_controller_cleanup(void)
796 * Reset anything that is connected to the ports.
799 for (i = 0; i < I8042_NUM_PORTS; i++)
800 if (i8042_ports[i].serio)
801 serio_cleanup(i8042_ports[i].serio);
803 i8042_controller_reset();
808 * i8042_panic_blink() will flash the keyboard LEDs and is called when
809 * kernel panics. Flashing LEDs is useful for users running X who may
810 * not see the console and will help distingushing panics from "real"
813 * Note that DELAY has a limit of 10ms so we will not get stuck here
814 * waiting for KBC to free up even if KBD interrupt is off
817 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
819 static long i8042_panic_blink(long count)
822 static long last_blink;
826 * We expect frequency to be about 1/2s. KDB uses about 1s.
827 * Make sure they are different.
829 if (!i8042_blink_frequency)
831 if (count - last_blink < i8042_blink_frequency)
835 while (i8042_read_status() & I8042_STR_IBF)
837 i8042_suppress_kbd_ack = 1;
838 i8042_write_data(0xed); /* set leds */
840 while (i8042_read_status() & I8042_STR_IBF)
843 i8042_suppress_kbd_ack = 1;
844 i8042_write_data(led);
853 * Here we try to restore the original BIOS settings
856 static int i8042_suspend(struct platform_device *dev, pm_message_t state)
858 i8042_controller_cleanup();
865 * Here we try to reset everything back to a state in which suspended
868 static int i8042_resume(struct platform_device *dev)
872 error = i8042_controller_check();
876 error = i8042_controller_selftest();
881 * Restore pre-resume CTR value and disable all ports
884 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
885 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
886 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
887 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
891 if (i8042_mux_present) {
892 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
894 "i8042: failed to resume active multiplexor, "
895 "mouse won't work.\n");
896 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
897 i8042_enable_aux_port();
899 if (i8042_ports[I8042_KBD_PORT_NO].serio)
900 i8042_enable_kbd_port();
902 i8042_interrupt(0, NULL);
908 * We need to reset the 8042 back to original mode on system shutdown,
909 * because otherwise BIOSes will be confused.
912 static void i8042_shutdown(struct platform_device *dev)
914 i8042_controller_cleanup();
917 static int __devinit i8042_create_kbd_port(void)
920 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
922 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
926 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
927 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
928 serio->start = i8042_start;
929 serio->stop = i8042_stop;
930 serio->port_data = port;
931 serio->dev.parent = &i8042_platform_device->dev;
932 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
933 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
936 port->irq = I8042_KBD_IRQ;
941 static int __devinit i8042_create_aux_port(int idx)
944 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
945 struct i8042_port *port = &i8042_ports[port_no];
947 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
951 serio->id.type = SERIO_8042;
952 serio->write = i8042_aux_write;
953 serio->start = i8042_start;
954 serio->stop = i8042_stop;
955 serio->port_data = port;
956 serio->dev.parent = &i8042_platform_device->dev;
958 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
959 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
961 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
962 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
967 port->irq = I8042_AUX_IRQ;
972 static void __devinit i8042_free_kbd_port(void)
974 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
975 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
978 static void __devinit i8042_free_aux_ports(void)
982 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
983 kfree(i8042_ports[i].serio);
984 i8042_ports[i].serio = NULL;
988 static void __devinit i8042_register_ports(void)
992 for (i = 0; i < I8042_NUM_PORTS; i++) {
993 if (i8042_ports[i].serio) {
994 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
995 i8042_ports[i].serio->name,
996 (unsigned long) I8042_DATA_REG,
997 (unsigned long) I8042_COMMAND_REG,
999 serio_register_port(i8042_ports[i].serio);
1004 static void __devinit i8042_unregister_ports(void)
1008 for (i = 0; i < I8042_NUM_PORTS; i++) {
1009 if (i8042_ports[i].serio) {
1010 serio_unregister_port(i8042_ports[i].serio);
1011 i8042_ports[i].serio = NULL;
1016 static void i8042_free_irqs(void)
1018 if (i8042_aux_irq_registered)
1019 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1020 if (i8042_kbd_irq_registered)
1021 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1023 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1026 static int __devinit i8042_setup_aux(void)
1028 int (*aux_enable)(void);
1032 if (i8042_check_aux())
1035 if (i8042_nomux || i8042_check_mux()) {
1036 error = i8042_create_aux_port(-1);
1038 goto err_free_ports;
1039 aux_enable = i8042_enable_aux_port;
1041 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1042 error = i8042_create_aux_port(i);
1044 goto err_free_ports;
1046 aux_enable = i8042_enable_mux_ports;
1049 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1050 "i8042", i8042_platform_device);
1052 goto err_free_ports;
1057 i8042_aux_irq_registered = 1;
1061 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1063 i8042_free_aux_ports();
1067 static int __devinit i8042_setup_kbd(void)
1071 error = i8042_create_kbd_port();
1075 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1076 "i8042", i8042_platform_device);
1080 error = i8042_enable_kbd_port();
1084 i8042_kbd_irq_registered = 1;
1088 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1090 i8042_free_kbd_port();
1094 static int __devinit i8042_probe(struct platform_device *dev)
1098 error = i8042_controller_selftest();
1102 error = i8042_controller_init();
1107 error = i8042_setup_aux();
1108 if (error && error != -ENODEV && error != -EBUSY)
1113 error = i8042_setup_kbd();
1119 * Ok, everything is ready, let's register all serio ports
1121 i8042_register_ports();
1126 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1128 i8042_controller_reset();
1133 static int __devexit i8042_remove(struct platform_device *dev)
1135 i8042_unregister_ports();
1137 i8042_controller_reset();
1142 static struct platform_driver i8042_driver = {
1145 .owner = THIS_MODULE,
1147 .probe = i8042_probe,
1148 .remove = __devexit_p(i8042_remove),
1149 .suspend = i8042_suspend,
1150 .resume = i8042_resume,
1151 .shutdown = i8042_shutdown,
1154 static int __init i8042_init(void)
1160 err = i8042_platform_init();
1164 err = i8042_controller_check();
1166 goto err_platform_exit;
1168 err = platform_driver_register(&i8042_driver);
1170 goto err_platform_exit;
1172 i8042_platform_device = platform_device_alloc("i8042", -1);
1173 if (!i8042_platform_device) {
1175 goto err_unregister_driver;
1178 err = platform_device_add(i8042_platform_device);
1180 goto err_free_device;
1182 panic_blink = i8042_panic_blink;
1187 platform_device_put(i8042_platform_device);
1188 err_unregister_driver:
1189 platform_driver_unregister(&i8042_driver);
1191 i8042_platform_exit();
1196 static void __exit i8042_exit(void)
1198 platform_device_unregister(i8042_platform_device);
1199 platform_driver_unregister(&i8042_driver);
1200 i8042_platform_exit();
1205 module_init(i8042_init);
1206 module_exit(i8042_exit);