drivers/infiniband/hw/mlx4/cq.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/mlx4/cq.h>
  34 #include <linux/mlx4/qp.h>
  35
  36 #include "mlx4_ib.h"
  37 #include "user.h"
  38
  39 static void mlx4_ib_cq_comp(struct mlx4_cq *cq)
  40 {
  41         struct ib_cq *ibcq = &to_mibcq(cq)->ibcq;
  42         ibcq->comp_handler(ibcq, ibcq->cq_context);
  43 }
  44
  45 static void mlx4_ib_cq_event(struct mlx4_cq *cq, enum mlx4_event type)
  46 {
  47         struct ib_event event;
  48         struct ib_cq *ibcq;
  49
  50         if (type != MLX4_EVENT_TYPE_CQ_ERROR) {
  51                 printk(KERN_WARNING "mlx4_ib: Unexpected event type %d "
  52                        "on CQ %06x\n", type, cq->cqn);
  53                 return;
  54         }
  55
  56         ibcq = &to_mibcq(cq)->ibcq;
  57         if (ibcq->event_handler) {
  58                 event.device     = ibcq->device;
  59                 event.event      = IB_EVENT_CQ_ERR;
  60                 event.element.cq = ibcq;
  61                 ibcq->event_handler(&event, ibcq->cq_context);
  62         }
  63 }
  64
  65 static void *get_cqe_from_buf(struct mlx4_ib_cq_buf *buf, int n)
  66 {
  67         return mlx4_buf_offset(&buf->buf, n * sizeof (struct mlx4_cqe));
  68 }
  69
  70 static void *get_cqe(struct mlx4_ib_cq *cq, int n)
  71 {
  72         return get_cqe_from_buf(&cq->buf, n);
  73 }
  74
  75 static void *get_sw_cqe(struct mlx4_ib_cq *cq, int n)
  76 {
  77         struct mlx4_cqe *cqe = get_cqe(cq, n & cq->ibcq.cqe);
  78
  79         return (!!(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK) ^
  80                 !!(n & (cq->ibcq.cqe + 1))) ? NULL : cqe;
  81 }
  82
  83 static struct mlx4_cqe *next_cqe_sw(struct mlx4_ib_cq *cq)
  84 {
  85         return get_sw_cqe(cq, cq->mcq.cons_index);
  86 }
  87
  88 struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
  89                                 struct ib_ucontext *context,
  90                                 struct ib_udata *udata)
  91 {
  92         struct mlx4_ib_dev *dev = to_mdev(ibdev);
  93         struct mlx4_ib_cq *cq;
  94         struct mlx4_uar *uar;
  95         int buf_size;
  96         int err;
  97
  98         if (entries < 1 || entries > dev->dev->caps.max_cqes)
  99                 return ERR_PTR(-EINVAL);
 100
 101         cq = kmalloc(sizeof *cq, GFP_KERNEL);
 102         if (!cq)
 103                 return ERR_PTR(-ENOMEM);
 104
 105         entries      = roundup_pow_of_two(entries + 1);
 106         cq->ibcq.cqe = entries - 1;
 107         buf_size     = entries * sizeof (struct mlx4_cqe);
 108         spin_lock_init(&cq->lock);
 109
 110         if (context) {
 111                 struct mlx4_ib_create_cq ucmd;
 112
 113                 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
 114                         err = -EFAULT;
 115                         goto err_cq;
 116                 }
 117
 118                 cq->umem = ib_umem_get(context, ucmd.buf_addr, buf_size,
 119                                        IB_ACCESS_LOCAL_WRITE);
 120                 if (IS_ERR(cq->umem)) {
 121                         err = PTR_ERR(cq->umem);
 122                         goto err_cq;
 123                 }
 124
 125                 err = mlx4_mtt_init(dev->dev, ib_umem_page_count(cq->umem),
 126                                     ilog2(cq->umem->page_size), &cq->buf.mtt);
 127                 if (err)
 128                         goto err_buf;
 129
 130                 err = mlx4_ib_umem_write_mtt(dev, &cq->buf.mtt, cq->umem);
 131                 if (err)
 132                         goto err_mtt;
 133
 134                 err = mlx4_ib_db_map_user(to_mucontext(context), ucmd.db_addr,
 135                                           &cq->db);
 136                 if (err)
 137                         goto err_mtt;
 138
 139                 uar = &to_mucontext(context)->uar;
 140         } else {
 141                 err = mlx4_ib_db_alloc(dev, &cq->db, 1);
 142                 if (err)
 143                         goto err_cq;
 144
 145                 cq->mcq.set_ci_db  = cq->db.db;
 146                 cq->mcq.arm_db     = cq->db.db + 1;
 147                 *cq->mcq.set_ci_db = 0;
 148                 *cq->mcq.arm_db    = 0;
 149
 150                 if (mlx4_buf_alloc(dev->dev, buf_size, PAGE_SIZE * 2, &cq->buf.buf)) {
 151                         err = -ENOMEM;
 152                         goto err_db;
 153                 }
 154
 155                 err = mlx4_mtt_init(dev->dev, cq->buf.buf.npages, cq->buf.buf.page_shift,
 156                                     &cq->buf.mtt);
 157                 if (err)
 158                         goto err_buf;
 159
 160                 err = mlx4_buf_write_mtt(dev->dev, &cq->buf.mtt, &cq->buf.buf);
 161                 if (err)
 162                         goto err_mtt;
 163
 164                 uar = &dev->priv_uar;
 165         }
 166
 167         err = mlx4_cq_alloc(dev->dev, entries, &cq->buf.mtt, uar,
 168                             cq->db.dma, &cq->mcq);
 169         if (err)
 170                 goto err_dbmap;
 171
 172         cq->mcq.comp  = mlx4_ib_cq_comp;
 173         cq->mcq.event = mlx4_ib_cq_event;
 174
 175         if (context)
 176                 if (ib_copy_to_udata(udata, &cq->mcq.cqn, sizeof (__u32))) {
 177                         err = -EFAULT;
 178                         goto err_dbmap;
 179                 }
 180
 181         return &cq->ibcq;
 182
 183 err_dbmap:
 184         if (context)
 185                 mlx4_ib_db_unmap_user(to_mucontext(context), &cq->db);
 186
 187 err_mtt:
 188         mlx4_mtt_cleanup(dev->dev, &cq->buf.mtt);
 189
 190 err_buf:
 191         if (context)
 192                 ib_umem_release(cq->umem);
 193         else
 194                 mlx4_buf_free(dev->dev, entries * sizeof (struct mlx4_cqe),
 195                               &cq->buf.buf);
 196
 197 err_db:
 198         if (!context)
 199                 mlx4_ib_db_free(dev, &cq->db);
 200
 201 err_cq:
 202         kfree(cq);
 203
 204         return ERR_PTR(err);
 205 }
 206
 207 int mlx4_ib_destroy_cq(struct ib_cq *cq)
 208 {
 209         struct mlx4_ib_dev *dev = to_mdev(cq->device);
 210         struct mlx4_ib_cq *mcq = to_mcq(cq);
 211
 212         mlx4_cq_free(dev->dev, &mcq->mcq);
 213         mlx4_mtt_cleanup(dev->dev, &mcq->buf.mtt);
 214
 215         if (cq->uobject) {
 216                 mlx4_ib_db_unmap_user(to_mucontext(cq->uobject->context), &mcq->db);
 217                 ib_umem_release(mcq->umem);
 218         } else {
 219                 mlx4_buf_free(dev->dev, (cq->cqe + 1) * sizeof (struct mlx4_cqe),
 220                               &mcq->buf.buf);
 221                 mlx4_ib_db_free(dev, &mcq->db);
 222         }
 223
 224         kfree(mcq);
 225
 226         return 0;
 227 }
 228
 229 static void dump_cqe(void *cqe)
 230 {
 231         __be32 *buf = cqe;
 232
 233         printk(KERN_DEBUG "CQE contents %08x %08x %08x %08x %08x %08x %08x %08x\n",
 234                be32_to_cpu(buf[0]), be32_to_cpu(buf[1]), be32_to_cpu(buf[2]),
 235                be32_to_cpu(buf[3]), be32_to_cpu(buf[4]), be32_to_cpu(buf[5]),
 236                be32_to_cpu(buf[6]), be32_to_cpu(buf[7]));
 237 }
 238
 239 static void mlx4_ib_handle_error_cqe(struct mlx4_err_cqe *cqe,
 240                                      struct ib_wc *wc)
 241 {
 242         if (cqe->syndrome == MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR) {
 243                 printk(KERN_DEBUG "local QP operation err "
 244                        "(QPN %06x, WQE index %x, vendor syndrome %02x, "
 245                        "opcode = %02x)\n",
 246                        be32_to_cpu(cqe->my_qpn), be16_to_cpu(cqe->wqe_index),
 247                        cqe->vendor_err_syndrome,
 248                        cqe->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK);
 249                 dump_cqe(cqe);
 250         }
 251
 252         switch (cqe->syndrome) {
 253         case MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR:
 254                 wc->status = IB_WC_LOC_LEN_ERR;
 255                 break;
 256         case MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR:
 257                 wc->status = IB_WC_LOC_QP_OP_ERR;
 258                 break;
 259         case MLX4_CQE_SYNDROME_LOCAL_PROT_ERR:
 260                 wc->status = IB_WC_LOC_PROT_ERR;
 261                 break;
 262         case MLX4_CQE_SYNDROME_WR_FLUSH_ERR:
 263                 wc->status = IB_WC_WR_FLUSH_ERR;
 264                 break;
 265         case MLX4_CQE_SYNDROME_MW_BIND_ERR:
 266                 wc->status = IB_WC_MW_BIND_ERR;
 267                 break;
 268         case MLX4_CQE_SYNDROME_BAD_RESP_ERR:
 269                 wc->status = IB_WC_BAD_RESP_ERR;
 270                 break;
 271         case MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR:
 272                 wc->status = IB_WC_LOC_ACCESS_ERR;
 273                 break;
 274         case MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR:
 275                 wc->status = IB_WC_REM_INV_REQ_ERR;
 276                 break;
 277         case MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR:
 278                 wc->status = IB_WC_REM_ACCESS_ERR;
 279                 break;
 280         case MLX4_CQE_SYNDROME_REMOTE_OP_ERR:
 281                 wc->status = IB_WC_REM_OP_ERR;
 282                 break;
 283         case MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR:
 284                 wc->status = IB_WC_RETRY_EXC_ERR;
 285                 break;
 286         case MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR:
 287                 wc->status = IB_WC_RNR_RETRY_EXC_ERR;
 288                 break;
 289         case MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR:
 290                 wc->status = IB_WC_REM_ABORT_ERR;
 291                 break;
 292         default:
 293                 wc->status = IB_WC_GENERAL_ERR;
 294                 break;
 295         }
 296
 297         wc->vendor_err = cqe->vendor_err_syndrome;
 298 }
 299
 300 static int mlx4_ib_ipoib_csum_ok(__be32 status, __be16 checksum)
 301 {
 302         return ((status & cpu_to_be32(MLX4_CQE_IPOIB_STATUS_IPV4        |
 303                                       MLX4_CQE_IPOIB_STATUS_IPV4F       |
 304                                       MLX4_CQE_IPOIB_STATUS_IPV4OPT     |
 305                                       MLX4_CQE_IPOIB_STATUS_IPV6        |
 306                                       MLX4_CQE_IPOIB_STATUS_IPOK)) ==
 307                 cpu_to_be32(MLX4_CQE_IPOIB_STATUS_IPV4  |
 308                             MLX4_CQE_IPOIB_STATUS_IPOK))                &&
 309                 (status & cpu_to_be32(MLX4_CQE_IPOIB_STATUS_UDP |
 310                                       MLX4_CQE_IPOIB_STATUS_TCP))       &&
 311                 checksum == cpu_to_be16(0xffff);
 312 }
 313
 314 static int mlx4_ib_poll_one(struct mlx4_ib_cq *cq,
 315                             struct mlx4_ib_qp **cur_qp,
 316                             struct ib_wc *wc)
 317 {
 318         struct mlx4_cqe *cqe;
 319         struct mlx4_qp *mqp;
 320         struct mlx4_ib_wq *wq;
 321         struct mlx4_ib_srq *srq;
 322         int is_send;
 323         int is_error;
 324         u32 g_mlpath_rqpn;
 325         u16 wqe_ctr;
 326
 327         cqe = next_cqe_sw(cq);
 328         if (!cqe)
 329                 return -EAGAIN;
 330
 331         ++cq->mcq.cons_index;
 332
 333         /*
 334          * Make sure we read CQ entry contents after we've checked the
 335          * ownership bit.
 336          */
 337         rmb();
 338
 339         is_send  = cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK;
 340         is_error = (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 341                 MLX4_CQE_OPCODE_ERROR;
 342
 343         if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == MLX4_OPCODE_NOP &&
 344                      is_send)) {
 345                 printk(KERN_WARNING "Completion for NOP opcode detected!\n");
 346                 return -EINVAL;
 347         }
 348
 349         if (!*cur_qp ||
 350             (be32_to_cpu(cqe->my_qpn) & 0xffffff) != (*cur_qp)->mqp.qpn) {
 351                 /*
 352                  * We do not have to take the QP table lock here,
 353                  * because CQs will be locked while QPs are removed
 354                  * from the table.
 355                  */
 356                 mqp = __mlx4_qp_lookup(to_mdev(cq->ibcq.device)->dev,
 357                                        be32_to_cpu(cqe->my_qpn));
 358                 if (unlikely(!mqp)) {
 359                         printk(KERN_WARNING "CQ %06x with entry for unknown QPN %06x\n",
 360                                cq->mcq.cqn, be32_to_cpu(cqe->my_qpn) & 0xffffff);
 361                         return -EINVAL;
 362                 }
 363
 364                 *cur_qp = to_mibqp(mqp);
 365         }
 366
 367         wc->qp = &(*cur_qp)->ibqp;
 368
 369         if (is_send) {
 370                 wq = &(*cur_qp)->sq;
 371                 if (!(*cur_qp)->sq_signal_bits) {
 372                         wqe_ctr = be16_to_cpu(cqe->wqe_index);
 373                         wq->tail += (u16) (wqe_ctr - (u16) wq->tail);
 374                 }
 375                 wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)];
 376                 ++wq->tail;
 377         } else if ((*cur_qp)->ibqp.srq) {
 378                 srq = to_msrq((*cur_qp)->ibqp.srq);
 379                 wqe_ctr = be16_to_cpu(cqe->wqe_index);
 380                 wc->wr_id = srq->wrid[wqe_ctr];
 381                 mlx4_ib_free_srq_wqe(srq, wqe_ctr);
 382         } else {
 383                 wq        = &(*cur_qp)->rq;
 384                 wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)];
 385                 ++wq->tail;
 386         }
 387
 388         if (unlikely(is_error)) {
 389                 mlx4_ib_handle_error_cqe((struct mlx4_err_cqe *) cqe, wc);
 390                 return 0;
 391         }
 392
 393         wc->status = IB_WC_SUCCESS;
 394
 395         if (is_send) {
 396                 wc->wc_flags = 0;
 397                 switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {
 398                 case MLX4_OPCODE_RDMA_WRITE_IMM:
 399                         wc->wc_flags |= IB_WC_WITH_IMM;
 400                 case MLX4_OPCODE_RDMA_WRITE:
 401                         wc->opcode    = IB_WC_RDMA_WRITE;
 402                         break;
 403                 case MLX4_OPCODE_SEND_IMM:
 404                         wc->wc_flags |= IB_WC_WITH_IMM;
 405                 case MLX4_OPCODE_SEND:
 406                         wc->opcode    = IB_WC_SEND;
 407                         break;
 408                 case MLX4_OPCODE_RDMA_READ:
 409                         wc->opcode    = IB_WC_RDMA_READ;
 410                         wc->byte_len  = be32_to_cpu(cqe->byte_cnt);
 411                         break;
 412                 case MLX4_OPCODE_ATOMIC_CS:
 413                         wc->opcode    = IB_WC_COMP_SWAP;
 414                         wc->byte_len  = 8;
 415                         break;
 416                 case MLX4_OPCODE_ATOMIC_FA:
 417                         wc->opcode    = IB_WC_FETCH_ADD;
 418                         wc->byte_len  = 8;
 419                         break;
 420                 case MLX4_OPCODE_BIND_MW:
 421                         wc->opcode    = IB_WC_BIND_MW;
 422                         break;
 423                 case MLX4_OPCODE_LSO:
 424                         wc->opcode    = IB_WC_LSO;
 425                         break;
 426                 }
 427         } else {
 428                 wc->byte_len = be32_to_cpu(cqe->byte_cnt);
 429
 430                 switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {
 431                 case MLX4_RECV_OPCODE_RDMA_WRITE_IMM:
 432                         wc->opcode   = IB_WC_RECV_RDMA_WITH_IMM;
 433                         wc->wc_flags = IB_WC_WITH_IMM;
 434                         wc->imm_data = cqe->immed_rss_invalid;
 435                         break;
 436                 case MLX4_RECV_OPCODE_SEND:
 437                         wc->opcode   = IB_WC_RECV;
 438                         wc->wc_flags = 0;
 439                         break;
 440                 case MLX4_RECV_OPCODE_SEND_IMM:
 441                         wc->opcode   = IB_WC_RECV;
 442                         wc->wc_flags = IB_WC_WITH_IMM;
 443                         wc->imm_data = cqe->immed_rss_invalid;
 444                         break;
 445                 }
 446
 447                 wc->slid           = be16_to_cpu(cqe->rlid);
 448                 wc->sl             = cqe->sl >> 4;
 449                 g_mlpath_rqpn      = be32_to_cpu(cqe->g_mlpath_rqpn);
 450                 wc->src_qp         = g_mlpath_rqpn & 0xffffff;
 451                 wc->dlid_path_bits = (g_mlpath_rqpn >> 24) & 0x7f;
 452                 wc->wc_flags      |= g_mlpath_rqpn & 0x80000000 ? IB_WC_GRH : 0;
 453                 wc->pkey_index     = be32_to_cpu(cqe->immed_rss_invalid) & 0x7f;
 454                 wc->csum_ok        = mlx4_ib_ipoib_csum_ok(cqe->ipoib_status,
 455                                                            cqe->checksum);
 456         }
 457
 458         return 0;
 459 }
 460
 461 int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
 462 {
 463         struct mlx4_ib_cq *cq = to_mcq(ibcq);
 464         struct mlx4_ib_qp *cur_qp = NULL;
 465         unsigned long flags;
 466         int npolled;
 467         int err = 0;
 468
 469         spin_lock_irqsave(&cq->lock, flags);
 470
 471         for (npolled = 0; npolled < num_entries; ++npolled) {
 472                 err = mlx4_ib_poll_one(cq, &cur_qp, wc + npolled);
 473                 if (err)
 474                         break;
 475         }
 476
 477         if (npolled)
 478                 mlx4_cq_set_ci(&cq->mcq);
 479
 480         spin_unlock_irqrestore(&cq->lock, flags);
 481
 482         if (err == 0 || err == -EAGAIN)
 483                 return npolled;
 484         else
 485                 return err;
 486 }
 487
 488 int mlx4_ib_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags)
 489 {
 490         mlx4_cq_arm(&to_mcq(ibcq)->mcq,
 491                     (flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ?
 492                     MLX4_CQ_DB_REQ_NOT_SOL : MLX4_CQ_DB_REQ_NOT,
 493                     to_mdev(ibcq->device)->uar_map,
 494                     MLX4_GET_DOORBELL_LOCK(&to_mdev(ibcq->device)->uar_lock));
 495
 496         return 0;
 497 }
 498
 499 void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq)
 500 {
 501         u32 prod_index;
 502         int nfreed = 0;
 503         struct mlx4_cqe *cqe, *dest;
 504         u8 owner_bit;
 505
 506         /*
 507          * First we need to find the current producer index, so we
 508          * know where to start cleaning from.  It doesn't matter if HW
 509          * adds new entries after this loop -- the QP we're worried
 510          * about is already in RESET, so the new entries won't come
 511          * from our QP and therefore don't need to be checked.
 512          */
 513         for (prod_index = cq->mcq.cons_index; get_sw_cqe(cq, prod_index); ++prod_index)
 514                 if (prod_index == cq->mcq.cons_index + cq->ibcq.cqe)
 515                         break;
 516
 517         /*
 518          * Now sweep backwards through the CQ, removing CQ entries
 519          * that match our QP by copying older entries on top of them.
 520          */
 521         while ((int) --prod_index - (int) cq->mcq.cons_index >= 0) {
 522                 cqe = get_cqe(cq, prod_index & cq->ibcq.cqe);
 523                 if ((be32_to_cpu(cqe->my_qpn) & 0xffffff) == qpn) {
 524                         if (srq && !(cqe->owner_sr_opcode & MLX4_CQE_IS_SEND_MASK))
 525                                 mlx4_ib_free_srq_wqe(srq, be16_to_cpu(cqe->wqe_index));
 526                         ++nfreed;
 527                 } else if (nfreed) {
 528                         dest = get_cqe(cq, (prod_index + nfreed) & cq->ibcq.cqe);
 529                         owner_bit = dest->owner_sr_opcode & MLX4_CQE_OWNER_MASK;
 530                         memcpy(dest, cqe, sizeof *cqe);
 531                         dest->owner_sr_opcode = owner_bit |
 532                                 (dest->owner_sr_opcode & ~MLX4_CQE_OWNER_MASK);
 533                 }
 534         }
 535
 536         if (nfreed) {
 537                 cq->mcq.cons_index += nfreed;
 538                 /*
 539                  * Make sure update of buffer contents is done before
 540                  * updating consumer index.
 541                  */
 542                 wmb();
 543                 mlx4_cq_set_ci(&cq->mcq);
 544         }
 545 }
 546
 547 void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq)
 548 {
 549         spin_lock_irq(&cq->lock);
 550         __mlx4_ib_cq_clean(cq, qpn, srq);
 551         spin_unlock_irq(&cq->lock);
 552 }