drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/idr.h>
  36 #include <linux/pci.h>
  37 #include <linux/delay.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/vmalloc.h>
  40
  41 #include "ipath_kernel.h"
  42 #include "ipath_layer.h"
  43 #include "ipath_common.h"
  44
  45 static void ipath_update_pio_bufs(struct ipath_devdata *);
  46
  47 const char *ipath_get_unit_name(int unit)
  48 {
  49         static char iname[16];
  50         snprintf(iname, sizeof iname, "infinipath%u", unit);
  51         return iname;
  52 }
  53
  54 EXPORT_SYMBOL_GPL(ipath_get_unit_name);
  55
  56 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  57 #define PFX IPATH_DRV_NAME ": "
  58
  59 /*
  60  * The size has to be longer than this string, so we can append
  61  * board/chip information to it in the init code.
  62  */
  63 const char ipath_core_version[] = IPATH_IDSTR "\n";
  64
  65 static struct idr unit_table;
  66 DEFINE_SPINLOCK(ipath_devs_lock);
  67 LIST_HEAD(ipath_dev_list);
  68
  69 wait_queue_head_t ipath_sma_state_wait;
  70
  71 unsigned ipath_debug = __IPATH_INFO;
  72
  73 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  74 MODULE_PARM_DESC(debug, "mask for debug prints");
  75 EXPORT_SYMBOL_GPL(ipath_debug);
  76
  77 MODULE_LICENSE("GPL");
  78 MODULE_AUTHOR("QLogic <support@pathscale.com>");
  79 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  80
  81 const char *ipath_ibcstatus_str[] = {
  82         "Disabled",
  83         "LinkUp",
  84         "PollActive",
  85         "PollQuiet",
  86         "SleepDelay",
  87         "SleepQuiet",
  88         "LState6",              /* unused */
  89         "LState7",              /* unused */
  90         "CfgDebounce",
  91         "CfgRcvfCfg",
  92         "CfgWaitRmt",
  93         "CfgIdle",
  94         "RecovRetrain",
  95         "LState0xD",            /* unused */
  96         "RecovWaitRmt",
  97         "RecovIdle",
  98 };
  99
 100 /*
 101  * These variables are initialized in the chip-specific files
 102  * but are defined here.
 103  */
 104 u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
 105 u64 ipath_gpio_sda, ipath_gpio_scl;
 106 u64 infinipath_i_bitsextant;
 107 ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
 108 u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
 109
 110 static void __devexit ipath_remove_one(struct pci_dev *);
 111 static int __devinit ipath_init_one(struct pci_dev *,
 112                                     const struct pci_device_id *);
 113
 114 /* Only needed for registration, nothing else needs this info */
 115 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 116 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 117 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 118
 119 static const struct pci_device_id ipath_pci_tbl[] = {
 120         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 121         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 122         { 0, }
 123 };
 124
 125 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 126
 127 static struct pci_driver ipath_driver = {
 128         .name = IPATH_DRV_NAME,
 129         .probe = ipath_init_one,
 130         .remove = __devexit_p(ipath_remove_one),
 131         .id_table = ipath_pci_tbl,
 132 };
 133
 134
 135 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 136                              u32 *bar0, u32 *bar1)
 137 {
 138         int ret;
 139
 140         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 141         if (ret)
 142                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 143                               "error %d\n", -ret);
 144
 145         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 146         if (ret)
 147                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 148                               "error %d\n", -ret);
 149
 150         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 151 }
 152
 153 static void ipath_free_devdata(struct pci_dev *pdev,
 154                                struct ipath_devdata *dd)
 155 {
 156         unsigned long flags;
 157
 158         pci_set_drvdata(pdev, NULL);
 159
 160         if (dd->ipath_unit != -1) {
 161                 spin_lock_irqsave(&ipath_devs_lock, flags);
 162                 idr_remove(&unit_table, dd->ipath_unit);
 163                 list_del(&dd->ipath_list);
 164                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 165         }
 166         vfree(dd);
 167 }
 168
 169 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 170 {
 171         unsigned long flags;
 172         struct ipath_devdata *dd;
 173         int ret;
 174
 175         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 176                 dd = ERR_PTR(-ENOMEM);
 177                 goto bail;
 178         }
 179
 180         dd = vmalloc(sizeof(*dd));
 181         if (!dd) {
 182                 dd = ERR_PTR(-ENOMEM);
 183                 goto bail;
 184         }
 185         memset(dd, 0, sizeof(*dd));
 186         dd->ipath_unit = -1;
 187
 188         spin_lock_irqsave(&ipath_devs_lock, flags);
 189
 190         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 191         if (ret < 0) {
 192                 printk(KERN_ERR IPATH_DRV_NAME
 193                        ": Could not allocate unit ID: error %d\n", -ret);
 194                 ipath_free_devdata(pdev, dd);
 195                 dd = ERR_PTR(ret);
 196                 goto bail_unlock;
 197         }
 198
 199         dd->pcidev = pdev;
 200         pci_set_drvdata(pdev, dd);
 201
 202         list_add(&dd->ipath_list, &ipath_dev_list);
 203
 204 bail_unlock:
 205         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 206
 207 bail:
 208         return dd;
 209 }
 210
 211 static inline struct ipath_devdata *__ipath_lookup(int unit)
 212 {
 213         return idr_find(&unit_table, unit);
 214 }
 215
 216 struct ipath_devdata *ipath_lookup(int unit)
 217 {
 218         struct ipath_devdata *dd;
 219         unsigned long flags;
 220
 221         spin_lock_irqsave(&ipath_devs_lock, flags);
 222         dd = __ipath_lookup(unit);
 223         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 224
 225         return dd;
 226 }
 227
 228 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
 229 {
 230         int nunits, npresent, nup;
 231         struct ipath_devdata *dd;
 232         unsigned long flags;
 233         u32 maxports;
 234
 235         nunits = npresent = nup = maxports = 0;
 236
 237         spin_lock_irqsave(&ipath_devs_lock, flags);
 238
 239         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 240                 nunits++;
 241                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 242                         npresent++;
 243                 if (dd->ipath_lid &&
 244                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 245                                          | IPATH_LINKUNK)))
 246                         nup++;
 247                 if (dd->ipath_cfgports > maxports)
 248                         maxports = dd->ipath_cfgports;
 249         }
 250
 251         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 252
 253         if (npresentp)
 254                 *npresentp = npresent;
 255         if (nupp)
 256                 *nupp = nup;
 257         if (maxportsp)
 258                 *maxportsp = maxports;
 259
 260         return nunits;
 261 }
 262
 263 /*
 264  * These next two routines are placeholders in case we don't have per-arch
 265  * code for controlling write combining.  If explicit control of write
 266  * combining is not available, performance will probably be awful.
 267  */
 268
 269 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 270 {
 271         return -EOPNOTSUPP;
 272 }
 273
 274 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 275 {
 276 }
 277
 278 static int __devinit ipath_init_one(struct pci_dev *pdev,
 279                                     const struct pci_device_id *ent)
 280 {
 281         int ret, len, j;
 282         struct ipath_devdata *dd;
 283         unsigned long long addr;
 284         u32 bar0 = 0, bar1 = 0;
 285         u8 rev;
 286
 287         dd = ipath_alloc_devdata(pdev);
 288         if (IS_ERR(dd)) {
 289                 ret = PTR_ERR(dd);
 290                 printk(KERN_ERR IPATH_DRV_NAME
 291                        ": Could not allocate devdata: error %d\n", -ret);
 292                 goto bail;
 293         }
 294
 295         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 296
 297         read_bars(dd, pdev, &bar0, &bar1);
 298
 299         ret = pci_enable_device(pdev);
 300         if (ret) {
 301                 /* This can happen iff:
 302                  *
 303                  * We did a chip reset, and then failed to reprogram the
 304                  * BAR, or the chip reset due to an internal error.  We then
 305                  * unloaded the driver and reloaded it.
 306                  *
 307                  * Both reset cases set the BAR back to initial state.  For
 308                  * the latter case, the AER sticky error bit at offset 0x718
 309                  * should be set, but the Linux kernel doesn't yet know
 310                  * about that, it appears.  If the original BAR was retained
 311                  * in the kernel data structures, this may be OK.
 312                  */
 313                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 314                               dd->ipath_unit, -ret);
 315                 goto bail_devdata;
 316         }
 317         addr = pci_resource_start(pdev, 0);
 318         len = pci_resource_len(pdev, 0);
 319         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d irq %x, vend %x/%x "
 320                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 321                    ent->device, ent->driver_data);
 322
 323         read_bars(dd, pdev, &bar0, &bar1);
 324
 325         if (!bar1 && !(bar0 & ~0xf)) {
 326                 if (addr) {
 327                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 328                                  "rewriting as %llx\n", addr);
 329                         ret = pci_write_config_dword(
 330                                 pdev, PCI_BASE_ADDRESS_0, addr);
 331                         if (ret) {
 332                                 ipath_dev_err(dd, "rewrite of BAR0 "
 333                                               "failed: err %d\n", -ret);
 334                                 goto bail_disable;
 335                         }
 336                         ret = pci_write_config_dword(
 337                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 338                         if (ret) {
 339                                 ipath_dev_err(dd, "rewrite of BAR1 "
 340                                               "failed: err %d\n", -ret);
 341                                 goto bail_disable;
 342                         }
 343                 } else {
 344                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 345                                       "not usable until reboot\n");
 346                         ret = -ENODEV;
 347                         goto bail_disable;
 348                 }
 349         }
 350
 351         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 352         if (ret) {
 353                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 354                          "err %d\n", dd->ipath_unit, -ret);
 355                 goto bail_disable;
 356         }
 357
 358         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 359         if (ret) {
 360                 /*
 361                  * if the 64 bit setup fails, try 32 bit.  Some systems
 362                  * do not setup 64 bit maps on systems with 2GB or less
 363                  * memory installed.
 364                  */
 365                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 366                 if (ret) {
 367                         dev_info(&pdev->dev,
 368                                 "Unable to set DMA mask for unit %u: %d\n",
 369                                 dd->ipath_unit, ret);
 370                         goto bail_regions;
 371                 }
 372                 else {
 373                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 374                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 375                         if (ret)
 376                                 dev_info(&pdev->dev,
 377                                         "Unable to set DMA consistent mask "
 378                                         "for unit %u: %d\n",
 379                                         dd->ipath_unit, ret);
 380
 381                 }
 382         }
 383         else {
 384                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 385                 if (ret)
 386                         dev_info(&pdev->dev,
 387                                 "Unable to set DMA consistent mask "
 388                                 "for unit %u: %d\n",
 389                                 dd->ipath_unit, ret);
 390         }
 391
 392         pci_set_master(pdev);
 393
 394         /*
 395          * Save BARs to rewrite after device reset.  Save all 64 bits of
 396          * BAR, just in case.
 397          */
 398         dd->ipath_pcibar0 = addr;
 399         dd->ipath_pcibar1 = addr >> 32;
 400         dd->ipath_deviceid = ent->device;       /* save for later use */
 401         dd->ipath_vendorid = ent->vendor;
 402
 403         /* setup the chip-specific functions, as early as possible. */
 404         switch (ent->device) {
 405         case PCI_DEVICE_ID_INFINIPATH_HT:
 406                 ipath_init_ht400_funcs(dd);
 407                 break;
 408         case PCI_DEVICE_ID_INFINIPATH_PE800:
 409                 ipath_init_pe800_funcs(dd);
 410                 break;
 411         default:
 412                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 413                               "failing\n", ent->device);
 414                 return -ENODEV;
 415         }
 416
 417         for (j = 0; j < 6; j++) {
 418                 if (!pdev->resource[j].start)
 419                         continue;
 420                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 421                            j, (unsigned long long)pdev->resource[j].start,
 422                            (unsigned long long)pdev->resource[j].end,
 423                            (unsigned long long)pci_resource_len(pdev, j));
 424         }
 425
 426         if (!addr) {
 427                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 428                 ret = -ENODEV;
 429                 goto bail_regions;
 430         }
 431
 432         dd->ipath_deviceid = ent->device;       /* save for later use */
 433         dd->ipath_vendorid = ent->vendor;
 434
 435         ret = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 436         if (ret) {
 437                 ipath_dev_err(dd, "Failed to read PCI revision ID unit "
 438                               "%u: err %d\n", dd->ipath_unit, -ret);
 439                 goto bail_regions;      /* shouldn't ever happen */
 440         }
 441         dd->ipath_pcirev = rev;
 442
 443         dd->ipath_kregbase = ioremap_nocache(addr, len);
 444
 445         if (!dd->ipath_kregbase) {
 446                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 447                           addr);
 448                 ret = -ENOMEM;
 449                 goto bail_iounmap;
 450         }
 451         dd->ipath_kregend = (u64 __iomem *)
 452                 ((void __iomem *)dd->ipath_kregbase + len);
 453         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 454         /* for user mmap */
 455         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 456                    addr, dd->ipath_kregbase);
 457
 458         /*
 459          * clear ipath_flags here instead of in ipath_init_chip as it is set
 460          * by ipath_setup_htconfig.
 461          */
 462         dd->ipath_flags = 0;
 463         dd->ipath_lli_counter = 0;
 464         dd->ipath_lli_errors = 0;
 465
 466         if (dd->ipath_f_bus(dd, pdev))
 467                 ipath_dev_err(dd, "Failed to setup config space; "
 468                               "continuing anyway\n");
 469
 470         /*
 471          * set up our interrupt handler; IRQF_SHARED probably not needed,
 472          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 473          * check 0 irq after we return from chip-specific bus setup, since
 474          * that can affect this due to setup
 475          */
 476         if (!pdev->irq)
 477                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 478                               "work\n");
 479         else {
 480                 ret = request_irq(pdev->irq, ipath_intr, IRQF_SHARED,
 481                                   IPATH_DRV_NAME, dd);
 482                 if (ret) {
 483                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 484                                       "irq=%u: %d\n", pdev->irq, ret);
 485                         goto bail_iounmap;
 486                 }
 487         }
 488
 489         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 490         if (ret)
 491                 goto bail_iounmap;
 492
 493         ret = ipath_enable_wc(dd);
 494
 495         if (ret) {
 496                 ipath_dev_err(dd, "Write combining not enabled "
 497                               "(err %d): performance may be poor\n",
 498                               -ret);
 499                 ret = 0;
 500         }
 501
 502         ipath_device_create_group(&pdev->dev, dd);
 503         ipathfs_add_device(dd);
 504         ipath_user_add(dd);
 505         ipath_diag_add(dd);
 506         ipath_layer_add(dd);
 507
 508         goto bail;
 509
 510 bail_iounmap:
 511         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 512
 513 bail_regions:
 514         pci_release_regions(pdev);
 515
 516 bail_disable:
 517         pci_disable_device(pdev);
 518
 519 bail_devdata:
 520         ipath_free_devdata(pdev, dd);
 521
 522 bail:
 523         return ret;
 524 }
 525
 526 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 527 {
 528         struct ipath_devdata *dd;
 529
 530         ipath_cdbg(VERBOSE, "removing, pdev=%p\n", pdev);
 531         if (!pdev)
 532                 return;
 533
 534         dd = pci_get_drvdata(pdev);
 535         ipath_layer_remove(dd);
 536         ipath_diag_remove(dd);
 537         ipath_user_remove(dd);
 538         ipathfs_remove_device(dd);
 539         ipath_device_remove_group(&pdev->dev, dd);
 540         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 541                    "unit %u\n", dd, (u32) dd->ipath_unit);
 542         if (dd->ipath_kregbase) {
 543                 ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n",
 544                            dd->ipath_kregbase);
 545                 iounmap((volatile void __iomem *) dd->ipath_kregbase);
 546                 dd->ipath_kregbase = NULL;
 547         }
 548         pci_release_regions(pdev);
 549         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 550         pci_disable_device(pdev);
 551
 552         ipath_free_devdata(pdev, dd);
 553 }
 554
 555 /* general driver use */
 556 DEFINE_MUTEX(ipath_mutex);
 557
 558 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 559
 560 /**
 561  * ipath_disarm_piobufs - cancel a range of PIO buffers
 562  * @dd: the infinipath device
 563  * @first: the first PIO buffer to cancel
 564  * @cnt: the number of PIO buffers to cancel
 565  *
 566  * cancel a range of PIO buffers, used when they might be armed, but
 567  * not triggered.  Used at init to ensure buffer state, and also user
 568  * process close, in case it died while writing to a PIO buffer
 569  * Also after errors.
 570  */
 571 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 572                           unsigned cnt)
 573 {
 574         unsigned i, last = first + cnt;
 575         u64 sendctrl, sendorig;
 576
 577         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 578         sendorig = dd->ipath_sendctrl | INFINIPATH_S_DISARM;
 579         for (i = first; i < last; i++) {
 580                 sendctrl = sendorig |
 581                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT);
 582                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 583                                  sendctrl);
 584         }
 585
 586         /*
 587          * Write it again with current value, in case ipath_sendctrl changed
 588          * while we were looping; no critical bits that would require
 589          * locking.
 590          *
 591          * Write a 0, and then the original value, reading scratch in
 592          * between.  This seems to avoid a chip timing race that causes
 593          * pioavail updates to memory to stop.
 594          */
 595         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 596                          0);
 597         sendorig = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 598         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 599                          dd->ipath_sendctrl);
 600 }
 601
 602 /**
 603  * ipath_wait_linkstate - wait for an IB link state change to occur
 604  * @dd: the infinipath device
 605  * @state: the state to wait for
 606  * @msecs: the number of milliseconds to wait
 607  *
 608  * wait up to msecs milliseconds for IB link state change to occur for
 609  * now, take the easy polling route.  Currently used only by
 610  * ipath_layer_set_linkstate.  Returns 0 if state reached, otherwise
 611  * -ETIMEDOUT state can have multiple states set, for any of several
 612  * transitions.
 613  */
 614 int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state, int msecs)
 615 {
 616         dd->ipath_sma_state_wanted = state;
 617         wait_event_interruptible_timeout(ipath_sma_state_wait,
 618                                          (dd->ipath_flags & state),
 619                                          msecs_to_jiffies(msecs));
 620         dd->ipath_sma_state_wanted = 0;
 621
 622         if (!(dd->ipath_flags & state)) {
 623                 u64 val;
 624                 ipath_cdbg(SMA, "Didn't reach linkstate %s within %u ms\n",
 625                            /* test INIT ahead of DOWN, both can be set */
 626                            (state & IPATH_LINKINIT) ? "INIT" :
 627                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 628                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 629                            msecs);
 630                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 631                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 632                            (unsigned long long) ipath_read_kreg64(
 633                                    dd, dd->ipath_kregs->kr_ibcctrl),
 634                            (unsigned long long) val,
 635                            ipath_ibcstatus_str[val & 0xf]);
 636         }
 637         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 638 }
 639
 640 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
 641 {
 642         *buf = '\0';
 643         if (err & INFINIPATH_E_RHDRLEN)
 644                 strlcat(buf, "rhdrlen ", blen);
 645         if (err & INFINIPATH_E_RBADTID)
 646                 strlcat(buf, "rbadtid ", blen);
 647         if (err & INFINIPATH_E_RBADVERSION)
 648                 strlcat(buf, "rbadversion ", blen);
 649         if (err & INFINIPATH_E_RHDR)
 650                 strlcat(buf, "rhdr ", blen);
 651         if (err & INFINIPATH_E_RLONGPKTLEN)
 652                 strlcat(buf, "rlongpktlen ", blen);
 653         if (err & INFINIPATH_E_RSHORTPKTLEN)
 654                 strlcat(buf, "rshortpktlen ", blen);
 655         if (err & INFINIPATH_E_RMAXPKTLEN)
 656                 strlcat(buf, "rmaxpktlen ", blen);
 657         if (err & INFINIPATH_E_RMINPKTLEN)
 658                 strlcat(buf, "rminpktlen ", blen);
 659         if (err & INFINIPATH_E_RFORMATERR)
 660                 strlcat(buf, "rformaterr ", blen);
 661         if (err & INFINIPATH_E_RUNSUPVL)
 662                 strlcat(buf, "runsupvl ", blen);
 663         if (err & INFINIPATH_E_RUNEXPCHAR)
 664                 strlcat(buf, "runexpchar ", blen);
 665         if (err & INFINIPATH_E_RIBFLOW)
 666                 strlcat(buf, "ribflow ", blen);
 667         if (err & INFINIPATH_E_REBP)
 668                 strlcat(buf, "EBP ", blen);
 669         if (err & INFINIPATH_E_SUNDERRUN)
 670                 strlcat(buf, "sunderrun ", blen);
 671         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 672                 strlcat(buf, "spioarmlaunch ", blen);
 673         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 674                 strlcat(buf, "sunexperrpktnum ", blen);
 675         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 676                 strlcat(buf, "sdroppeddatapkt ", blen);
 677         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 678                 strlcat(buf, "sdroppedsmppkt ", blen);
 679         if (err & INFINIPATH_E_SMAXPKTLEN)
 680                 strlcat(buf, "smaxpktlen ", blen);
 681         if (err & INFINIPATH_E_SMINPKTLEN)
 682                 strlcat(buf, "sminpktlen ", blen);
 683         if (err & INFINIPATH_E_SUNSUPVL)
 684                 strlcat(buf, "sunsupVL ", blen);
 685         if (err & INFINIPATH_E_SPKTLEN)
 686                 strlcat(buf, "spktlen ", blen);
 687         if (err & INFINIPATH_E_INVALIDADDR)
 688                 strlcat(buf, "invalidaddr ", blen);
 689         if (err & INFINIPATH_E_RICRC)
 690                 strlcat(buf, "CRC ", blen);
 691         if (err & INFINIPATH_E_RVCRC)
 692                 strlcat(buf, "VCRC ", blen);
 693         if (err & INFINIPATH_E_RRCVEGRFULL)
 694                 strlcat(buf, "rcvegrfull ", blen);
 695         if (err & INFINIPATH_E_RRCVHDRFULL)
 696                 strlcat(buf, "rcvhdrfull ", blen);
 697         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 698                 strlcat(buf, "ibcstatuschg ", blen);
 699         if (err & INFINIPATH_E_RIBLOSTLINK)
 700                 strlcat(buf, "riblostlink ", blen);
 701         if (err & INFINIPATH_E_HARDWARE)
 702                 strlcat(buf, "hardware ", blen);
 703         if (err & INFINIPATH_E_RESET)
 704                 strlcat(buf, "reset ", blen);
 705 }
 706
 707 /**
 708  * get_rhf_errstring - decode RHF errors
 709  * @err: the err number
 710  * @msg: the output buffer
 711  * @len: the length of the output buffer
 712  *
 713  * only used one place now, may want more later
 714  */
 715 static void get_rhf_errstring(u32 err, char *msg, size_t len)
 716 {
 717         /* if no errors, and so don't need to check what's first */
 718         *msg = '\0';
 719
 720         if (err & INFINIPATH_RHF_H_ICRCERR)
 721                 strlcat(msg, "icrcerr ", len);
 722         if (err & INFINIPATH_RHF_H_VCRCERR)
 723                 strlcat(msg, "vcrcerr ", len);
 724         if (err & INFINIPATH_RHF_H_PARITYERR)
 725                 strlcat(msg, "parityerr ", len);
 726         if (err & INFINIPATH_RHF_H_LENERR)
 727                 strlcat(msg, "lenerr ", len);
 728         if (err & INFINIPATH_RHF_H_MTUERR)
 729                 strlcat(msg, "mtuerr ", len);
 730         if (err & INFINIPATH_RHF_H_IHDRERR)
 731                 /* infinipath hdr checksum error */
 732                 strlcat(msg, "ipathhdrerr ", len);
 733         if (err & INFINIPATH_RHF_H_TIDERR)
 734                 strlcat(msg, "tiderr ", len);
 735         if (err & INFINIPATH_RHF_H_MKERR)
 736                 /* bad port, offset, etc. */
 737                 strlcat(msg, "invalid ipathhdr ", len);
 738         if (err & INFINIPATH_RHF_H_IBERR)
 739                 strlcat(msg, "iberr ", len);
 740         if (err & INFINIPATH_RHF_L_SWA)
 741                 strlcat(msg, "swA ", len);
 742         if (err & INFINIPATH_RHF_L_SWB)
 743                 strlcat(msg, "swB ", len);
 744 }
 745
 746 /**
 747  * ipath_get_egrbuf - get an eager buffer
 748  * @dd: the infinipath device
 749  * @bufnum: the eager buffer to get
 750  * @err: unused
 751  *
 752  * must only be called if ipath_pd[port] is known to be allocated
 753  */
 754 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum,
 755                                      int err)
 756 {
 757         return dd->ipath_port0_skbs ?
 758                 (void *)dd->ipath_port0_skbs[bufnum]->data : NULL;
 759 }
 760
 761 /**
 762  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
 763  * @dd: the infinipath device
 764  * @gfp_mask: the sk_buff SFP mask
 765  */
 766 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
 767                                 gfp_t gfp_mask)
 768 {
 769         struct sk_buff *skb;
 770         u32 len;
 771
 772         /*
 773          * Only fully supported way to handle this is to allocate lots
 774          * extra, align as needed, and then do skb_reserve().  That wastes
 775          * a lot of memory...  I'll have to hack this into infinipath_copy
 776          * also.
 777          */
 778
 779         /*
 780          * We need 4 extra bytes for unaligned transfer copying
 781          */
 782         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 783                 /* we need a 4KB multiple alignment, and there is no way
 784                  * to do it except to allocate extra and then skb_reserve
 785                  * enough to bring it up to the right alignment.
 786                  */
 787                 len = dd->ipath_ibmaxlen + 4 + (1 << 11) - 1;
 788         }
 789         else
 790                 len = dd->ipath_ibmaxlen + 4;
 791         skb = __dev_alloc_skb(len, gfp_mask);
 792         if (!skb) {
 793                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
 794                               len);
 795                 goto bail;
 796         }
 797         if (dd->ipath_flags & IPATH_4BYTE_TID) {
 798                 u32 una = ((1 << 11) - 1) & (unsigned long)(skb->data + 4);
 799                 if (una)
 800                         skb_reserve(skb, 4 + (1 << 11) - una);
 801                 else
 802                         skb_reserve(skb, 4);
 803         } else
 804                 skb_reserve(skb, 4);
 805
 806 bail:
 807         return skb;
 808 }
 809
 810 /**
 811  * ipath_rcv_layer - receive a packet for the layered (ethernet) driver
 812  * @dd: the infinipath device
 813  * @etail: the sk_buff number
 814  * @tlen: the total packet length
 815  * @hdr: the ethernet header
 816  *
 817  * Separate routine for better overall optimization
 818  */
 819 static void ipath_rcv_layer(struct ipath_devdata *dd, u32 etail,
 820                             u32 tlen, struct ether_header *hdr)
 821 {
 822         u32 elen;
 823         u8 pad, *bthbytes;
 824         struct sk_buff *skb, *nskb;
 825
 826         if (dd->ipath_port0_skbs &&
 827                         hdr->sub_opcode == IPATH_ITH4X_OPCODE_ENCAP) {
 828                 /*
 829                  * Allocate a new sk_buff to replace the one we give
 830                  * to the network stack.
 831                  */
 832                 nskb = ipath_alloc_skb(dd, GFP_ATOMIC);
 833                 if (!nskb) {
 834                         /* count OK packets that we drop */
 835                         ipath_stats.sps_krdrops++;
 836                         return;
 837                 }
 838
 839                 bthbytes = (u8 *) hdr->bth;
 840                 pad = (bthbytes[1] >> 4) & 3;
 841                 /* +CRC32 */
 842                 elen = tlen - (sizeof(*hdr) + pad + sizeof(u32));
 843
 844                 skb = dd->ipath_port0_skbs[etail];
 845                 dd->ipath_port0_skbs[etail] = nskb;
 846                 skb_put(skb, elen);
 847
 848                 dd->ipath_f_put_tid(dd, etail + (u64 __iomem *)
 849                                     ((char __iomem *) dd->ipath_kregbase
 850                                      + dd->ipath_rcvegrbase), 0,
 851                                     virt_to_phys(nskb->data));
 852
 853                 __ipath_layer_rcv(dd, hdr, skb);
 854
 855                 /* another ether packet received */
 856                 ipath_stats.sps_ether_rpkts++;
 857         }
 858         else if (hdr->sub_opcode == IPATH_ITH4X_OPCODE_LID_ARP)
 859                 __ipath_layer_rcv_lid(dd, hdr);
 860 }
 861
 862 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
 863                              u32 eflags,
 864                              u32 l,
 865                              u32 etail,
 866                              u64 *rc)
 867 {
 868         char emsg[128];
 869         struct ipath_message_header *hdr;
 870
 871         get_rhf_errstring(eflags, emsg, sizeof emsg);
 872         hdr = (struct ipath_message_header *)&rc[1];
 873         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
 874                    "tlen=%x opcode=%x egridx=%x: %s\n",
 875                    eflags, l,
 876                    ipath_hdrget_rcv_type((__le32 *) rc),
 877                    ipath_hdrget_length_in_bytes((__le32 *) rc),
 878                    be32_to_cpu(hdr->bth[0]) >> 24,
 879                    etail, emsg);
 880
 881         /* Count local link integrity errors. */
 882         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
 883                 u8 n = (dd->ipath_ibcctrl >>
 884                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
 885                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
 886
 887                 if (++dd->ipath_lli_counter > n) {
 888                         dd->ipath_lli_counter = 0;
 889                         dd->ipath_lli_errors++;
 890                 }
 891         }
 892 }
 893
 894 /*
 895  * ipath_kreceive - receive a packet
 896  * @dd: the infinipath device
 897  *
 898  * called from interrupt handler for errors or receive interrupt
 899  */
 900 void ipath_kreceive(struct ipath_devdata *dd)
 901 {
 902         u64 *rc;
 903         void *ebuf;
 904         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
 905         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
 906         u32 etail = -1, l, hdrqtail;
 907         struct ipath_message_header *hdr;
 908         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
 909         static u64 totcalls;    /* stats, may eventually remove */
 910
 911         if (!dd->ipath_hdrqtailptr) {
 912                 ipath_dev_err(dd,
 913                               "hdrqtailptr not set, can't do receives\n");
 914                 goto bail;
 915         }
 916
 917         /* There is already a thread processing this queue. */
 918         if (test_and_set_bit(0, &dd->ipath_rcv_pending))
 919                 goto bail;
 920
 921         l = dd->ipath_port0head;
 922         hdrqtail = (u32) le64_to_cpu(*dd->ipath_hdrqtailptr);
 923         if (l == hdrqtail)
 924                 goto done;
 925
 926 reloop:
 927         for (i = 0; l != hdrqtail; i++) {
 928                 u32 qp;
 929                 u8 *bthbytes;
 930
 931                 rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2));
 932                 hdr = (struct ipath_message_header *)&rc[1];
 933                 /*
 934                  * could make a network order version of IPATH_KD_QP, and
 935                  * do the obvious shift before masking to speed this up.
 936                  */
 937                 qp = ntohl(hdr->bth[1]) & 0xffffff;
 938                 bthbytes = (u8 *) hdr->bth;
 939
 940                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
 941                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
 942                 /* total length */
 943                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
 944                 ebuf = NULL;
 945                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
 946                         /*
 947                          * it turns out that the chips uses an eager buffer
 948                          * for all non-expected packets, whether it "needs"
 949                          * one or not.  So always get the index, but don't
 950                          * set ebuf (so we try to copy data) unless the
 951                          * length requires it.
 952                          */
 953                         etail = ipath_hdrget_index((__le32 *) rc);
 954                         if (tlen > sizeof(*hdr) ||
 955                             etype == RCVHQ_RCV_TYPE_NON_KD)
 956                                 ebuf = ipath_get_egrbuf(dd, etail, 0);
 957                 }
 958
 959                 /*
 960                  * both tiderr and ipathhdrerr are set for all plain IB
 961                  * packets; only ipathhdrerr should be set.
 962                  */
 963
 964                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
 965                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
 966                             hdr->iph.ver_port_tid_offset) !=
 967                     IPS_PROTO_VERSION) {
 968                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
 969                                    "%x\n", etype);
 970                 }
 971
 972                 if (unlikely(eflags))
 973                         ipath_rcv_hdrerr(dd, eflags, l, etail, rc);
 974                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
 975                                 int ret = __ipath_verbs_rcv(dd, rc + 1,
 976                                                             ebuf, tlen);
 977                                 if (ret == -ENODEV)
 978                                         ipath_cdbg(VERBOSE,
 979                                                    "received IB packet, "
 980                                                    "not SMA (QP=%x)\n", qp);
 981                                 if (dd->ipath_lli_counter)
 982                                         dd->ipath_lli_counter--;
 983
 984                 } else if (etype == RCVHQ_RCV_TYPE_EAGER) {
 985                         if (qp == IPATH_KD_QP &&
 986                             bthbytes[0] == ipath_layer_rcv_opcode &&
 987                             ebuf)
 988                                 ipath_rcv_layer(dd, etail, tlen,
 989                                                 (struct ether_header *)hdr);
 990                         else
 991                                 ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
 992                                            "qp=%x), len %x; ignored\n",
 993                                            etype, bthbytes[0], qp, tlen);
 994                 }
 995                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
 996                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
 997                                   be32_to_cpu(hdr->bth[0]) & 0xff);
 998                 else {
 999                         /*
1000                          * error packet, type of error  unknown.
1001                          * Probably type 3, but we don't know, so don't
1002                          * even try to print the opcode, etc.
1003                          */
1004                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1005                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1006                                   "hdr %llx %llx %llx %llx %llx\n",
1007                                   etail, tlen, (unsigned long) rc, l,
1008                                   (unsigned long long) rc[0],
1009                                   (unsigned long long) rc[1],
1010                                   (unsigned long long) rc[2],
1011                                   (unsigned long long) rc[3],
1012                                   (unsigned long long) rc[4],
1013                                   (unsigned long long) rc[5]);
1014                 }
1015                 l += rsize;
1016                 if (l >= maxcnt)
1017                         l = 0;
1018                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1019                     updegr = 1;
1020                 /*
1021                  * update head regs on last packet, and every 16 packets.
1022                  * Reduce bus traffic, while still trying to prevent
1023                  * rcvhdrq overflows, for when the queue is nearly full
1024                  */
1025                 if (l == hdrqtail || (i && !(i&0xf))) {
1026                         u64 lval;
1027                         if (l == hdrqtail) /* PE-800 interrupt only on last */
1028                                 lval = dd->ipath_rhdrhead_intr_off | l;
1029                         else
1030                                 lval = l;
1031                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
1032                         if (updegr) {
1033                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1034                                                        etail, 0);
1035                                 updegr = 0;
1036                         }
1037                 }
1038         }
1039
1040         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
1041                 /* HT-400 workaround; we can have a race clearing chip
1042                  * interrupt with another interrupt about to be delivered,
1043                  * and can clear it before it is delivered on the GPIO
1044                  * workaround.  By doing the extra check here for the
1045                  * in-memory tail register updating while we were doing
1046                  * earlier packets, we "almost" guarantee we have covered
1047                  * that case.
1048                  */
1049                 u32 hqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr);
1050                 if (hqtail != hdrqtail) {
1051                         hdrqtail = hqtail;
1052                         reloop = 1; /* loop 1 extra time at most */
1053                         goto reloop;
1054                 }
1055         }
1056
1057         pkttot += i;
1058
1059         dd->ipath_port0head = l;
1060
1061         if (pkttot > ipath_stats.sps_maxpkts_call)
1062                 ipath_stats.sps_maxpkts_call = pkttot;
1063         ipath_stats.sps_port0pkts += pkttot;
1064         ipath_stats.sps_avgpkts_call =
1065                 ipath_stats.sps_port0pkts / ++totcalls;
1066
1067 done:
1068         clear_bit(0, &dd->ipath_rcv_pending);
1069         smp_mb__after_clear_bit();
1070
1071 bail:;
1072 }
1073
1074 /**
1075  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1076  * @dd: the infinipath device
1077  *
1078  * called whenever our local copy indicates we have run out of send buffers
1079  * NOTE: This can be called from interrupt context by some code
1080  * and from non-interrupt context by ipath_getpiobuf().
1081  */
1082
1083 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1084 {
1085         unsigned long flags;
1086         int i;
1087         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1088
1089         /* If the generation (check) bits have changed, then we update the
1090          * busy bit for the corresponding PIO buffer.  This algorithm will
1091          * modify positions to the value they already have in some cases
1092          * (i.e., no change), but it's faster than changing only the bits
1093          * that have changed.
1094          *
1095          * We would like to do this atomicly, to avoid spinlocks in the
1096          * critical send path, but that's not really possible, given the
1097          * type of changes, and that this routine could be called on
1098          * multiple cpu's simultaneously, so we lock in this routine only,
1099          * to avoid conflicting updates; all we change is the shadow, and
1100          * it's a single 64 bit memory location, so by definition the update
1101          * is atomic in terms of what other cpu's can see in testing the
1102          * bits.  The spin_lock overhead isn't too bad, since it only
1103          * happens when all buffers are in use, so only cpu overhead, not
1104          * latency or bandwidth is affected.
1105          */
1106 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1107         if (!dd->ipath_pioavailregs_dma) {
1108                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1109                 return;
1110         }
1111         if (ipath_debug & __IPATH_VERBDBG) {
1112                 /* only if packet debug and verbose */
1113                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1114                 unsigned long *shadow = dd->ipath_pioavailshadow;
1115
1116                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1117                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1118                            "s3=%lx\n",
1119                            (unsigned long long) le64_to_cpu(dma[0]),
1120                            shadow[0],
1121                            (unsigned long long) le64_to_cpu(dma[1]),
1122                            shadow[1],
1123                            (unsigned long long) le64_to_cpu(dma[2]),
1124                            shadow[2],
1125                            (unsigned long long) le64_to_cpu(dma[3]),
1126                            shadow[3]);
1127                 if (piobregs > 4)
1128                         ipath_cdbg(
1129                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1130                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1131                                 "d7=%llx s7=%lx\n",
1132                                 (unsigned long long) le64_to_cpu(dma[4]),
1133                                 shadow[4],
1134                                 (unsigned long long) le64_to_cpu(dma[5]),
1135                                 shadow[5],
1136                                 (unsigned long long) le64_to_cpu(dma[6]),
1137                                 shadow[6],
1138                                 (unsigned long long) le64_to_cpu(dma[7]),
1139                                 shadow[7]);
1140         }
1141         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1142         for (i = 0; i < piobregs; i++) {
1143                 u64 pchbusy, pchg, piov, pnew;
1144                 /*
1145                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1146                  */
1147                 if (i > 3) {
1148                         if (i & 1)
1149                                 piov = le64_to_cpu(
1150                                         dd->ipath_pioavailregs_dma[i - 1]);
1151                         else
1152                                 piov = le64_to_cpu(
1153                                         dd->ipath_pioavailregs_dma[i + 1]);
1154                 } else
1155                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1156                 pchg = _IPATH_ALL_CHECKBITS &
1157                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1158                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1159                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1160                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1161                         pnew |= piov & pchbusy;
1162                         dd->ipath_pioavailshadow[i] = pnew;
1163                 }
1164         }
1165         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1166 }
1167
1168 /**
1169  * ipath_setrcvhdrsize - set the receive header size
1170  * @dd: the infinipath device
1171  * @rhdrsize: the receive header size
1172  *
1173  * called from user init code, and also layered driver init
1174  */
1175 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1176 {
1177         int ret = 0;
1178
1179         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1180                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1181                         dev_info(&dd->pcidev->dev,
1182                                  "Error: can't set protocol header "
1183                                  "size %u, already %u\n",
1184                                  rhdrsize, dd->ipath_rcvhdrsize);
1185                         ret = -EAGAIN;
1186                 } else
1187                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1188                                    "size %u\n", dd->ipath_rcvhdrsize);
1189         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1190                                (sizeof(u64) / sizeof(u32)))) {
1191                 ipath_dbg("Error: can't set protocol header size %u "
1192                           "(> max %u)\n", rhdrsize,
1193                           dd->ipath_rcvhdrentsize -
1194                           (u32) (sizeof(u64) / sizeof(u32)));
1195                 ret = -EOVERFLOW;
1196         } else {
1197                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1198                 dd->ipath_rcvhdrsize = rhdrsize;
1199                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1200                                  dd->ipath_rcvhdrsize);
1201                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1202                            dd->ipath_rcvhdrsize);
1203         }
1204         return ret;
1205 }
1206
1207 /**
1208  * ipath_getpiobuf - find an available pio buffer
1209  * @dd: the infinipath device
1210  * @pbufnum: the buffer number is placed here
1211  *
1212  * do appropriate marking as busy, etc.
1213  * returns buffer number if one found (>=0), negative number is error.
1214  * Used by ipath_sma_send_pkt and ipath_layer_send
1215  */
1216 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1217 {
1218         int i, j, starti, updated = 0;
1219         unsigned piobcnt, iter;
1220         unsigned long flags;
1221         unsigned long *shadow = dd->ipath_pioavailshadow;
1222         u32 __iomem *buf;
1223
1224         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1225                              + dd->ipath_piobcnt4k);
1226         starti = dd->ipath_lastport_piobuf;
1227         iter = piobcnt - starti;
1228         if (dd->ipath_upd_pio_shadow) {
1229                 /*
1230                  * Minor optimization.  If we had no buffers on last call,
1231                  * start out by doing the update; continue and do scan even
1232                  * if no buffers were updated, to be paranoid
1233                  */
1234                 ipath_update_pio_bufs(dd);
1235                 /* we scanned here, don't do it at end of scan */
1236                 updated = 1;
1237                 i = starti;
1238         } else
1239                 i = dd->ipath_lastpioindex;
1240
1241 rescan:
1242         /*
1243          * while test_and_set_bit() is atomic, we do that and then the
1244          * change_bit(), and the pair is not.  See if this is the cause
1245          * of the remaining armlaunch errors.
1246          */
1247         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1248         for (j = 0; j < iter; j++, i++) {
1249                 if (i >= piobcnt)
1250                         i = starti;
1251                 /*
1252                  * To avoid bus lock overhead, we first find a candidate
1253                  * buffer, then do the test and set, and continue if that
1254                  * fails.
1255                  */
1256                 if (test_bit((2 * i) + 1, shadow) ||
1257                     test_and_set_bit((2 * i) + 1, shadow))
1258                         continue;
1259                 /* flip generation bit */
1260                 change_bit(2 * i, shadow);
1261                 break;
1262         }
1263         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1264
1265         if (j == iter) {
1266                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1267
1268                 /*
1269                  * first time through; shadow exhausted, but may be real
1270                  * buffers available, so go see; if any updated, rescan
1271                  * (once)
1272                  */
1273                 if (!updated) {
1274                         ipath_update_pio_bufs(dd);
1275                         updated = 1;
1276                         i = starti;
1277                         goto rescan;
1278                 }
1279                 dd->ipath_upd_pio_shadow = 1;
1280                 /*
1281                  * not atomic, but if we lose one once in a while, that's OK
1282                  */
1283                 ipath_stats.sps_nopiobufs++;
1284                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1285                         ipath_dbg(
1286                                 "%u pio sends with no bufavail; dmacopy: "
1287                                 "%llx %llx %llx %llx; shadow:  "
1288                                 "%lx %lx %lx %lx\n",
1289                                 dd->ipath_consec_nopiobuf,
1290                                 (unsigned long long) le64_to_cpu(dma[0]),
1291                                 (unsigned long long) le64_to_cpu(dma[1]),
1292                                 (unsigned long long) le64_to_cpu(dma[2]),
1293                                 (unsigned long long) le64_to_cpu(dma[3]),
1294                                 shadow[0], shadow[1], shadow[2],
1295                                 shadow[3]);
1296                         /*
1297                          * 4 buffers per byte, 4 registers above, cover rest
1298                          * below
1299                          */
1300                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1301                             (sizeof(shadow[0]) * 4 * 4))
1302                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1303                                           "%llx %llx; shadow: %lx %lx "
1304                                           "%lx %lx\n",
1305                                           (unsigned long long)
1306                                           le64_to_cpu(dma[4]),
1307                                           (unsigned long long)
1308                                           le64_to_cpu(dma[5]),
1309                                           (unsigned long long)
1310                                           le64_to_cpu(dma[6]),
1311                                           (unsigned long long)
1312                                           le64_to_cpu(dma[7]),
1313                                           shadow[4], shadow[5],
1314                                           shadow[6], shadow[7]);
1315                 }
1316                 buf = NULL;
1317                 goto bail;
1318         }
1319
1320         if (updated)
1321                 /*
1322                  * ran out of bufs, now some (at least this one we just
1323                  * got) are now available, so tell the layered driver.
1324                  */
1325                 __ipath_layer_intr(dd, IPATH_LAYER_INT_SEND_CONTINUE);
1326
1327         /*
1328          * set next starting place.  Since it's just an optimization,
1329          * it doesn't matter who wins on this, so no locking
1330          */
1331         dd->ipath_lastpioindex = i + 1;
1332         if (dd->ipath_upd_pio_shadow)
1333                 dd->ipath_upd_pio_shadow = 0;
1334         if (dd->ipath_consec_nopiobuf)
1335                 dd->ipath_consec_nopiobuf = 0;
1336         if (i < dd->ipath_piobcnt2k)
1337                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1338                                        i * dd->ipath_palign);
1339         else
1340                 buf = (u32 __iomem *)
1341                         (dd->ipath_pio4kbase +
1342                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1343         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1344                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1345         if (pbufnum)
1346                 *pbufnum = i;
1347
1348 bail:
1349         return buf;
1350 }
1351
1352 /**
1353  * ipath_create_rcvhdrq - create a receive header queue
1354  * @dd: the infinipath device
1355  * @pd: the port data
1356  *
1357  * this must be contiguous memory (from an i/o perspective), and must be
1358  * DMA'able (which means for some systems, it will go through an IOMMU,
1359  * or be forced into a low address range).
1360  */
1361 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1362                          struct ipath_portdata *pd)
1363 {
1364         int ret = 0;
1365
1366         if (!pd->port_rcvhdrq) {
1367                 dma_addr_t phys_hdrqtail;
1368                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1369                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1370                                 sizeof(u32), PAGE_SIZE);
1371
1372                 pd->port_rcvhdrq = dma_alloc_coherent(
1373                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1374                         gfp_flags);
1375
1376                 if (!pd->port_rcvhdrq) {
1377                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1378                                       "for port %u rcvhdrq failed\n",
1379                                       amt, pd->port_port);
1380                         ret = -ENOMEM;
1381                         goto bail;
1382                 }
1383                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1384                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1385                 if (!pd->port_rcvhdrtail_kvaddr) {
1386                         ipath_dev_err(dd, "attempt to allocate 1 page "
1387                                       "for port %u rcvhdrqtailaddr failed\n",
1388                                       pd->port_port);
1389                         ret = -ENOMEM;
1390                         goto bail;
1391                 }
1392                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1393
1394                 pd->port_rcvhdrq_size = amt;
1395
1396                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1397                            "for port %u rcvhdr Q\n",
1398                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1399                            (unsigned long) pd->port_rcvhdrq_phys,
1400                            (unsigned long) pd->port_rcvhdrq_size,
1401                            pd->port_port);
1402
1403                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1404                            pd->port_port,
1405                            (unsigned long long) phys_hdrqtail);
1406         }
1407         else
1408                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1409                            "hdrtailaddr@%p %llx physical\n",
1410                            pd->port_port, pd->port_rcvhdrq,
1411                            pd->port_rcvhdrq_phys, pd->port_rcvhdrtail_kvaddr,
1412                            (unsigned long long)pd->port_rcvhdrqtailaddr_phys);
1413
1414         /* clear for security and sanity on each use */
1415         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1416         memset((void *)pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1417
1418         /*
1419          * tell chip each time we init it, even if we are re-using previous
1420          * memory (we zero the register at process close)
1421          */
1422         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1423                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1424         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1425                               pd->port_port, pd->port_rcvhdrq_phys);
1426
1427         ret = 0;
1428 bail:
1429         return ret;
1430 }
1431
1432 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1433                            u64 bits_to_wait_for, u64 * valp)
1434 {
1435         unsigned long timeout;
1436         u64 lastval, val;
1437         int ret;
1438
1439         lastval = ipath_read_kreg64(dd, reg_id);
1440         /* wait a ridiculously long time */
1441         timeout = jiffies + msecs_to_jiffies(5);
1442         do {
1443                 val = ipath_read_kreg64(dd, reg_id);
1444                 /* set so they have something, even on failures. */
1445                 *valp = val;
1446                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1447                         ret = 0;
1448                         break;
1449                 }
1450                 if (val != lastval)
1451                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1452                                    "waiting for %llx bits\n",
1453                                    (unsigned long long) lastval,
1454                                    (unsigned long long) val,
1455                                    (unsigned long long) bits_to_wait_for);
1456                 cond_resched();
1457                 if (time_after(jiffies, timeout)) {
1458                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1459                                   "got %llx\n",
1460                                   (unsigned long long) bits_to_wait_for,
1461                                   reg_id, (unsigned long long) *valp);
1462                         ret = -ENODEV;
1463                         break;
1464                 }
1465         } while (1);
1466
1467         return ret;
1468 }
1469
1470 /**
1471  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1472  * @dd: the infinipath device
1473  *
1474  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1475  * away indicating the last command has completed.  It doesn't return data
1476  */
1477 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1478 {
1479         unsigned long timeout;
1480         u64 val;
1481         int ret;
1482
1483         /* wait a ridiculously long time */
1484         timeout = jiffies + msecs_to_jiffies(5);
1485         do {
1486                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1487                 if (!(val & IPATH_MDIO_CMDVALID)) {
1488                         ret = 0;
1489                         break;
1490                 }
1491                 cond_resched();
1492                 if (time_after(jiffies, timeout)) {
1493                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1494                                   (unsigned long long) val);
1495                         ret = -ENODEV;
1496                         break;
1497                 }
1498         } while (1);
1499
1500         return ret;
1501 }
1502
1503 void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1504 {
1505         static const char *what[4] = {
1506                 [0] = "DOWN",
1507                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1508                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1509                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1510         };
1511         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1512                         INFINIPATH_IBCC_LINKCMD_MASK;
1513
1514         ipath_cdbg(SMA, "Trying to move unit %u to %s, current ltstate "
1515                    "is %s\n", dd->ipath_unit,
1516                    what[linkcmd],
1517                    ipath_ibcstatus_str[
1518                            (ipath_read_kreg64
1519                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1520                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1521                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1522         /* flush all queued sends when going to DOWN or INIT, to be sure that
1523          * they don't block SMA and other MAD packets */
1524         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT) {
1525                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1526                                  INFINIPATH_S_ABORT);
1527                 ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf,
1528                                     (unsigned)(dd->ipath_piobcnt2k +
1529                                     dd->ipath_piobcnt4k) -
1530                                     dd->ipath_lastport_piobuf);
1531         }
1532
1533         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1534                          dd->ipath_ibcctrl | which);
1535 }
1536
1537 /**
1538  * ipath_read_kreg64_port - read a device's per-port 64-bit kernel register
1539  * @dd: the infinipath device
1540  * @regno: the register number to read
1541  * @port: the port containing the register
1542  *
1543  * Registers that vary with the chip implementation constants (port)
1544  * use this routine.
1545  */
1546 u64 ipath_read_kreg64_port(const struct ipath_devdata *dd, ipath_kreg regno,
1547                            unsigned port)
1548 {
1549         u16 where;
1550
1551         if (port < dd->ipath_portcnt &&
1552             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1553              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1554                 where = regno + port;
1555         else
1556                 where = -1;
1557
1558         return ipath_read_kreg64(dd, where);
1559 }
1560
1561 /**
1562  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1563  * @dd: the infinipath device
1564  * @regno: the register number to write
1565  * @port: the port containing the register
1566  * @value: the value to write
1567  *
1568  * Registers that vary with the chip implementation constants (port)
1569  * use this routine.
1570  */
1571 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1572                           unsigned port, u64 value)
1573 {
1574         u16 where;
1575
1576         if (port < dd->ipath_portcnt &&
1577             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1578              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1579                 where = regno + port;
1580         else
1581                 where = -1;
1582
1583         ipath_write_kreg(dd, where, value);
1584 }
1585
1586 /**
1587  * ipath_shutdown_device - shut down a device
1588  * @dd: the infinipath device
1589  *
1590  * This is called to make the device quiet when we are about to
1591  * unload the driver, and also when the device is administratively
1592  * disabled.   It does not free any data structures.
1593  * Everything it does has to be setup again by ipath_init_chip(dd,1)
1594  */
1595 void ipath_shutdown_device(struct ipath_devdata *dd)
1596 {
1597         u64 val;
1598
1599         ipath_dbg("Shutting down the device\n");
1600
1601         dd->ipath_flags |= IPATH_LINKUNK;
1602         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
1603                              IPATH_LINKINIT | IPATH_LINKARMED |
1604                              IPATH_LINKACTIVE);
1605         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
1606                                 IPATH_STATUS_IB_READY);
1607
1608         /* mask interrupts, but not errors */
1609         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
1610
1611         dd->ipath_rcvctrl = 0;
1612         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1613                          dd->ipath_rcvctrl);
1614
1615         /*
1616          * gracefully stop all sends allowing any in progress to trickle out
1617          * first.
1618          */
1619         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0ULL);
1620         /* flush it */
1621         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1622         /*
1623          * enough for anything that's going to trickle out to have actually
1624          * done so.
1625          */
1626         udelay(5);
1627
1628         /*
1629          * abort any armed or launched PIO buffers that didn't go. (self
1630          * clearing).  Will cause any packet currently being transmitted to
1631          * go out with an EBP, and may also cause a short packet error on
1632          * the receiver.
1633          */
1634         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1635                          INFINIPATH_S_ABORT);
1636
1637         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1638                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1639
1640         /*
1641          * we are shutting down, so tell the layered driver.  We don't do
1642          * this on just a link state change, much like ethernet, a cable
1643          * unplug, etc. doesn't change driver state
1644          */
1645         ipath_layer_intr(dd, IPATH_LAYER_INT_IF_DOWN);
1646
1647         /* disable IBC */
1648         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
1649         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1650                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
1651
1652         /*
1653          * clear SerdesEnable and turn the leds off; do this here because
1654          * we are unloading, so don't count on interrupts to move along
1655          * Turn the LEDs off explictly for the same reason.
1656          */
1657         dd->ipath_f_quiet_serdes(dd);
1658         dd->ipath_f_setextled(dd, 0, 0);
1659
1660         if (dd->ipath_stats_timer_active) {
1661                 del_timer_sync(&dd->ipath_stats_timer);
1662                 dd->ipath_stats_timer_active = 0;
1663         }
1664
1665         /*
1666          * clear all interrupts and errors, so that the next time the driver
1667          * is loaded or device is enabled, we know that whatever is set
1668          * happened while we were unloaded
1669          */
1670         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1671                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
1672         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
1673         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
1674 }
1675
1676 /**
1677  * ipath_free_pddata - free a port's allocated data
1678  * @dd: the infinipath device
1679  * @pd: the portdata structure
1680  *
1681  * free up any allocated data for a port
1682  * This should not touch anything that would affect a simultaneous
1683  * re-allocation of port data, because it is called after ipath_mutex
1684  * is released (and can be called from reinit as well).
1685  * It should never change any chip state, or global driver state.
1686  * (The only exception to global state is freeing the port0 port0_skbs.)
1687  */
1688 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
1689 {
1690         if (!pd)
1691                 return;
1692
1693         if (pd->port_rcvhdrq) {
1694                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
1695                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
1696                            (unsigned long) pd->port_rcvhdrq_size);
1697                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
1698                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1699                 pd->port_rcvhdrq = NULL;
1700                 if (pd->port_rcvhdrtail_kvaddr) {
1701                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1702                                          (void *)pd->port_rcvhdrtail_kvaddr,
1703                                          pd->port_rcvhdrqtailaddr_phys);
1704                         pd->port_rcvhdrtail_kvaddr = NULL;
1705                 }
1706         }
1707         if (pd->port_port && pd->port_rcvegrbuf) {
1708                 unsigned e;
1709
1710                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
1711                         void *base = pd->port_rcvegrbuf[e];
1712                         size_t size = pd->port_rcvegrbuf_size;
1713
1714                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
1715                                    "chunk %u/%u\n", base,
1716                                    (unsigned long) size,
1717                                    e, pd->port_rcvegrbuf_chunks);
1718                         dma_free_coherent(&dd->pcidev->dev, size,
1719                                 base, pd->port_rcvegrbuf_phys[e]);
1720                 }
1721                 vfree(pd->port_rcvegrbuf);
1722                 pd->port_rcvegrbuf = NULL;
1723                 vfree(pd->port_rcvegrbuf_phys);
1724                 pd->port_rcvegrbuf_phys = NULL;
1725                 pd->port_rcvegrbuf_chunks = 0;
1726         } else if (pd->port_port == 0 && dd->ipath_port0_skbs) {
1727                 unsigned e;
1728                 struct sk_buff **skbs = dd->ipath_port0_skbs;
1729
1730                 dd->ipath_port0_skbs = NULL;
1731                 ipath_cdbg(VERBOSE, "free closed port %d ipath_port0_skbs "
1732                            "@ %p\n", pd->port_port, skbs);
1733                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
1734                         if (skbs[e])
1735                                 dev_kfree_skb(skbs[e]);
1736                 vfree(skbs);
1737         }
1738         kfree(pd->port_tid_pg_list);
1739         kfree(pd);
1740 }
1741
1742 static int __init infinipath_init(void)
1743 {
1744         int ret;
1745
1746         ipath_dbg(KERN_INFO DRIVER_LOAD_MSG "%s", ipath_core_version);
1747
1748         /*
1749          * These must be called before the driver is registered with
1750          * the PCI subsystem.
1751          */
1752         idr_init(&unit_table);
1753         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
1754                 ret = -ENOMEM;
1755                 goto bail;
1756         }
1757
1758         ret = pci_register_driver(&ipath_driver);
1759         if (ret < 0) {
1760                 printk(KERN_ERR IPATH_DRV_NAME
1761                        ": Unable to register driver: error %d\n", -ret);
1762                 goto bail_unit;
1763         }
1764
1765         ret = ipath_driver_create_group(&ipath_driver.driver);
1766         if (ret < 0) {
1767                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create driver "
1768                        "sysfs entries: error %d\n", -ret);
1769                 goto bail_pci;
1770         }
1771
1772         ret = ipath_init_ipathfs();
1773         if (ret < 0) {
1774                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
1775                        "ipathfs: error %d\n", -ret);
1776                 goto bail_group;
1777         }
1778
1779         goto bail;
1780
1781 bail_group:
1782         ipath_driver_remove_group(&ipath_driver.driver);
1783
1784 bail_pci:
1785         pci_unregister_driver(&ipath_driver);
1786
1787 bail_unit:
1788         idr_destroy(&unit_table);
1789
1790 bail:
1791         return ret;
1792 }
1793
1794 static void cleanup_device(struct ipath_devdata *dd)
1795 {
1796         int port;
1797
1798         ipath_shutdown_device(dd);
1799
1800         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
1801                 /* can't do anything more with chip; needs re-init */
1802                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
1803                 if (dd->ipath_kregbase) {
1804                         /*
1805                          * if we haven't already cleaned up before these are
1806                          * to ensure any register reads/writes "fail" until
1807                          * re-init
1808                          */
1809                         dd->ipath_kregbase = NULL;
1810                         dd->ipath_uregbase = 0;
1811                         dd->ipath_sregbase = 0;
1812                         dd->ipath_cregbase = 0;
1813                         dd->ipath_kregsize = 0;
1814                 }
1815                 ipath_disable_wc(dd);
1816         }
1817
1818         if (dd->ipath_pioavailregs_dma) {
1819                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
1820                                   (void *) dd->ipath_pioavailregs_dma,
1821                                   dd->ipath_pioavailregs_phys);
1822                 dd->ipath_pioavailregs_dma = NULL;
1823         }
1824         if (dd->ipath_dummy_hdrq) {
1825                 dma_free_coherent(&dd->pcidev->dev,
1826                         dd->ipath_pd[0]->port_rcvhdrq_size,
1827                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
1828                 dd->ipath_dummy_hdrq = NULL;
1829         }
1830
1831         if (dd->ipath_pageshadow) {
1832                 struct page **tmpp = dd->ipath_pageshadow;
1833                 int i, cnt = 0;
1834
1835                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
1836                            "locked\n");
1837                 for (port = 0; port < dd->ipath_cfgports; port++) {
1838                         int port_tidbase = port * dd->ipath_rcvtidcnt;
1839                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
1840                         for (i = port_tidbase; i < maxtid; i++) {
1841                                 if (!tmpp[i])
1842                                         continue;
1843                                 ipath_release_user_pages(&tmpp[i], 1);
1844                                 tmpp[i] = NULL;
1845                                 cnt++;
1846                         }
1847                 }
1848                 if (cnt) {
1849                         ipath_stats.sps_pageunlocks += cnt;
1850                         ipath_cdbg(VERBOSE, "There were still %u expTID "
1851                                    "entries locked\n", cnt);
1852                 }
1853                 if (ipath_stats.sps_pagelocks ||
1854                     ipath_stats.sps_pageunlocks)
1855                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
1856                                    "unlocked via ipath_m{un}lock\n",
1857                                    (unsigned long long)
1858                                    ipath_stats.sps_pagelocks,
1859                                    (unsigned long long)
1860                                    ipath_stats.sps_pageunlocks);
1861
1862                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
1863                            dd->ipath_pageshadow);
1864                 vfree(dd->ipath_pageshadow);
1865                 dd->ipath_pageshadow = NULL;
1866         }
1867
1868         /*
1869          * free any resources still in use (usually just kernel ports)
1870          * at unload; we do for portcnt, not cfgports, because cfgports
1871          * could have changed while we were loaded.
1872          */
1873         for (port = 0; port < dd->ipath_portcnt; port++) {
1874                 struct ipath_portdata *pd = dd->ipath_pd[port];
1875                 dd->ipath_pd[port] = NULL;
1876                 ipath_free_pddata(dd, pd);
1877         }
1878         kfree(dd->ipath_pd);
1879         /*
1880          * debuggability, in case some cleanup path tries to use it
1881          * after this
1882          */
1883         dd->ipath_pd = NULL;
1884 }
1885
1886 static void __exit infinipath_cleanup(void)
1887 {
1888         struct ipath_devdata *dd, *tmp;
1889         unsigned long flags;
1890
1891         ipath_exit_ipathfs();
1892
1893         ipath_driver_remove_group(&ipath_driver.driver);
1894
1895         spin_lock_irqsave(&ipath_devs_lock, flags);
1896
1897         /*
1898          * turn off rcv, send, and interrupts for all ports, all drivers
1899          * should also hard reset the chip here?
1900          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
1901          * for all versions of the driver, if they were allocated
1902          */
1903         list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
1904                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
1905
1906                 if (dd->ipath_kregbase)
1907                         cleanup_device(dd);
1908
1909                 if (dd->pcidev) {
1910                         if (dd->pcidev->irq) {
1911                                 ipath_cdbg(VERBOSE,
1912                                            "unit %u free_irq of irq %x\n",
1913                                            dd->ipath_unit, dd->pcidev->irq);
1914                                 free_irq(dd->pcidev->irq, dd);
1915                         } else
1916                                 ipath_dbg("irq is 0, not doing free_irq "
1917                                           "for unit %u\n", dd->ipath_unit);
1918
1919                         /*
1920                          * we check for NULL here, because it's outside
1921                          * the kregbase check, and we need to call it
1922                          * after the free_irq.  Thus it's possible that
1923                          * the function pointers were never initialized.
1924                          */
1925                         if (dd->ipath_f_cleanup)
1926                                 /* clean up chip-specific stuff */
1927                                 dd->ipath_f_cleanup(dd);
1928
1929                         dd->pcidev = NULL;
1930                 }
1931                 spin_lock_irqsave(&ipath_devs_lock, flags);
1932         }
1933
1934         spin_unlock_irqrestore(&ipath_devs_lock, flags);
1935
1936         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
1937         pci_unregister_driver(&ipath_driver);
1938
1939         idr_destroy(&unit_table);
1940 }
1941
1942 /**
1943  * ipath_reset_device - reset the chip if possible
1944  * @unit: the device to reset
1945  *
1946  * Whether or not reset is successful, we attempt to re-initialize the chip
1947  * (that is, much like a driver unload/reload).  We clear the INITTED flag
1948  * so that the various entry points will fail until we reinitialize.  For
1949  * now, we only allow this if no user ports are open that use chip resources
1950  */
1951 int ipath_reset_device(int unit)
1952 {
1953         int ret, i;
1954         struct ipath_devdata *dd = ipath_lookup(unit);
1955
1956         if (!dd) {
1957                 ret = -ENODEV;
1958                 goto bail;
1959         }
1960
1961         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
1962
1963         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
1964                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
1965                          "not initialized or not present\n", unit);
1966                 ret = -ENXIO;
1967                 goto bail;
1968         }
1969
1970         if (dd->ipath_pd)
1971                 for (i = 1; i < dd->ipath_cfgports; i++) {
1972                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
1973                                 ipath_dbg("unit %u port %d is in use "
1974                                           "(PID %u cmd %s), can't reset\n",
1975                                           unit, i,
1976                                           dd->ipath_pd[i]->port_pid,
1977                                           dd->ipath_pd[i]->port_comm);
1978                                 ret = -EBUSY;
1979                                 goto bail;
1980                         }
1981                 }
1982
1983         dd->ipath_flags &= ~IPATH_INITTED;
1984         ret = dd->ipath_f_reset(dd);
1985         if (ret != 1)
1986                 ipath_dbg("reset was not successful\n");
1987         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
1988                   unit);
1989         ret = ipath_init_chip(dd, 1);
1990         if (ret)
1991                 ipath_dev_err(dd, "Reinitialize unit %u after "
1992                               "reset failed with %d\n", unit, ret);
1993         else
1994                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
1995                          "resetting\n", unit);
1996
1997 bail:
1998         return ret;
1999 }
2000
2001 module_init(infinipath_init);
2002 module_exit(infinipath_cleanup);