drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276         resp->offset = queue->offset;
 277 }
 278
 279 /*
 280  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 281  */
 282 static inline int init_qp_queue(struct ehca_shca *shca,
 283                                 struct ehca_pd *pd,
 284                                 struct ehca_qp *my_qp,
 285                                 struct ipz_queue *queue,
 286                                 int q_type,
 287                                 u64 expected_hret,
 288                                 struct ehca_alloc_queue_parms *parms,
 289                                 int wqe_size)
 290 {
 291         int ret, cnt, ipz_rc, nr_q_pages;
 292         void *vpage;
 293         u64 rpage, h_ret;
 294         struct ib_device *ib_dev = &shca->ib_device;
 295         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 296
 297         if (!parms->queue_size)
 298                 return 0;
 299
 300         if (parms->is_small) {
 301                 nr_q_pages = 1;
 302                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 303                                         128 << parms->page_size,
 304                                         wqe_size, parms->act_nr_sges, 1);
 305         } else {
 306                 nr_q_pages = parms->queue_size;
 307                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 308                                         EHCA_PAGESIZE, wqe_size,
 309                                         parms->act_nr_sges, 0);
 310         }
 311
 312         if (!ipz_rc) {
 313                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
 314                          ipz_rc);
 315                 return -EBUSY;
 316         }
 317
 318         /* register queue pages */
 319         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 320                 vpage = ipz_qpageit_get_inc(queue);
 321                 if (!vpage) {
 322                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 323                                  "failed p_vpage= %p", vpage);
 324                         ret = -EINVAL;
 325                         goto init_qp_queue1;
 326                 }
 327                 rpage = virt_to_abs(vpage);
 328
 329                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 330                                                  my_qp->ipz_qp_handle,
 331                                                  NULL, 0, q_type,
 332                                                  rpage, parms->is_small ? 0 : 1,
 333                                                  my_qp->galpas.kernel);
 334                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 335                         if (h_ret != expected_hret) {
 336                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 337                                          "h_ret=%li", h_ret);
 338                                 ret = ehca2ib_return_code(h_ret);
 339                                 goto init_qp_queue1;
 340                         }
 341                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 342                         if (vpage) {
 343                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 344                                          "should not succeed vpage=%p", vpage);
 345                                 ret = -EINVAL;
 346                                 goto init_qp_queue1;
 347                         }
 348                 } else {
 349                         if (h_ret != H_PAGE_REGISTERED) {
 350                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 351                                          "h_ret=%li", h_ret);
 352                                 ret = ehca2ib_return_code(h_ret);
 353                                 goto init_qp_queue1;
 354                         }
 355                 }
 356         }
 357
 358         ipz_qeit_reset(queue);
 359
 360         return 0;
 361
 362 init_qp_queue1:
 363         ipz_queue_dtor(pd, queue);
 364         return ret;
 365 }
 366
 367 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
 368 {
 369         if (is_llqp)
 370                 return 128 << act_nr_sge;
 371         else
 372                 return offsetof(struct ehca_wqe,
 373                                 u.nud.sg_list[act_nr_sge]);
 374 }
 375
 376 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
 377                                        int req_nr_sge, int is_llqp)
 378 {
 379         u32 wqe_size, q_size;
 380         int act_nr_sge = req_nr_sge;
 381
 382         if (!is_llqp)
 383                 /* round up #SGEs so WQE size is a power of 2 */
 384                 for (act_nr_sge = 4; act_nr_sge <= 252;
 385                      act_nr_sge = 4 + 2 * act_nr_sge)
 386                         if (act_nr_sge >= req_nr_sge)
 387                                 break;
 388
 389         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
 390         q_size = wqe_size * (queue->max_wr + 1);
 391
 392         if (q_size <= 512)
 393                 queue->page_size = 2;
 394         else if (q_size <= 1024)
 395                 queue->page_size = 3;
 396         else
 397                 queue->page_size = 0;
 398
 399         queue->is_small = (queue->page_size != 0);
 400 }
 401
 402 /*
 403  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 404  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 405  * fields, the field out of init_attr is used.
 406  */
 407 static struct ehca_qp *internal_create_qp(
 408         struct ib_pd *pd,
 409         struct ib_qp_init_attr *init_attr,
 410         struct ib_srq_init_attr *srq_init_attr,
 411         struct ib_udata *udata, int is_srq)
 412 {
 413         struct ehca_qp *my_qp;
 414         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 415         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 416                                               ib_device);
 417         struct ib_ucontext *context = NULL;
 418         u64 h_ret;
 419         int is_llqp = 0, has_srq = 0;
 420         int qp_type, max_send_sge, max_recv_sge, ret;
 421
 422         /* h_call's out parameters */
 423         struct ehca_alloc_qp_parms parms;
 424         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 425         unsigned long flags;
 426
 427         memset(&parms, 0, sizeof(parms));
 428         qp_type = init_attr->qp_type;
 429
 430         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 431                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 432                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 433                          init_attr->sq_sig_type);
 434                 return ERR_PTR(-EINVAL);
 435         }
 436
 437         /* save LLQP info */
 438         if (qp_type & 0x80) {
 439                 is_llqp = 1;
 440                 parms.ext_type = EQPT_LLQP;
 441                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 442         }
 443         qp_type &= 0x1F;
 444         init_attr->qp_type &= 0x1F;
 445
 446         /* handle SRQ base QPs */
 447         if (init_attr->srq) {
 448                 struct ehca_qp *my_srq =
 449                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 450
 451                 has_srq = 1;
 452                 parms.ext_type = EQPT_SRQBASE;
 453                 parms.srq_qpn = my_srq->real_qp_num;
 454         }
 455
 456         if (is_llqp && has_srq) {
 457                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 458                 return ERR_PTR(-EINVAL);
 459         }
 460
 461         /* handle SRQs */
 462         if (is_srq) {
 463                 parms.ext_type = EQPT_SRQ;
 464                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 465                 if (init_attr->cap.max_recv_sge > 3) {
 466                         ehca_err(pd->device, "no more than three SGEs "
 467                                  "supported for SRQ  pd=%p  max_sge=%x",
 468                                  pd, init_attr->cap.max_recv_sge);
 469                         return ERR_PTR(-EINVAL);
 470                 }
 471         }
 472
 473         /* check QP type */
 474         if (qp_type != IB_QPT_UD &&
 475             qp_type != IB_QPT_UC &&
 476             qp_type != IB_QPT_RC &&
 477             qp_type != IB_QPT_SMI &&
 478             qp_type != IB_QPT_GSI) {
 479                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 480                 return ERR_PTR(-EINVAL);
 481         }
 482
 483         if (is_llqp) {
 484                 switch (qp_type) {
 485                 case IB_QPT_RC:
 486                         if ((init_attr->cap.max_send_wr > 255) ||
 487                             (init_attr->cap.max_recv_wr > 255)) {
 488                                 ehca_err(pd->device,
 489                                          "Invalid Number of max_sq_wr=%x "
 490                                          "or max_rq_wr=%x for RC LLQP",
 491                                          init_attr->cap.max_send_wr,
 492                                          init_attr->cap.max_recv_wr);
 493                                 return ERR_PTR(-EINVAL);
 494                         }
 495                         break;
 496                 case IB_QPT_UD:
 497                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 498                                 ehca_err(pd->device, "UD LLQP not supported "
 499                                          "by this adapter");
 500                                 return ERR_PTR(-ENOSYS);
 501                         }
 502                         if (!(init_attr->cap.max_send_sge <= 5
 503                             && init_attr->cap.max_send_sge >= 1
 504                             && init_attr->cap.max_recv_sge <= 5
 505                             && init_attr->cap.max_recv_sge >= 1)) {
 506                                 ehca_err(pd->device,
 507                                          "Invalid Number of max_send_sge=%x "
 508                                          "or max_recv_sge=%x for UD LLQP",
 509                                          init_attr->cap.max_send_sge,
 510                                          init_attr->cap.max_recv_sge);
 511                                 return ERR_PTR(-EINVAL);
 512                         } else if (init_attr->cap.max_send_wr > 255) {
 513                                 ehca_err(pd->device,
 514                                          "Invalid Number of "
 515                                          "max_send_wr=%x for UD QP_TYPE=%x",
 516                                          init_attr->cap.max_send_wr, qp_type);
 517                                 return ERR_PTR(-EINVAL);
 518                         }
 519                         break;
 520                 default:
 521                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 522                                  qp_type);
 523                         return ERR_PTR(-EINVAL);
 524                         break;
 525                 }
 526         } else {
 527                 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
 528                                || qp_type == IB_QPT_GSI) ? 250 : 252;
 529
 530                 if (init_attr->cap.max_send_sge > max_sge
 531                     || init_attr->cap.max_recv_sge > max_sge) {
 532                         ehca_err(pd->device, "Invalid number of SGEs requested "
 533                                  "send_sge=%x recv_sge=%x max_sge=%x",
 534                                  init_attr->cap.max_send_sge,
 535                                  init_attr->cap.max_recv_sge, max_sge);
 536                         return ERR_PTR(-EINVAL);
 537                 }
 538         }
 539
 540         if (pd->uobject && udata)
 541                 context = pd->uobject->context;
 542
 543         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 544         if (!my_qp) {
 545                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 546                 return ERR_PTR(-ENOMEM);
 547         }
 548
 549         spin_lock_init(&my_qp->spinlock_s);
 550         spin_lock_init(&my_qp->spinlock_r);
 551         my_qp->qp_type = qp_type;
 552         my_qp->ext_type = parms.ext_type;
 553
 554         if (init_attr->recv_cq)
 555                 my_qp->recv_cq =
 556                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 557         if (init_attr->send_cq)
 558                 my_qp->send_cq =
 559                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 560
 561         do {
 562                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 563                         ret = -ENOMEM;
 564                         ehca_err(pd->device, "Can't reserve idr resources.");
 565                         goto create_qp_exit0;
 566                 }
 567
 568                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 569                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 570                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 571         } while (ret == -EAGAIN);
 572
 573         if (ret) {
 574                 ret = -ENOMEM;
 575                 ehca_err(pd->device, "Can't allocate new idr entry.");
 576                 goto create_qp_exit0;
 577         }
 578
 579         if (my_qp->token > 0x1FFFFFF) {
 580                 ret = -EINVAL;
 581                 ehca_err(pd->device, "Invalid number of qp");
 582                 goto create_qp_exit1;
 583         }
 584
 585         if (has_srq)
 586                 parms.srq_token = my_qp->token;
 587
 588         parms.servicetype = ibqptype2servicetype(qp_type);
 589         if (parms.servicetype < 0) {
 590                 ret = -EINVAL;
 591                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 592                 goto create_qp_exit1;
 593         }
 594
 595         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 596                 parms.sigtype = HCALL_SIGT_EVERY;
 597         else
 598                 parms.sigtype = HCALL_SIGT_BY_WQE;
 599
 600         /* UD_AV CIRCUMVENTION */
 601         max_send_sge = init_attr->cap.max_send_sge;
 602         max_recv_sge = init_attr->cap.max_recv_sge;
 603         if (parms.servicetype == ST_UD && !is_llqp) {
 604                 max_send_sge += 2;
 605                 max_recv_sge += 2;
 606         }
 607
 608         parms.token = my_qp->token;
 609         parms.eq_handle = shca->eq.ipz_eq_handle;
 610         parms.pd = my_pd->fw_pd;
 611         if (my_qp->send_cq)
 612                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 613         if (my_qp->recv_cq)
 614                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 615
 616         parms.squeue.max_wr = init_attr->cap.max_send_wr;
 617         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
 618         parms.squeue.max_sge = max_send_sge;
 619         parms.rqueue.max_sge = max_recv_sge;
 620
 621         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
 622                 if (HAS_SQ(my_qp))
 623                         ehca_determine_small_queue(
 624                                 &parms.squeue, max_send_sge, is_llqp);
 625                 if (HAS_RQ(my_qp))
 626                         ehca_determine_small_queue(
 627                                 &parms.rqueue, max_recv_sge, is_llqp);
 628                 parms.qp_storage =
 629                         (parms.squeue.is_small || parms.rqueue.is_small);
 630         }
 631
 632         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 633         if (h_ret != H_SUCCESS) {
 634                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
 635                          h_ret);
 636                 ret = ehca2ib_return_code(h_ret);
 637                 goto create_qp_exit1;
 638         }
 639
 640         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 641         my_qp->ipz_qp_handle = parms.qp_handle;
 642         my_qp->galpas = parms.galpas;
 643
 644         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
 645         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
 646
 647         switch (qp_type) {
 648         case IB_QPT_RC:
 649                 if (is_llqp) {
 650                         parms.squeue.act_nr_sges = 1;
 651                         parms.rqueue.act_nr_sges = 1;
 652                 }
 653                 break;
 654         case IB_QPT_UD:
 655         case IB_QPT_GSI:
 656         case IB_QPT_SMI:
 657                 /* UD circumvention */
 658                 if (is_llqp) {
 659                         parms.squeue.act_nr_sges = 1;
 660                         parms.rqueue.act_nr_sges = 1;
 661                 } else {
 662                         parms.squeue.act_nr_sges -= 2;
 663                         parms.rqueue.act_nr_sges -= 2;
 664                 }
 665
 666                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 667                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
 668                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
 669                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
 670                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
 671                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 672                 }
 673
 674                 break;
 675
 676         default:
 677                 break;
 678         }
 679
 680         /* initialize r/squeue and register queue pages */
 681         if (HAS_SQ(my_qp)) {
 682                 ret = init_qp_queue(
 683                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
 684                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 685                         &parms.squeue, swqe_size);
 686                 if (ret) {
 687                         ehca_err(pd->device, "Couldn't initialize squeue "
 688                                  "and pages ret=%i", ret);
 689                         goto create_qp_exit2;
 690                 }
 691         }
 692
 693         if (HAS_RQ(my_qp)) {
 694                 ret = init_qp_queue(
 695                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
 696                         H_SUCCESS, &parms.rqueue, rwqe_size);
 697                 if (ret) {
 698                         ehca_err(pd->device, "Couldn't initialize rqueue "
 699                                  "and pages ret=%i", ret);
 700                         goto create_qp_exit3;
 701                 }
 702         }
 703
 704         if (is_srq) {
 705                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 706                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 707
 708                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 709                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 710         } else {
 711                 my_qp->ib_qp.qp_num = ib_qp_num;
 712                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 713                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 714
 715                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 716                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 717
 718                 my_qp->ib_qp.qp_type = qp_type;
 719                 my_qp->ib_qp.srq = init_attr->srq;
 720
 721                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 722                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 723         }
 724
 725         init_attr->cap.max_inline_data = 0; /* not supported yet */
 726         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
 727         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
 728         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
 729         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
 730         my_qp->init_attr = *init_attr;
 731
 732         /* NOTE: define_apq0() not supported yet */
 733         if (qp_type == IB_QPT_GSI) {
 734                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 735                 if (h_ret != H_SUCCESS) {
 736                         ret = ehca2ib_return_code(h_ret);
 737                         goto create_qp_exit4;
 738                 }
 739         }
 740
 741         if (my_qp->send_cq) {
 742                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 743                 if (ret) {
 744                         ehca_err(pd->device,
 745                                  "Couldn't assign qp to send_cq ret=%i", ret);
 746                         goto create_qp_exit4;
 747                 }
 748         }
 749
 750         /* copy queues, galpa data to user space */
 751         if (context && udata) {
 752                 struct ehca_create_qp_resp resp;
 753                 memset(&resp, 0, sizeof(resp));
 754
 755                 resp.qp_num = my_qp->real_qp_num;
 756                 resp.token = my_qp->token;
 757                 resp.qp_type = my_qp->qp_type;
 758                 resp.ext_type = my_qp->ext_type;
 759                 resp.qkey = my_qp->qkey;
 760                 resp.real_qp_num = my_qp->real_qp_num;
 761
 762                 if (HAS_SQ(my_qp))
 763                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 764                 if (HAS_RQ(my_qp))
 765                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 766                 resp.fw_handle_ofs = (u32)
 767                         (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
 768
 769                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 770                         ehca_err(pd->device, "Copy to udata failed");
 771                         ret = -EINVAL;
 772                         goto create_qp_exit4;
 773                 }
 774         }
 775
 776         return my_qp;
 777
 778 create_qp_exit4:
 779         if (HAS_RQ(my_qp))
 780                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 781
 782 create_qp_exit3:
 783         if (HAS_SQ(my_qp))
 784                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
 785
 786 create_qp_exit2:
 787         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 788
 789 create_qp_exit1:
 790         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 791         idr_remove(&ehca_qp_idr, my_qp->token);
 792         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 793
 794 create_qp_exit0:
 795         kmem_cache_free(qp_cache, my_qp);
 796         return ERR_PTR(ret);
 797 }
 798
 799 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 800                              struct ib_qp_init_attr *qp_init_attr,
 801                              struct ib_udata *udata)
 802 {
 803         struct ehca_qp *ret;
 804
 805         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 806         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 807 }
 808
 809 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 810                                struct ib_uobject *uobject);
 811
 812 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 813                                struct ib_srq_init_attr *srq_init_attr,
 814                                struct ib_udata *udata)
 815 {
 816         struct ib_qp_init_attr qp_init_attr;
 817         struct ehca_qp *my_qp;
 818         struct ib_srq *ret;
 819         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 820                                               ib_device);
 821         struct hcp_modify_qp_control_block *mqpcb;
 822         u64 hret, update_mask;
 823
 824         /* For common attributes, internal_create_qp() takes its info
 825          * out of qp_init_attr, so copy all common attrs there.
 826          */
 827         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 828         qp_init_attr.event_handler = srq_init_attr->event_handler;
 829         qp_init_attr.qp_context = srq_init_attr->srq_context;
 830         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 831         qp_init_attr.qp_type = IB_QPT_RC;
 832         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 833         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 834
 835         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 836         if (IS_ERR(my_qp))
 837                 return (struct ib_srq *)my_qp;
 838
 839         /* copy back return values */
 840         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 841         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 842
 843         /* drive SRQ into RTR state */
 844         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 845         if (!mqpcb) {
 846                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 847                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 848                 ret = ERR_PTR(-ENOMEM);
 849                 goto create_srq1;
 850         }
 851
 852         mqpcb->qp_state = EHCA_QPS_INIT;
 853         mqpcb->prim_phys_port = 1;
 854         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 855         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 856                                 my_qp->ipz_qp_handle,
 857                                 &my_qp->pf,
 858                                 update_mask,
 859                                 mqpcb, my_qp->galpas.kernel);
 860         if (hret != H_SUCCESS) {
 861                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 862                          "ehca_qp=%p qp_num=%x h_ret=%li",
 863                          my_qp, my_qp->real_qp_num, hret);
 864                 goto create_srq2;
 865         }
 866
 867         mqpcb->qp_enable = 1;
 868         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 869         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 870                                 my_qp->ipz_qp_handle,
 871                                 &my_qp->pf,
 872                                 update_mask,
 873                                 mqpcb, my_qp->galpas.kernel);
 874         if (hret != H_SUCCESS) {
 875                 ehca_err(pd->device, "Could not enable SRQ"
 876                          "ehca_qp=%p qp_num=%x h_ret=%li",
 877                          my_qp, my_qp->real_qp_num, hret);
 878                 goto create_srq2;
 879         }
 880
 881         mqpcb->qp_state  = EHCA_QPS_RTR;
 882         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 883         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 884                                 my_qp->ipz_qp_handle,
 885                                 &my_qp->pf,
 886                                 update_mask,
 887                                 mqpcb, my_qp->galpas.kernel);
 888         if (hret != H_SUCCESS) {
 889                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 890                          "ehca_qp=%p qp_num=%x h_ret=%li",
 891                          my_qp, my_qp->real_qp_num, hret);
 892                 goto create_srq2;
 893         }
 894
 895         ehca_free_fw_ctrlblock(mqpcb);
 896
 897         return &my_qp->ib_srq;
 898
 899 create_srq2:
 900         ret = ERR_PTR(ehca2ib_return_code(hret));
 901         ehca_free_fw_ctrlblock(mqpcb);
 902
 903 create_srq1:
 904         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 905
 906         return ret;
 907 }
 908
 909 /*
 910  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 911  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 912  * returns total number of bad wqes in bad_wqe_cnt
 913  */
 914 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 915                            int *bad_wqe_cnt)
 916 {
 917         u64 h_ret;
 918         struct ipz_queue *squeue;
 919         void *bad_send_wqe_p, *bad_send_wqe_v;
 920         u64 q_ofs;
 921         struct ehca_wqe *wqe;
 922         int qp_num = my_qp->ib_qp.qp_num;
 923
 924         /* get send wqe pointer */
 925         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 926                                            my_qp->ipz_qp_handle, &my_qp->pf,
 927                                            &bad_send_wqe_p, NULL, 2);
 928         if (h_ret != H_SUCCESS) {
 929                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 930                          " ehca_qp=%p qp_num=%x h_ret=%li",
 931                          my_qp, qp_num, h_ret);
 932                 return ehca2ib_return_code(h_ret);
 933         }
 934         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 935         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 936                  qp_num, bad_send_wqe_p);
 937         /* convert wqe pointer to vadr */
 938         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 939         if (ehca_debug_level)
 940                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 941         squeue = &my_qp->ipz_squeue;
 942         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 943                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 944                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 945                 return -EFAULT;
 946         }
 947
 948         /* loop sets wqe's purge bit */
 949         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 950         *bad_wqe_cnt = 0;
 951         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 952                 if (ehca_debug_level)
 953                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 954                 wqe->nr_of_data_seg = 0; /* suppress data access */
 955                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 956                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 957                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 958                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 959         }
 960         /*
 961          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 962          *  i.e. nr of wqes with flush error status is one less
 963          */
 964         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 965                  qp_num, (*bad_wqe_cnt)-1);
 966         wqe->wqef = 0;
 967
 968         return 0;
 969 }
 970
 971 /*
 972  * internal_modify_qp with circumvention to handle aqp0 properly
 973  * smi_reset2init indicates if this is an internal reset-to-init-call for
 974  * smi. This flag must always be zero if called from ehca_modify_qp()!
 975  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 976  */
 977 static int internal_modify_qp(struct ib_qp *ibqp,
 978                               struct ib_qp_attr *attr,
 979                               int attr_mask, int smi_reset2init)
 980 {
 981         enum ib_qp_state qp_cur_state, qp_new_state;
 982         int cnt, qp_attr_idx, ret = 0;
 983         enum ib_qp_statetrans statetrans;
 984         struct hcp_modify_qp_control_block *mqpcb;
 985         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 986         struct ehca_shca *shca =
 987                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 988         u64 update_mask;
 989         u64 h_ret;
 990         int bad_wqe_cnt = 0;
 991         int squeue_locked = 0;
 992         unsigned long flags = 0;
 993
 994         /* do query_qp to obtain current attr values */
 995         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 996         if (!mqpcb) {
 997                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 998                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 999                 return -ENOMEM;
1000         }
1001
1002         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
1003                                 my_qp->ipz_qp_handle,
1004                                 &my_qp->pf,
1005                                 mqpcb, my_qp->galpas.kernel);
1006         if (h_ret != H_SUCCESS) {
1007                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1008                          "ehca_qp=%p qp_num=%x h_ret=%li",
1009                          my_qp, ibqp->qp_num, h_ret);
1010                 ret = ehca2ib_return_code(h_ret);
1011                 goto modify_qp_exit1;
1012         }
1013
1014         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1015
1016         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
1017                 ret = -EINVAL;
1018                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1019                          "ehca_qp=%p qp_num=%x",
1020                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1021                 goto modify_qp_exit1;
1022         }
1023         /*
1024          * circumvention to set aqp0 initial state to init
1025          * as expected by IB spec
1026          */
1027         if (smi_reset2init == 0 &&
1028             ibqp->qp_type == IB_QPT_SMI &&
1029             qp_cur_state == IB_QPS_RESET &&
1030             (attr_mask & IB_QP_STATE) &&
1031             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1032                 struct ib_qp_attr smiqp_attr = {
1033                         .qp_state = IB_QPS_INIT,
1034                         .port_num = my_qp->init_attr.port_num,
1035                         .pkey_index = 0,
1036                         .qkey = 0
1037                 };
1038                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1039                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1040                 int smirc = internal_modify_qp(
1041                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1042                 if (smirc) {
1043                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1044                                  "ehca_modify_qp() rc=%i", smirc);
1045                         ret = H_PARAMETER;
1046                         goto modify_qp_exit1;
1047                 }
1048                 qp_cur_state = IB_QPS_INIT;
1049                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1050         }
1051         /* is transmitted current state  equal to "real" current state */
1052         if ((attr_mask & IB_QP_CUR_STATE) &&
1053             qp_cur_state != attr->cur_qp_state) {
1054                 ret = -EINVAL;
1055                 ehca_err(ibqp->device,
1056                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1057                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1058                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1059                 goto modify_qp_exit1;
1060         }
1061
1062         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1063                  "new qp_state=%x attribute_mask=%x",
1064                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1065
1066         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1067         if (!smi_reset2init &&
1068             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1069                                 attr_mask)) {
1070                 ret = -EINVAL;
1071                 ehca_err(ibqp->device,
1072                          "Invalid qp transition new_state=%x cur_state=%x "
1073                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1074                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1075                 goto modify_qp_exit1;
1076         }
1077
1078         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1079         if (mqpcb->qp_state)
1080                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1081         else {
1082                 ret = -EINVAL;
1083                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1084                          "ehca_qp=%p qp_num=%x",
1085                          qp_new_state, my_qp, ibqp->qp_num);
1086                 goto modify_qp_exit1;
1087         }
1088
1089         /* retrieve state transition struct to get req and opt attrs */
1090         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1091         if (statetrans < 0) {
1092                 ret = -EINVAL;
1093                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1094                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1095                          "qp_num=%x", qp_cur_state, qp_new_state,
1096                          statetrans, my_qp, ibqp->qp_num);
1097                 goto modify_qp_exit1;
1098         }
1099
1100         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1101
1102         if (qp_attr_idx < 0) {
1103                 ret = qp_attr_idx;
1104                 ehca_err(ibqp->device,
1105                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1106                          ibqp->qp_type, my_qp, ibqp->qp_num);
1107                 goto modify_qp_exit1;
1108         }
1109
1110         ehca_dbg(ibqp->device,
1111                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1112                  my_qp, ibqp->qp_num, statetrans);
1113
1114         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1115          * in non-LL UD QPs.
1116          */
1117         if ((my_qp->qp_type == IB_QPT_UD) &&
1118             (my_qp->ext_type != EQPT_LLQP) &&
1119             (statetrans == IB_QPST_INIT2RTR) &&
1120             (shca->hw_level >= 0x22)) {
1121                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1122                 mqpcb->send_grh_flag = 1;
1123         }
1124
1125         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1126         if ((my_qp->qp_type == IB_QPT_UD ||
1127              my_qp->qp_type == IB_QPT_GSI ||
1128              my_qp->qp_type == IB_QPT_SMI) &&
1129             statetrans == IB_QPST_SQE2RTS) {
1130                 /* mark next free wqe if kernel */
1131                 if (!ibqp->uobject) {
1132                         struct ehca_wqe *wqe;
1133                         /* lock send queue */
1134                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1135                         squeue_locked = 1;
1136                         /* mark next free wqe */
1137                         wqe = (struct ehca_wqe *)
1138                                 ipz_qeit_get(&my_qp->ipz_squeue);
1139                         wqe->optype = wqe->wqef = 0xff;
1140                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1141                                  ibqp->qp_num, wqe);
1142                 }
1143                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1144                 if (ret) {
1145                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1146                                  "ehca_qp=%p qp_num=%x ret=%i",
1147                                  my_qp, ibqp->qp_num, ret);
1148                         goto modify_qp_exit2;
1149                 }
1150         }
1151
1152         /*
1153          * enable RDMA_Atomic_Control if reset->init und reliable con
1154          * this is necessary since gen2 does not provide that flag,
1155          * but pHyp requires it
1156          */
1157         if (statetrans == IB_QPST_RESET2INIT &&
1158             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1159                 mqpcb->rdma_atomic_ctrl = 3;
1160                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1161         }
1162         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1163         if (statetrans == IB_QPST_INIT2RTR &&
1164             (ibqp->qp_type == IB_QPT_UC) &&
1165             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1166                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1167                 update_mask |=
1168                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1169         }
1170
1171         if (attr_mask & IB_QP_PKEY_INDEX) {
1172                 if (attr->pkey_index >= 16) {
1173                         ret = -EINVAL;
1174                         ehca_err(ibqp->device, "Invalid pkey_index=%x. "
1175                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1176                                  attr->pkey_index, my_qp, ibqp->qp_num);
1177                         goto modify_qp_exit2;
1178                 }
1179                 mqpcb->prim_p_key_idx = attr->pkey_index;
1180                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1181         }
1182         if (attr_mask & IB_QP_PORT) {
1183                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1184                         ret = -EINVAL;
1185                         ehca_err(ibqp->device, "Invalid port=%x. "
1186                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1187                                  attr->port_num, my_qp, ibqp->qp_num,
1188                                  shca->num_ports);
1189                         goto modify_qp_exit2;
1190                 }
1191                 mqpcb->prim_phys_port = attr->port_num;
1192                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1193         }
1194         if (attr_mask & IB_QP_QKEY) {
1195                 mqpcb->qkey = attr->qkey;
1196                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1197         }
1198         if (attr_mask & IB_QP_AV) {
1199                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1200                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1201                                                 init_attr.port_num].rate);
1202
1203                 mqpcb->dlid = attr->ah_attr.dlid;
1204                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1205                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1206                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1207                 mqpcb->service_level = attr->ah_attr.sl;
1208                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1209
1210                 if (ah_mult < ehca_mult)
1211                         mqpcb->max_static_rate = (ah_mult > 0) ?
1212                         ((ehca_mult - 1) / ah_mult) : 0;
1213                 else
1214                         mqpcb->max_static_rate = 0;
1215                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1216
1217                 /*
1218                  * Always supply the GRH flag, even if it's zero, to give the
1219                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1220                  */
1221                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1222
1223                 /*
1224                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1225                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1226                  */
1227                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1228                         mqpcb->send_grh_flag = 1;
1229
1230                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1231                         update_mask |=
1232                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1233
1234                         for (cnt = 0; cnt < 16; cnt++)
1235                                 mqpcb->dest_gid.byte[cnt] =
1236                                         attr->ah_attr.grh.dgid.raw[cnt];
1237
1238                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1239                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1240                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1241                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1242                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1243                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1244                         update_mask |=
1245                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1246                 }
1247         }
1248
1249         if (attr_mask & IB_QP_PATH_MTU) {
1250                 mqpcb->path_mtu = attr->path_mtu;
1251                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1252         }
1253         if (attr_mask & IB_QP_TIMEOUT) {
1254                 mqpcb->timeout = attr->timeout;
1255                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1256         }
1257         if (attr_mask & IB_QP_RETRY_CNT) {
1258                 mqpcb->retry_count = attr->retry_cnt;
1259                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1260         }
1261         if (attr_mask & IB_QP_RNR_RETRY) {
1262                 mqpcb->rnr_retry_count = attr->rnr_retry;
1263                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1264         }
1265         if (attr_mask & IB_QP_RQ_PSN) {
1266                 mqpcb->receive_psn = attr->rq_psn;
1267                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1268         }
1269         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1270                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1271                         attr->max_dest_rd_atomic : 2;
1272                 update_mask |=
1273                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1274         }
1275         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1276                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1277                         attr->max_rd_atomic : 2;
1278                 update_mask |=
1279                         EHCA_BMASK_SET
1280                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1281         }
1282         if (attr_mask & IB_QP_ALT_PATH) {
1283                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1284                 int ehca_mult = ib_rate_to_mult(
1285                         shca->sport[my_qp->init_attr.port_num].rate);
1286
1287                 if (attr->alt_port_num < 1
1288                     || attr->alt_port_num > shca->num_ports) {
1289                         ret = -EINVAL;
1290                         ehca_err(ibqp->device, "Invalid alt_port=%x. "
1291                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1292                                  attr->alt_port_num, my_qp, ibqp->qp_num,
1293                                  shca->num_ports);
1294                         goto modify_qp_exit2;
1295                 }
1296                 mqpcb->alt_phys_port = attr->alt_port_num;
1297
1298                 if (attr->alt_pkey_index >= 16) {
1299                         ret = -EINVAL;
1300                         ehca_err(ibqp->device, "Invalid alt_pkey_index=%x. "
1301                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1302                                  attr->pkey_index, my_qp, ibqp->qp_num);
1303                         goto modify_qp_exit2;
1304                 }
1305                 mqpcb->alt_p_key_idx = attr->alt_pkey_index;
1306
1307                 mqpcb->timeout_al = attr->alt_timeout;
1308                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1309                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1310                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1311
1312                 if (ah_mult > 0 && ah_mult < ehca_mult)
1313                         mqpcb->max_static_rate_al = (ehca_mult - 1) / ah_mult;
1314                 else
1315                         mqpcb->max_static_rate_al = 0;
1316
1317                 /* OpenIB doesn't support alternate retry counts - copy them */
1318                 mqpcb->retry_count_al = mqpcb->retry_count;
1319                 mqpcb->rnr_retry_count_al = mqpcb->rnr_retry_count;
1320
1321                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_ALT_PHYS_PORT, 1)
1322                         | EHCA_BMASK_SET(MQPCB_MASK_ALT_P_KEY_IDX, 1)
1323                         | EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT_AL, 1)
1324                         | EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1)
1325                         | EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1)
1326                         | EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1)
1327                         | EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1)
1328                         | EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT_AL, 1)
1329                         | EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT_AL, 1);
1330
1331                 /*
1332                  * Always supply the GRH flag, even if it's zero, to give the
1333                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1334                  */
1335                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1336
1337                 /*
1338                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1339                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1340                  */
1341                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1342                         mqpcb->send_grh_flag_al = 1;
1343
1344                         for (cnt = 0; cnt < 16; cnt++)
1345                                 mqpcb->dest_gid_al.byte[cnt] =
1346                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1347                         mqpcb->source_gid_idx_al =
1348                                 attr->alt_ah_attr.grh.sgid_index;
1349                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1350                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1351                         mqpcb->traffic_class_al =
1352                                 attr->alt_ah_attr.grh.traffic_class;
1353
1354                         update_mask |=
1355                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1)
1356                                 | EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1)
1357                                 | EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1)
1358                                 | EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1) |
1359                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1360                 }
1361         }
1362
1363         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1364                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1365                 update_mask |=
1366                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1367         }
1368
1369         if (attr_mask & IB_QP_SQ_PSN) {
1370                 mqpcb->send_psn = attr->sq_psn;
1371                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1372         }
1373
1374         if (attr_mask & IB_QP_DEST_QPN) {
1375                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1376                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1377         }
1378
1379         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1380                 if (attr->path_mig_state != IB_MIG_REARM
1381                     && attr->path_mig_state != IB_MIG_MIGRATED) {
1382                         ret = -EINVAL;
1383                         ehca_err(ibqp->device, "Invalid mig_state=%x",
1384                                  attr->path_mig_state);
1385                         goto modify_qp_exit2;
1386                 }
1387                 mqpcb->path_migration_state = attr->path_mig_state + 1;
1388                 update_mask |=
1389                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1390         }
1391
1392         if (attr_mask & IB_QP_CAP) {
1393                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1394                 update_mask |=
1395                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1396                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1397                 update_mask |=
1398                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1399                 /* no support for max_send/recv_sge yet */
1400         }
1401
1402         if (ehca_debug_level)
1403                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1404
1405         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1406                                  my_qp->ipz_qp_handle,
1407                                  &my_qp->pf,
1408                                  update_mask,
1409                                  mqpcb, my_qp->galpas.kernel);
1410
1411         if (h_ret != H_SUCCESS) {
1412                 ret = ehca2ib_return_code(h_ret);
1413                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1414                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1415                 goto modify_qp_exit2;
1416         }
1417
1418         if ((my_qp->qp_type == IB_QPT_UD ||
1419              my_qp->qp_type == IB_QPT_GSI ||
1420              my_qp->qp_type == IB_QPT_SMI) &&
1421             statetrans == IB_QPST_SQE2RTS) {
1422                 /* doorbell to reprocessing wqes */
1423                 iosync(); /* serialize GAL register access */
1424                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1425                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1426         }
1427
1428         if (statetrans == IB_QPST_RESET2INIT ||
1429             statetrans == IB_QPST_INIT2INIT) {
1430                 mqpcb->qp_enable = 1;
1431                 mqpcb->qp_state = EHCA_QPS_INIT;
1432                 update_mask = 0;
1433                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1434
1435                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1436                                          my_qp->ipz_qp_handle,
1437                                          &my_qp->pf,
1438                                          update_mask,
1439                                          mqpcb,
1440                                          my_qp->galpas.kernel);
1441
1442                 if (h_ret != H_SUCCESS) {
1443                         ret = ehca2ib_return_code(h_ret);
1444                         ehca_err(ibqp->device, "ENABLE in context of "
1445                                  "RESET_2_INIT failed! Maybe you didn't get "
1446                                  "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1447                                  h_ret, my_qp, ibqp->qp_num);
1448                         goto modify_qp_exit2;
1449                 }
1450         }
1451
1452         if (statetrans == IB_QPST_ANY2RESET) {
1453                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1454                 ipz_qeit_reset(&my_qp->ipz_squeue);
1455         }
1456
1457         if (attr_mask & IB_QP_QKEY)
1458                 my_qp->qkey = attr->qkey;
1459
1460 modify_qp_exit2:
1461         if (squeue_locked) { /* this means: sqe -> rts */
1462                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1463                 my_qp->sqerr_purgeflag = 1;
1464         }
1465
1466 modify_qp_exit1:
1467         ehca_free_fw_ctrlblock(mqpcb);
1468
1469         return ret;
1470 }
1471
1472 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1473                    struct ib_udata *udata)
1474 {
1475         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1476         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1477                                              ib_pd);
1478         u32 cur_pid = current->tgid;
1479
1480         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1481             my_pd->ownpid != cur_pid) {
1482                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1483                          cur_pid, my_pd->ownpid);
1484                 return -EINVAL;
1485         }
1486
1487         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1488 }
1489
1490 int ehca_query_qp(struct ib_qp *qp,
1491                   struct ib_qp_attr *qp_attr,
1492                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1493 {
1494         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1495         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1496                                              ib_pd);
1497         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1498                                               ib_device);
1499         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1500         struct hcp_modify_qp_control_block *qpcb;
1501         u32 cur_pid = current->tgid;
1502         int cnt, ret = 0;
1503         u64 h_ret;
1504
1505         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1506             my_pd->ownpid != cur_pid) {
1507                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1508                          cur_pid, my_pd->ownpid);
1509                 return -EINVAL;
1510         }
1511
1512         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1513                 ehca_err(qp->device, "Invalid attribute mask "
1514                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1515                          my_qp, qp->qp_num, qp_attr_mask);
1516                 return -EINVAL;
1517         }
1518
1519         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1520         if (!qpcb) {
1521                 ehca_err(qp->device, "Out of memory for qpcb "
1522                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1523                 return -ENOMEM;
1524         }
1525
1526         h_ret = hipz_h_query_qp(adapter_handle,
1527                                 my_qp->ipz_qp_handle,
1528                                 &my_qp->pf,
1529                                 qpcb, my_qp->galpas.kernel);
1530
1531         if (h_ret != H_SUCCESS) {
1532                 ret = ehca2ib_return_code(h_ret);
1533                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1534                          "ehca_qp=%p qp_num=%x h_ret=%li",
1535                          my_qp, qp->qp_num, h_ret);
1536                 goto query_qp_exit1;
1537         }
1538
1539         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1540         qp_attr->qp_state = qp_attr->cur_qp_state;
1541
1542         if (qp_attr->cur_qp_state == -EINVAL) {
1543                 ret = -EINVAL;
1544                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1545                          "ehca_qp=%p qp_num=%x",
1546                          qpcb->qp_state, my_qp, qp->qp_num);
1547                 goto query_qp_exit1;
1548         }
1549
1550         if (qp_attr->qp_state == IB_QPS_SQD)
1551                 qp_attr->sq_draining = 1;
1552
1553         qp_attr->qkey = qpcb->qkey;
1554         qp_attr->path_mtu = qpcb->path_mtu;
1555         qp_attr->path_mig_state = qpcb->path_migration_state - 1;
1556         qp_attr->rq_psn = qpcb->receive_psn;
1557         qp_attr->sq_psn = qpcb->send_psn;
1558         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1559         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1560         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1561         /* UD_AV CIRCUMVENTION */
1562         if (my_qp->qp_type == IB_QPT_UD) {
1563                 qp_attr->cap.max_send_sge =
1564                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1565                 qp_attr->cap.max_recv_sge =
1566                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1567         } else {
1568                 qp_attr->cap.max_send_sge =
1569                         qpcb->actual_nr_sges_in_sq_wqe;
1570                 qp_attr->cap.max_recv_sge =
1571                         qpcb->actual_nr_sges_in_rq_wqe;
1572         }
1573
1574         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1575         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1576
1577         qp_attr->pkey_index =
1578                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1579
1580         qp_attr->port_num =
1581                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1582
1583         qp_attr->timeout = qpcb->timeout;
1584         qp_attr->retry_cnt = qpcb->retry_count;
1585         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1586
1587         qp_attr->alt_pkey_index =
1588                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1589
1590         qp_attr->alt_port_num = qpcb->alt_phys_port;
1591         qp_attr->alt_timeout = qpcb->timeout_al;
1592
1593         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1594         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1595
1596         /* primary av */
1597         qp_attr->ah_attr.sl = qpcb->service_level;
1598
1599         if (qpcb->send_grh_flag) {
1600                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1601         }
1602
1603         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1604         qp_attr->ah_attr.dlid = qpcb->dlid;
1605         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1606         qp_attr->ah_attr.port_num = qp_attr->port_num;
1607
1608         /* primary GRH */
1609         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1610         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1611         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1612         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1613
1614         for (cnt = 0; cnt < 16; cnt++)
1615                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1616                         qpcb->dest_gid.byte[cnt];
1617
1618         /* alternate AV */
1619         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1620         if (qpcb->send_grh_flag_al) {
1621                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1622         }
1623
1624         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1625         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1626         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1627
1628         /* alternate GRH */
1629         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1630         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1631         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1632         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1633
1634         for (cnt = 0; cnt < 16; cnt++)
1635                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1636                         qpcb->dest_gid_al.byte[cnt];
1637
1638         /* return init attributes given in ehca_create_qp */
1639         if (qp_init_attr)
1640                 *qp_init_attr = my_qp->init_attr;
1641
1642         if (ehca_debug_level)
1643                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1644
1645 query_qp_exit1:
1646         ehca_free_fw_ctrlblock(qpcb);
1647
1648         return ret;
1649 }
1650
1651 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1652                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1653 {
1654         struct ehca_qp *my_qp =
1655                 container_of(ibsrq, struct ehca_qp, ib_srq);
1656         struct ehca_pd *my_pd =
1657                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1658         struct ehca_shca *shca =
1659                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1660         struct hcp_modify_qp_control_block *mqpcb;
1661         u64 update_mask;
1662         u64 h_ret;
1663         int ret = 0;
1664
1665         u32 cur_pid = current->tgid;
1666         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1667             my_pd->ownpid != cur_pid) {
1668                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1669                          cur_pid, my_pd->ownpid);
1670                 return -EINVAL;
1671         }
1672
1673         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1674         if (!mqpcb) {
1675                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1676                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1677                 return -ENOMEM;
1678         }
1679
1680         update_mask = 0;
1681         if (attr_mask & IB_SRQ_LIMIT) {
1682                 attr_mask &= ~IB_SRQ_LIMIT;
1683                 update_mask |=
1684                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1685                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1686                 mqpcb->curr_srq_limit =
1687                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1688                 mqpcb->qp_aff_asyn_ev_log_reg =
1689                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1690         }
1691
1692         /* by now, all bits in attr_mask should have been cleared */
1693         if (attr_mask) {
1694                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1695                          "attr_mask=%x", attr_mask);
1696                 ret = -EINVAL;
1697                 goto modify_srq_exit0;
1698         }
1699
1700         if (ehca_debug_level)
1701                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1702
1703         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1704                                  NULL, update_mask, mqpcb,
1705                                  my_qp->galpas.kernel);
1706
1707         if (h_ret != H_SUCCESS) {
1708                 ret = ehca2ib_return_code(h_ret);
1709                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1710                          "ehca_qp=%p qp_num=%x",
1711                          h_ret, my_qp, my_qp->real_qp_num);
1712         }
1713
1714 modify_srq_exit0:
1715         ehca_free_fw_ctrlblock(mqpcb);
1716
1717         return ret;
1718 }
1719
1720 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1721 {
1722         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1723         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1724         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1725                                               ib_device);
1726         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1727         struct hcp_modify_qp_control_block *qpcb;
1728         u32 cur_pid = current->tgid;
1729         int ret = 0;
1730         u64 h_ret;
1731
1732         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1733             my_pd->ownpid != cur_pid) {
1734                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1735                          cur_pid, my_pd->ownpid);
1736                 return -EINVAL;
1737         }
1738
1739         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1740         if (!qpcb) {
1741                 ehca_err(srq->device, "Out of memory for qpcb "
1742                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1743                 return -ENOMEM;
1744         }
1745
1746         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1747                                 NULL, qpcb, my_qp->galpas.kernel);
1748
1749         if (h_ret != H_SUCCESS) {
1750                 ret = ehca2ib_return_code(h_ret);
1751                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1752                          "ehca_qp=%p qp_num=%x h_ret=%li",
1753                          my_qp, my_qp->real_qp_num, h_ret);
1754                 goto query_srq_exit1;
1755         }
1756
1757         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1758         srq_attr->max_sge = qpcb->actual_nr_sges_in_rq_wqe;
1759         srq_attr->srq_limit = EHCA_BMASK_GET(
1760                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1761
1762         if (ehca_debug_level)
1763                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1764
1765 query_srq_exit1:
1766         ehca_free_fw_ctrlblock(qpcb);
1767
1768         return ret;
1769 }
1770
1771 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1772                                struct ib_uobject *uobject)
1773 {
1774         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1775         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1776                                              ib_pd);
1777         u32 cur_pid = current->tgid;
1778         u32 qp_num = my_qp->real_qp_num;
1779         int ret;
1780         u64 h_ret;
1781         u8 port_num;
1782         enum ib_qp_type qp_type;
1783         unsigned long flags;
1784
1785         if (uobject) {
1786                 if (my_qp->mm_count_galpa ||
1787                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1788                         ehca_err(dev, "Resources still referenced in "
1789                                  "user space qp_num=%x", qp_num);
1790                         return -EINVAL;
1791                 }
1792                 if (my_pd->ownpid != cur_pid) {
1793                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1794                                  cur_pid, my_pd->ownpid);
1795                         return -EINVAL;
1796                 }
1797         }
1798
1799         if (my_qp->send_cq) {
1800                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1801                 if (ret) {
1802                         ehca_err(dev, "Couldn't unassign qp from "
1803                                  "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1804                                  qp_num, my_qp->send_cq->cq_number);
1805                         return ret;
1806                 }
1807         }
1808
1809         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1810         idr_remove(&ehca_qp_idr, my_qp->token);
1811         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1812
1813         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1814         if (h_ret != H_SUCCESS) {
1815                 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1816                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1817                 return ehca2ib_return_code(h_ret);
1818         }
1819
1820         port_num = my_qp->init_attr.port_num;
1821         qp_type  = my_qp->init_attr.qp_type;
1822
1823         /* no support for IB_QPT_SMI yet */
1824         if (qp_type == IB_QPT_GSI) {
1825                 struct ib_event event;
1826                 ehca_info(dev, "device %s: port %x is inactive.",
1827                           shca->ib_device.name, port_num);
1828                 event.device = &shca->ib_device;
1829                 event.event = IB_EVENT_PORT_ERR;
1830                 event.element.port_num = port_num;
1831                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1832                 ib_dispatch_event(&event);
1833         }
1834
1835         if (HAS_RQ(my_qp))
1836                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1837         if (HAS_SQ(my_qp))
1838                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1839         kmem_cache_free(qp_cache, my_qp);
1840         return 0;
1841 }
1842
1843 int ehca_destroy_qp(struct ib_qp *qp)
1844 {
1845         return internal_destroy_qp(qp->device,
1846                                    container_of(qp, struct ehca_qp, ib_qp),
1847                                    qp->uobject);
1848 }
1849
1850 int ehca_destroy_srq(struct ib_srq *srq)
1851 {
1852         return internal_destroy_qp(srq->device,
1853                                    container_of(srq, struct ehca_qp, ib_srq),
1854                                    srq->uobject);
1855 }
1856
1857 int ehca_init_qp_cache(void)
1858 {
1859         qp_cache = kmem_cache_create("ehca_cache_qp",
1860                                      sizeof(struct ehca_qp), 0,
1861                                      SLAB_HWCACHE_ALIGN,
1862                                      NULL);
1863         if (!qp_cache)
1864                 return -ENOMEM;
1865         return 0;
1866 }
1867
1868 void ehca_cleanup_qp_cache(void)
1869 {
1870         if (qp_cache)
1871                 kmem_cache_destroy(qp_cache);
1872 }