drivers/ieee1394/video1394.c

   1 /*
   2  * video1394.c - video driver for OHCI 1394 boards
   3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
   4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software Foundation,
  18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  *
  20  * NOTES:
  21  *
  22  * ioctl return codes:
  23  * EFAULT is only for invalid address for the argp
  24  * EINVAL for out of range values
  25  * EBUSY when trying to use an already used resource
  26  * ESRCH when trying to free/stop a not used resource
  27  * EAGAIN for resource allocation failure that could perhaps succeed later
  28  * ENOTTY for unsupported ioctl request
  29  *
  30  */
  31 #include <linux/config.h>
  32 #include <linux/kernel.h>
  33 #include <linux/list.h>
  34 #include <linux/slab.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/wait.h>
  37 #include <linux/errno.h>
  38 #include <linux/module.h>
  39 #include <linux/init.h>
  40 #include <linux/pci.h>
  41 #include <linux/fs.h>
  42 #include <linux/poll.h>
  43 #include <linux/smp_lock.h>
  44 #include <linux/delay.h>
  45 #include <linux/bitops.h>
  46 #include <linux/types.h>
  47 #include <linux/vmalloc.h>
  48 #include <linux/timex.h>
  49 #include <linux/mm.h>
  50 #include <linux/compat.h>
  51 #include <linux/cdev.h>
  52
  53 #include "ieee1394.h"
  54 #include "ieee1394_types.h"
  55 #include "hosts.h"
  56 #include "ieee1394_core.h"
  57 #include "highlevel.h"
  58 #include "video1394.h"
  59 #include "nodemgr.h"
  60 #include "dma.h"
  61
  62 #include "ohci1394.h"
  63
  64 #define ISO_CHANNELS 64
  65
  66 struct it_dma_prg {
  67         struct dma_cmd begin;
  68         quadlet_t data[4];
  69         struct dma_cmd end;
  70         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
  71 };
  72
  73 struct dma_iso_ctx {
  74         struct ti_ohci *ohci;
  75         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
  76         struct ohci1394_iso_tasklet iso_tasklet;
  77         int channel;
  78         int ctx;
  79         int last_buffer;
  80         int * next_buffer;  /* For ISO Transmit of video packets
  81                                to write the correct SYT field
  82                                into the next block */
  83         unsigned int num_desc;
  84         unsigned int buf_size;
  85         unsigned int frame_size;
  86         unsigned int packet_size;
  87         unsigned int left_size;
  88         unsigned int nb_cmd;
  89
  90         struct dma_region dma;
  91
  92         struct dma_prog_region *prg_reg;
  93
  94         struct dma_cmd **ir_prg;
  95         struct it_dma_prg **it_prg;
  96
  97         unsigned int *buffer_status;
  98         unsigned int *buffer_prg_assignment;
  99         struct timeval *buffer_time; /* time when the buffer was received */
 100         unsigned int *last_used_cmd; /* For ISO Transmit with
 101                                         variable sized packets only ! */
 102         int ctrlClear;
 103         int ctrlSet;
 104         int cmdPtr;
 105         int ctxMatch;
 106         wait_queue_head_t waitq;
 107         spinlock_t lock;
 108         unsigned int syt_offset;
 109         int flags;
 110
 111         struct list_head link;
 112 };
 113
 114
 115 struct file_ctx {
 116         struct ti_ohci *ohci;
 117         struct list_head context_list;
 118         struct dma_iso_ctx *current_ctx;
 119 };
 120
 121 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
 122 #define VIDEO1394_DEBUG
 123 #endif
 124
 125 #ifdef DBGMSG
 126 #undef DBGMSG
 127 #endif
 128
 129 #ifdef VIDEO1394_DEBUG
 130 #define DBGMSG(card, fmt, args...) \
 131 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
 132 #else
 133 #define DBGMSG(card, fmt, args...)
 134 #endif
 135
 136 /* print general (card independent) information */
 137 #define PRINT_G(level, fmt, args...) \
 138 printk(level "video1394: " fmt "\n" , ## args)
 139
 140 /* print card specific information */
 141 #define PRINT(level, card, fmt, args...) \
 142 printk(level "video1394_%d: " fmt "\n" , card , ## args)
 143
 144 static void wakeup_dma_ir_ctx(unsigned long l);
 145 static void wakeup_dma_it_ctx(unsigned long l);
 146
 147 static struct hpsb_highlevel video1394_highlevel;
 148
 149 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
 150 {
 151         int i;
 152
 153         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
 154
 155         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
 156         if (d->iso_tasklet.link.next != NULL)
 157                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
 158
 159         dma_region_free(&d->dma);
 160
 161         if (d->prg_reg) {
 162                 for (i = 0; i < d->num_desc; i++)
 163                         dma_prog_region_free(&d->prg_reg[i]);
 164                 kfree(d->prg_reg);
 165         }
 166
 167         kfree(d->ir_prg);
 168         kfree(d->it_prg);
 169         kfree(d->buffer_status);
 170         kfree(d->buffer_prg_assignment);
 171         kfree(d->buffer_time);
 172         kfree(d->last_used_cmd);
 173         kfree(d->next_buffer);
 174         list_del(&d->link);
 175         kfree(d);
 176
 177         return 0;
 178 }
 179
 180 static struct dma_iso_ctx *
 181 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
 182                   int buf_size, int channel, unsigned int packet_size)
 183 {
 184         struct dma_iso_ctx *d;
 185         int i;
 186
 187         d = kzalloc(sizeof(*d), GFP_KERNEL);
 188         if (!d) {
 189                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
 190                 return NULL;
 191         }
 192
 193         d->ohci = ohci;
 194         d->type = type;
 195         d->channel = channel;
 196         d->num_desc = num_desc;
 197         d->frame_size = buf_size;
 198         d->buf_size = PAGE_ALIGN(buf_size);
 199         d->last_buffer = -1;
 200         INIT_LIST_HEAD(&d->link);
 201         init_waitqueue_head(&d->waitq);
 202
 203         /* Init the regions for easy cleanup */
 204         dma_region_init(&d->dma);
 205
 206         if (dma_region_alloc(&d->dma, (d->num_desc - 1) * d->buf_size, ohci->dev,
 207                              PCI_DMA_BIDIRECTIONAL)) {
 208                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
 209                 free_dma_iso_ctx(d);
 210                 return NULL;
 211         }
 212
 213         if (type == OHCI_ISO_RECEIVE)
 214                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 215                                           wakeup_dma_ir_ctx,
 216                                           (unsigned long) d);
 217         else
 218                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
 219                                           wakeup_dma_it_ctx,
 220                                           (unsigned long) d);
 221
 222         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
 223                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
 224                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
 225                 free_dma_iso_ctx(d);
 226                 return NULL;
 227         }
 228         d->ctx = d->iso_tasklet.context;
 229
 230         d->prg_reg = kmalloc(d->num_desc * sizeof(*d->prg_reg), GFP_KERNEL);
 231         if (!d->prg_reg) {
 232                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
 233                 free_dma_iso_ctx(d);
 234                 return NULL;
 235         }
 236         /* Makes for easier cleanup */
 237         for (i = 0; i < d->num_desc; i++)
 238                 dma_prog_region_init(&d->prg_reg[i]);
 239
 240         if (type == OHCI_ISO_RECEIVE) {
 241                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
 242                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
 243                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
 244                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
 245
 246                 d->ir_prg = kzalloc(d->num_desc * sizeof(*d->ir_prg),
 247                                     GFP_KERNEL);
 248
 249                 if (!d->ir_prg) {
 250                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 251                         free_dma_iso_ctx(d);
 252                         return NULL;
 253                 }
 254
 255                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
 256                 d->left_size = (d->frame_size % PAGE_SIZE) ?
 257                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
 258
 259                 for (i = 0;i < d->num_desc; i++) {
 260                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 261                                                   sizeof(struct dma_cmd), ohci->dev)) {
 262                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
 263                                 free_dma_iso_ctx(d);
 264                                 return NULL;
 265                         }
 266                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
 267                 }
 268
 269         } else {  /* OHCI_ISO_TRANSMIT */
 270                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
 271                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
 272                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
 273
 274                 d->it_prg = kzalloc(d->num_desc * sizeof(*d->it_prg),
 275                                     GFP_KERNEL);
 276
 277                 if (!d->it_prg) {
 278                         PRINT(KERN_ERR, ohci->host->id,
 279                               "Failed to allocate dma it prg");
 280                         free_dma_iso_ctx(d);
 281                         return NULL;
 282                 }
 283
 284                 d->packet_size = packet_size;
 285
 286                 if (PAGE_SIZE % packet_size || packet_size>4096) {
 287                         PRINT(KERN_ERR, ohci->host->id,
 288                               "Packet size %d (page_size: %ld) "
 289                               "not yet supported\n",
 290                               packet_size, PAGE_SIZE);
 291                         free_dma_iso_ctx(d);
 292                         return NULL;
 293                 }
 294
 295                 d->nb_cmd = d->frame_size / d->packet_size;
 296                 if (d->frame_size % d->packet_size) {
 297                         d->nb_cmd++;
 298                         d->left_size = d->frame_size % d->packet_size;
 299                 } else
 300                         d->left_size = d->packet_size;
 301
 302                 for (i = 0; i < d->num_desc; i++) {
 303                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
 304                                                 sizeof(struct it_dma_prg), ohci->dev)) {
 305                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
 306                                 free_dma_iso_ctx(d);
 307                                 return NULL;
 308                         }
 309                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
 310                 }
 311         }
 312
 313         d->buffer_status =
 314             kzalloc(d->num_desc * sizeof(*d->buffer_status), GFP_KERNEL);
 315         d->buffer_prg_assignment =
 316             kzalloc(d->num_desc * sizeof(*d->buffer_prg_assignment), GFP_KERNEL);
 317         d->buffer_time =
 318             kzalloc(d->num_desc * sizeof(*d->buffer_time), GFP_KERNEL);
 319         d->last_used_cmd =
 320             kzalloc(d->num_desc * sizeof(*d->last_used_cmd), GFP_KERNEL);
 321         d->next_buffer =
 322             kzalloc(d->num_desc * sizeof(*d->next_buffer), GFP_KERNEL);
 323
 324         if (!d->buffer_status || !d->buffer_prg_assignment || !d->buffer_time ||
 325             !d->last_used_cmd || !d->next_buffer) {
 326                 PRINT(KERN_ERR, ohci->host->id,
 327                       "Failed to allocate dma_iso_ctx member");
 328                 free_dma_iso_ctx(d);
 329                 return NULL;
 330         }
 331
 332         spin_lock_init(&d->lock);
 333
 334         DBGMSG(ohci->host->id, "Iso %s DMA: %d buffers "
 335               "of size %d allocated for a frame size %d, each with %d prgs",
 336               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
 337               d->num_desc - 1, d->buf_size, d->frame_size, d->nb_cmd);
 338
 339         return d;
 340 }
 341
 342 static void reset_ir_status(struct dma_iso_ctx *d, int n)
 343 {
 344         int i;
 345         d->ir_prg[n][0].status = cpu_to_le32(4);
 346         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
 347         for (i = 2; i < d->nb_cmd - 1; i++)
 348                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
 349         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
 350 }
 351
 352 static void reprogram_dma_ir_prg(struct dma_iso_ctx *d, int n, int buffer, int flags)
 353 {
 354         struct dma_cmd *ir_prg = d->ir_prg[n];
 355         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 356         int i;
 357
 358         d->buffer_prg_assignment[n] = buffer;
 359
 360         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 361                                 (unsigned long)d->dma.kvirt));
 362         ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 363                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 364
 365         for (i=2;i<d->nb_cmd-1;i++) {
 366                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 367                                                 (buf+(i-1)*PAGE_SIZE) -
 368                                                 (unsigned long)d->dma.kvirt));
 369         }
 370
 371         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 372                                   DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 373         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 374                                   (buf+(i-1)*PAGE_SIZE) - (unsigned long)d->dma.kvirt));
 375 }
 376
 377 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
 378 {
 379         struct dma_cmd *ir_prg = d->ir_prg[n];
 380         struct dma_prog_region *ir_reg = &d->prg_reg[n];
 381         unsigned long buf = (unsigned long)d->dma.kvirt;
 382         int i;
 383
 384         /* the first descriptor will read only 4 bytes */
 385         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 386                 DMA_CTL_BRANCH | 4);
 387
 388         /* set the sync flag */
 389         if (flags & VIDEO1394_SYNC_FRAMES)
 390                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
 391
 392         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
 393                                 (unsigned long)d->dma.kvirt));
 394         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 395                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 396
 397         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
 398         if (d->nb_cmd > 2) {
 399                 /* The second descriptor will read PAGE_SIZE-4 bytes */
 400                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 401                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
 402                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
 403                                                 (unsigned long)d->dma.kvirt));
 404                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 405                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 406
 407                 for (i = 2; i < d->nb_cmd - 1; i++) {
 408                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 409                                                         DMA_CTL_BRANCH | PAGE_SIZE);
 410                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 411                                                         (buf+(i-1)*PAGE_SIZE) -
 412                                                         (unsigned long)d->dma.kvirt));
 413
 414                         ir_prg[i].branchAddress =
 415                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
 416                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
 417                 }
 418
 419                 /* The last descriptor will generate an interrupt */
 420                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 421                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
 422                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 423                                                 (buf+(i-1)*PAGE_SIZE) -
 424                                                 (unsigned long)d->dma.kvirt));
 425         } else {
 426                 /* Only one DMA page is used. Read d->left_size immediately and */
 427                 /* generate an interrupt as this is also the last page. */
 428                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
 429                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
 430                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 431                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
 432         }
 433 }
 434
 435 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
 436 {
 437         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 438         int i;
 439
 440         d->flags = flags;
 441
 442         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 443
 444         for (i=0;i<d->num_desc;i++) {
 445                 initialize_dma_ir_prg(d, i, flags);
 446                 reset_ir_status(d, i);
 447         }
 448
 449         /* reset the ctrl register */
 450         reg_write(ohci, d->ctrlClear, 0xf0000000);
 451
 452         /* Set bufferFill */
 453         reg_write(ohci, d->ctrlSet, 0x80000000);
 454
 455         /* Set isoch header */
 456         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
 457                 reg_write(ohci, d->ctrlSet, 0x40000000);
 458
 459         /* Set the context match register to match on all tags,
 460            sync for sync tag, and listen to d->channel */
 461         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
 462
 463         /* Set up isoRecvIntMask to generate interrupts */
 464         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
 465 }
 466
 467 /* find which context is listening to this channel */
 468 static struct dma_iso_ctx *
 469 find_ctx(struct list_head *list, int type, int channel)
 470 {
 471         struct dma_iso_ctx *ctx;
 472
 473         list_for_each_entry(ctx, list, link) {
 474                 if (ctx->type == type && ctx->channel == channel)
 475                         return ctx;
 476         }
 477
 478         return NULL;
 479 }
 480
 481 static void wakeup_dma_ir_ctx(unsigned long l)
 482 {
 483         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 484         int i;
 485
 486         spin_lock(&d->lock);
 487
 488         for (i = 0; i < d->num_desc; i++) {
 489                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
 490                         reset_ir_status(d, i);
 491                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 492                         do_gettimeofday(&d->buffer_time[d->buffer_prg_assignment[i]]);
 493                 }
 494         }
 495
 496         spin_unlock(&d->lock);
 497
 498         if (waitqueue_active(&d->waitq))
 499                 wake_up_interruptible(&d->waitq);
 500 }
 501
 502 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
 503                                  int n)
 504 {
 505         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
 506         u32 cycleTimer;
 507         u32 timeStamp;
 508
 509         if (n == -1) {
 510           return;
 511         }
 512
 513         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
 514
 515         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
 516         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
 517                 + (cycleTimer & 0xf000)) & 0xffff;
 518
 519         buf[6] = timeStamp >> 8;
 520         buf[7] = timeStamp & 0xff;
 521
 522     /* if first packet is empty packet, then put timestamp into the next full one too */
 523     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 524             buf += d->packet_size;
 525         buf[6] = timeStamp >> 8;
 526             buf[7] = timeStamp & 0xff;
 527         }
 528
 529     /* do the next buffer frame too in case of irq latency */
 530         n = d->next_buffer[n];
 531         if (n == -1) {
 532           return;
 533         }
 534         buf = d->dma.kvirt + n * d->buf_size;
 535
 536         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
 537
 538         buf[6] = timeStamp >> 8;
 539         buf[7] = timeStamp & 0xff;
 540
 541     /* if first packet is empty packet, then put timestamp into the next full one too */
 542     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
 543             buf += d->packet_size;
 544         buf[6] = timeStamp >> 8;
 545             buf[7] = timeStamp & 0xff;
 546         }
 547
 548 #if 0
 549         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
 550                curr, n, cycleTimer, timeStamp);
 551 #endif
 552 }
 553
 554 static void wakeup_dma_it_ctx(unsigned long l)
 555 {
 556         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
 557         struct ti_ohci *ohci = d->ohci;
 558         int i;
 559
 560         spin_lock(&d->lock);
 561
 562         for (i = 0; i < d->num_desc; i++) {
 563                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
 564                     cpu_to_le32(0xFFFF0000)) {
 565                         int next = d->next_buffer[i];
 566                         put_timestamp(ohci, d, next);
 567                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
 568                         d->buffer_status[d->buffer_prg_assignment[i]] = VIDEO1394_BUFFER_READY;
 569                 }
 570         }
 571
 572         spin_unlock(&d->lock);
 573
 574         if (waitqueue_active(&d->waitq))
 575                 wake_up_interruptible(&d->waitq);
 576 }
 577
 578 static void reprogram_dma_it_prg(struct dma_iso_ctx  *d, int n, int buffer)
 579 {
 580         struct it_dma_prg *it_prg = d->it_prg[n];
 581         unsigned long buf = (unsigned long)d->dma.kvirt + buffer * d->buf_size;
 582         int i;
 583
 584         d->buffer_prg_assignment[n] = buffer;
 585         for (i=0;i<d->nb_cmd;i++) {
 586           it_prg[i].end.address =
 587                 cpu_to_le32(dma_region_offset_to_bus(&d->dma,
 588                         (buf+i*d->packet_size) - (unsigned long)d->dma.kvirt));
 589         }
 590 }
 591
 592 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
 593 {
 594         struct it_dma_prg *it_prg = d->it_prg[n];
 595         struct dma_prog_region *it_reg = &d->prg_reg[n];
 596         unsigned long buf = (unsigned long)d->dma.kvirt;
 597         int i;
 598         d->last_used_cmd[n] = d->nb_cmd - 1;
 599         for (i=0;i<d->nb_cmd;i++) {
 600
 601                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
 602                         DMA_CTL_IMMEDIATE | 8) ;
 603                 it_prg[i].begin.address = 0;
 604
 605                 it_prg[i].begin.status = 0;
 606
 607                 it_prg[i].data[0] = cpu_to_le32(
 608                         (IEEE1394_SPEED_100 << 16)
 609                         | (/* tag */ 1 << 14)
 610                         | (d->channel << 8)
 611                         | (TCODE_ISO_DATA << 4));
 612                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
 613                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
 614                 it_prg[i].data[2] = 0;
 615                 it_prg[i].data[3] = 0;
 616
 617                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
 618                                              DMA_CTL_BRANCH);
 619                 it_prg[i].end.address =
 620                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
 621                                                 (unsigned long)d->dma.kvirt));
 622
 623                 if (i<d->nb_cmd-1) {
 624                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
 625                         it_prg[i].begin.branchAddress =
 626                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 627                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 628                         it_prg[i].end.branchAddress =
 629                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 630                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 631                 } else {
 632                         /* the last prg generates an interrupt */
 633                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 634                                 DMA_CTL_IRQ | d->left_size);
 635                         /* the last prg doesn't branch */
 636                         it_prg[i].begin.branchAddress = 0;
 637                         it_prg[i].end.branchAddress = 0;
 638                 }
 639                 it_prg[i].end.status = 0;
 640         }
 641 }
 642
 643 static void initialize_dma_it_prg_var_packet_queue(
 644         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
 645         struct ti_ohci *ohci)
 646 {
 647         struct it_dma_prg *it_prg = d->it_prg[n];
 648         struct dma_prog_region *it_reg = &d->prg_reg[n];
 649         int i;
 650
 651 #if 0
 652         if (n != -1) {
 653                 put_timestamp(ohci, d, n);
 654         }
 655 #endif
 656         d->last_used_cmd[n] = d->nb_cmd - 1;
 657
 658         for (i = 0; i < d->nb_cmd; i++) {
 659                 unsigned int size;
 660                 if (packet_sizes[i] > d->packet_size) {
 661                         size = d->packet_size;
 662                 } else {
 663                         size = packet_sizes[i];
 664                 }
 665                 it_prg[i].data[1] = cpu_to_le32(size << 16);
 666                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
 667
 668                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
 669                         it_prg[i].end.control |= cpu_to_le32(size);
 670                         it_prg[i].begin.branchAddress =
 671                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 672                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 673                         it_prg[i].end.branchAddress =
 674                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
 675                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
 676                 } else {
 677                         /* the last prg generates an interrupt */
 678                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
 679                                 DMA_CTL_IRQ | size);
 680                         /* the last prg doesn't branch */
 681                         it_prg[i].begin.branchAddress = 0;
 682                         it_prg[i].end.branchAddress = 0;
 683                         d->last_used_cmd[n] = i;
 684                         break;
 685                 }
 686         }
 687 }
 688
 689 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
 690                                   unsigned int syt_offset, int flags)
 691 {
 692         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
 693         int i;
 694
 695         d->flags = flags;
 696         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
 697
 698         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
 699
 700         for (i=0;i<d->num_desc;i++)
 701                 initialize_dma_it_prg(d, i, sync_tag);
 702
 703         /* Set up isoRecvIntMask to generate interrupts */
 704         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
 705 }
 706
 707 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
 708                                               unsigned int buffer)
 709 {
 710         unsigned long flags;
 711         unsigned int ret;
 712         spin_lock_irqsave(&d->lock, flags);
 713         ret = d->buffer_status[buffer];
 714         spin_unlock_irqrestore(&d->lock, flags);
 715         return ret;
 716 }
 717
 718 static int __video1394_ioctl(struct file *file,
 719                              unsigned int cmd, unsigned long arg)
 720 {
 721         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
 722         struct ti_ohci *ohci = ctx->ohci;
 723         unsigned long flags;
 724         void __user *argp = (void __user *)arg;
 725
 726         switch(cmd)
 727         {
 728         case VIDEO1394_IOC_LISTEN_CHANNEL:
 729         case VIDEO1394_IOC_TALK_CHANNEL:
 730         {
 731                 struct video1394_mmap v;
 732                 u64 mask;
 733                 struct dma_iso_ctx *d;
 734                 int i;
 735
 736                 if (copy_from_user(&v, argp, sizeof(v)))
 737                         return -EFAULT;
 738
 739                 /* if channel < 0, find lowest available one */
 740                 if (v.channel < 0) {
 741                     mask = (u64)0x1;
 742                     for (i=0; ; i++) {
 743                         if (i == ISO_CHANNELS) {
 744                             PRINT(KERN_ERR, ohci->host->id,
 745                                   "No free channel found");
 746                             return -EAGAIN;
 747                         }
 748                         if (!(ohci->ISO_channel_usage & mask)) {
 749                             v.channel = i;
 750                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
 751                             break;
 752                         }
 753                         mask = mask << 1;
 754                     }
 755                 } else if (v.channel >= ISO_CHANNELS) {
 756                         PRINT(KERN_ERR, ohci->host->id,
 757                               "Iso channel %d out of bounds", v.channel);
 758                         return -EINVAL;
 759                 } else {
 760                         mask = (u64)0x1<<v.channel;
 761                 }
 762                 DBGMSG(ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
 763                         (u32)(mask>>32),(u32)(mask&0xffffffff),
 764                         (u32)(ohci->ISO_channel_usage>>32),
 765                         (u32)(ohci->ISO_channel_usage&0xffffffff));
 766                 if (ohci->ISO_channel_usage & mask) {
 767                         PRINT(KERN_ERR, ohci->host->id,
 768                               "Channel %d is already taken", v.channel);
 769                         return -EBUSY;
 770                 }
 771
 772                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
 773                         PRINT(KERN_ERR, ohci->host->id,
 774                               "Invalid %d length buffer requested",v.buf_size);
 775                         return -EINVAL;
 776                 }
 777
 778                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
 779                         PRINT(KERN_ERR, ohci->host->id,
 780                               "Invalid %d buffers requested",v.nb_buffers);
 781                         return -EINVAL;
 782                 }
 783
 784                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
 785                         PRINT(KERN_ERR, ohci->host->id,
 786                               "%d buffers of size %d bytes is too big",
 787                               v.nb_buffers, v.buf_size);
 788                         return -EINVAL;
 789                 }
 790
 791                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
 792                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
 793                                               v.nb_buffers + 1, v.buf_size,
 794                                               v.channel, 0);
 795
 796                         if (d == NULL) {
 797                                 PRINT(KERN_ERR, ohci->host->id,
 798                                       "Couldn't allocate ir context");
 799                                 return -EAGAIN;
 800                         }
 801                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
 802
 803                         ctx->current_ctx = d;
 804
 805                         v.buf_size = d->buf_size;
 806                         list_add_tail(&d->link, &ctx->context_list);
 807
 808                         DBGMSG(ohci->host->id,
 809                               "iso context %d listen on channel %d",
 810                               d->ctx, v.channel);
 811                 }
 812                 else {
 813                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
 814                                               v.nb_buffers + 1, v.buf_size,
 815                                               v.channel, v.packet_size);
 816
 817                         if (d == NULL) {
 818                                 PRINT(KERN_ERR, ohci->host->id,
 819                                       "Couldn't allocate it context");
 820                                 return -EAGAIN;
 821                         }
 822                         initialize_dma_it_ctx(d, v.sync_tag,
 823                                               v.syt_offset, v.flags);
 824
 825                         ctx->current_ctx = d;
 826
 827                         v.buf_size = d->buf_size;
 828
 829                         list_add_tail(&d->link, &ctx->context_list);
 830
 831                         DBGMSG(ohci->host->id,
 832                               "Iso context %d talk on channel %d", d->ctx,
 833                               v.channel);
 834                 }
 835
 836                 if (copy_to_user(argp, &v, sizeof(v))) {
 837                         /* FIXME : free allocated dma resources */
 838                         return -EFAULT;
 839                 }
 840
 841                 ohci->ISO_channel_usage |= mask;
 842
 843                 return 0;
 844         }
 845         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
 846         case VIDEO1394_IOC_UNTALK_CHANNEL:
 847         {
 848                 int channel;
 849                 u64 mask;
 850                 struct dma_iso_ctx *d;
 851
 852                 if (copy_from_user(&channel, argp, sizeof(int)))
 853                         return -EFAULT;
 854
 855                 if (channel < 0 || channel >= ISO_CHANNELS) {
 856                         PRINT(KERN_ERR, ohci->host->id,
 857                               "Iso channel %d out of bound", channel);
 858                         return -EINVAL;
 859                 }
 860                 mask = (u64)0x1<<channel;
 861                 if (!(ohci->ISO_channel_usage & mask)) {
 862                         PRINT(KERN_ERR, ohci->host->id,
 863                               "Channel %d is not being used", channel);
 864                         return -ESRCH;
 865                 }
 866
 867                 /* Mark this channel as unused */
 868                 ohci->ISO_channel_usage &= ~mask;
 869
 870                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
 871                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
 872                 else
 873                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
 874
 875                 if (d == NULL) return -ESRCH;
 876                 DBGMSG(ohci->host->id, "Iso context %d "
 877                       "stop talking on channel %d", d->ctx, channel);
 878                 free_dma_iso_ctx(d);
 879
 880                 return 0;
 881         }
 882         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
 883         {
 884                 struct video1394_wait v;
 885                 struct dma_iso_ctx *d;
 886                 int next_prg;
 887
 888                 if (copy_from_user(&v, argp, sizeof(v)))
 889                         return -EFAULT;
 890
 891                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 892                 if (d == NULL) return -EFAULT;
 893
 894                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
 895                         PRINT(KERN_ERR, ohci->host->id,
 896                               "Buffer %d out of range",v.buffer);
 897                         return -EINVAL;
 898                 }
 899
 900                 spin_lock_irqsave(&d->lock,flags);
 901
 902                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
 903                         PRINT(KERN_ERR, ohci->host->id,
 904                               "Buffer %d is already used",v.buffer);
 905                         spin_unlock_irqrestore(&d->lock,flags);
 906                         return -EBUSY;
 907                 }
 908
 909                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
 910
 911                 next_prg = (d->last_buffer + 1) % d->num_desc;
 912                 if (d->last_buffer>=0)
 913                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
 914                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0)
 915                                         & 0xfffffff0) | 0x1);
 916
 917                 d->last_buffer = next_prg;
 918                 reprogram_dma_ir_prg(d, d->last_buffer, v.buffer, d->flags);
 919
 920                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
 921
 922                 spin_unlock_irqrestore(&d->lock,flags);
 923
 924                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
 925                 {
 926                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
 927
 928                         /* Tell the controller where the first program is */
 929                         reg_write(ohci, d->cmdPtr,
 930                                   dma_prog_region_offset_to_bus(&d->prg_reg[d->last_buffer], 0) | 0x1);
 931
 932                         /* Run IR context */
 933                         reg_write(ohci, d->ctrlSet, 0x8000);
 934                 }
 935                 else {
 936                         /* Wake up dma context if necessary */
 937                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
 938                                 DBGMSG(ohci->host->id,
 939                                       "Waking up iso dma ctx=%d", d->ctx);
 940                                 reg_write(ohci, d->ctrlSet, 0x1000);
 941                         }
 942                 }
 943                 return 0;
 944
 945         }
 946         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
 947         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
 948         {
 949                 struct video1394_wait v;
 950                 struct dma_iso_ctx *d;
 951                 int i = 0;
 952
 953                 if (copy_from_user(&v, argp, sizeof(v)))
 954                         return -EFAULT;
 955
 956                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
 957                 if (d == NULL) return -EFAULT;
 958
 959                 if ((v.buffer<0) || (v.buffer>d->num_desc - 1)) {
 960                         PRINT(KERN_ERR, ohci->host->id,
 961                               "Buffer %d out of range",v.buffer);
 962                         return -EINVAL;
 963                 }
 964
 965                 /*
 966                  * I change the way it works so that it returns
 967                  * the last received frame.
 968                  */
 969                 spin_lock_irqsave(&d->lock, flags);
 970                 switch(d->buffer_status[v.buffer]) {
 971                 case VIDEO1394_BUFFER_READY:
 972                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 973                         break;
 974                 case VIDEO1394_BUFFER_QUEUED:
 975                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
 976                             /* for polling, return error code EINTR */
 977                             spin_unlock_irqrestore(&d->lock, flags);
 978                             return -EINTR;
 979                         }
 980
 981                         spin_unlock_irqrestore(&d->lock, flags);
 982                         wait_event_interruptible(d->waitq,
 983                                         video1394_buffer_state(d, v.buffer) ==
 984                                          VIDEO1394_BUFFER_READY);
 985                         if (signal_pending(current))
 986                                 return -EINTR;
 987                         spin_lock_irqsave(&d->lock, flags);
 988                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
 989                         break;
 990                 default:
 991                         PRINT(KERN_ERR, ohci->host->id,
 992                               "Buffer %d is not queued",v.buffer);
 993                         spin_unlock_irqrestore(&d->lock, flags);
 994                         return -ESRCH;
 995                 }
 996
 997                 /* set time of buffer */
 998                 v.filltime = d->buffer_time[v.buffer];
 999
1000                 /*
1001                  * Look ahead to see how many more buffers have been received
1002                  */
1003                 i=0;
1004                 while (d->buffer_status[(v.buffer+1)%(d->num_desc - 1)]==
1005                        VIDEO1394_BUFFER_READY) {
1006                         v.buffer=(v.buffer+1)%(d->num_desc - 1);
1007                         i++;
1008                 }
1009                 spin_unlock_irqrestore(&d->lock, flags);
1010
1011                 v.buffer=i;
1012                 if (copy_to_user(argp, &v, sizeof(v)))
1013                         return -EFAULT;
1014
1015                 return 0;
1016         }
1017         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1018         {
1019                 struct video1394_wait v;
1020                 unsigned int *psizes = NULL;
1021                 struct dma_iso_ctx *d;
1022                 int next_prg;
1023
1024                 if (copy_from_user(&v, argp, sizeof(v)))
1025                         return -EFAULT;
1026
1027                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1028                 if (d == NULL) return -EFAULT;
1029
1030                 if ((v.buffer<0) || (v.buffer>=d->num_desc - 1)) {
1031                         PRINT(KERN_ERR, ohci->host->id,
1032                               "Buffer %d out of range",v.buffer);
1033                         return -EINVAL;
1034                 }
1035
1036                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1037                         int buf_size = d->nb_cmd * sizeof(*psizes);
1038                         struct video1394_queue_variable __user *p = argp;
1039                         unsigned int __user *qv;
1040
1041                         if (get_user(qv, &p->packet_sizes))
1042                                 return -EFAULT;
1043
1044                         psizes = kmalloc(buf_size, GFP_KERNEL);
1045                         if (!psizes)
1046                                 return -ENOMEM;
1047
1048                         if (copy_from_user(psizes, qv, buf_size)) {
1049                                 kfree(psizes);
1050                                 return -EFAULT;
1051                         }
1052                 }
1053
1054                 spin_lock_irqsave(&d->lock,flags);
1055
1056                 /* last_buffer is last_prg */
1057                 next_prg = (d->last_buffer + 1) % d->num_desc;
1058                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1059                         PRINT(KERN_ERR, ohci->host->id,
1060                               "Buffer %d is already used",v.buffer);
1061                         spin_unlock_irqrestore(&d->lock,flags);
1062                         kfree(psizes);
1063                         return -EBUSY;
1064                 }
1065
1066                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1067                         initialize_dma_it_prg_var_packet_queue(
1068                                 d, next_prg, psizes, ohci);
1069                 }
1070
1071                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1072
1073                 if (d->last_buffer >= 0) {
1074                         d->it_prg[d->last_buffer]
1075                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1076                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1077                                                 0) & 0xfffffff0) | 0x3);
1078
1079                         d->it_prg[d->last_buffer]
1080                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1081                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[next_prg],
1082                                                 0) & 0xfffffff0) | 0x3);
1083                         d->next_buffer[d->last_buffer] = (v.buffer + 1) % (d->num_desc - 1);
1084                 }
1085                 d->last_buffer = next_prg;
1086                 reprogram_dma_it_prg(d, d->last_buffer, v.buffer);
1087                 d->next_buffer[d->last_buffer] = -1;
1088
1089                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1090
1091                 spin_unlock_irqrestore(&d->lock,flags);
1092
1093                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1094                 {
1095                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1096                                d->ctx);
1097                         put_timestamp(ohci, d, d->last_buffer);
1098
1099                         /* Tell the controller where the first program is */
1100                         reg_write(ohci, d->cmdPtr,
1101                                 dma_prog_region_offset_to_bus(&d->prg_reg[next_prg], 0) | 0x3);
1102
1103                         /* Run IT context */
1104                         reg_write(ohci, d->ctrlSet, 0x8000);
1105                 }
1106                 else {
1107                         /* Wake up dma context if necessary */
1108                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1109                                 DBGMSG(ohci->host->id,
1110                                       "Waking up iso transmit dma ctx=%d",
1111                                       d->ctx);
1112                                 put_timestamp(ohci, d, d->last_buffer);
1113                                 reg_write(ohci, d->ctrlSet, 0x1000);
1114                         }
1115                 }
1116
1117                 kfree(psizes);
1118                 return 0;
1119
1120         }
1121         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1122         {
1123                 struct video1394_wait v;
1124                 struct dma_iso_ctx *d;
1125
1126                 if (copy_from_user(&v, argp, sizeof(v)))
1127                         return -EFAULT;
1128
1129                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1130                 if (d == NULL) return -EFAULT;
1131
1132                 if ((v.buffer<0) || (v.buffer>=d->num_desc-1)) {
1133                         PRINT(KERN_ERR, ohci->host->id,
1134                               "Buffer %d out of range",v.buffer);
1135                         return -EINVAL;
1136                 }
1137
1138                 switch(d->buffer_status[v.buffer]) {
1139                 case VIDEO1394_BUFFER_READY:
1140                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1141                         return 0;
1142                 case VIDEO1394_BUFFER_QUEUED:
1143                         wait_event_interruptible(d->waitq,
1144                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1145                         if (signal_pending(current))
1146                                 return -EINTR;
1147                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1148                         return 0;
1149                 default:
1150                         PRINT(KERN_ERR, ohci->host->id,
1151                               "Buffer %d is not queued",v.buffer);
1152                         return -ESRCH;
1153                 }
1154         }
1155         default:
1156                 return -ENOTTY;
1157         }
1158 }
1159
1160 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1161 {
1162         int err;
1163         lock_kernel();
1164         err = __video1394_ioctl(file, cmd, arg);
1165         unlock_kernel();
1166         return err;
1167 }
1168
1169 /*
1170  *      This maps the vmalloced and reserved buffer to user space.
1171  *
1172  *  FIXME:
1173  *  - PAGE_READONLY should suffice!?
1174  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1175  *    But e.g. pte_alloc() does not work in modules ... :-(
1176  */
1177
1178 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1179 {
1180         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1181         int res = -EINVAL;
1182
1183         lock_kernel();
1184         if (ctx->current_ctx == NULL) {
1185                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1186         } else
1187                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1188         unlock_kernel();
1189
1190         return res;
1191 }
1192
1193 static int video1394_open(struct inode *inode, struct file *file)
1194 {
1195         int i = ieee1394_file_to_instance(file);
1196         struct ti_ohci *ohci;
1197         struct file_ctx *ctx;
1198
1199         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1200         if (ohci == NULL)
1201                 return -EIO;
1202
1203         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1204         if (!ctx)  {
1205                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1206                 return -ENOMEM;
1207         }
1208
1209         ctx->ohci = ohci;
1210         INIT_LIST_HEAD(&ctx->context_list);
1211         ctx->current_ctx = NULL;
1212         file->private_data = ctx;
1213
1214         return 0;
1215 }
1216
1217 static int video1394_release(struct inode *inode, struct file *file)
1218 {
1219         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1220         struct ti_ohci *ohci = ctx->ohci;
1221         struct list_head *lh, *next;
1222         u64 mask;
1223
1224         lock_kernel();
1225         list_for_each_safe(lh, next, &ctx->context_list) {
1226                 struct dma_iso_ctx *d;
1227                 d = list_entry(lh, struct dma_iso_ctx, link);
1228                 mask = (u64) 1 << d->channel;
1229
1230                 if (!(ohci->ISO_channel_usage & mask))
1231                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1232                               "is not being used", d->channel);
1233                 else
1234                         ohci->ISO_channel_usage &= ~mask;
1235                 DBGMSG(ohci->host->id, "On release: Iso %s context "
1236                       "%d stop listening on channel %d",
1237                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1238                       d->ctx, d->channel);
1239                 free_dma_iso_ctx(d);
1240         }
1241
1242         kfree(ctx);
1243         file->private_data = NULL;
1244
1245         unlock_kernel();
1246         return 0;
1247 }
1248
1249 #ifdef CONFIG_COMPAT
1250 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1251 #endif
1252
1253 static struct cdev video1394_cdev;
1254 static struct file_operations video1394_fops=
1255 {
1256         .owner =        THIS_MODULE,
1257         .unlocked_ioctl = video1394_ioctl,
1258 #ifdef CONFIG_COMPAT
1259         .compat_ioctl = video1394_compat_ioctl,
1260 #endif
1261         .mmap =         video1394_mmap,
1262         .open =         video1394_open,
1263         .release =      video1394_release
1264 };
1265
1266 /*** HOTPLUG STUFF **********************************************************/
1267 /*
1268  * Export information about protocols/devices supported by this driver.
1269  */
1270 static struct ieee1394_device_id video1394_id_table[] = {
1271         {
1272                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1273                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1274                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1275         },
1276         {
1277                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1278                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1279                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1280         },
1281         {
1282                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1283                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1284                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1285         },
1286         { }
1287 };
1288
1289 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1290
1291 static struct hpsb_protocol_driver video1394_driver = {
1292         .name           = "1394 Digital Camera Driver",
1293         .id_table       = video1394_id_table,
1294         .driver         = {
1295                 .name   = VIDEO1394_DRIVER_NAME,
1296                 .bus    = &ieee1394_bus_type,
1297         },
1298 };
1299
1300
1301 static void video1394_add_host (struct hpsb_host *host)
1302 {
1303         struct ti_ohci *ohci;
1304         int minor;
1305
1306         /* We only work with the OHCI-1394 driver */
1307         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1308                 return;
1309
1310         ohci = (struct ti_ohci *)host->hostdata;
1311
1312         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1313                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1314                 return;
1315         }
1316
1317         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1318         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1319
1320         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1321         class_device_create(hpsb_protocol_class, NULL, MKDEV(
1322                 IEEE1394_MAJOR, minor),
1323                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1324 }
1325
1326
1327 static void video1394_remove_host (struct hpsb_host *host)
1328 {
1329         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1330
1331         if (ohci)
1332                 class_device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
1333                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1334         return;
1335 }
1336
1337
1338 static struct hpsb_highlevel video1394_highlevel = {
1339         .name =         VIDEO1394_DRIVER_NAME,
1340         .add_host =     video1394_add_host,
1341         .remove_host =  video1394_remove_host,
1342 };
1343
1344 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1345 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1346 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1347 MODULE_LICENSE("GPL");
1348
1349 #ifdef CONFIG_COMPAT
1350
1351 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1352         _IOW ('#', 0x12, struct video1394_wait32)
1353 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1354         _IOWR('#', 0x13, struct video1394_wait32)
1355 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1356         _IOW ('#', 0x17, struct video1394_wait32)
1357 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1358         _IOWR('#', 0x18, struct video1394_wait32)
1359
1360 struct video1394_wait32 {
1361         u32 channel;
1362         u32 buffer;
1363         struct compat_timeval filltime;
1364 };
1365
1366 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1367 {
1368         struct video1394_wait32 __user *argp = (void __user *)arg;
1369         struct video1394_wait32 wait32;
1370         struct video1394_wait wait;
1371         mm_segment_t old_fs;
1372         int ret;
1373
1374         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1375                 return -EFAULT;
1376
1377         wait.channel = wait32.channel;
1378         wait.buffer = wait32.buffer;
1379         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1380         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1381
1382         old_fs = get_fs();
1383         set_fs(KERNEL_DS);
1384         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1385                 ret = video1394_ioctl(file,
1386                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1387                                       (unsigned long) &wait);
1388         else
1389                 ret = video1394_ioctl(file,
1390                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1391                                       (unsigned long) &wait);
1392         set_fs(old_fs);
1393
1394         if (!ret) {
1395                 wait32.channel = wait.channel;
1396                 wait32.buffer = wait.buffer;
1397                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1398                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1399
1400                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1401                         ret = -EFAULT;
1402         }
1403
1404         return ret;
1405 }
1406
1407 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1408 {
1409         struct video1394_wait32 wait32;
1410         struct video1394_wait wait;
1411         mm_segment_t old_fs;
1412         int ret;
1413
1414         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1415                 return -EFAULT;
1416
1417         wait.channel = wait32.channel;
1418         wait.buffer = wait32.buffer;
1419         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1420         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1421
1422         old_fs = get_fs();
1423         set_fs(KERNEL_DS);
1424         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1425                 ret = video1394_ioctl(file,
1426                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1427                                       (unsigned long) &wait);
1428         else
1429                 ret = video1394_ioctl(file,
1430                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1431                                       (unsigned long) &wait);
1432         set_fs(old_fs);
1433
1434         return ret;
1435 }
1436
1437 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1438 {
1439         return -EFAULT;   /* ??? was there before. */
1440
1441         return video1394_ioctl(file,
1442                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1443 }
1444
1445 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1446 {
1447         switch (cmd) {
1448         case VIDEO1394_IOC_LISTEN_CHANNEL:
1449         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1450         case VIDEO1394_IOC_TALK_CHANNEL:
1451         case VIDEO1394_IOC_UNTALK_CHANNEL:
1452                 return video1394_ioctl(f, cmd, arg);
1453
1454         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1455                 return video1394_w_wait32(f, cmd, arg);
1456         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1457                 return video1394_wr_wait32(f, cmd, arg);
1458         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1459                 return video1394_queue_buf32(f, cmd, arg);
1460         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1461                 return video1394_w_wait32(f, cmd, arg);
1462         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1463                 return video1394_wr_wait32(f, cmd, arg);
1464         default:
1465                 return -ENOIOCTLCMD;
1466         }
1467 }
1468
1469 #endif /* CONFIG_COMPAT */
1470
1471 static void __exit video1394_exit_module (void)
1472 {
1473         hpsb_unregister_protocol(&video1394_driver);
1474         hpsb_unregister_highlevel(&video1394_highlevel);
1475         cdev_del(&video1394_cdev);
1476         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1477 }
1478
1479 static int __init video1394_init_module (void)
1480 {
1481         int ret;
1482
1483         cdev_init(&video1394_cdev, &video1394_fops);
1484         video1394_cdev.owner = THIS_MODULE;
1485         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1486         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1487         if (ret) {
1488                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1489                 return ret;
1490         }
1491
1492         hpsb_register_highlevel(&video1394_highlevel);
1493
1494         ret = hpsb_register_protocol(&video1394_driver);
1495         if (ret) {
1496                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1497                 hpsb_unregister_highlevel(&video1394_highlevel);
1498                 cdev_del(&video1394_cdev);
1499                 return ret;
1500         }
1501
1502         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1503         return 0;
1504 }
1505
1506
1507 module_init(video1394_init_module);
1508 module_exit(video1394_exit_module);