drivers/i2c/chips/w83781d.c

   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       0       3       0x31    0x12c3  yes     no
  28     as99127f rev.2 (type_name = as99127f)       0x31    0x5ca3  yes     no
  29     w83781d     7       3       0       3       0x10-1  0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x21    0x5ca3  yes     yes(LPC)
  31     w83627thf   9       3       2       3       0x90    0x5ca3  no      yes(LPC)
  32     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  33     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  34     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  35
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/init.h>
  40 #include <linux/slab.h>
  41 #include <linux/jiffies.h>
  42 #include <linux/i2c.h>
  43 #include <linux/i2c-sensor.h>
  44 #include <linux/i2c-vid.h>
  45 #include <asm/io.h>
  46 #include "lm75.h"
  47
  48 /* Addresses to scan */
  49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
  50                                         0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
  51                                         0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  52 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
  53
  54 /* Insmod parameters */
  55 SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
  56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  57                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  58
  59 static int init = 1;
  60 module_param(init, bool, 0);
  61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  62
  63 /* Constants specified below */
  64
  65 /* Length of ISA address segment */
  66 #define W83781D_EXTENT                  8
  67
  68 /* Where are the ISA address/data registers relative to the base address */
  69 #define W83781D_ADDR_REG_OFFSET         5
  70 #define W83781D_DATA_REG_OFFSET         6
  71
  72 /* The W83781D registers */
  73 /* The W83782D registers for nr=7,8 are in bank 5 */
  74 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  75                                                     (0x554 + (((nr) - 7) * 2)))
  76 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  77                                                     (0x555 + (((nr) - 7) * 2)))
  78 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  79                                                     (0x550 + (nr) - 7))
  80
  81 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  82 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  83
  84 #define W83781D_REG_BANK                0x4E
  85 #define W83781D_REG_TEMP2_CONFIG        0x152
  86 #define W83781D_REG_TEMP3_CONFIG        0x252
  87 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  88                                         ((nr == 2) ? (0x0150) : \
  89                                                      (0x27)))
  90 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  91                                         ((nr == 2) ? (0x153) : \
  92                                                      (0x3A)))
  93 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  94                                         ((nr == 2) ? (0x155) : \
  95                                                      (0x39)))
  96
  97 #define W83781D_REG_CONFIG              0x40
  98 #define W83781D_REG_ALARM1              0x41
  99 #define W83781D_REG_ALARM2              0x42
 100 #define W83781D_REG_ALARM3              0x450   /* not on W83781D */
 101
 102 #define W83781D_REG_IRQ                 0x4C
 103 #define W83781D_REG_BEEP_CONFIG         0x4D
 104 #define W83781D_REG_BEEP_INTS1          0x56
 105 #define W83781D_REG_BEEP_INTS2          0x57
 106 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 107
 108 #define W83781D_REG_VID_FANDIV          0x47
 109
 110 #define W83781D_REG_CHIPID              0x49
 111 #define W83781D_REG_WCHIPID             0x58
 112 #define W83781D_REG_CHIPMAN             0x4F
 113 #define W83781D_REG_PIN                 0x4B
 114
 115 /* 782D/783S only */
 116 #define W83781D_REG_VBAT                0x5D
 117
 118 /* PWM 782D (1-4) and 783S (1-2) only */
 119 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 120                                                 /* on which is which; */
 121 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 122                                                 /* However 782d is probably wrong. */
 123 #define W83781D_REG_PWM3                0x5E
 124 #define W83781D_REG_PWM4                0x5F
 125 #define W83781D_REG_PWMCLK12            0x5C
 126 #define W83781D_REG_PWMCLK34            0x45C
 127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 128         W83781D_REG_PWM3, W83781D_REG_PWM4
 129 };
 130
 131 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 132
 133 #define W83781D_REG_I2C_ADDR            0x48
 134 #define W83781D_REG_I2C_SUBADDR         0x4A
 135
 136 /* The following are undocumented in the data sheets however we
 137    received the information in an email from Winbond tech support */
 138 /* Sensor selection - not on 781d */
 139 #define W83781D_REG_SCFG1               0x5D
 140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 141
 142 #define W83781D_REG_SCFG2               0x59
 143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 144
 145 #define W83781D_DEFAULT_BETA            3435
 146
 147 /* RT Table registers */
 148 #define W83781D_REG_RT_IDX              0x50
 149 #define W83781D_REG_RT_VAL              0x51
 150
 151 /* Conversions. Rounding and limit checking is only done on the TO_REG
 152    variants. Note that you should be a bit careful with which arguments
 153    these macros are called: arguments may be evaluated more than once.
 154    Fixing this is just not worth it. */
 155 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 156 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 157
 158 static inline u8
 159 FAN_TO_REG(long rpm, int div)
 160 {
 161         if (rpm == 0)
 162                 return 255;
 163         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 164         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 165 }
 166
 167 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 168                                         ((val) == 255 ? 0 : \
 169                                                         1350000 / ((val) * (div))))
 170
 171 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
 172                                                 : (val)) / 1000, 0, 0xff))
 173 #define TEMP_FROM_REG(val)              (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
 174
 175 #define ALARMS_FROM_REG(val)            (val)
 176 #define PWM_FROM_REG(val)               (val)
 177 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 178 #define BEEP_MASK_FROM_REG(val,type)    ((type) == as99127f ? \
 179                                          (val) ^ 0x7fff : (val))
 180 #define BEEP_MASK_TO_REG(val,type)      ((type) == as99127f ? \
 181                                          (~(val)) & 0x7fff : (val) & 0xffffff)
 182
 183 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 184 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 185
 186 #define DIV_FROM_REG(val)               (1 << (val))
 187
 188 static inline u8
 189 DIV_TO_REG(long val, enum chips type)
 190 {
 191         int i;
 192         val = SENSORS_LIMIT(val, 1,
 193                             ((type == w83781d
 194                               || type == as99127f) ? 8 : 128)) >> 1;
 195         for (i = 0; i < 7; i++) {
 196                 if (val == 0)
 197                         break;
 198                 val >>= 1;
 199         }
 200         return ((u8) i);
 201 }
 202
 203 /* There are some complications in a module like this. First off, W83781D chips
 204    may be both present on the SMBus and the ISA bus, and we have to handle
 205    those cases separately at some places. Second, there might be several
 206    W83781D chips available (well, actually, that is probably never done; but
 207    it is a clean illustration of how to handle a case like that). Finally,
 208    a specific chip may be attached to *both* ISA and SMBus, and we would
 209    not like to detect it double. Fortunately, in the case of the W83781D at
 210    least, a register tells us what SMBus address we are on, so that helps
 211    a bit - except if there could be more than one SMBus. Groan. No solution
 212    for this yet. */
 213
 214 /* This module may seem overly long and complicated. In fact, it is not so
 215    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 216    some corners. */
 217
 218 /* For each registered W83781D, we need to keep some data in memory. That
 219    data is pointed to by w83781d_list[NR]->data. The structure itself is
 220    dynamically allocated, at the same time when a new w83781d client is
 221    allocated. */
 222 struct w83781d_data {
 223         struct i2c_client client;
 224         struct semaphore lock;
 225         enum chips type;
 226
 227         struct semaphore update_lock;
 228         char valid;             /* !=0 if following fields are valid */
 229         unsigned long last_updated;     /* In jiffies */
 230
 231         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 232         /* array of 2 pointers to subclients */
 233
 234         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 235         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 236         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 237         u8 fan[3];              /* Register value */
 238         u8 fan_min[3];          /* Register value */
 239         u8 temp;
 240         u8 temp_max;            /* Register value */
 241         u8 temp_max_hyst;       /* Register value */
 242         u16 temp_add[2];        /* Register value */
 243         u16 temp_max_add[2];    /* Register value */
 244         u16 temp_max_hyst_add[2];       /* Register value */
 245         u8 fan_div[3];          /* Register encoding, shifted right */
 246         u8 vid;                 /* Register encoding, combined */
 247         u32 alarms;             /* Register encoding, combined */
 248         u32 beep_mask;          /* Register encoding, combined */
 249         u8 beep_enable;         /* Boolean */
 250         u8 pwm[4];              /* Register value */
 251         u8 pwmenable[4];        /* Boolean */
 252         u16 sens[3];            /* 782D/783S only.
 253                                    1 = pentium diode; 2 = 3904 diode;
 254                                    3000-5000 = thermistor beta.
 255                                    Default = 3435.
 256                                    Other Betas unimplemented */
 257         u8 vrm;
 258 };
 259
 260 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 261 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 262 static int w83781d_detach_client(struct i2c_client *client);
 263
 264 static int w83781d_read_value(struct i2c_client *client, u16 register);
 265 static int w83781d_write_value(struct i2c_client *client, u16 register,
 266                                u16 value);
 267 static struct w83781d_data *w83781d_update_device(struct device *dev);
 268 static void w83781d_init_client(struct i2c_client *client);
 269
 270 static struct i2c_driver w83781d_driver = {
 271         .owner = THIS_MODULE,
 272         .name = "w83781d",
 273         .id = I2C_DRIVERID_W83781D,
 274         .flags = I2C_DF_NOTIFY,
 275         .attach_adapter = w83781d_attach_adapter,
 276         .detach_client = w83781d_detach_client,
 277 };
 278
 279 /* following are the sysfs callback functions */
 280 #define show_in_reg(reg) \
 281 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 282 { \
 283         struct w83781d_data *data = w83781d_update_device(dev); \
 284         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 285 }
 286 show_in_reg(in);
 287 show_in_reg(in_min);
 288 show_in_reg(in_max);
 289
 290 #define store_in_reg(REG, reg) \
 291 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 292 { \
 293         struct i2c_client *client = to_i2c_client(dev); \
 294         struct w83781d_data *data = i2c_get_clientdata(client); \
 295         u32 val; \
 296          \
 297         val = simple_strtoul(buf, NULL, 10) / 10; \
 298          \
 299         down(&data->update_lock); \
 300         data->in_##reg[nr] = IN_TO_REG(val); \
 301         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 302          \
 303         up(&data->update_lock); \
 304         return count; \
 305 }
 306 store_in_reg(MIN, min);
 307 store_in_reg(MAX, max);
 308
 309 #define sysfs_in_offset(offset) \
 310 static ssize_t \
 311 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 312 { \
 313         return show_in(dev, buf, offset); \
 314 } \
 315 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 316
 317 #define sysfs_in_reg_offset(reg, offset) \
 318 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 319 { \
 320         return show_in_##reg (dev, buf, offset); \
 321 } \
 322 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 323 { \
 324         return store_in_##reg (dev, buf, count, offset); \
 325 } \
 326 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 327
 328 #define sysfs_in_offsets(offset) \
 329 sysfs_in_offset(offset); \
 330 sysfs_in_reg_offset(min, offset); \
 331 sysfs_in_reg_offset(max, offset);
 332
 333 sysfs_in_offsets(0);
 334 sysfs_in_offsets(1);
 335 sysfs_in_offsets(2);
 336 sysfs_in_offsets(3);
 337 sysfs_in_offsets(4);
 338 sysfs_in_offsets(5);
 339 sysfs_in_offsets(6);
 340 sysfs_in_offsets(7);
 341 sysfs_in_offsets(8);
 342
 343 #define device_create_file_in(client, offset) \
 344 do { \
 345 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 346 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 347 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 348 } while (0)
 349
 350 #define show_fan_reg(reg) \
 351 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 352 { \
 353         struct w83781d_data *data = w83781d_update_device(dev); \
 354         return sprintf(buf,"%ld\n", \
 355                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 356 }
 357 show_fan_reg(fan);
 358 show_fan_reg(fan_min);
 359
 360 static ssize_t
 361 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 362 {
 363         struct i2c_client *client = to_i2c_client(dev);
 364         struct w83781d_data *data = i2c_get_clientdata(client);
 365         u32 val;
 366
 367         val = simple_strtoul(buf, NULL, 10);
 368
 369         down(&data->update_lock);
 370         data->fan_min[nr - 1] =
 371             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 372         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 373                             data->fan_min[nr - 1]);
 374
 375         up(&data->update_lock);
 376         return count;
 377 }
 378
 379 #define sysfs_fan_offset(offset) \
 380 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 381 { \
 382         return show_fan(dev, buf, offset); \
 383 } \
 384 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 385
 386 #define sysfs_fan_min_offset(offset) \
 387 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 388 { \
 389         return show_fan_min(dev, buf, offset); \
 390 } \
 391 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 392 { \
 393         return store_fan_min(dev, buf, count, offset); \
 394 } \
 395 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
 396
 397 sysfs_fan_offset(1);
 398 sysfs_fan_min_offset(1);
 399 sysfs_fan_offset(2);
 400 sysfs_fan_min_offset(2);
 401 sysfs_fan_offset(3);
 402 sysfs_fan_min_offset(3);
 403
 404 #define device_create_file_fan(client, offset) \
 405 do { \
 406 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 407 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 408 } while (0)
 409
 410 #define show_temp_reg(reg) \
 411 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 412 { \
 413         struct w83781d_data *data = w83781d_update_device(dev); \
 414         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 415                 return sprintf(buf,"%d\n", \
 416                         LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 417         } else {        /* TEMP1 */ \
 418                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 419         } \
 420 }
 421 show_temp_reg(temp);
 422 show_temp_reg(temp_max);
 423 show_temp_reg(temp_max_hyst);
 424
 425 #define store_temp_reg(REG, reg) \
 426 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 427 { \
 428         struct i2c_client *client = to_i2c_client(dev); \
 429         struct w83781d_data *data = i2c_get_clientdata(client); \
 430         s32 val; \
 431          \
 432         val = simple_strtol(buf, NULL, 10); \
 433          \
 434         down(&data->update_lock); \
 435          \
 436         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 437                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 438                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 439                                 data->temp_##reg##_add[nr-2]); \
 440         } else {        /* TEMP1 */ \
 441                 data->temp_##reg = TEMP_TO_REG(val); \
 442                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 443                         data->temp_##reg); \
 444         } \
 445          \
 446         up(&data->update_lock); \
 447         return count; \
 448 }
 449 store_temp_reg(OVER, max);
 450 store_temp_reg(HYST, max_hyst);
 451
 452 #define sysfs_temp_offset(offset) \
 453 static ssize_t \
 454 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 455 { \
 456         return show_temp(dev, buf, offset); \
 457 } \
 458 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 459
 460 #define sysfs_temp_reg_offset(reg, offset) \
 461 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 462 { \
 463         return show_temp_##reg (dev, buf, offset); \
 464 } \
 465 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 466 { \
 467         return store_temp_##reg (dev, buf, count, offset); \
 468 } \
 469 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 470
 471 #define sysfs_temp_offsets(offset) \
 472 sysfs_temp_offset(offset); \
 473 sysfs_temp_reg_offset(max, offset); \
 474 sysfs_temp_reg_offset(max_hyst, offset);
 475
 476 sysfs_temp_offsets(1);
 477 sysfs_temp_offsets(2);
 478 sysfs_temp_offsets(3);
 479
 480 #define device_create_file_temp(client, offset) \
 481 do { \
 482 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 483 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 484 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 485 } while (0)
 486
 487 static ssize_t
 488 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 489 {
 490         struct w83781d_data *data = w83781d_update_device(dev);
 491         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 492 }
 493
 494 static
 495 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 496 #define device_create_file_vid(client) \
 497 device_create_file(&client->dev, &dev_attr_cpu0_vid);
 498 static ssize_t
 499 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 500 {
 501         struct w83781d_data *data = w83781d_update_device(dev);
 502         return sprintf(buf, "%ld\n", (long) data->vrm);
 503 }
 504
 505 static ssize_t
 506 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 507 {
 508         struct i2c_client *client = to_i2c_client(dev);
 509         struct w83781d_data *data = i2c_get_clientdata(client);
 510         u32 val;
 511
 512         val = simple_strtoul(buf, NULL, 10);
 513         data->vrm = val;
 514
 515         return count;
 516 }
 517
 518 static
 519 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 520 #define device_create_file_vrm(client) \
 521 device_create_file(&client->dev, &dev_attr_vrm);
 522 static ssize_t
 523 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 524 {
 525         struct w83781d_data *data = w83781d_update_device(dev);
 526         return sprintf(buf, "%ld\n", (long) ALARMS_FROM_REG(data->alarms));
 527 }
 528
 529 static
 530 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 531 #define device_create_file_alarms(client) \
 532 device_create_file(&client->dev, &dev_attr_alarms);
 533 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
 534 {
 535         struct w83781d_data *data = w83781d_update_device(dev);
 536         return sprintf(buf, "%ld\n",
 537                        (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
 538 }
 539 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
 540 {
 541         struct w83781d_data *data = w83781d_update_device(dev);
 542         return sprintf(buf, "%ld\n",
 543                        (long)BEEP_ENABLE_FROM_REG(data->beep_enable));
 544 }
 545
 546 #define BEEP_ENABLE                     0       /* Store beep_enable */
 547 #define BEEP_MASK                       1       /* Store beep_mask */
 548
 549 static ssize_t
 550 store_beep_reg(struct device *dev, const char *buf, size_t count,
 551                int update_mask)
 552 {
 553         struct i2c_client *client = to_i2c_client(dev);
 554         struct w83781d_data *data = i2c_get_clientdata(client);
 555         u32 val, val2;
 556
 557         val = simple_strtoul(buf, NULL, 10);
 558
 559         down(&data->update_lock);
 560
 561         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 562                 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
 563                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 564                                     data->beep_mask & 0xff);
 565
 566                 if ((data->type != w83781d) && (data->type != as99127f)) {
 567                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 568                                             ((data->beep_mask) >> 16) & 0xff);
 569                 }
 570
 571                 val2 = (data->beep_mask >> 8) & 0x7f;
 572         } else {                /* We are storing beep_enable */
 573                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 574                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 575         }
 576
 577         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 578                             val2 | data->beep_enable << 7);
 579
 580         up(&data->update_lock);
 581         return count;
 582 }
 583
 584 #define sysfs_beep(REG, reg) \
 585 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 586 { \
 587         return show_beep_##reg(dev, attr, buf); \
 588 } \
 589 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 590 { \
 591         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 592 } \
 593 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
 594
 595 sysfs_beep(ENABLE, enable);
 596 sysfs_beep(MASK, mask);
 597
 598 #define device_create_file_beep(client) \
 599 do { \
 600 device_create_file(&client->dev, &dev_attr_beep_enable); \
 601 device_create_file(&client->dev, &dev_attr_beep_mask); \
 602 } while (0)
 603
 604 static ssize_t
 605 show_fan_div_reg(struct device *dev, char *buf, int nr)
 606 {
 607         struct w83781d_data *data = w83781d_update_device(dev);
 608         return sprintf(buf, "%ld\n",
 609                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 610 }
 611
 612 /* Note: we save and restore the fan minimum here, because its value is
 613    determined in part by the fan divisor.  This follows the principle of
 614    least suprise; the user doesn't expect the fan minimum to change just
 615    because the divisor changed. */
 616 static ssize_t
 617 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 618 {
 619         struct i2c_client *client = to_i2c_client(dev);
 620         struct w83781d_data *data = i2c_get_clientdata(client);
 621         unsigned long min;
 622         u8 reg;
 623         unsigned long val = simple_strtoul(buf, NULL, 10);
 624
 625         down(&data->update_lock);
 626
 627         /* Save fan_min */
 628         min = FAN_FROM_REG(data->fan_min[nr],
 629                            DIV_FROM_REG(data->fan_div[nr]));
 630
 631         data->fan_div[nr] = DIV_TO_REG(val, data->type);
 632
 633         reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 634                & (nr==0 ? 0xcf : 0x3f))
 635             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 636         w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 637
 638         /* w83781d and as99127f don't have extended divisor bits */
 639         if (data->type != w83781d && data->type != as99127f) {
 640                 reg = (w83781d_read_value(client, W83781D_REG_VBAT)
 641                        & ~(1 << (5 + nr)))
 642                     | ((data->fan_div[nr] & 0x04) << (3 + nr));
 643                 w83781d_write_value(client, W83781D_REG_VBAT, reg);
 644         }
 645
 646         /* Restore fan_min */
 647         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 648         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 649
 650         up(&data->update_lock);
 651         return count;
 652 }
 653
 654 #define sysfs_fan_div(offset) \
 655 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 656 { \
 657         return show_fan_div_reg(dev, buf, offset); \
 658 } \
 659 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 660 { \
 661         return store_fan_div_reg(dev, buf, count, offset - 1); \
 662 } \
 663 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 664
 665 sysfs_fan_div(1);
 666 sysfs_fan_div(2);
 667 sysfs_fan_div(3);
 668
 669 #define device_create_file_fan_div(client, offset) \
 670 do { \
 671 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 672 } while (0)
 673
 674 static ssize_t
 675 show_pwm_reg(struct device *dev, char *buf, int nr)
 676 {
 677         struct w83781d_data *data = w83781d_update_device(dev);
 678         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 679 }
 680
 681 static ssize_t
 682 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 683 {
 684         struct w83781d_data *data = w83781d_update_device(dev);
 685         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 686 }
 687
 688 static ssize_t
 689 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 690 {
 691         struct i2c_client *client = to_i2c_client(dev);
 692         struct w83781d_data *data = i2c_get_clientdata(client);
 693         u32 val;
 694
 695         val = simple_strtoul(buf, NULL, 10);
 696
 697         down(&data->update_lock);
 698         data->pwm[nr - 1] = PWM_TO_REG(val);
 699         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 700         up(&data->update_lock);
 701         return count;
 702 }
 703
 704 static ssize_t
 705 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 706 {
 707         struct i2c_client *client = to_i2c_client(dev);
 708         struct w83781d_data *data = i2c_get_clientdata(client);
 709         u32 val, reg;
 710
 711         val = simple_strtoul(buf, NULL, 10);
 712
 713         down(&data->update_lock);
 714
 715         switch (val) {
 716         case 0:
 717         case 1:
 718                 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 719                 w83781d_write_value(client, W83781D_REG_PWMCLK12,
 720                                     (reg & 0xf7) | (val << 3));
 721
 722                 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 723                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG,
 724                                     (reg & 0xef) | (!val << 4));
 725
 726                 data->pwmenable[nr - 1] = val;
 727                 break;
 728
 729         default:
 730                 up(&data->update_lock);
 731                 return -EINVAL;
 732         }
 733
 734         up(&data->update_lock);
 735         return count;
 736 }
 737
 738 #define sysfs_pwm(offset) \
 739 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 740 { \
 741         return show_pwm_reg(dev, buf, offset); \
 742 } \
 743 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
 744                 const char *buf, size_t count) \
 745 { \
 746         return store_pwm_reg(dev, buf, count, offset); \
 747 } \
 748 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 749                 show_regs_pwm_##offset, store_regs_pwm_##offset);
 750
 751 #define sysfs_pwmenable(offset) \
 752 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 753 { \
 754         return show_pwmenable_reg(dev, buf, offset); \
 755 } \
 756 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
 757                 const char *buf, size_t count) \
 758 { \
 759         return store_pwmenable_reg(dev, buf, count, offset); \
 760 } \
 761 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
 762                 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
 763
 764 sysfs_pwm(1);
 765 sysfs_pwm(2);
 766 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 767 sysfs_pwm(3);
 768 sysfs_pwm(4);
 769
 770 #define device_create_file_pwm(client, offset) \
 771 do { \
 772 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 773 } while (0)
 774
 775 #define device_create_file_pwmenable(client, offset) \
 776 do { \
 777 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \
 778 } while (0)
 779
 780 static ssize_t
 781 show_sensor_reg(struct device *dev, char *buf, int nr)
 782 {
 783         struct w83781d_data *data = w83781d_update_device(dev);
 784         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 785 }
 786
 787 static ssize_t
 788 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 789 {
 790         struct i2c_client *client = to_i2c_client(dev);
 791         struct w83781d_data *data = i2c_get_clientdata(client);
 792         u32 val, tmp;
 793
 794         val = simple_strtoul(buf, NULL, 10);
 795
 796         down(&data->update_lock);
 797
 798         switch (val) {
 799         case 1:         /* PII/Celeron diode */
 800                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 801                 w83781d_write_value(client, W83781D_REG_SCFG1,
 802                                     tmp | BIT_SCFG1[nr - 1]);
 803                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 804                 w83781d_write_value(client, W83781D_REG_SCFG2,
 805                                     tmp | BIT_SCFG2[nr - 1]);
 806                 data->sens[nr - 1] = val;
 807                 break;
 808         case 2:         /* 3904 */
 809                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 810                 w83781d_write_value(client, W83781D_REG_SCFG1,
 811                                     tmp | BIT_SCFG1[nr - 1]);
 812                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 813                 w83781d_write_value(client, W83781D_REG_SCFG2,
 814                                     tmp & ~BIT_SCFG2[nr - 1]);
 815                 data->sens[nr - 1] = val;
 816                 break;
 817         case W83781D_DEFAULT_BETA:      /* thermistor */
 818                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 819                 w83781d_write_value(client, W83781D_REG_SCFG1,
 820                                     tmp & ~BIT_SCFG1[nr - 1]);
 821                 data->sens[nr - 1] = val;
 822                 break;
 823         default:
 824                 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
 825                        (long) val, W83781D_DEFAULT_BETA);
 826                 break;
 827         }
 828
 829         up(&data->update_lock);
 830         return count;
 831 }
 832
 833 #define sysfs_sensor(offset) \
 834 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 835 { \
 836     return show_sensor_reg(dev, buf, offset); \
 837 } \
 838 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 839 { \
 840     return store_sensor_reg(dev, buf, count, offset); \
 841 } \
 842 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
 843
 844 sysfs_sensor(1);
 845 sysfs_sensor(2);
 846 sysfs_sensor(3);
 847
 848 #define device_create_file_sensor(client, offset) \
 849 do { \
 850 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 851 } while (0)
 852
 853 /* This function is called when:
 854      * w83781d_driver is inserted (when this module is loaded), for each
 855        available adapter
 856      * when a new adapter is inserted (and w83781d_driver is still present) */
 857 static int
 858 w83781d_attach_adapter(struct i2c_adapter *adapter)
 859 {
 860         if (!(adapter->class & I2C_CLASS_HWMON))
 861                 return 0;
 862         return i2c_detect(adapter, &addr_data, w83781d_detect);
 863 }
 864
 865 /* Assumes that adapter is of I2C, not ISA variety.
 866  * OTHERWISE DON'T CALL THIS
 867  */
 868 static int
 869 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
 870                 struct i2c_client *new_client)
 871 {
 872         int i, val1 = 0, id;
 873         int err;
 874         const char *client_name = "";
 875         struct w83781d_data *data = i2c_get_clientdata(new_client);
 876
 877         data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 878         if (!(data->lm75[0])) {
 879                 err = -ENOMEM;
 880                 goto ERROR_SC_0;
 881         }
 882         memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
 883
 884         id = i2c_adapter_id(adapter);
 885
 886         if (force_subclients[0] == id && force_subclients[1] == address) {
 887                 for (i = 2; i <= 3; i++) {
 888                         if (force_subclients[i] < 0x48 ||
 889                             force_subclients[i] > 0x4f) {
 890                                 dev_err(&new_client->dev, "Invalid subclient "
 891                                         "address %d; must be 0x48-0x4f\n",
 892                                         force_subclients[i]);
 893                                 err = -EINVAL;
 894                                 goto ERROR_SC_1;
 895                         }
 896                 }
 897                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
 898                                 (force_subclients[2] & 0x07) |
 899                                 ((force_subclients[3] & 0x07) << 4));
 900                 data->lm75[0]->addr = force_subclients[2];
 901         } else {
 902                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
 903                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
 904         }
 905
 906         if (kind != w83783s) {
 907
 908                 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
 909                 if (!(data->lm75[1])) {
 910                         err = -ENOMEM;
 911                         goto ERROR_SC_1;
 912                 }
 913                 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
 914
 915                 if (force_subclients[0] == id &&
 916                     force_subclients[1] == address) {
 917                         data->lm75[1]->addr = force_subclients[3];
 918                 } else {
 919                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
 920                 }
 921                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
 922                         dev_err(&new_client->dev,
 923                                "Duplicate addresses 0x%x for subclients.\n",
 924                                data->lm75[0]->addr);
 925                         err = -EBUSY;
 926                         goto ERROR_SC_2;
 927                 }
 928         }
 929
 930         if (kind == w83781d)
 931                 client_name = "w83781d subclient";
 932         else if (kind == w83782d)
 933                 client_name = "w83782d subclient";
 934         else if (kind == w83783s)
 935                 client_name = "w83783s subclient";
 936         else if (kind == w83627hf)
 937                 client_name = "w83627hf subclient";
 938         else if (kind == as99127f)
 939                 client_name = "as99127f subclient";
 940
 941         for (i = 0; i <= 1; i++) {
 942                 /* store all data in w83781d */
 943                 i2c_set_clientdata(data->lm75[i], NULL);
 944                 data->lm75[i]->adapter = adapter;
 945                 data->lm75[i]->driver = &w83781d_driver;
 946                 data->lm75[i]->flags = 0;
 947                 strlcpy(data->lm75[i]->name, client_name,
 948                         I2C_NAME_SIZE);
 949                 if ((err = i2c_attach_client(data->lm75[i]))) {
 950                         dev_err(&new_client->dev, "Subclient %d "
 951                                 "registration at address 0x%x "
 952                                 "failed.\n", i, data->lm75[i]->addr);
 953                         if (i == 1)
 954                                 goto ERROR_SC_3;
 955                         goto ERROR_SC_2;
 956                 }
 957                 if (kind == w83783s)
 958                         break;
 959         }
 960
 961         return 0;
 962
 963 /* Undo inits in case of errors */
 964 ERROR_SC_3:
 965         i2c_detach_client(data->lm75[0]);
 966 ERROR_SC_2:
 967         if (NULL != data->lm75[1])
 968                 kfree(data->lm75[1]);
 969 ERROR_SC_1:
 970         if (NULL != data->lm75[0])
 971                 kfree(data->lm75[0]);
 972 ERROR_SC_0:
 973         return err;
 974 }
 975
 976 static int
 977 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
 978 {
 979         int i = 0, val1 = 0, val2;
 980         struct i2c_client *new_client;
 981         struct w83781d_data *data;
 982         int err;
 983         const char *client_name = "";
 984         int is_isa = i2c_is_isa_adapter(adapter);
 985         enum vendor { winbond, asus } vendid;
 986
 987         if (!is_isa
 988             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
 989                 err = -EINVAL;
 990                 goto ERROR0;
 991         }
 992
 993         /* Prevent users from forcing a kind for a bus it isn't supposed
 994            to possibly be on */
 995         if (is_isa && (kind == as99127f || kind == w83783s)) {
 996                 dev_err(&adapter->dev,
 997                         "Cannot force I2C-only chip for ISA address 0x%02x.\n",
 998                         address);
 999                 err = -EINVAL;
1000                 goto ERROR0;
1001         }
1002         if (!is_isa && kind == w83697hf) {
1003                 dev_err(&adapter->dev,
1004                         "Cannot force ISA-only chip for I2C address 0x%02x.\n",
1005                         address);
1006                 err = -EINVAL;
1007                 goto ERROR0;
1008         }
1009
1010         if (is_isa)
1011                 if (!request_region(address, W83781D_EXTENT,
1012                                     w83781d_driver.name)) {
1013                         dev_dbg(&adapter->dev, "Request of region "
1014                                 "0x%x-0x%x for w83781d failed\n", address,
1015                                 address + W83781D_EXTENT - 1);
1016                         err = -EBUSY;
1017                         goto ERROR0;
1018                 }
1019
1020         /* Probe whether there is anything available on this address. Already
1021            done for SMBus clients */
1022         if (kind < 0) {
1023                 if (is_isa) {
1024
1025 #define REALLY_SLOW_IO
1026                         /* We need the timeouts for at least some LM78-like
1027                            chips. But only if we read 'undefined' registers. */
1028                         i = inb_p(address + 1);
1029                         if (inb_p(address + 2) != i
1030                          || inb_p(address + 3) != i
1031                          || inb_p(address + 7) != i) {
1032                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1033                                         "chip failed at step 1\n");
1034                                 err = -ENODEV;
1035                                 goto ERROR1;
1036                         }
1037 #undef REALLY_SLOW_IO
1038
1039                         /* Let's just hope nothing breaks here */
1040                         i = inb_p(address + 5) & 0x7f;
1041                         outb_p(~i & 0x7f, address + 5);
1042                         val2 = inb_p(address + 5) & 0x7f;
1043                         if (val2 != (~i & 0x7f)) {
1044                                 outb_p(i, address + 5);
1045                                 dev_dbg(&adapter->dev, "Detection of w83781d "
1046                                         "chip failed at step 2 (0x%x != "
1047                                         "0x%x at 0x%x)\n", val2, ~i & 0x7f,
1048                                         address + 5);
1049                                 err = -ENODEV;
1050                                 goto ERROR1;
1051                         }
1052                 }
1053         }
1054
1055         /* OK. For now, we presume we have a valid client. We now create the
1056            client structure, even though we cannot fill it completely yet.
1057            But it allows us to access w83781d_{read,write}_value. */
1058
1059         if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1060                 err = -ENOMEM;
1061                 goto ERROR1;
1062         }
1063         memset(data, 0, sizeof(struct w83781d_data));
1064
1065         new_client = &data->client;
1066         i2c_set_clientdata(new_client, data);
1067         new_client->addr = address;
1068         init_MUTEX(&data->lock);
1069         new_client->adapter = adapter;
1070         new_client->driver = &w83781d_driver;
1071         new_client->flags = 0;
1072
1073         /* Now, we do the remaining detection. */
1074
1075         /* The w8378?d may be stuck in some other bank than bank 0. This may
1076            make reading other information impossible. Specify a force=... or
1077            force_*=... parameter, and the Winbond will be reset to the right
1078            bank. */
1079         if (kind < 0) {
1080                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) {
1081                         dev_dbg(&new_client->dev, "Detection failed at step "
1082                                 "3\n");
1083                         err = -ENODEV;
1084                         goto ERROR2;
1085                 }
1086                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1087                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1088                 /* Check for Winbond or Asus ID if in bank 0 */
1089                 if ((!(val1 & 0x07)) &&
1090                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1091                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1092                         dev_dbg(&new_client->dev, "Detection failed at step "
1093                                 "4\n");
1094                         err = -ENODEV;
1095                         goto ERROR2;
1096                 }
1097                 /* If Winbond SMBus, check address at 0x48.
1098                    Asus doesn't support, except for as99127f rev.2 */
1099                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1100                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1101                         if (w83781d_read_value
1102                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1103                                 dev_dbg(&new_client->dev, "Detection failed "
1104                                         "at step 5\n");
1105                                 err = -ENODEV;
1106                                 goto ERROR2;
1107                         }
1108                 }
1109         }
1110
1111         /* We have either had a force parameter, or we have already detected the
1112            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1113         w83781d_write_value(new_client, W83781D_REG_BANK,
1114                             (w83781d_read_value(new_client,
1115                                                 W83781D_REG_BANK) & 0x78) |
1116                             0x80);
1117
1118         /* Determine the chip type. */
1119         if (kind <= 0) {
1120                 /* get vendor ID */
1121                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1122                 if (val2 == 0x5c)
1123                         vendid = winbond;
1124                 else if (val2 == 0x12)
1125                         vendid = asus;
1126                 else {
1127                         dev_dbg(&new_client->dev, "Chip was made by neither "
1128                                 "Winbond nor Asus?\n");
1129                         err = -ENODEV;
1130                         goto ERROR2;
1131                 }
1132
1133                 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID);
1134                 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1135                         kind = w83781d;
1136                 else if (val1 == 0x30 && vendid == winbond)
1137                         kind = w83782d;
1138                 else if (val1 == 0x40 && vendid == winbond && !is_isa
1139                                 && address == 0x2d)
1140                         kind = w83783s;
1141                 else if ((val1 == 0x21 || val1 == 0x90) && vendid == winbond)
1142                         kind = w83627hf;
1143                 else if (val1 == 0x31 && !is_isa && address >= 0x28)
1144                         kind = as99127f;
1145                 else if (val1 == 0x60 && vendid == winbond && is_isa)
1146                         kind = w83697hf;
1147                 else {
1148                         if (kind == 0)
1149                                 dev_warn(&new_client->dev, "Ignoring 'force' "
1150                                          "parameter for unknown chip at "
1151                                          "adapter %d, address 0x%02x\n",
1152                                          i2c_adapter_id(adapter), address);
1153                         err = -EINVAL;
1154                         goto ERROR2;
1155                 }
1156         }
1157
1158         if (kind == w83781d) {
1159                 client_name = "w83781d";
1160         } else if (kind == w83782d) {
1161                 client_name = "w83782d";
1162         } else if (kind == w83783s) {
1163                 client_name = "w83783s";
1164         } else if (kind == w83627hf) {
1165                 if (val1 == 0x90)
1166                         client_name = "w83627thf";
1167                 else
1168                         client_name = "w83627hf";
1169         } else if (kind == as99127f) {
1170                 client_name = "as99127f";
1171         } else if (kind == w83697hf) {
1172                 client_name = "w83697hf";
1173         }
1174
1175         /* Fill in the remaining client fields and put into the global list */
1176         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1177         data->type = kind;
1178
1179         data->valid = 0;
1180         init_MUTEX(&data->update_lock);
1181
1182         /* Tell the I2C layer a new client has arrived */
1183         if ((err = i2c_attach_client(new_client)))
1184                 goto ERROR2;
1185
1186         /* attach secondary i2c lm75-like clients */
1187         if (!is_isa) {
1188                 if ((err = w83781d_detect_subclients(adapter, address,
1189                                 kind, new_client)))
1190                         goto ERROR3;
1191         } else {
1192                 data->lm75[0] = NULL;
1193                 data->lm75[1] = NULL;
1194         }
1195
1196         /* Initialize the chip */
1197         w83781d_init_client(new_client);
1198
1199         /* A few vars need to be filled upon startup */
1200         for (i = 1; i <= 3; i++) {
1201                 data->fan_min[i - 1] = w83781d_read_value(new_client,
1202                                         W83781D_REG_FAN_MIN(i));
1203         }
1204         if (kind != w83781d && kind != as99127f)
1205                 for (i = 0; i < 4; i++)
1206                         data->pwmenable[i] = 1;
1207
1208         /* Register sysfs hooks */
1209         device_create_file_in(new_client, 0);
1210         if (kind != w83783s && kind != w83697hf)
1211                 device_create_file_in(new_client, 1);
1212         device_create_file_in(new_client, 2);
1213         device_create_file_in(new_client, 3);
1214         device_create_file_in(new_client, 4);
1215         device_create_file_in(new_client, 5);
1216         device_create_file_in(new_client, 6);
1217         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1218                 device_create_file_in(new_client, 7);
1219                 device_create_file_in(new_client, 8);
1220         }
1221
1222         device_create_file_fan(new_client, 1);
1223         device_create_file_fan(new_client, 2);
1224         if (kind != w83697hf)
1225                 device_create_file_fan(new_client, 3);
1226
1227         device_create_file_temp(new_client, 1);
1228         device_create_file_temp(new_client, 2);
1229         if (kind != w83783s && kind != w83697hf)
1230                 device_create_file_temp(new_client, 3);
1231
1232         if (kind != w83697hf)
1233                 device_create_file_vid(new_client);
1234
1235         if (kind != w83697hf)
1236                 device_create_file_vrm(new_client);
1237
1238         device_create_file_fan_div(new_client, 1);
1239         device_create_file_fan_div(new_client, 2);
1240         if (kind != w83697hf)
1241                 device_create_file_fan_div(new_client, 3);
1242
1243         device_create_file_alarms(new_client);
1244
1245         device_create_file_beep(new_client);
1246
1247         if (kind != w83781d && kind != as99127f) {
1248                 device_create_file_pwm(new_client, 1);
1249                 device_create_file_pwm(new_client, 2);
1250                 device_create_file_pwmenable(new_client, 2);
1251         }
1252         if (kind == w83782d && !is_isa) {
1253                 device_create_file_pwm(new_client, 3);
1254                 device_create_file_pwm(new_client, 4);
1255         }
1256
1257         if (kind != as99127f && kind != w83781d) {
1258                 device_create_file_sensor(new_client, 1);
1259                 device_create_file_sensor(new_client, 2);
1260                 if (kind != w83783s && kind != w83697hf)
1261                         device_create_file_sensor(new_client, 3);
1262         }
1263
1264         return 0;
1265
1266 ERROR3:
1267         i2c_detach_client(new_client);
1268 ERROR2:
1269         kfree(data);
1270 ERROR1:
1271         if (is_isa)
1272                 release_region(address, W83781D_EXTENT);
1273 ERROR0:
1274         return err;
1275 }
1276
1277 static int
1278 w83781d_detach_client(struct i2c_client *client)
1279 {
1280         int err;
1281
1282         if (i2c_is_isa_client(client))
1283                 release_region(client->addr, W83781D_EXTENT);
1284
1285         if ((err = i2c_detach_client(client))) {
1286                 dev_err(&client->dev,
1287                        "Client deregistration failed, client not detached.\n");
1288                 return err;
1289         }
1290
1291         if (i2c_get_clientdata(client)==NULL) {
1292                 /* subclients */
1293                 kfree(client);
1294         } else {
1295                 /* main client */
1296                 kfree(i2c_get_clientdata(client));
1297         }
1298
1299         return 0;
1300 }
1301
1302 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1303    bank switches. ISA access must always be locked explicitly!
1304    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1305    would slow down the W83781D access and should not be necessary.
1306    There are some ugly typecasts here, but the good news is - they should
1307    nowhere else be necessary! */
1308 static int
1309 w83781d_read_value(struct i2c_client *client, u16 reg)
1310 {
1311         struct w83781d_data *data = i2c_get_clientdata(client);
1312         int res, word_sized, bank;
1313         struct i2c_client *cl;
1314
1315         down(&data->lock);
1316         if (i2c_is_isa_client(client)) {
1317                 word_sized = (((reg & 0xff00) == 0x100)
1318                               || ((reg & 0xff00) == 0x200))
1319                     && (((reg & 0x00ff) == 0x50)
1320                         || ((reg & 0x00ff) == 0x53)
1321                         || ((reg & 0x00ff) == 0x55));
1322                 if (reg & 0xff00) {
1323                         outb_p(W83781D_REG_BANK,
1324                                client->addr + W83781D_ADDR_REG_OFFSET);
1325                         outb_p(reg >> 8,
1326                                client->addr + W83781D_DATA_REG_OFFSET);
1327                 }
1328                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1329                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1330                 if (word_sized) {
1331                         outb_p((reg & 0xff) + 1,
1332                                client->addr + W83781D_ADDR_REG_OFFSET);
1333                         res =
1334                             (res << 8) + inb_p(client->addr +
1335                                                W83781D_DATA_REG_OFFSET);
1336                 }
1337                 if (reg & 0xff00) {
1338                         outb_p(W83781D_REG_BANK,
1339                                client->addr + W83781D_ADDR_REG_OFFSET);
1340                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1341                 }
1342         } else {
1343                 bank = (reg >> 8) & 0x0f;
1344                 if (bank > 2)
1345                         /* switch banks */
1346                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1347                                                   bank);
1348                 if (bank == 0 || bank > 2) {
1349                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1350                 } else {
1351                         /* switch to subclient */
1352                         cl = data->lm75[bank - 1];
1353                         /* convert from ISA to LM75 I2C addresses */
1354                         switch (reg & 0xff) {
1355                         case 0x50:      /* TEMP */
1356                                 res = swab16(i2c_smbus_read_word_data(cl, 0));
1357                                 break;
1358                         case 0x52:      /* CONFIG */
1359                                 res = i2c_smbus_read_byte_data(cl, 1);
1360                                 break;
1361                         case 0x53:      /* HYST */
1362                                 res = swab16(i2c_smbus_read_word_data(cl, 2));
1363                                 break;
1364                         case 0x55:      /* OVER */
1365                         default:
1366                                 res = swab16(i2c_smbus_read_word_data(cl, 3));
1367                                 break;
1368                         }
1369                 }
1370                 if (bank > 2)
1371                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1372         }
1373         up(&data->lock);
1374         return res;
1375 }
1376
1377 static int
1378 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1379 {
1380         struct w83781d_data *data = i2c_get_clientdata(client);
1381         int word_sized, bank;
1382         struct i2c_client *cl;
1383
1384         down(&data->lock);
1385         if (i2c_is_isa_client(client)) {
1386                 word_sized = (((reg & 0xff00) == 0x100)
1387                               || ((reg & 0xff00) == 0x200))
1388                     && (((reg & 0x00ff) == 0x53)
1389                         || ((reg & 0x00ff) == 0x55));
1390                 if (reg & 0xff00) {
1391                         outb_p(W83781D_REG_BANK,
1392                                client->addr + W83781D_ADDR_REG_OFFSET);
1393                         outb_p(reg >> 8,
1394                                client->addr + W83781D_DATA_REG_OFFSET);
1395                 }
1396                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1397                 if (word_sized) {
1398                         outb_p(value >> 8,
1399                                client->addr + W83781D_DATA_REG_OFFSET);
1400                         outb_p((reg & 0xff) + 1,
1401                                client->addr + W83781D_ADDR_REG_OFFSET);
1402                 }
1403                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1404                 if (reg & 0xff00) {
1405                         outb_p(W83781D_REG_BANK,
1406                                client->addr + W83781D_ADDR_REG_OFFSET);
1407                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1408                 }
1409         } else {
1410                 bank = (reg >> 8) & 0x0f;
1411                 if (bank > 2)
1412                         /* switch banks */
1413                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1414                                                   bank);
1415                 if (bank == 0 || bank > 2) {
1416                         i2c_smbus_write_byte_data(client, reg & 0xff,
1417                                                   value & 0xff);
1418                 } else {
1419                         /* switch to subclient */
1420                         cl = data->lm75[bank - 1];
1421                         /* convert from ISA to LM75 I2C addresses */
1422                         switch (reg & 0xff) {
1423                         case 0x52:      /* CONFIG */
1424                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1425                                 break;
1426                         case 0x53:      /* HYST */
1427                                 i2c_smbus_write_word_data(cl, 2, swab16(value));
1428                                 break;
1429                         case 0x55:      /* OVER */
1430                                 i2c_smbus_write_word_data(cl, 3, swab16(value));
1431                                 break;
1432                         }
1433                 }
1434                 if (bank > 2)
1435                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1436         }
1437         up(&data->lock);
1438         return 0;
1439 }
1440
1441 /* Called when we have found a new W83781D. It should set limits, etc. */
1442 static void
1443 w83781d_init_client(struct i2c_client *client)
1444 {
1445         struct w83781d_data *data = i2c_get_clientdata(client);
1446         int i, p;
1447         int type = data->type;
1448         u8 tmp;
1449
1450         if (init && type != as99127f) { /* this resets registers we don't have
1451                                            documentation for on the as99127f */
1452                 /* save these registers */
1453                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1454                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1455                 /* Reset all except Watchdog values and last conversion values
1456                    This sets fan-divs to 2, among others */
1457                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1458                 /* Restore the registers and disable power-on abnormal beep.
1459                    This saves FAN 1/2/3 input/output values set by BIOS. */
1460                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1461                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1462                 /* Disable master beep-enable (reset turns it on).
1463                    Individual beep_mask should be reset to off but for some reason
1464                    disabling this bit helps some people not get beeped */
1465                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1466         }
1467
1468         data->vrm = i2c_which_vrm();
1469
1470         if ((type != w83781d) && (type != as99127f)) {
1471                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1472                 for (i = 1; i <= 3; i++) {
1473                         if (!(tmp & BIT_SCFG1[i - 1])) {
1474                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1475                         } else {
1476                                 if (w83781d_read_value
1477                                     (client,
1478                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1479                                         data->sens[i - 1] = 1;
1480                                 else
1481                                         data->sens[i - 1] = 2;
1482                         }
1483                         if ((type == w83783s || type == w83697hf) && (i == 2))
1484                                 break;
1485                 }
1486         }
1487
1488         if (init && type != as99127f) {
1489                 /* Enable temp2 */
1490                 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG);
1491                 if (tmp & 0x01) {
1492                         dev_warn(&client->dev, "Enabling temp2, readings "
1493                                  "might not make sense\n");
1494                         w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG,
1495                                 tmp & 0xfe);
1496                 }
1497
1498                 /* Enable temp3 */
1499                 if (type != w83783s && type != w83697hf) {
1500                         tmp = w83781d_read_value(client,
1501                                 W83781D_REG_TEMP3_CONFIG);
1502                         if (tmp & 0x01) {
1503                                 dev_warn(&client->dev, "Enabling temp3, "
1504                                          "readings might not make sense\n");
1505                                 w83781d_write_value(client,
1506                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1507                         }
1508                 }
1509
1510                 if (type != w83781d) {
1511                         /* enable comparator mode for temp2 and temp3 so
1512                            alarm indication will work correctly */
1513                         i = w83781d_read_value(client, W83781D_REG_IRQ);
1514                         if (!(i & 0x40))
1515                                 w83781d_write_value(client, W83781D_REG_IRQ,
1516                                                     i | 0x40);
1517                 }
1518         }
1519
1520         /* Start monitoring */
1521         w83781d_write_value(client, W83781D_REG_CONFIG,
1522                             (w83781d_read_value(client,
1523                                                 W83781D_REG_CONFIG) & 0xf7)
1524                             | 0x01);
1525 }
1526
1527 static struct w83781d_data *w83781d_update_device(struct device *dev)
1528 {
1529         struct i2c_client *client = to_i2c_client(dev);
1530         struct w83781d_data *data = i2c_get_clientdata(client);
1531         int i;
1532
1533         down(&data->update_lock);
1534
1535         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1536             || !data->valid) {
1537                 dev_dbg(dev, "Starting device update\n");
1538
1539                 for (i = 0; i <= 8; i++) {
1540                         if ((data->type == w83783s || data->type == w83697hf)
1541                             && (i == 1))
1542                                 continue;       /* 783S has no in1 */
1543                         data->in[i] =
1544                             w83781d_read_value(client, W83781D_REG_IN(i));
1545                         data->in_min[i] =
1546                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1547                         data->in_max[i] =
1548                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1549                         if ((data->type != w83782d) && (data->type != w83697hf)
1550                             && (data->type != w83627hf) && (i == 6))
1551                                 break;
1552                 }
1553                 for (i = 1; i <= 3; i++) {
1554                         data->fan[i - 1] =
1555                             w83781d_read_value(client, W83781D_REG_FAN(i));
1556                         data->fan_min[i - 1] =
1557                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1558                 }
1559                 if (data->type != w83781d && data->type != as99127f) {
1560                         for (i = 1; i <= 4; i++) {
1561                                 data->pwm[i - 1] =
1562                                     w83781d_read_value(client,
1563                                                        W83781D_REG_PWM(i));
1564                                 if ((data->type != w83782d
1565                                      || i2c_is_isa_client(client))
1566                                     && i == 2)
1567                                         break;
1568                         }
1569                         /* Only PWM2 can be disabled */
1570                         data->pwmenable[1] = (w83781d_read_value(client,
1571                                               W83781D_REG_PWMCLK12) & 0x08) >> 3;
1572                 }
1573
1574                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1575                 data->temp_max =
1576                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1577                 data->temp_max_hyst =
1578                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1579                 data->temp_add[0] =
1580                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1581                 data->temp_max_add[0] =
1582                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1583                 data->temp_max_hyst_add[0] =
1584                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1585                 if (data->type != w83783s && data->type != w83697hf) {
1586                         data->temp_add[1] =
1587                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1588                         data->temp_max_add[1] =
1589                             w83781d_read_value(client,
1590                                                W83781D_REG_TEMP_OVER(3));
1591                         data->temp_max_hyst_add[1] =
1592                             w83781d_read_value(client,
1593                                                W83781D_REG_TEMP_HYST(3));
1594                 }
1595                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1596                 if (data->type != w83697hf) {
1597                         data->vid = i & 0x0f;
1598                         data->vid |=
1599                             (w83781d_read_value(client, W83781D_REG_CHIPID) &
1600                              0x01)
1601                             << 4;
1602                 }
1603                 data->fan_div[0] = (i >> 4) & 0x03;
1604                 data->fan_div[1] = (i >> 6) & 0x03;
1605                 if (data->type != w83697hf) {
1606                         data->fan_div[2] = (w83781d_read_value(client,
1607                                                                W83781D_REG_PIN)
1608                                             >> 6) & 0x03;
1609                 }
1610                 if ((data->type != w83781d) && (data->type != as99127f)) {
1611                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1612                         data->fan_div[0] |= (i >> 3) & 0x04;
1613                         data->fan_div[1] |= (i >> 4) & 0x04;
1614                         if (data->type != w83697hf)
1615                                 data->fan_div[2] |= (i >> 5) & 0x04;
1616                 }
1617                 data->alarms =
1618                     w83781d_read_value(client,
1619                                        W83781D_REG_ALARM1) +
1620                     (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1621                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1622                         data->alarms |=
1623                             w83781d_read_value(client,
1624                                                W83781D_REG_ALARM3) << 16;
1625                 }
1626                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1627                 data->beep_enable = i >> 7;
1628                 data->beep_mask = ((i & 0x7f) << 8) +
1629                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1630                 if ((data->type != w83781d) && (data->type != as99127f)) {
1631                         data->beep_mask |=
1632                             w83781d_read_value(client,
1633                                                W83781D_REG_BEEP_INTS3) << 16;
1634                 }
1635                 data->last_updated = jiffies;
1636                 data->valid = 1;
1637         }
1638
1639         up(&data->update_lock);
1640
1641         return data;
1642 }
1643
1644 static int __init
1645 sensors_w83781d_init(void)
1646 {
1647         return i2c_add_driver(&w83781d_driver);
1648 }
1649
1650 static void __exit
1651 sensors_w83781d_exit(void)
1652 {
1653         i2c_del_driver(&w83781d_driver);
1654 }
1655
1656 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1657               "Philip Edelbrock <phil@netroedge.com>, "
1658               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1659 MODULE_DESCRIPTION("W83781D driver");
1660 MODULE_LICENSE("GPL");
1661
1662 module_init(sensors_w83781d_init);
1663 module_exit(sensors_w83781d_exit);