drivers/i2c/busses/i2c-s3c2410.c

   1 /* linux/drivers/i2c/busses/i2c-s3c2410.c
   2  *
   3  * Copyright (C) 2004,2005,2009 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 I2C Controller
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21 */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25
  26 #include <linux/i2c.h>
  27 #include <linux/init.h>
  28 #include <linux/time.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/delay.h>
  31 #include <linux/errno.h>
  32 #include <linux/err.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/clk.h>
  35 #include <linux/cpufreq.h>
  36 #include <linux/slab.h>
  37 #include <linux/io.h>
  38 #include <linux/of_i2c.h>
  39 #include <linux/of_gpio.h>
  40
  41 #include <asm/irq.h>
  42
  43 #include <plat/regs-iic.h>
  44 #include <plat/iic.h>
  45
  46 /* i2c controller state */
  47
  48 enum s3c24xx_i2c_state {
  49         STATE_IDLE,
  50         STATE_START,
  51         STATE_READ,
  52         STATE_WRITE,
  53         STATE_STOP
  54 };
  55
  56 enum s3c24xx_i2c_type {
  57         TYPE_S3C2410,
  58         TYPE_S3C2440,
  59 };
  60
  61 struct s3c24xx_i2c {
  62         spinlock_t              lock;
  63         wait_queue_head_t       wait;
  64         unsigned int            suspended:1;
  65
  66         struct i2c_msg          *msg;
  67         unsigned int            msg_num;
  68         unsigned int            msg_idx;
  69         unsigned int            msg_ptr;
  70
  71         unsigned int            tx_setup;
  72         unsigned int            irq;
  73
  74         enum s3c24xx_i2c_state  state;
  75         unsigned long           clkrate;
  76
  77         void __iomem            *regs;
  78         struct clk              *clk;
  79         struct device           *dev;
  80         struct resource         *ioarea;
  81         struct i2c_adapter      adap;
  82
  83         struct s3c2410_platform_i2c     *pdata;
  84         int                     gpios[2];
  85 #ifdef CONFIG_CPU_FREQ
  86         struct notifier_block   freq_transition;
  87 #endif
  88 };
  89
  90 /* default platform data removed, dev should always carry data. */
  91
  92 /* s3c24xx_i2c_is2440()
  93  *
  94  * return true is this is an s3c2440
  95 */
  96
  97 static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
  98 {
  99         struct platform_device *pdev = to_platform_device(i2c->dev);
 100         enum s3c24xx_i2c_type type;
 101
 102 #ifdef CONFIG_OF
 103         if (i2c->dev->of_node)
 104                 return of_device_is_compatible(i2c->dev->of_node,
 105                                 "samsung,s3c2440-i2c");
 106 #endif
 107
 108         type = platform_get_device_id(pdev)->driver_data;
 109         return type == TYPE_S3C2440;
 110 }
 111
 112 /* s3c24xx_i2c_master_complete
 113  *
 114  * complete the message and wake up the caller, using the given return code,
 115  * or zero to mean ok.
 116 */
 117
 118 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
 119 {
 120         dev_dbg(i2c->dev, "master_complete %d\n", ret);
 121
 122         i2c->msg_ptr = 0;
 123         i2c->msg = NULL;
 124         i2c->msg_idx++;
 125         i2c->msg_num = 0;
 126         if (ret)
 127                 i2c->msg_idx = ret;
 128
 129         wake_up(&i2c->wait);
 130 }
 131
 132 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)
 133 {
 134         unsigned long tmp;
 135
 136         tmp = readl(i2c->regs + S3C2410_IICCON);
 137         writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
 138 }
 139
 140 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)
 141 {
 142         unsigned long tmp;
 143
 144         tmp = readl(i2c->regs + S3C2410_IICCON);
 145         writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
 146 }
 147
 148 /* irq enable/disable functions */
 149
 150 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)
 151 {
 152         unsigned long tmp;
 153
 154         tmp = readl(i2c->regs + S3C2410_IICCON);
 155         writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
 156 }
 157
 158 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)
 159 {
 160         unsigned long tmp;
 161
 162         tmp = readl(i2c->regs + S3C2410_IICCON);
 163         writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
 164 }
 165
 166
 167 /* s3c24xx_i2c_message_start
 168  *
 169  * put the start of a message onto the bus
 170 */
 171
 172 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,
 173                                       struct i2c_msg *msg)
 174 {
 175         unsigned int addr = (msg->addr & 0x7f) << 1;
 176         unsigned long stat;
 177         unsigned long iiccon;
 178
 179         stat = 0;
 180         stat |=  S3C2410_IICSTAT_TXRXEN;
 181
 182         if (msg->flags & I2C_M_RD) {
 183                 stat |= S3C2410_IICSTAT_MASTER_RX;
 184                 addr |= 1;
 185         } else
 186                 stat |= S3C2410_IICSTAT_MASTER_TX;
 187
 188         if (msg->flags & I2C_M_REV_DIR_ADDR)
 189                 addr ^= 1;
 190
 191         /* todo - check for wether ack wanted or not */
 192         s3c24xx_i2c_enable_ack(i2c);
 193
 194         iiccon = readl(i2c->regs + S3C2410_IICCON);
 195         writel(stat, i2c->regs + S3C2410_IICSTAT);
 196
 197         dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
 198         writeb(addr, i2c->regs + S3C2410_IICDS);
 199
 200         /* delay here to ensure the data byte has gotten onto the bus
 201          * before the transaction is started */
 202
 203         ndelay(i2c->tx_setup);
 204
 205         dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);
 206         writel(iiccon, i2c->regs + S3C2410_IICCON);
 207
 208         stat |= S3C2410_IICSTAT_START;
 209         writel(stat, i2c->regs + S3C2410_IICSTAT);
 210 }
 211
 212 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
 213 {
 214         unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 215
 216         dev_dbg(i2c->dev, "STOP\n");
 217
 218         /* stop the transfer */
 219         iicstat &= ~S3C2410_IICSTAT_START;
 220         writel(iicstat, i2c->regs + S3C2410_IICSTAT);
 221
 222         i2c->state = STATE_STOP;
 223
 224         s3c24xx_i2c_master_complete(i2c, ret);
 225         s3c24xx_i2c_disable_irq(i2c);
 226 }
 227
 228 /* helper functions to determine the current state in the set of
 229  * messages we are sending */
 230
 231 /* is_lastmsg()
 232  *
 233  * returns TRUE if the current message is the last in the set
 234 */
 235
 236 static inline int is_lastmsg(struct s3c24xx_i2c *i2c)
 237 {
 238         return i2c->msg_idx >= (i2c->msg_num - 1);
 239 }
 240
 241 /* is_msglast
 242  *
 243  * returns TRUE if we this is the last byte in the current message
 244 */
 245
 246 static inline int is_msglast(struct s3c24xx_i2c *i2c)
 247 {
 248         return i2c->msg_ptr == i2c->msg->len-1;
 249 }
 250
 251 /* is_msgend
 252  *
 253  * returns TRUE if we reached the end of the current message
 254 */
 255
 256 static inline int is_msgend(struct s3c24xx_i2c *i2c)
 257 {
 258         return i2c->msg_ptr >= i2c->msg->len;
 259 }
 260
 261 /* i2c_s3c_irq_nextbyte
 262  *
 263  * process an interrupt and work out what to do
 264  */
 265
 266 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
 267 {
 268         unsigned long tmp;
 269         unsigned char byte;
 270         int ret = 0;
 271
 272         switch (i2c->state) {
 273
 274         case STATE_IDLE:
 275                 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
 276                 goto out;
 277
 278         case STATE_STOP:
 279                 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
 280                 s3c24xx_i2c_disable_irq(i2c);
 281                 goto out_ack;
 282
 283         case STATE_START:
 284                 /* last thing we did was send a start condition on the
 285                  * bus, or started a new i2c message
 286                  */
 287
 288                 if (iicstat & S3C2410_IICSTAT_LASTBIT &&
 289                     !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
 290                         /* ack was not received... */
 291
 292                         dev_dbg(i2c->dev, "ack was not received\n");
 293                         s3c24xx_i2c_stop(i2c, -ENXIO);
 294                         goto out_ack;
 295                 }
 296
 297                 if (i2c->msg->flags & I2C_M_RD)
 298                         i2c->state = STATE_READ;
 299                 else
 300                         i2c->state = STATE_WRITE;
 301
 302                 /* terminate the transfer if there is nothing to do
 303                  * as this is used by the i2c probe to find devices. */
 304
 305                 if (is_lastmsg(i2c) && i2c->msg->len == 0) {
 306                         s3c24xx_i2c_stop(i2c, 0);
 307                         goto out_ack;
 308                 }
 309
 310                 if (i2c->state == STATE_READ)
 311                         goto prepare_read;
 312
 313                 /* fall through to the write state, as we will need to
 314                  * send a byte as well */
 315
 316         case STATE_WRITE:
 317                 /* we are writing data to the device... check for the
 318                  * end of the message, and if so, work out what to do
 319                  */
 320
 321                 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
 322                         if (iicstat & S3C2410_IICSTAT_LASTBIT) {
 323                                 dev_dbg(i2c->dev, "WRITE: No Ack\n");
 324
 325                                 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
 326                                 goto out_ack;
 327                         }
 328                 }
 329
 330  retry_write:
 331
 332                 if (!is_msgend(i2c)) {
 333                         byte = i2c->msg->buf[i2c->msg_ptr++];
 334                         writeb(byte, i2c->regs + S3C2410_IICDS);
 335
 336                         /* delay after writing the byte to allow the
 337                          * data setup time on the bus, as writing the
 338                          * data to the register causes the first bit
 339                          * to appear on SDA, and SCL will change as
 340                          * soon as the interrupt is acknowledged */
 341
 342                         ndelay(i2c->tx_setup);
 343
 344                 } else if (!is_lastmsg(i2c)) {
 345                         /* we need to go to the next i2c message */
 346
 347                         dev_dbg(i2c->dev, "WRITE: Next Message\n");
 348
 349                         i2c->msg_ptr = 0;
 350                         i2c->msg_idx++;
 351                         i2c->msg++;
 352
 353                         /* check to see if we need to do another message */
 354                         if (i2c->msg->flags & I2C_M_NOSTART) {
 355
 356                                 if (i2c->msg->flags & I2C_M_RD) {
 357                                         /* cannot do this, the controller
 358                                          * forces us to send a new START
 359                                          * when we change direction */
 360
 361                                         s3c24xx_i2c_stop(i2c, -EINVAL);
 362                                 }
 363
 364                                 goto retry_write;
 365                         } else {
 366                                 /* send the new start */
 367                                 s3c24xx_i2c_message_start(i2c, i2c->msg);
 368                                 i2c->state = STATE_START;
 369                         }
 370
 371                 } else {
 372                         /* send stop */
 373
 374                         s3c24xx_i2c_stop(i2c, 0);
 375                 }
 376                 break;
 377
 378         case STATE_READ:
 379                 /* we have a byte of data in the data register, do
 380                  * something with it, and then work out wether we are
 381                  * going to do any more read/write
 382                  */
 383
 384                 byte = readb(i2c->regs + S3C2410_IICDS);
 385                 i2c->msg->buf[i2c->msg_ptr++] = byte;
 386
 387  prepare_read:
 388                 if (is_msglast(i2c)) {
 389                         /* last byte of buffer */
 390
 391                         if (is_lastmsg(i2c))
 392                                 s3c24xx_i2c_disable_ack(i2c);
 393
 394                 } else if (is_msgend(i2c)) {
 395                         /* ok, we've read the entire buffer, see if there
 396                          * is anything else we need to do */
 397
 398                         if (is_lastmsg(i2c)) {
 399                                 /* last message, send stop and complete */
 400                                 dev_dbg(i2c->dev, "READ: Send Stop\n");
 401
 402                                 s3c24xx_i2c_stop(i2c, 0);
 403                         } else {
 404                                 /* go to the next transfer */
 405                                 dev_dbg(i2c->dev, "READ: Next Transfer\n");
 406
 407                                 i2c->msg_ptr = 0;
 408                                 i2c->msg_idx++;
 409                                 i2c->msg++;
 410                         }
 411                 }
 412
 413                 break;
 414         }
 415
 416         /* acknowlegde the IRQ and get back on with the work */
 417
 418  out_ack:
 419         tmp = readl(i2c->regs + S3C2410_IICCON);
 420         tmp &= ~S3C2410_IICCON_IRQPEND;
 421         writel(tmp, i2c->regs + S3C2410_IICCON);
 422  out:
 423         return ret;
 424 }
 425
 426 /* s3c24xx_i2c_irq
 427  *
 428  * top level IRQ servicing routine
 429 */
 430
 431 static irqreturn_t s3c24xx_i2c_irq(int irqno, void *dev_id)
 432 {
 433         struct s3c24xx_i2c *i2c = dev_id;
 434         unsigned long status;
 435         unsigned long tmp;
 436
 437         status = readl(i2c->regs + S3C2410_IICSTAT);
 438
 439         if (status & S3C2410_IICSTAT_ARBITR) {
 440                 /* deal with arbitration loss */
 441                 dev_err(i2c->dev, "deal with arbitration loss\n");
 442         }
 443
 444         if (i2c->state == STATE_IDLE) {
 445                 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
 446
 447                 tmp = readl(i2c->regs + S3C2410_IICCON);
 448                 tmp &= ~S3C2410_IICCON_IRQPEND;
 449                 writel(tmp, i2c->regs +  S3C2410_IICCON);
 450                 goto out;
 451         }
 452
 453         /* pretty much this leaves us with the fact that we've
 454          * transmitted or received whatever byte we last sent */
 455
 456         i2c_s3c_irq_nextbyte(i2c, status);
 457
 458  out:
 459         return IRQ_HANDLED;
 460 }
 461
 462
 463 /* s3c24xx_i2c_set_master
 464  *
 465  * get the i2c bus for a master transaction
 466 */
 467
 468 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
 469 {
 470         unsigned long iicstat;
 471         int timeout = 400;
 472
 473         while (timeout-- > 0) {
 474                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 475
 476                 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
 477                         return 0;
 478
 479                 msleep(1);
 480         }
 481
 482         return -ETIMEDOUT;
 483 }
 484
 485 /* s3c24xx_i2c_doxfer
 486  *
 487  * this starts an i2c transfer
 488 */
 489
 490 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,
 491                               struct i2c_msg *msgs, int num)
 492 {
 493         unsigned long iicstat, timeout;
 494         int spins = 20;
 495         int ret;
 496
 497         if (i2c->suspended)
 498                 return -EIO;
 499
 500         ret = s3c24xx_i2c_set_master(i2c);
 501         if (ret != 0) {
 502                 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
 503                 ret = -EAGAIN;
 504                 goto out;
 505         }
 506
 507         spin_lock_irq(&i2c->lock);
 508
 509         i2c->msg     = msgs;
 510         i2c->msg_num = num;
 511         i2c->msg_ptr = 0;
 512         i2c->msg_idx = 0;
 513         i2c->state   = STATE_START;
 514
 515         s3c24xx_i2c_enable_irq(i2c);
 516         s3c24xx_i2c_message_start(i2c, msgs);
 517         spin_unlock_irq(&i2c->lock);
 518
 519         timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
 520
 521         ret = i2c->msg_idx;
 522
 523         /* having these next two as dev_err() makes life very
 524          * noisy when doing an i2cdetect */
 525
 526         if (timeout == 0)
 527                 dev_dbg(i2c->dev, "timeout\n");
 528         else if (ret != num)
 529                 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
 530
 531         /* ensure the stop has been through the bus */
 532
 533         dev_dbg(i2c->dev, "waiting for bus idle\n");
 534
 535         /* first, try busy waiting briefly */
 536         do {
 537                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 538         } while ((iicstat & S3C2410_IICSTAT_START) && --spins);
 539
 540         /* if that timed out sleep */
 541         if (!spins) {
 542                 msleep(1);
 543                 iicstat = readl(i2c->regs + S3C2410_IICSTAT);
 544         }
 545
 546         if (iicstat & S3C2410_IICSTAT_START)
 547                 dev_warn(i2c->dev, "timeout waiting for bus idle\n");
 548
 549  out:
 550         return ret;
 551 }
 552
 553 /* s3c24xx_i2c_xfer
 554  *
 555  * first port of call from the i2c bus code when an message needs
 556  * transferring across the i2c bus.
 557 */
 558
 559 static int s3c24xx_i2c_xfer(struct i2c_adapter *adap,
 560                         struct i2c_msg *msgs, int num)
 561 {
 562         struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data;
 563         int retry;
 564         int ret;
 565
 566         clk_enable(i2c->clk);
 567
 568         for (retry = 0; retry < adap->retries; retry++) {
 569
 570                 ret = s3c24xx_i2c_doxfer(i2c, msgs, num);
 571
 572                 if (ret != -EAGAIN) {
 573                         clk_disable(i2c->clk);
 574                         return ret;
 575                 }
 576
 577                 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
 578
 579                 udelay(100);
 580         }
 581
 582         clk_disable(i2c->clk);
 583         return -EREMOTEIO;
 584 }
 585
 586 /* declare our i2c functionality */
 587 static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
 588 {
 589         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
 590 }
 591
 592 /* i2c bus registration info */
 593
 594 static const struct i2c_algorithm s3c24xx_i2c_algorithm = {
 595         .master_xfer            = s3c24xx_i2c_xfer,
 596         .functionality          = s3c24xx_i2c_func,
 597 };
 598
 599 /* s3c24xx_i2c_calcdivisor
 600  *
 601  * return the divisor settings for a given frequency
 602 */
 603
 604 static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted,
 605                                    unsigned int *div1, unsigned int *divs)
 606 {
 607         unsigned int calc_divs = clkin / wanted;
 608         unsigned int calc_div1;
 609
 610         if (calc_divs > (16*16))
 611                 calc_div1 = 512;
 612         else
 613                 calc_div1 = 16;
 614
 615         calc_divs += calc_div1-1;
 616         calc_divs /= calc_div1;
 617
 618         if (calc_divs == 0)
 619                 calc_divs = 1;
 620         if (calc_divs > 17)
 621                 calc_divs = 17;
 622
 623         *divs = calc_divs;
 624         *div1 = calc_div1;
 625
 626         return clkin / (calc_divs * calc_div1);
 627 }
 628
 629 /* s3c24xx_i2c_clockrate
 630  *
 631  * work out a divisor for the user requested frequency setting,
 632  * either by the requested frequency, or scanning the acceptable
 633  * range of frequencies until something is found
 634 */
 635
 636 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
 637 {
 638         struct s3c2410_platform_i2c *pdata = i2c->pdata;
 639         unsigned long clkin = clk_get_rate(i2c->clk);
 640         unsigned int divs, div1;
 641         unsigned long target_frequency;
 642         u32 iiccon;
 643         int freq;
 644
 645         i2c->clkrate = clkin;
 646         clkin /= 1000;          /* clkin now in KHz */
 647
 648         dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency);
 649
 650         target_frequency = pdata->frequency ? pdata->frequency : 100000;
 651
 652         target_frequency /= 1000; /* Target frequency now in KHz */
 653
 654         freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs);
 655
 656         if (freq > target_frequency) {
 657                 dev_err(i2c->dev,
 658                         "Unable to achieve desired frequency %luKHz."   \
 659                         " Lowest achievable %dKHz\n", target_frequency, freq);
 660                 return -EINVAL;
 661         }
 662
 663         *got = freq;
 664
 665         iiccon = readl(i2c->regs + S3C2410_IICCON);
 666         iiccon &= ~(S3C2410_IICCON_SCALEMASK | S3C2410_IICCON_TXDIV_512);
 667         iiccon |= (divs-1);
 668
 669         if (div1 == 512)
 670                 iiccon |= S3C2410_IICCON_TXDIV_512;
 671
 672         writel(iiccon, i2c->regs + S3C2410_IICCON);
 673
 674         if (s3c24xx_i2c_is2440(i2c)) {
 675                 unsigned long sda_delay;
 676
 677                 if (pdata->sda_delay) {
 678                         sda_delay = clkin * pdata->sda_delay;
 679                         sda_delay = DIV_ROUND_UP(sda_delay, 1000000);
 680                         sda_delay = DIV_ROUND_UP(sda_delay, 5);
 681                         if (sda_delay > 3)
 682                                 sda_delay = 3;
 683                         sda_delay |= S3C2410_IICLC_FILTER_ON;
 684                 } else
 685                         sda_delay = 0;
 686
 687                 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay);
 688                 writel(sda_delay, i2c->regs + S3C2440_IICLC);
 689         }
 690
 691         return 0;
 692 }
 693
 694 #ifdef CONFIG_CPU_FREQ
 695
 696 #define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
 697
 698 static int s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb,
 699                                           unsigned long val, void *data)
 700 {
 701         struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
 702         unsigned long flags;
 703         unsigned int got;
 704         int delta_f;
 705         int ret;
 706
 707         delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
 708
 709         /* if we're post-change and the input clock has slowed down
 710          * or at pre-change and the clock is about to speed up, then
 711          * adjust our clock rate. <0 is slow, >0 speedup.
 712          */
 713
 714         if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
 715             (val == CPUFREQ_PRECHANGE && delta_f > 0)) {
 716                 spin_lock_irqsave(&i2c->lock, flags);
 717                 ret = s3c24xx_i2c_clockrate(i2c, &got);
 718                 spin_unlock_irqrestore(&i2c->lock, flags);
 719
 720                 if (ret < 0)
 721                         dev_err(i2c->dev, "cannot find frequency\n");
 722                 else
 723                         dev_info(i2c->dev, "setting freq %d\n", got);
 724         }
 725
 726         return 0;
 727 }
 728
 729 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
 730 {
 731         i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
 732
 733         return cpufreq_register_notifier(&i2c->freq_transition,
 734                                          CPUFREQ_TRANSITION_NOTIFIER);
 735 }
 736
 737 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
 738 {
 739         cpufreq_unregister_notifier(&i2c->freq_transition,
 740                                     CPUFREQ_TRANSITION_NOTIFIER);
 741 }
 742
 743 #else
 744 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c)
 745 {
 746         return 0;
 747 }
 748
 749 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c)
 750 {
 751 }
 752 #endif
 753
 754 #ifdef CONFIG_OF
 755 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
 756 {
 757         int idx, gpio, ret;
 758
 759         for (idx = 0; idx < 2; idx++) {
 760                 gpio = of_get_gpio(i2c->dev->of_node, idx);
 761                 if (!gpio_is_valid(gpio)) {
 762                         dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio);
 763                         goto free_gpio;
 764                 }
 765
 766                 ret = gpio_request(gpio, "i2c-bus");
 767                 if (ret) {
 768                         dev_err(i2c->dev, "gpio [%d] request failed\n", gpio);
 769                         goto free_gpio;
 770                 }
 771         }
 772         return 0;
 773
 774 free_gpio:
 775         while (--idx >= 0)
 776                 gpio_free(i2c->gpios[idx]);
 777         return -EINVAL;
 778 }
 779
 780 static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
 781 {
 782         unsigned int idx;
 783         for (idx = 0; idx < 2; idx++)
 784                 gpio_free(i2c->gpios[idx]);
 785 }
 786 #else
 787 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
 788 {
 789         return -EINVAL;
 790 }
 791
 792 static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c)
 793 {
 794 }
 795 #endif
 796
 797 /* s3c24xx_i2c_init
 798  *
 799  * initialise the controller, set the IO lines and frequency
 800 */
 801
 802 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
 803 {
 804         unsigned long iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
 805         struct s3c2410_platform_i2c *pdata;
 806         unsigned int freq;
 807
 808         /* get the plafrom data */
 809
 810         pdata = i2c->pdata;
 811
 812         /* inititalise the gpio */
 813
 814         if (pdata->cfg_gpio)
 815                 pdata->cfg_gpio(to_platform_device(i2c->dev));
 816         else
 817                 if (s3c24xx_i2c_parse_dt_gpio(i2c))
 818                         return -EINVAL;
 819
 820         /* write slave address */
 821
 822         writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
 823
 824         dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);
 825
 826         writel(iicon, i2c->regs + S3C2410_IICCON);
 827
 828         /* we need to work out the divisors for the clock... */
 829
 830         if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {
 831                 writel(0, i2c->regs + S3C2410_IICCON);
 832                 dev_err(i2c->dev, "cannot meet bus frequency required\n");
 833                 return -EINVAL;
 834         }
 835
 836         /* todo - check that the i2c lines aren't being dragged anywhere */
 837
 838         dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
 839         dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
 840
 841         return 0;
 842 }
 843
 844 #ifdef CONFIG_OF
 845 /* s3c24xx_i2c_parse_dt
 846  *
 847  * Parse the device tree node and retreive the platform data.
 848 */
 849
 850 static void
 851 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
 852 {
 853         struct s3c2410_platform_i2c *pdata = i2c->pdata;
 854
 855         if (!np)
 856                 return;
 857
 858         pdata->bus_num = -1; /* i2c bus number is dynamically assigned */
 859         of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay);
 860         of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr);
 861         of_property_read_u32(np, "samsung,i2c-max-bus-freq",
 862                                 (u32 *)&pdata->frequency);
 863 }
 864 #else
 865 static void
 866 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c)
 867 {
 868         return;
 869 }
 870 #endif
 871
 872 /* s3c24xx_i2c_probe
 873  *
 874  * called by the bus driver when a suitable device is found
 875 */
 876
 877 static int s3c24xx_i2c_probe(struct platform_device *pdev)
 878 {
 879         struct s3c24xx_i2c *i2c;
 880         struct s3c2410_platform_i2c *pdata = NULL;
 881         struct resource *res;
 882         int ret;
 883
 884         if (!pdev->dev.of_node) {
 885                 pdata = pdev->dev.platform_data;
 886                 if (!pdata) {
 887                         dev_err(&pdev->dev, "no platform data\n");
 888                         return -EINVAL;
 889                 }
 890         }
 891
 892         i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL);
 893         if (!i2c) {
 894                 dev_err(&pdev->dev, "no memory for state\n");
 895                 return -ENOMEM;
 896         }
 897
 898         i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 899         if (!i2c->pdata) {
 900                 ret = -ENOMEM;
 901                 goto err_noclk;
 902         }
 903
 904         if (pdata)
 905                 memcpy(i2c->pdata, pdata, sizeof(*pdata));
 906         else
 907                 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c);
 908
 909         strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));
 910         i2c->adap.owner   = THIS_MODULE;
 911         i2c->adap.algo    = &s3c24xx_i2c_algorithm;
 912         i2c->adap.retries = 2;
 913         i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 914         i2c->tx_setup     = 50;
 915
 916         spin_lock_init(&i2c->lock);
 917         init_waitqueue_head(&i2c->wait);
 918
 919         /* find the clock and enable it */
 920
 921         i2c->dev = &pdev->dev;
 922         i2c->clk = clk_get(&pdev->dev, "i2c");
 923         if (IS_ERR(i2c->clk)) {
 924                 dev_err(&pdev->dev, "cannot get clock\n");
 925                 ret = -ENOENT;
 926                 goto err_noclk;
 927         }
 928
 929         dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
 930
 931         clk_enable(i2c->clk);
 932
 933         /* map the registers */
 934
 935         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 936         if (res == NULL) {
 937                 dev_err(&pdev->dev, "cannot find IO resource\n");
 938                 ret = -ENOENT;
 939                 goto err_clk;
 940         }
 941
 942         i2c->ioarea = request_mem_region(res->start, resource_size(res),
 943                                          pdev->name);
 944
 945         if (i2c->ioarea == NULL) {
 946                 dev_err(&pdev->dev, "cannot request IO\n");
 947                 ret = -ENXIO;
 948                 goto err_clk;
 949         }
 950
 951         i2c->regs = ioremap(res->start, resource_size(res));
 952
 953         if (i2c->regs == NULL) {
 954                 dev_err(&pdev->dev, "cannot map IO\n");
 955                 ret = -ENXIO;
 956                 goto err_ioarea;
 957         }
 958
 959         dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
 960                 i2c->regs, i2c->ioarea, res);
 961
 962         /* setup info block for the i2c core */
 963
 964         i2c->adap.algo_data = i2c;
 965         i2c->adap.dev.parent = &pdev->dev;
 966
 967         /* initialise the i2c controller */
 968
 969         ret = s3c24xx_i2c_init(i2c);
 970         if (ret != 0)
 971                 goto err_iomap;
 972
 973         /* find the IRQ for this unit (note, this relies on the init call to
 974          * ensure no current IRQs pending
 975          */
 976
 977         i2c->irq = ret = platform_get_irq(pdev, 0);
 978         if (ret <= 0) {
 979                 dev_err(&pdev->dev, "cannot find IRQ\n");
 980                 goto err_iomap;
 981         }
 982
 983         ret = request_irq(i2c->irq, s3c24xx_i2c_irq, 0,
 984                           dev_name(&pdev->dev), i2c);
 985
 986         if (ret != 0) {
 987                 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
 988                 goto err_iomap;
 989         }
 990
 991         ret = s3c24xx_i2c_register_cpufreq(i2c);
 992         if (ret < 0) {
 993                 dev_err(&pdev->dev, "failed to register cpufreq notifier\n");
 994                 goto err_irq;
 995         }
 996
 997         /* Note, previous versions of the driver used i2c_add_adapter()
 998          * to add the bus at any number. We now pass the bus number via
 999          * the platform data, so if unset it will now default to always
1000          * being bus 0.
1001          */
1002
1003         i2c->adap.nr = i2c->pdata->bus_num;
1004         i2c->adap.dev.of_node = pdev->dev.of_node;
1005
1006         ret = i2c_add_numbered_adapter(&i2c->adap);
1007         if (ret < 0) {
1008                 dev_err(&pdev->dev, "failed to add bus to i2c core\n");
1009                 goto err_cpufreq;
1010         }
1011
1012         of_i2c_register_devices(&i2c->adap);
1013         platform_set_drvdata(pdev, i2c);
1014
1015         dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
1016         clk_disable(i2c->clk);
1017         return 0;
1018
1019  err_cpufreq:
1020         s3c24xx_i2c_deregister_cpufreq(i2c);
1021
1022  err_irq:
1023         free_irq(i2c->irq, i2c);
1024
1025  err_iomap:
1026         iounmap(i2c->regs);
1027
1028  err_ioarea:
1029         release_resource(i2c->ioarea);
1030         kfree(i2c->ioarea);
1031
1032  err_clk:
1033         clk_disable(i2c->clk);
1034         clk_put(i2c->clk);
1035
1036  err_noclk:
1037         kfree(i2c);
1038         return ret;
1039 }
1040
1041 /* s3c24xx_i2c_remove
1042  *
1043  * called when device is removed from the bus
1044 */
1045
1046 static int s3c24xx_i2c_remove(struct platform_device *pdev)
1047 {
1048         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1049
1050         s3c24xx_i2c_deregister_cpufreq(i2c);
1051
1052         i2c_del_adapter(&i2c->adap);
1053         free_irq(i2c->irq, i2c);
1054
1055         clk_disable(i2c->clk);
1056         clk_put(i2c->clk);
1057
1058         iounmap(i2c->regs);
1059
1060         release_resource(i2c->ioarea);
1061         s3c24xx_i2c_dt_gpio_free(i2c);
1062         kfree(i2c->ioarea);
1063         kfree(i2c);
1064
1065         return 0;
1066 }
1067
1068 #ifdef CONFIG_PM
1069 static int s3c24xx_i2c_suspend_noirq(struct device *dev)
1070 {
1071         struct platform_device *pdev = to_platform_device(dev);
1072         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1073
1074         i2c->suspended = 1;
1075
1076         return 0;
1077 }
1078
1079 static int s3c24xx_i2c_resume(struct device *dev)
1080 {
1081         struct platform_device *pdev = to_platform_device(dev);
1082         struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
1083
1084         i2c->suspended = 0;
1085         clk_enable(i2c->clk);
1086         s3c24xx_i2c_init(i2c);
1087         clk_disable(i2c->clk);
1088
1089         return 0;
1090 }
1091
1092 static const struct dev_pm_ops s3c24xx_i2c_dev_pm_ops = {
1093         .suspend_noirq = s3c24xx_i2c_suspend_noirq,
1094         .resume = s3c24xx_i2c_resume,
1095 };
1096
1097 #define S3C24XX_DEV_PM_OPS (&s3c24xx_i2c_dev_pm_ops)
1098 #else
1099 #define S3C24XX_DEV_PM_OPS NULL
1100 #endif
1101
1102 /* device driver for platform bus bits */
1103
1104 static struct platform_device_id s3c24xx_driver_ids[] = {
1105         {
1106                 .name           = "s3c2410-i2c",
1107                 .driver_data    = TYPE_S3C2410,
1108         }, {
1109                 .name           = "s3c2440-i2c",
1110                 .driver_data    = TYPE_S3C2440,
1111         }, { },
1112 };
1113 MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
1114
1115 #ifdef CONFIG_OF
1116 static const struct of_device_id s3c24xx_i2c_match[] = {
1117         { .compatible = "samsung,s3c2410-i2c" },
1118         { .compatible = "samsung,s3c2440-i2c" },
1119         {},
1120 };
1121 MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match);
1122 #else
1123 #define s3c24xx_i2c_match NULL
1124 #endif
1125
1126 static struct platform_driver s3c24xx_i2c_driver = {
1127         .probe          = s3c24xx_i2c_probe,
1128         .remove         = s3c24xx_i2c_remove,
1129         .id_table       = s3c24xx_driver_ids,
1130         .driver         = {
1131                 .owner  = THIS_MODULE,
1132                 .name   = "s3c-i2c",
1133                 .pm     = S3C24XX_DEV_PM_OPS,
1134                 .of_match_table = s3c24xx_i2c_match,
1135         },
1136 };
1137
1138 static int __init i2c_adap_s3c_init(void)
1139 {
1140         return platform_driver_register(&s3c24xx_i2c_driver);
1141 }
1142 subsys_initcall(i2c_adap_s3c_init);
1143
1144 static void __exit i2c_adap_s3c_exit(void)
1145 {
1146         platform_driver_unregister(&s3c24xx_i2c_driver);
1147 }
1148 module_exit(i2c_adap_s3c_exit);
1149
1150 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
1151 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
1152 MODULE_LICENSE("GPL");