2 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
3 * (http://www.opencores.org/projects.cgi/web/i2c/overview).
5 * Peter Korsgaard <jacmet@sunsite.dk>
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
13 * Device tree configuration:
15 * Required properties:
16 * - compatible : "opencores,i2c-ocores"
17 * - reg : bus address start and address range size of device
18 * - interrupts : interrupt number
19 * - regstep : size of device registers in bytes
20 * - clock-frequency : frequency of bus clock in Hz
24 * i2c0: ocores@a0000000 {
25 * compatible = "opencores,i2c-ocores";
26 * reg = <0xa0000000 0x8>;
30 * clock-frequency = <20000000>;
32 * -- Devices connected on this I2C bus get
33 * -- defined here; address- and size-cells
34 * -- apply to these child devices
36 * #address-cells = <1>;
40 * compatible = "dummy";
47 #include <linux/kernel.h>
48 #include <linux/module.h>
49 #include <linux/init.h>
50 #include <linux/errno.h>
51 #include <linux/platform_device.h>
52 #include <linux/mfd/core.h>
53 #include <linux/i2c.h>
54 #include <linux/interrupt.h>
55 #include <linux/wait.h>
56 #include <linux/i2c-ocores.h>
57 #include <linux/slab.h>
63 wait_queue_head_t wait;
64 struct i2c_adapter adap;
68 int state; /* see STATE_ */
73 #define OCI2C_PRELOW 0
74 #define OCI2C_PREHIGH 1
75 #define OCI2C_CONTROL 2
77 #define OCI2C_CMD 4 /* write only */
78 #define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */
80 #define OCI2C_CTRL_IEN 0x40
81 #define OCI2C_CTRL_EN 0x80
83 #define OCI2C_CMD_START 0x91
84 #define OCI2C_CMD_STOP 0x41
85 #define OCI2C_CMD_READ 0x21
86 #define OCI2C_CMD_WRITE 0x11
87 #define OCI2C_CMD_READ_ACK 0x21
88 #define OCI2C_CMD_READ_NACK 0x29
89 #define OCI2C_CMD_IACK 0x01
91 #define OCI2C_STAT_IF 0x01
92 #define OCI2C_STAT_TIP 0x02
93 #define OCI2C_STAT_ARBLOST 0x20
94 #define OCI2C_STAT_BUSY 0x40
95 #define OCI2C_STAT_NACK 0x80
101 #define STATE_ERROR 4
103 static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
105 iowrite8(value, i2c->base + reg * i2c->regstep);
108 static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
110 return ioread8(i2c->base + reg * i2c->regstep);
113 static void ocores_process(struct ocores_i2c *i2c)
115 struct i2c_msg *msg = i2c->msg;
116 u8 stat = oc_getreg(i2c, OCI2C_STATUS);
118 if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
119 /* stop has been sent */
120 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
126 if (stat & OCI2C_STAT_ARBLOST) {
127 i2c->state = STATE_ERROR;
128 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
132 if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
134 (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
136 if (stat & OCI2C_STAT_NACK) {
137 i2c->state = STATE_ERROR;
138 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
142 msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
145 if (i2c->pos == msg->len) {
151 if (i2c->nmsgs) { /* end? */
153 if (!(msg->flags & I2C_M_NOSTART)) {
154 u8 addr = (msg->addr << 1);
156 if (msg->flags & I2C_M_RD)
159 i2c->state = STATE_START;
161 oc_setreg(i2c, OCI2C_DATA, addr);
162 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
165 i2c->state = (msg->flags & I2C_M_RD)
166 ? STATE_READ : STATE_WRITE;
168 i2c->state = STATE_DONE;
169 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
174 if (i2c->state == STATE_READ) {
175 oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
176 OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
178 oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
179 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
183 static irqreturn_t ocores_isr(int irq, void *dev_id)
185 struct ocores_i2c *i2c = dev_id;
192 static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
194 struct ocores_i2c *i2c = i2c_get_adapdata(adap);
199 i2c->state = STATE_START;
201 oc_setreg(i2c, OCI2C_DATA,
202 (i2c->msg->addr << 1) |
203 ((i2c->msg->flags & I2C_M_RD) ? 1:0));
205 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
207 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
208 (i2c->state == STATE_DONE), HZ))
209 return (i2c->state == STATE_DONE) ? num : -EIO;
214 static void ocores_init(struct ocores_i2c *i2c)
217 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
219 /* make sure the device is disabled */
220 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
222 prescale = (i2c->clock_khz / (5*100)) - 1;
223 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
224 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
226 /* Init the device */
227 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
228 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
232 static u32 ocores_func(struct i2c_adapter *adap)
234 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
237 static const struct i2c_algorithm ocores_algorithm = {
238 .master_xfer = ocores_xfer,
239 .functionality = ocores_func,
242 static struct i2c_adapter ocores_adapter = {
243 .owner = THIS_MODULE,
244 .name = "i2c-ocores",
245 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
246 .algo = &ocores_algorithm,
250 static int ocores_i2c_of_probe(struct platform_device* pdev,
251 struct ocores_i2c* i2c)
255 val = of_get_property(pdev->dev.of_node, "regstep", NULL);
257 dev_err(&pdev->dev, "Missing required parameter 'regstep'");
260 i2c->regstep = be32_to_cpup(val);
262 val = of_get_property(pdev->dev.of_node, "clock-frequency", NULL);
265 "Missing required parameter 'clock-frequency'");
268 i2c->clock_khz = be32_to_cpup(val) / 1000;
273 #define ocores_i2c_of_probe(pdev,i2c) -ENODEV
276 static int __devinit ocores_i2c_probe(struct platform_device *pdev)
278 struct ocores_i2c *i2c;
279 struct ocores_i2c_platform_data *pdata;
280 struct resource *res, *res2;
284 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
288 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
292 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
296 if (!devm_request_mem_region(&pdev->dev, res->start,
297 resource_size(res), pdev->name)) {
298 dev_err(&pdev->dev, "Memory region busy\n");
302 i2c->base = devm_ioremap_nocache(&pdev->dev, res->start,
305 dev_err(&pdev->dev, "Unable to map registers\n");
309 pdata = mfd_get_data(pdev);
311 i2c->regstep = pdata->regstep;
312 i2c->clock_khz = pdata->clock_khz;
314 ret = ocores_i2c_of_probe(pdev, i2c);
321 init_waitqueue_head(&i2c->wait);
322 ret = devm_request_irq(&pdev->dev, res2->start, ocores_isr, 0,
325 dev_err(&pdev->dev, "Cannot claim IRQ\n");
329 /* hook up driver to tree */
330 platform_set_drvdata(pdev, i2c);
331 i2c->adap = ocores_adapter;
332 i2c_set_adapdata(&i2c->adap, i2c);
333 i2c->adap.dev.parent = &pdev->dev;
334 i2c->adap.dev.of_node = pdev->dev.of_node;
336 /* add i2c adapter to i2c tree */
337 ret = i2c_add_adapter(&i2c->adap);
339 dev_err(&pdev->dev, "Failed to add adapter\n");
343 /* add in known devices to the bus */
345 for (i = 0; i < pdata->num_devices; i++)
346 i2c_new_device(&i2c->adap, pdata->devices + i);
352 static int __devexit ocores_i2c_remove(struct platform_device* pdev)
354 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
356 /* disable i2c logic */
357 oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
358 & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
360 /* remove adapter & data */
361 i2c_del_adapter(&i2c->adap);
362 platform_set_drvdata(pdev, NULL);
368 static int ocores_i2c_suspend(struct platform_device *pdev, pm_message_t state)
370 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
371 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
373 /* make sure the device is disabled */
374 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
379 static int ocores_i2c_resume(struct platform_device *pdev)
381 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
388 #define ocores_i2c_suspend NULL
389 #define ocores_i2c_resume NULL
392 static struct of_device_id ocores_i2c_match[] = {
393 { .compatible = "opencores,i2c-ocores", },
396 MODULE_DEVICE_TABLE(of, ocores_i2c_match);
398 /* work with hotplug and coldplug */
399 MODULE_ALIAS("platform:ocores-i2c");
401 static struct platform_driver ocores_i2c_driver = {
402 .probe = ocores_i2c_probe,
403 .remove = __devexit_p(ocores_i2c_remove),
404 .suspend = ocores_i2c_suspend,
405 .resume = ocores_i2c_resume,
407 .owner = THIS_MODULE,
408 .name = "ocores-i2c",
409 .of_match_table = ocores_i2c_match,
413 static int __init ocores_i2c_init(void)
415 return platform_driver_register(&ocores_i2c_driver);
418 static void __exit ocores_i2c_exit(void)
420 platform_driver_unregister(&ocores_i2c_driver);
423 module_init(ocores_i2c_init);
424 module_exit(ocores_i2c_exit);
426 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
427 MODULE_DESCRIPTION("OpenCores I2C bus driver");
428 MODULE_LICENSE("GPL");