drivers/i2c/busses/i2c-davinci.c

   1 /*
   2  * TI DAVINCI I2C adapter driver.
   3  *
   4  * Copyright (C) 2006 Texas Instruments.
   5  * Copyright (C) 2007 MontaVista Software Inc.
   6  *
   7  * Updated by Vinod & Sudhakar Feb 2005
   8  *
   9  * ----------------------------------------------------------------------------
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  * ----------------------------------------------------------------------------
  25  *
  26  */
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/delay.h>
  30 #include <linux/i2c.h>
  31 #include <linux/clk.h>
  32 #include <linux/errno.h>
  33 #include <linux/sched.h>
  34 #include <linux/err.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/io.h>
  38
  39 #include <asm/hardware.h>
  40 #include <asm/mach-types.h>
  41
  42 #include <asm/arch/i2c.h>
  43
  44 /* ----- global defines ----------------------------------------------- */
  45
  46 #define DAVINCI_I2C_TIMEOUT     (1*HZ)
  47 #define I2C_DAVINCI_INTR_ALL    (DAVINCI_I2C_IMR_AAS | \
  48                                  DAVINCI_I2C_IMR_SCD | \
  49                                  DAVINCI_I2C_IMR_ARDY | \
  50                                  DAVINCI_I2C_IMR_NACK | \
  51                                  DAVINCI_I2C_IMR_AL)
  52
  53 #define DAVINCI_I2C_OAR_REG     0x00
  54 #define DAVINCI_I2C_IMR_REG     0x04
  55 #define DAVINCI_I2C_STR_REG     0x08
  56 #define DAVINCI_I2C_CLKL_REG    0x0c
  57 #define DAVINCI_I2C_CLKH_REG    0x10
  58 #define DAVINCI_I2C_CNT_REG     0x14
  59 #define DAVINCI_I2C_DRR_REG     0x18
  60 #define DAVINCI_I2C_SAR_REG     0x1c
  61 #define DAVINCI_I2C_DXR_REG     0x20
  62 #define DAVINCI_I2C_MDR_REG     0x24
  63 #define DAVINCI_I2C_IVR_REG     0x28
  64 #define DAVINCI_I2C_EMDR_REG    0x2c
  65 #define DAVINCI_I2C_PSC_REG     0x30
  66
  67 #define DAVINCI_I2C_IVR_AAS     0x07
  68 #define DAVINCI_I2C_IVR_SCD     0x06
  69 #define DAVINCI_I2C_IVR_XRDY    0x05
  70 #define DAVINCI_I2C_IVR_RDR     0x04
  71 #define DAVINCI_I2C_IVR_ARDY    0x03
  72 #define DAVINCI_I2C_IVR_NACK    0x02
  73 #define DAVINCI_I2C_IVR_AL      0x01
  74
  75 #define DAVINCI_I2C_STR_BB      (1 << 12)
  76 #define DAVINCI_I2C_STR_RSFULL  (1 << 11)
  77 #define DAVINCI_I2C_STR_SCD     (1 << 5)
  78 #define DAVINCI_I2C_STR_ARDY    (1 << 2)
  79 #define DAVINCI_I2C_STR_NACK    (1 << 1)
  80 #define DAVINCI_I2C_STR_AL      (1 << 0)
  81
  82 #define DAVINCI_I2C_MDR_NACK    (1 << 15)
  83 #define DAVINCI_I2C_MDR_STT     (1 << 13)
  84 #define DAVINCI_I2C_MDR_STP     (1 << 11)
  85 #define DAVINCI_I2C_MDR_MST     (1 << 10)
  86 #define DAVINCI_I2C_MDR_TRX     (1 << 9)
  87 #define DAVINCI_I2C_MDR_XA      (1 << 8)
  88 #define DAVINCI_I2C_MDR_IRS     (1 << 5)
  89
  90 #define DAVINCI_I2C_IMR_AAS     (1 << 6)
  91 #define DAVINCI_I2C_IMR_SCD     (1 << 5)
  92 #define DAVINCI_I2C_IMR_XRDY    (1 << 4)
  93 #define DAVINCI_I2C_IMR_RRDY    (1 << 3)
  94 #define DAVINCI_I2C_IMR_ARDY    (1 << 2)
  95 #define DAVINCI_I2C_IMR_NACK    (1 << 1)
  96 #define DAVINCI_I2C_IMR_AL      (1 << 0)
  97
  98 #define MOD_REG_BIT(val, mask, set) do { \
  99         if (set) { \
 100                 val |= mask; \
 101         } else { \
 102                 val &= ~mask; \
 103         } \
 104 } while (0)
 105
 106 struct davinci_i2c_dev {
 107         struct device           *dev;
 108         void __iomem            *base;
 109         struct completion       cmd_complete;
 110         struct clk              *clk;
 111         int                     cmd_err;
 112         u8                      *buf;
 113         size_t                  buf_len;
 114         int                     irq;
 115         struct i2c_adapter      adapter;
 116 };
 117
 118 /* default platform data to use if not supplied in the platform_device */
 119 static struct davinci_i2c_platform_data davinci_i2c_platform_data_default = {
 120         .bus_freq       = 100,
 121         .bus_delay      = 0,
 122 };
 123
 124 static inline void davinci_i2c_write_reg(struct davinci_i2c_dev *i2c_dev,
 125                                          int reg, u16 val)
 126 {
 127         __raw_writew(val, i2c_dev->base + reg);
 128 }
 129
 130 static inline u16 davinci_i2c_read_reg(struct davinci_i2c_dev *i2c_dev, int reg)
 131 {
 132         return __raw_readw(i2c_dev->base + reg);
 133 }
 134
 135 /*
 136  * This functions configures I2C and brings I2C out of reset.
 137  * This function is called during I2C init function. This function
 138  * also gets called if I2C encounters any errors.
 139  */
 140 static int i2c_davinci_init(struct davinci_i2c_dev *dev)
 141 {
 142         struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
 143         u16 psc;
 144         u32 clk;
 145         u32 d;
 146         u32 clkh;
 147         u32 clkl;
 148         u32 input_clock = clk_get_rate(dev->clk);
 149         u16 w;
 150
 151         if (!pdata)
 152                 pdata = &davinci_i2c_platform_data_default;
 153
 154         /* put I2C into reset */
 155         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
 156         MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 0);
 157         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 158
 159         /* NOTE: I2C Clock divider programming info
 160          * As per I2C specs the following formulas provide prescaler
 161          * and low/high divider values
 162          * input clk --> PSC Div -----------> ICCL/H Div --> output clock
 163          *                       module clk
 164          *
 165          * output clk = module clk / (PSC + 1) [ (ICCL + d) + (ICCH + d) ]
 166          *
 167          * Thus,
 168          * (ICCL + ICCH) = clk = (input clk / ((psc +1) * output clk)) - 2d;
 169          *
 170          * where if PSC == 0, d = 7,
 171          *       if PSC == 1, d = 6
 172          *       if PSC > 1 , d = 5
 173          */
 174
 175         /* get minimum of 7 MHz clock, but max of 12 MHz */
 176         psc = (input_clock / 7000000) - 1;
 177         if ((input_clock / (psc + 1)) > 12000000)
 178                 psc++;  /* better to run under spec than over */
 179         d = (psc >= 2) ? 5 : 7 - psc;
 180
 181         clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1);
 182         clkh = clk >> 1;
 183         clkl = clk - clkh;
 184
 185         davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc);
 186         davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
 187         davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
 188
 189         dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
 190         dev_dbg(dev->dev, "PSC  = %d\n",
 191                 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
 192         dev_dbg(dev->dev, "CLKL = %d\n",
 193                 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG));
 194         dev_dbg(dev->dev, "CLKH = %d\n",
 195                 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG));
 196         dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n",
 197                 pdata->bus_freq, pdata->bus_delay);
 198
 199         /* Take the I2C module out of reset: */
 200         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
 201         MOD_REG_BIT(w, DAVINCI_I2C_MDR_IRS, 1);
 202         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 203
 204         /* Enable interrupts */
 205         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL);
 206
 207         return 0;
 208 }
 209
 210 /*
 211  * Waiting for bus not busy
 212  */
 213 static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev *dev,
 214                                          char allow_sleep)
 215 {
 216         unsigned long timeout;
 217
 218         timeout = jiffies + DAVINCI_I2C_TIMEOUT;
 219         while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG)
 220                & DAVINCI_I2C_STR_BB) {
 221                 if (time_after(jiffies, timeout)) {
 222                         dev_warn(dev->dev,
 223                                  "timeout waiting for bus ready\n");
 224                         return -ETIMEDOUT;
 225                 }
 226                 if (allow_sleep)
 227                         schedule_timeout(1);
 228         }
 229
 230         return 0;
 231 }
 232
 233 /*
 234  * Low level master read/write transaction. This function is called
 235  * from i2c_davinci_xfer.
 236  */
 237 static int
 238 i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
 239 {
 240         struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
 241         struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
 242         u32 flag;
 243         u32 stat;
 244         u16 w;
 245         int r;
 246
 247         if (msg->len == 0)
 248                 return -EINVAL;
 249
 250         if (!pdata)
 251                 pdata = &davinci_i2c_platform_data_default;
 252         /* Introduce a delay, required for some boards (e.g Davinci EVM) */
 253         if (pdata->bus_delay)
 254                 udelay(pdata->bus_delay);
 255
 256         /* set the slave address */
 257         davinci_i2c_write_reg(dev, DAVINCI_I2C_SAR_REG, msg->addr);
 258
 259         dev->buf = msg->buf;
 260         dev->buf_len = msg->len;
 261
 262         davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
 263
 264         init_completion(&dev->cmd_complete);
 265         dev->cmd_err = 0;
 266
 267         /* Clear any pending interrupts by reading the IVR */
 268         stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG);
 269
 270         /* Take I2C out of reset, configure it as master and set the
 271          * start bit */
 272         flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
 273
 274         /* if the slave address is ten bit address, enable XA bit */
 275         if (msg->flags & I2C_M_TEN)
 276                 flag |= DAVINCI_I2C_MDR_XA;
 277         if (!(msg->flags & I2C_M_RD))
 278                 flag |= DAVINCI_I2C_MDR_TRX;
 279         if (stop)
 280                 flag |= DAVINCI_I2C_MDR_STP;
 281
 282         /* Enable receive or transmit interrupts */
 283         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
 284         if (msg->flags & I2C_M_RD)
 285                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_RRDY, 1);
 286         else
 287                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
 288         davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
 289
 290         /* write the data into mode register */
 291         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
 292
 293         r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
 294                                                       DAVINCI_I2C_TIMEOUT);
 295         dev->buf_len = 0;
 296         if (r < 0)
 297                 return r;
 298
 299         if (r == 0) {
 300                 dev_err(dev->dev, "controller timed out\n");
 301                 i2c_davinci_init(dev);
 302                 return -ETIMEDOUT;
 303         }
 304
 305         /* no error */
 306         if (likely(!dev->cmd_err))
 307                 return msg->len;
 308
 309         /* We have an error */
 310         if (dev->cmd_err & DAVINCI_I2C_STR_AL) {
 311                 i2c_davinci_init(dev);
 312                 return -EIO;
 313         }
 314
 315         if (dev->cmd_err & DAVINCI_I2C_STR_NACK) {
 316                 if (msg->flags & I2C_M_IGNORE_NAK)
 317                         return msg->len;
 318                 if (stop) {
 319                         w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
 320                         MOD_REG_BIT(w, DAVINCI_I2C_MDR_STP, 1);
 321                         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
 322                 }
 323                 return -EREMOTEIO;
 324         }
 325         return -EIO;
 326 }
 327
 328 /*
 329  * Prepare controller for a transaction and call i2c_davinci_xfer_msg
 330  */
 331 static int
 332 i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
 333 {
 334         struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
 335         int i;
 336         int ret;
 337
 338         dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num);
 339
 340         ret = i2c_davinci_wait_bus_not_busy(dev, 1);
 341         if (ret < 0) {
 342                 dev_warn(dev->dev, "timeout waiting for bus ready\n");
 343                 return ret;
 344         }
 345
 346         for (i = 0; i < num; i++) {
 347                 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1)));
 348                 if (ret < 0)
 349                         return ret;
 350         }
 351
 352         dev_dbg(dev->dev, "%s:%d ret: %d\n", __func__, __LINE__, ret);
 353
 354         return num;
 355 }
 356
 357 static u32 i2c_davinci_func(struct i2c_adapter *adap)
 358 {
 359         return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
 360 }
 361
 362 /*
 363  * Interrupt service routine. This gets called whenever an I2C interrupt
 364  * occurs.
 365  */
 366 static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
 367 {
 368         struct davinci_i2c_dev *dev = dev_id;
 369         u32 stat;
 370         int count = 0;
 371         u16 w;
 372
 373         while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) {
 374                 dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat);
 375                 if (count++ == 100) {
 376                         dev_warn(dev->dev, "Too much work in one IRQ\n");
 377                         break;
 378                 }
 379
 380                 switch (stat) {
 381                 case DAVINCI_I2C_IVR_AL:
 382                         dev->cmd_err |= DAVINCI_I2C_STR_AL;
 383                         complete(&dev->cmd_complete);
 384                         break;
 385
 386                 case DAVINCI_I2C_IVR_NACK:
 387                         dev->cmd_err |= DAVINCI_I2C_STR_NACK;
 388                         complete(&dev->cmd_complete);
 389                         break;
 390
 391                 case DAVINCI_I2C_IVR_ARDY:
 392                         davinci_i2c_write_reg(dev,
 393                                 DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_ARDY);
 394                         complete(&dev->cmd_complete);
 395                         break;
 396
 397                 case DAVINCI_I2C_IVR_RDR:
 398                         if (dev->buf_len) {
 399                                 *dev->buf++ =
 400                                     davinci_i2c_read_reg(dev,
 401                                                          DAVINCI_I2C_DRR_REG);
 402                                 dev->buf_len--;
 403                                 if (dev->buf_len)
 404                                         continue;
 405
 406                                 davinci_i2c_write_reg(dev,
 407                                         DAVINCI_I2C_STR_REG,
 408                                         DAVINCI_I2C_IMR_RRDY);
 409                         } else
 410                                 dev_err(dev->dev, "RDR IRQ while no "
 411                                         "data requested\n");
 412                         break;
 413
 414                 case DAVINCI_I2C_IVR_XRDY:
 415                         if (dev->buf_len) {
 416                                 davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG,
 417                                                       *dev->buf++);
 418                                 dev->buf_len--;
 419                                 if (dev->buf_len)
 420                                         continue;
 421
 422                                 w = davinci_i2c_read_reg(dev,
 423                                                          DAVINCI_I2C_IMR_REG);
 424                                 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 0);
 425                                 davinci_i2c_write_reg(dev,
 426                                                       DAVINCI_I2C_IMR_REG,
 427                                                       w);
 428                         } else
 429                                 dev_err(dev->dev, "TDR IRQ while no data to "
 430                                         "send\n");
 431                         break;
 432
 433                 case DAVINCI_I2C_IVR_SCD:
 434                         davinci_i2c_write_reg(dev,
 435                                 DAVINCI_I2C_STR_REG, DAVINCI_I2C_STR_SCD);
 436                         complete(&dev->cmd_complete);
 437                         break;
 438
 439                 case DAVINCI_I2C_IVR_AAS:
 440                         dev_warn(dev->dev, "Address as slave interrupt\n");
 441                 }/* switch */
 442         }/* while */
 443
 444         return count ? IRQ_HANDLED : IRQ_NONE;
 445 }
 446
 447 static struct i2c_algorithm i2c_davinci_algo = {
 448         .master_xfer    = i2c_davinci_xfer,
 449         .functionality  = i2c_davinci_func,
 450 };
 451
 452 static int davinci_i2c_probe(struct platform_device *pdev)
 453 {
 454         struct davinci_i2c_dev *dev;
 455         struct i2c_adapter *adap;
 456         struct resource *mem, *irq, *ioarea;
 457         int r;
 458
 459         /* NOTE: driver uses the static register mapping */
 460         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 461         if (!mem) {
 462                 dev_err(&pdev->dev, "no mem resource?\n");
 463                 return -ENODEV;
 464         }
 465
 466         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 467         if (!irq) {
 468                 dev_err(&pdev->dev, "no irq resource?\n");
 469                 return -ENODEV;
 470         }
 471
 472         ioarea = request_mem_region(mem->start, (mem->end - mem->start) + 1,
 473                                     pdev->name);
 474         if (!ioarea) {
 475                 dev_err(&pdev->dev, "I2C region already claimed\n");
 476                 return -EBUSY;
 477         }
 478
 479         dev = kzalloc(sizeof(struct davinci_i2c_dev), GFP_KERNEL);
 480         if (!dev) {
 481                 r = -ENOMEM;
 482                 goto err_release_region;
 483         }
 484
 485         dev->dev = get_device(&pdev->dev);
 486         dev->irq = irq->start;
 487         platform_set_drvdata(pdev, dev);
 488
 489         dev->clk = clk_get(&pdev->dev, "I2CCLK");
 490         if (IS_ERR(dev->clk)) {
 491                 r = -ENODEV;
 492                 goto err_free_mem;
 493         }
 494         clk_enable(dev->clk);
 495
 496         dev->base = (void __iomem *)IO_ADDRESS(mem->start);
 497         i2c_davinci_init(dev);
 498
 499         r = request_irq(dev->irq, i2c_davinci_isr, 0, pdev->name, dev);
 500         if (r) {
 501                 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
 502                 goto err_unuse_clocks;
 503         }
 504
 505         adap = &dev->adapter;
 506         i2c_set_adapdata(adap, dev);
 507         adap->owner = THIS_MODULE;
 508         adap->class = I2C_CLASS_HWMON;
 509         strlcpy(adap->name, "DaVinci I2C adapter", sizeof(adap->name));
 510         adap->algo = &i2c_davinci_algo;
 511         adap->dev.parent = &pdev->dev;
 512
 513         /* FIXME */
 514         adap->timeout = 1;
 515
 516         adap->nr = pdev->id;
 517         r = i2c_add_numbered_adapter(adap);
 518         if (r) {
 519                 dev_err(&pdev->dev, "failure adding adapter\n");
 520                 goto err_free_irq;
 521         }
 522
 523         return 0;
 524
 525 err_free_irq:
 526         free_irq(dev->irq, dev);
 527 err_unuse_clocks:
 528         clk_disable(dev->clk);
 529         clk_put(dev->clk);
 530         dev->clk = NULL;
 531 err_free_mem:
 532         platform_set_drvdata(pdev, NULL);
 533         put_device(&pdev->dev);
 534         kfree(dev);
 535 err_release_region:
 536         release_mem_region(mem->start, (mem->end - mem->start) + 1);
 537
 538         return r;
 539 }
 540
 541 static int davinci_i2c_remove(struct platform_device *pdev)
 542 {
 543         struct davinci_i2c_dev *dev = platform_get_drvdata(pdev);
 544         struct resource *mem;
 545
 546         platform_set_drvdata(pdev, NULL);
 547         i2c_del_adapter(&dev->adapter);
 548         put_device(&pdev->dev);
 549
 550         clk_disable(dev->clk);
 551         clk_put(dev->clk);
 552         dev->clk = NULL;
 553
 554         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0);
 555         free_irq(IRQ_I2C, dev);
 556         kfree(dev);
 557
 558         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 559         release_mem_region(mem->start, (mem->end - mem->start) + 1);
 560         return 0;
 561 }
 562
 563 /* work with hotplug and coldplug */
 564 MODULE_ALIAS("platform:i2c_davinci");
 565
 566 static struct platform_driver davinci_i2c_driver = {
 567         .probe          = davinci_i2c_probe,
 568         .remove         = davinci_i2c_remove,
 569         .driver         = {
 570                 .name   = "i2c_davinci",
 571                 .owner  = THIS_MODULE,
 572         },
 573 };
 574
 575 /* I2C may be needed to bring up other drivers */
 576 static int __init davinci_i2c_init_driver(void)
 577 {
 578         return platform_driver_register(&davinci_i2c_driver);
 579 }
 580 subsys_initcall(davinci_i2c_init_driver);
 581
 582 static void __exit davinci_i2c_exit_driver(void)
 583 {
 584         platform_driver_unregister(&davinci_i2c_driver);
 585 }
 586 module_exit(davinci_i2c_exit_driver);
 587
 588 MODULE_AUTHOR("Texas Instruments India");
 589 MODULE_DESCRIPTION("TI DaVinci I2C bus adapter");
 590 MODULE_LICENSE("GPL");