2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 Supports following chips:
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
35 For other winbond chips, and for i2c support in the above chips,
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
42 #include <linux/module.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/jiffies.h>
46 #include <linux/platform_device.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-sysfs.h>
49 #include <linux/hwmon-vid.h>
50 #include <linux/err.h>
51 #include <linux/mutex.h>
52 #include <linux/ioport.h>
56 static struct platform_device *pdev;
58 #define DRVNAME "w83627hf"
59 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61 static u16 force_addr;
62 module_param(force_addr, ushort, 0);
63 MODULE_PARM_DESC(force_addr,
64 "Initialize the base address of the sensors");
65 static u8 force_i2c = 0x1f;
66 module_param(force_i2c, byte, 0);
67 MODULE_PARM_DESC(force_i2c,
68 "Initialize the i2c address of the sensors");
71 module_param(reset, bool, 0);
72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
78 /* modified from kernel/include/traps.c */
79 static int REG; /* The register to read/write */
80 #define DEV 0x07 /* Register: Logical device select */
81 static int VAL; /* The value to read/write */
83 /* logical device numbers for superio_select (below) */
84 #define W83627HF_LD_FDC 0x00
85 #define W83627HF_LD_PRT 0x01
86 #define W83627HF_LD_UART1 0x02
87 #define W83627HF_LD_UART2 0x03
88 #define W83627HF_LD_KBC 0x05
89 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
90 #define W83627HF_LD_GAME 0x07
91 #define W83627HF_LD_MIDI 0x07
92 #define W83627HF_LD_GPIO1 0x07
93 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
94 #define W83627HF_LD_GPIO2 0x08
95 #define W83627HF_LD_GPIO3 0x09
96 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
97 #define W83627HF_LD_ACPI 0x0a
98 #define W83627HF_LD_HWM 0x0b
100 #define DEVID 0x20 /* Register: Device ID */
102 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
103 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
104 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
106 #define W83687THF_VID_EN 0x29 /* w83687thf only */
107 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
108 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111 superio_outb(int reg, int val)
125 superio_select(int ld)
144 #define W627_DEVID 0x52
145 #define W627THF_DEVID 0x82
146 #define W697_DEVID 0x60
147 #define W637_DEVID 0x70
148 #define W687THF_DEVID 0x85
149 #define WINB_ACT_REG 0x30
150 #define WINB_BASE_REG 0x60
151 /* Constants specified below */
153 /* Alignment of the base address */
154 #define WINB_ALIGNMENT ~7
156 /* Offset & size of I/O region we are interested in */
157 #define WINB_REGION_OFFSET 5
158 #define WINB_REGION_SIZE 2
160 /* Where are the sensors address/data registers relative to the region offset */
161 #define W83781D_ADDR_REG_OFFSET 0
162 #define W83781D_DATA_REG_OFFSET 1
164 /* The W83781D registers */
165 /* The W83782D registers for nr=7,8 are in bank 5 */
166 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
167 (0x554 + (((nr) - 7) * 2)))
168 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
169 (0x555 + (((nr) - 7) * 2)))
170 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
173 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
174 #define W83781D_REG_FAN(nr) (0x27 + (nr))
176 #define W83781D_REG_TEMP2_CONFIG 0x152
177 #define W83781D_REG_TEMP3_CONFIG 0x252
178 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
179 ((nr == 2) ? (0x0150) : \
181 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
182 ((nr == 2) ? (0x153) : \
184 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
185 ((nr == 2) ? (0x155) : \
188 #define W83781D_REG_BANK 0x4E
190 #define W83781D_REG_CONFIG 0x40
191 #define W83781D_REG_ALARM1 0x459
192 #define W83781D_REG_ALARM2 0x45A
193 #define W83781D_REG_ALARM3 0x45B
195 #define W83781D_REG_BEEP_CONFIG 0x4D
196 #define W83781D_REG_BEEP_INTS1 0x56
197 #define W83781D_REG_BEEP_INTS2 0x57
198 #define W83781D_REG_BEEP_INTS3 0x453
200 #define W83781D_REG_VID_FANDIV 0x47
202 #define W83781D_REG_CHIPID 0x49
203 #define W83781D_REG_WCHIPID 0x58
204 #define W83781D_REG_CHIPMAN 0x4F
205 #define W83781D_REG_PIN 0x4B
207 #define W83781D_REG_VBAT 0x5D
209 #define W83627HF_REG_PWM1 0x5A
210 #define W83627HF_REG_PWM2 0x5B
212 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
213 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
214 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
216 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
218 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
219 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
220 W83627THF_REG_PWM3 };
221 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
222 regpwm_627hf[nr] : regpwm[nr])
224 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
226 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
227 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
228 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
230 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
231 W83637HF_REG_PWM_FREQ2,
232 W83637HF_REG_PWM_FREQ3 };
234 #define W83627HF_BASE_PWM_FREQ 46870
236 #define W83781D_REG_I2C_ADDR 0x48
237 #define W83781D_REG_I2C_SUBADDR 0x4A
239 /* Sensor selection */
240 #define W83781D_REG_SCFG1 0x5D
241 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
242 #define W83781D_REG_SCFG2 0x59
243 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
244 #define W83781D_DEFAULT_BETA 3435
246 /* Conversions. Limit checking is only done on the TO_REG
247 variants. Note that you should be a bit careful with which arguments
248 these macros are called: arguments may be evaluated more than once.
249 Fixing this is just not worth it. */
250 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
251 #define IN_FROM_REG(val) ((val) * 16)
253 static inline u8 FAN_TO_REG(long rpm, int div)
257 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
258 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
262 #define TEMP_MIN (-128000)
263 #define TEMP_MAX ( 127000)
265 /* TEMP: 0.001C/bit (-128C to +127C)
266 REG: 1C/bit, two's complement */
267 static u8 TEMP_TO_REG(long temp)
269 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
270 ntemp += (ntemp<0 ? -500 : 500);
271 return (u8)(ntemp / 1000);
274 static int TEMP_FROM_REG(u8 reg)
276 return (s8)reg * 1000;
279 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
281 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
283 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
286 freq = W83627HF_BASE_PWM_FREQ >> reg;
289 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
292 /* Only 5 dividers (1 2 4 8 16)
293 Search for the nearest available frequency */
294 for (i = 0; i < 4; i++) {
295 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
296 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
302 static inline unsigned long pwm_freq_from_reg(u8 reg)
304 /* Clock bit 8 -> 180 kHz or 24 MHz */
305 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
308 /* This should not happen but anyway... */
311 return (clock / (reg << 8));
313 static inline u8 pwm_freq_to_reg(unsigned long val)
315 /* Minimum divider value is 0x01 and maximum is 0x7F */
316 if (val >= 93750) /* The highest we can do */
318 if (val >= 720) /* Use 24 MHz clock */
319 return (24000000UL / (val << 8));
320 if (val < 6) /* The lowest we can do */
322 else /* Use 180 kHz clock */
323 return (0x80 | (180000UL / (val << 8)));
326 #define BEEP_MASK_FROM_REG(val) (val)
327 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
328 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
329 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
331 #define DIV_FROM_REG(val) (1 << (val))
333 static inline u8 DIV_TO_REG(long val)
336 val = SENSORS_LIMIT(val, 1, 128) >> 1;
337 for (i = 0; i < 7; i++) {
345 /* For each registered chip, we need to keep some data in memory.
346 The structure is dynamically allocated. */
347 struct w83627hf_data {
350 struct device *hwmon_dev;
354 struct mutex update_lock;
355 char valid; /* !=0 if following fields are valid */
356 unsigned long last_updated; /* In jiffies */
358 u8 in[9]; /* Register value */
359 u8 in_max[9]; /* Register value */
360 u8 in_min[9]; /* Register value */
361 u8 fan[3]; /* Register value */
362 u8 fan_min[3]; /* Register value */
364 u8 temp_max; /* Register value */
365 u8 temp_max_hyst; /* Register value */
366 u16 temp_add[2]; /* Register value */
367 u16 temp_max_add[2]; /* Register value */
368 u16 temp_max_hyst_add[2]; /* Register value */
369 u8 fan_div[3]; /* Register encoding, shifted right */
370 u8 vid; /* Register encoding, combined */
371 u32 alarms; /* Register encoding, combined */
372 u32 beep_mask; /* Register encoding, combined */
373 u8 beep_enable; /* Boolean */
374 u8 pwm[3]; /* Register value */
375 u8 pwm_freq[3]; /* Register value */
376 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
382 struct w83627hf_sio_data {
387 static int w83627hf_probe(struct platform_device *pdev);
388 static int __devexit w83627hf_remove(struct platform_device *pdev);
390 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
391 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
392 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
393 static void w83627hf_init_device(struct platform_device *pdev);
395 static struct platform_driver w83627hf_driver = {
397 .owner = THIS_MODULE,
400 .probe = w83627hf_probe,
401 .remove = __devexit_p(w83627hf_remove),
405 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
407 int nr = to_sensor_dev_attr(devattr)->index;
408 struct w83627hf_data *data = w83627hf_update_device(dev);
409 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
412 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
414 int nr = to_sensor_dev_attr(devattr)->index;
415 struct w83627hf_data *data = w83627hf_update_device(dev);
416 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
419 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
421 int nr = to_sensor_dev_attr(devattr)->index;
422 struct w83627hf_data *data = w83627hf_update_device(dev);
423 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
426 store_in_min(struct device *dev, struct device_attribute *devattr,
427 const char *buf, size_t count)
429 int nr = to_sensor_dev_attr(devattr)->index;
430 struct w83627hf_data *data = dev_get_drvdata(dev);
431 long val = simple_strtol(buf, NULL, 10);
433 mutex_lock(&data->update_lock);
434 data->in_min[nr] = IN_TO_REG(val);
435 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
436 mutex_unlock(&data->update_lock);
440 store_in_max(struct device *dev, struct device_attribute *devattr,
441 const char *buf, size_t count)
443 int nr = to_sensor_dev_attr(devattr)->index;
444 struct w83627hf_data *data = dev_get_drvdata(dev);
445 long val = simple_strtol(buf, NULL, 10);
447 mutex_lock(&data->update_lock);
448 data->in_max[nr] = IN_TO_REG(val);
449 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
450 mutex_unlock(&data->update_lock);
453 #define sysfs_vin_decl(offset) \
454 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
455 show_in_input, NULL, offset); \
456 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
457 show_in_min, store_in_min, offset); \
458 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
459 show_in_max, store_in_max, offset);
470 /* use a different set of functions for in0 */
471 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
475 if ((data->vrm_ovt & 0x01) &&
476 (w83627thf == data->type || w83637hf == data->type
477 || w83687thf == data->type))
479 /* use VRM9 calculation */
480 in0 = (long)((reg * 488 + 70000 + 50) / 100);
482 /* use VRM8 (standard) calculation */
483 in0 = (long)IN_FROM_REG(reg);
485 return sprintf(buf,"%ld\n", in0);
488 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
490 struct w83627hf_data *data = w83627hf_update_device(dev);
491 return show_in_0(data, buf, data->in[0]);
494 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
496 struct w83627hf_data *data = w83627hf_update_device(dev);
497 return show_in_0(data, buf, data->in_min[0]);
500 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
502 struct w83627hf_data *data = w83627hf_update_device(dev);
503 return show_in_0(data, buf, data->in_max[0]);
506 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
507 const char *buf, size_t count)
509 struct w83627hf_data *data = dev_get_drvdata(dev);
512 val = simple_strtoul(buf, NULL, 10);
514 mutex_lock(&data->update_lock);
516 if ((data->vrm_ovt & 0x01) &&
517 (w83627thf == data->type || w83637hf == data->type
518 || w83687thf == data->type))
520 /* use VRM9 calculation */
522 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
525 /* use VRM8 (standard) calculation */
526 data->in_min[0] = IN_TO_REG(val);
528 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
529 mutex_unlock(&data->update_lock);
533 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
534 const char *buf, size_t count)
536 struct w83627hf_data *data = dev_get_drvdata(dev);
539 val = simple_strtoul(buf, NULL, 10);
541 mutex_lock(&data->update_lock);
543 if ((data->vrm_ovt & 0x01) &&
544 (w83627thf == data->type || w83637hf == data->type
545 || w83687thf == data->type))
547 /* use VRM9 calculation */
549 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
552 /* use VRM8 (standard) calculation */
553 data->in_max[0] = IN_TO_REG(val);
555 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
556 mutex_unlock(&data->update_lock);
560 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
561 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
562 show_regs_in_min0, store_regs_in_min0);
563 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
564 show_regs_in_max0, store_regs_in_max0);
567 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
569 int nr = to_sensor_dev_attr(devattr)->index;
570 struct w83627hf_data *data = w83627hf_update_device(dev);
571 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
572 (long)DIV_FROM_REG(data->fan_div[nr])));
575 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
577 int nr = to_sensor_dev_attr(devattr)->index;
578 struct w83627hf_data *data = w83627hf_update_device(dev);
579 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
580 (long)DIV_FROM_REG(data->fan_div[nr])));
583 store_fan_min(struct device *dev, struct device_attribute *devattr,
584 const char *buf, size_t count)
586 int nr = to_sensor_dev_attr(devattr)->index;
587 struct w83627hf_data *data = dev_get_drvdata(dev);
588 u32 val = simple_strtoul(buf, NULL, 10);
590 mutex_lock(&data->update_lock);
591 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
592 w83627hf_write_value(data, W83781D_REG_FAN_MIN(nr+1),
595 mutex_unlock(&data->update_lock);
598 #define sysfs_fan_decl(offset) \
599 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
600 show_fan_input, NULL, offset - 1); \
601 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
602 show_fan_min, store_fan_min, offset - 1);
609 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
611 int nr = to_sensor_dev_attr(devattr)->index;
612 struct w83627hf_data *data = w83627hf_update_device(dev);
613 if (nr >= 2) { /* TEMP2 and TEMP3 */
614 return sprintf(buf, "%ld\n",
615 (long)LM75_TEMP_FROM_REG(data->temp_add[nr-2]));
617 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->temp));
622 show_temp_max(struct device *dev, struct device_attribute *devattr,
625 int nr = to_sensor_dev_attr(devattr)->index;
626 struct w83627hf_data *data = w83627hf_update_device(dev);
627 if (nr >= 2) { /* TEMP2 and TEMP3 */
628 return sprintf(buf, "%ld\n",
629 (long)LM75_TEMP_FROM_REG(data->temp_max_add[nr-2]));
631 return sprintf(buf, "%ld\n",
632 (long)TEMP_FROM_REG(data->temp_max));
637 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
640 int nr = to_sensor_dev_attr(devattr)->index;
641 struct w83627hf_data *data = w83627hf_update_device(dev);
642 if (nr >= 2) { /* TEMP2 and TEMP3 */
643 return sprintf(buf, "%ld\n",
644 (long)LM75_TEMP_FROM_REG(data->temp_max_hyst_add[nr-2]));
646 return sprintf(buf, "%ld\n",
647 (long)TEMP_FROM_REG(data->temp_max_hyst));
652 store_temp_max(struct device *dev, struct device_attribute *devattr,
653 const char *buf, size_t count)
655 int nr = to_sensor_dev_attr(devattr)->index;
656 struct w83627hf_data *data = dev_get_drvdata(dev);
657 long val = simple_strtol(buf, NULL, 10);
659 mutex_lock(&data->update_lock);
661 if (nr >= 2) { /* TEMP2 and TEMP3 */
662 data->temp_max_add[nr-2] = LM75_TEMP_TO_REG(val);
663 w83627hf_write_value(data, W83781D_REG_TEMP_OVER(nr),
664 data->temp_max_add[nr-2]);
666 data->temp_max = TEMP_TO_REG(val);
667 w83627hf_write_value(data, W83781D_REG_TEMP_OVER(nr),
670 mutex_unlock(&data->update_lock);
675 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
676 const char *buf, size_t count)
678 int nr = to_sensor_dev_attr(devattr)->index;
679 struct w83627hf_data *data = dev_get_drvdata(dev);
680 long val = simple_strtol(buf, NULL, 10);
682 mutex_lock(&data->update_lock);
684 if (nr >= 2) { /* TEMP2 and TEMP3 */
685 data->temp_max_hyst_add[nr-2] = LM75_TEMP_TO_REG(val);
686 w83627hf_write_value(data, W83781D_REG_TEMP_HYST(nr),
687 data->temp_max_hyst_add[nr-2]);
689 data->temp_max_hyst = TEMP_TO_REG(val);
690 w83627hf_write_value(data, W83781D_REG_TEMP_HYST(nr),
691 data->temp_max_hyst);
693 mutex_unlock(&data->update_lock);
697 #define sysfs_temp_decl(offset) \
698 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
699 show_temp, NULL, offset); \
700 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
701 show_temp_max, store_temp_max, offset); \
702 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
703 show_temp_max_hyst, store_temp_max_hyst, offset);
710 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
712 struct w83627hf_data *data = w83627hf_update_device(dev);
713 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
715 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
718 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
720 struct w83627hf_data *data = dev_get_drvdata(dev);
721 return sprintf(buf, "%ld\n", (long) data->vrm);
724 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
726 struct w83627hf_data *data = dev_get_drvdata(dev);
729 val = simple_strtoul(buf, NULL, 10);
734 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
737 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
739 struct w83627hf_data *data = w83627hf_update_device(dev);
740 return sprintf(buf, "%ld\n", (long) data->alarms);
742 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
744 #define show_beep_reg(REG, reg) \
745 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
747 struct w83627hf_data *data = w83627hf_update_device(dev); \
748 return sprintf(buf,"%ld\n", \
749 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
751 show_beep_reg(ENABLE, enable)
752 show_beep_reg(MASK, mask)
754 #define BEEP_ENABLE 0 /* Store beep_enable */
755 #define BEEP_MASK 1 /* Store beep_mask */
758 store_beep_reg(struct device *dev, const char *buf, size_t count,
761 struct w83627hf_data *data = dev_get_drvdata(dev);
764 val = simple_strtoul(buf, NULL, 10);
766 mutex_lock(&data->update_lock);
768 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
769 data->beep_mask = BEEP_MASK_TO_REG(val);
770 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
771 data->beep_mask & 0xff);
772 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
773 ((data->beep_mask) >> 16) & 0xff);
774 val2 = (data->beep_mask >> 8) & 0x7f;
775 } else { /* We are storing beep_enable */
777 w83627hf_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
778 data->beep_enable = BEEP_ENABLE_TO_REG(val);
781 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
782 val2 | data->beep_enable << 7);
784 mutex_unlock(&data->update_lock);
788 #define sysfs_beep(REG, reg) \
789 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
791 return show_beep_##reg(dev, attr, buf); \
794 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
796 return store_beep_reg(dev, buf, count, BEEP_##REG); \
798 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
799 show_regs_beep_##reg, store_regs_beep_##reg);
801 sysfs_beep(ENABLE, enable);
802 sysfs_beep(MASK, mask);
805 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
807 int nr = to_sensor_dev_attr(devattr)->index;
808 struct w83627hf_data *data = w83627hf_update_device(dev);
809 return sprintf(buf, "%ld\n",
810 (long) DIV_FROM_REG(data->fan_div[nr]));
812 /* Note: we save and restore the fan minimum here, because its value is
813 determined in part by the fan divisor. This follows the principle of
814 least surprise; the user doesn't expect the fan minimum to change just
815 because the divisor changed. */
817 store_fan_div(struct device *dev, struct device_attribute *devattr,
818 const char *buf, size_t count)
820 int nr = to_sensor_dev_attr(devattr)->index;
821 struct w83627hf_data *data = dev_get_drvdata(dev);
824 unsigned long val = simple_strtoul(buf, NULL, 10);
826 mutex_lock(&data->update_lock);
829 min = FAN_FROM_REG(data->fan_min[nr],
830 DIV_FROM_REG(data->fan_div[nr]));
832 data->fan_div[nr] = DIV_TO_REG(val);
834 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
835 & (nr==0 ? 0xcf : 0x3f))
836 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
837 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
839 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
841 | ((data->fan_div[nr] & 0x04) << (3 + nr));
842 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
844 /* Restore fan_min */
845 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
846 w83627hf_write_value(data, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
848 mutex_unlock(&data->update_lock);
852 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
853 show_fan_div, store_fan_div, 0);
854 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
855 show_fan_div, store_fan_div, 1);
856 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
857 show_fan_div, store_fan_div, 2);
860 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
862 int nr = to_sensor_dev_attr(devattr)->index;
863 struct w83627hf_data *data = w83627hf_update_device(dev);
864 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
868 store_pwm(struct device *dev, struct device_attribute *devattr,
869 const char *buf, size_t count)
871 int nr = to_sensor_dev_attr(devattr)->index;
872 struct w83627hf_data *data = dev_get_drvdata(dev);
873 u32 val = simple_strtoul(buf, NULL, 10);
875 mutex_lock(&data->update_lock);
877 if (data->type == w83627thf) {
878 /* bits 0-3 are reserved in 627THF */
879 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
880 w83627hf_write_value(data,
881 W836X7HF_REG_PWM(data->type, nr),
883 (w83627hf_read_value(data,
884 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
886 data->pwm[nr] = PWM_TO_REG(val);
887 w83627hf_write_value(data,
888 W836X7HF_REG_PWM(data->type, nr),
892 mutex_unlock(&data->update_lock);
896 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
897 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
898 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
901 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
903 int nr = to_sensor_dev_attr(devattr)->index;
904 struct w83627hf_data *data = w83627hf_update_device(dev);
905 if (data->type == w83627hf)
906 return sprintf(buf, "%ld\n",
907 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
909 return sprintf(buf, "%ld\n",
910 pwm_freq_from_reg(data->pwm_freq[nr]));
914 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
915 const char *buf, size_t count)
917 int nr = to_sensor_dev_attr(devattr)->index;
918 struct w83627hf_data *data = dev_get_drvdata(dev);
919 static const u8 mask[]={0xF8, 0x8F};
922 val = simple_strtoul(buf, NULL, 10);
924 mutex_lock(&data->update_lock);
926 if (data->type == w83627hf) {
927 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
928 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
929 (data->pwm_freq[nr] << (nr*4)) |
930 (w83627hf_read_value(data,
931 W83627HF_REG_PWM_FREQ) & mask[nr]));
933 data->pwm_freq[nr] = pwm_freq_to_reg(val);
934 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
938 mutex_unlock(&data->update_lock);
942 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
943 show_pwm_freq, store_pwm_freq, 0);
944 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
945 show_pwm_freq, store_pwm_freq, 1);
946 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
947 show_pwm_freq, store_pwm_freq, 2);
950 show_temp_type(struct device *dev, struct device_attribute *devattr,
953 int nr = to_sensor_dev_attr(devattr)->index;
954 struct w83627hf_data *data = w83627hf_update_device(dev);
955 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
959 store_temp_type(struct device *dev, struct device_attribute *devattr,
960 const char *buf, size_t count)
962 int nr = to_sensor_dev_attr(devattr)->index;
963 struct w83627hf_data *data = dev_get_drvdata(dev);
966 val = simple_strtoul(buf, NULL, 10);
968 mutex_lock(&data->update_lock);
971 case 1: /* PII/Celeron diode */
972 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
973 w83627hf_write_value(data, W83781D_REG_SCFG1,
974 tmp | BIT_SCFG1[nr]);
975 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
976 w83627hf_write_value(data, W83781D_REG_SCFG2,
977 tmp | BIT_SCFG2[nr]);
978 data->sens[nr] = val;
981 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
982 w83627hf_write_value(data, W83781D_REG_SCFG1,
983 tmp | BIT_SCFG1[nr]);
984 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
985 w83627hf_write_value(data, W83781D_REG_SCFG2,
986 tmp & ~BIT_SCFG2[nr]);
987 data->sens[nr] = val;
989 case W83781D_DEFAULT_BETA:
990 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
991 "instead\n", W83781D_DEFAULT_BETA);
993 case 4: /* thermistor */
994 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
995 w83627hf_write_value(data, W83781D_REG_SCFG1,
996 tmp & ~BIT_SCFG1[nr]);
997 data->sens[nr] = val;
1001 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1006 mutex_unlock(&data->update_lock);
1010 #define sysfs_temp_type(offset) \
1011 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1012 show_temp_type, store_temp_type, offset - 1);
1019 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1021 struct w83627hf_data *data = dev_get_drvdata(dev);
1023 return sprintf(buf, "%s\n", data->name);
1025 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1027 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1028 struct w83627hf_sio_data *sio_data)
1033 static const __initdata char *names[] = {
1045 val= superio_inb(DEVID);
1048 sio_data->type = w83627hf;
1051 sio_data->type = w83627thf;
1054 sio_data->type = w83697hf;
1057 sio_data->type = w83637hf;
1060 sio_data->type = w83687thf;
1062 case 0xff: /* No device at all */
1065 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1069 superio_select(W83627HF_LD_HWM);
1070 force_addr &= WINB_ALIGNMENT;
1072 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1074 superio_outb(WINB_BASE_REG, force_addr >> 8);
1075 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1077 val = (superio_inb(WINB_BASE_REG) << 8) |
1078 superio_inb(WINB_BASE_REG + 1);
1079 *addr = val & WINB_ALIGNMENT;
1081 printk(KERN_WARNING DRVNAME ": Base address not set, "
1086 val = superio_inb(WINB_ACT_REG);
1087 if (!(val & 0x01)) {
1088 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1089 superio_outb(WINB_ACT_REG, val | 0x01);
1093 pr_info(DRVNAME ": Found %s chip at %#x\n",
1094 names[sio_data->type], *addr);
1101 #define VIN_UNIT_ATTRS(_X_) \
1102 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1103 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1104 &sensor_dev_attr_in##_X_##_max.dev_attr.attr
1106 #define FAN_UNIT_ATTRS(_X_) \
1107 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1108 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1109 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr
1111 #define TEMP_UNIT_ATTRS(_X_) \
1112 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1113 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1114 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1115 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr
1117 static struct attribute *w83627hf_attributes[] = {
1118 &dev_attr_in0_input.attr,
1119 &dev_attr_in0_min.attr,
1120 &dev_attr_in0_max.attr,
1133 &dev_attr_alarms.attr,
1134 &dev_attr_beep_enable.attr,
1135 &dev_attr_beep_mask.attr,
1137 &sensor_dev_attr_pwm1.dev_attr.attr,
1138 &sensor_dev_attr_pwm2.dev_attr.attr,
1139 &dev_attr_name.attr,
1143 static const struct attribute_group w83627hf_group = {
1144 .attrs = w83627hf_attributes,
1147 static struct attribute *w83627hf_attributes_opt[] = {
1154 &sensor_dev_attr_pwm3.dev_attr.attr,
1156 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1157 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1158 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1162 static const struct attribute_group w83627hf_group_opt = {
1163 .attrs = w83627hf_attributes_opt,
1166 static int __devinit w83627hf_probe(struct platform_device *pdev)
1168 struct device *dev = &pdev->dev;
1169 struct w83627hf_sio_data *sio_data = dev->platform_data;
1170 struct w83627hf_data *data;
1171 struct resource *res;
1174 static const char *names[] = {
1182 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1183 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1184 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1185 (unsigned long)res->start,
1186 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1191 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1195 data->addr = res->start;
1196 data->type = sio_data->type;
1197 data->name = names[sio_data->type];
1198 mutex_init(&data->lock);
1199 mutex_init(&data->update_lock);
1200 platform_set_drvdata(pdev, data);
1202 /* Initialize the chip */
1203 w83627hf_init_device(pdev);
1205 /* A few vars need to be filled upon startup */
1206 data->fan_min[0] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(1));
1207 data->fan_min[1] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(2));
1208 data->fan_min[2] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(3));
1210 /* Register common device attributes */
1211 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1214 /* Register chip-specific device attributes */
1215 if (data->type == w83627hf || data->type == w83697hf)
1216 if ((err = device_create_file(dev,
1217 &sensor_dev_attr_in5_input.dev_attr))
1218 || (err = device_create_file(dev,
1219 &sensor_dev_attr_in5_min.dev_attr))
1220 || (err = device_create_file(dev,
1221 &sensor_dev_attr_in5_max.dev_attr))
1222 || (err = device_create_file(dev,
1223 &sensor_dev_attr_in6_input.dev_attr))
1224 || (err = device_create_file(dev,
1225 &sensor_dev_attr_in6_min.dev_attr))
1226 || (err = device_create_file(dev,
1227 &sensor_dev_attr_in6_max.dev_attr))
1228 || (err = device_create_file(dev,
1229 &sensor_dev_attr_pwm1_freq.dev_attr))
1230 || (err = device_create_file(dev,
1231 &sensor_dev_attr_pwm2_freq.dev_attr)))
1234 if (data->type != w83697hf)
1235 if ((err = device_create_file(dev,
1236 &sensor_dev_attr_in1_input.dev_attr))
1237 || (err = device_create_file(dev,
1238 &sensor_dev_attr_in1_min.dev_attr))
1239 || (err = device_create_file(dev,
1240 &sensor_dev_attr_in1_max.dev_attr))
1241 || (err = device_create_file(dev,
1242 &sensor_dev_attr_fan3_input.dev_attr))
1243 || (err = device_create_file(dev,
1244 &sensor_dev_attr_fan3_min.dev_attr))
1245 || (err = device_create_file(dev,
1246 &sensor_dev_attr_fan3_div.dev_attr))
1247 || (err = device_create_file(dev,
1248 &sensor_dev_attr_temp3_input.dev_attr))
1249 || (err = device_create_file(dev,
1250 &sensor_dev_attr_temp3_max.dev_attr))
1251 || (err = device_create_file(dev,
1252 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1253 || (err = device_create_file(dev,
1254 &sensor_dev_attr_temp3_type.dev_attr)))
1257 if (data->type != w83697hf && data->vid != 0xff) {
1258 /* Convert VID to voltage based on VRM */
1259 data->vrm = vid_which_vrm();
1261 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1262 || (err = device_create_file(dev, &dev_attr_vrm)))
1266 if (data->type == w83627thf || data->type == w83637hf
1267 || data->type == w83687thf)
1268 if ((err = device_create_file(dev,
1269 &sensor_dev_attr_pwm3.dev_attr)))
1272 if (data->type == w83637hf || data->type == w83687thf)
1273 if ((err = device_create_file(dev,
1274 &sensor_dev_attr_pwm1_freq.dev_attr))
1275 || (err = device_create_file(dev,
1276 &sensor_dev_attr_pwm2_freq.dev_attr))
1277 || (err = device_create_file(dev,
1278 &sensor_dev_attr_pwm3_freq.dev_attr)))
1281 data->hwmon_dev = hwmon_device_register(dev);
1282 if (IS_ERR(data->hwmon_dev)) {
1283 err = PTR_ERR(data->hwmon_dev);
1290 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1291 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1293 platform_set_drvdata(pdev, NULL);
1296 release_region(res->start, WINB_REGION_SIZE);
1301 static int __devexit w83627hf_remove(struct platform_device *pdev)
1303 struct w83627hf_data *data = platform_get_drvdata(pdev);
1304 struct resource *res;
1306 hwmon_device_unregister(data->hwmon_dev);
1308 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1309 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1310 platform_set_drvdata(pdev, NULL);
1313 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1314 release_region(res->start, WINB_REGION_SIZE);
1320 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1322 int res, word_sized;
1324 mutex_lock(&data->lock);
1325 word_sized = (((reg & 0xff00) == 0x100)
1326 || ((reg & 0xff00) == 0x200))
1327 && (((reg & 0x00ff) == 0x50)
1328 || ((reg & 0x00ff) == 0x53)
1329 || ((reg & 0x00ff) == 0x55));
1331 outb_p(W83781D_REG_BANK,
1332 data->addr + W83781D_ADDR_REG_OFFSET);
1334 data->addr + W83781D_DATA_REG_OFFSET);
1336 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1337 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1339 outb_p((reg & 0xff) + 1,
1340 data->addr + W83781D_ADDR_REG_OFFSET);
1342 (res << 8) + inb_p(data->addr +
1343 W83781D_DATA_REG_OFFSET);
1346 outb_p(W83781D_REG_BANK,
1347 data->addr + W83781D_ADDR_REG_OFFSET);
1348 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1350 mutex_unlock(&data->lock);
1354 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1356 int res = 0xff, sel;
1359 superio_select(W83627HF_LD_GPIO5);
1361 /* Make sure these GPIO pins are enabled */
1362 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1363 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1367 /* Make sure the pins are configured for input
1368 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1369 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f;
1370 if ((sel & 0x1f) != 0x1f) {
1371 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1376 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1377 res = superio_inb(W83627THF_GPIO5_DR) & sel;
1384 static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1389 superio_select(W83627HF_LD_HWM);
1391 /* Make sure these GPIO pins are enabled */
1392 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) {
1393 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1397 /* Make sure the pins are configured for input */
1398 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) {
1399 dev_dbg(&pdev->dev, "VID configured as output, "
1400 "no VID function\n");
1404 res = superio_inb(W83687THF_VID_DATA) & 0x3f;
1411 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1415 mutex_lock(&data->lock);
1416 word_sized = (((reg & 0xff00) == 0x100)
1417 || ((reg & 0xff00) == 0x200))
1418 && (((reg & 0x00ff) == 0x53)
1419 || ((reg & 0x00ff) == 0x55));
1421 outb_p(W83781D_REG_BANK,
1422 data->addr + W83781D_ADDR_REG_OFFSET);
1424 data->addr + W83781D_DATA_REG_OFFSET);
1426 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1429 data->addr + W83781D_DATA_REG_OFFSET);
1430 outb_p((reg & 0xff) + 1,
1431 data->addr + W83781D_ADDR_REG_OFFSET);
1433 outb_p(value & 0xff,
1434 data->addr + W83781D_DATA_REG_OFFSET);
1436 outb_p(W83781D_REG_BANK,
1437 data->addr + W83781D_ADDR_REG_OFFSET);
1438 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1440 mutex_unlock(&data->lock);
1444 static void __devinit w83627hf_init_device(struct platform_device *pdev)
1446 struct w83627hf_data *data = platform_get_drvdata(pdev);
1448 enum chips type = data->type;
1452 /* Resetting the chip has been the default for a long time,
1453 but repeatedly caused problems (fans going to full
1454 speed...) so it is now optional. It might even go away if
1455 nobody reports it as being useful, as I see very little
1456 reason why this would be needed at all. */
1457 dev_info(&pdev->dev, "If reset=1 solved a problem you were "
1458 "having, please report!\n");
1460 /* save this register */
1461 i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG);
1462 /* Reset all except Watchdog values and last conversion values
1463 This sets fan-divs to 2, among others */
1464 w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80);
1465 /* Restore the register and disable power-on abnormal beep.
1466 This saves FAN 1/2/3 input/output values set by BIOS. */
1467 w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1468 /* Disable master beep-enable (reset turns it on).
1469 Individual beeps should be reset to off but for some reason
1470 disabling this bit helps some people not get beeped */
1471 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1474 /* Minimize conflicts with other winbond i2c-only clients... */
1475 /* disable i2c subclients... how to disable main i2c client?? */
1476 /* force i2c address to relatively uncommon address */
1477 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1478 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1480 /* Read VID only once */
1481 if (type == w83627hf || type == w83637hf) {
1482 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1483 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1484 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1485 } else if (type == w83627thf) {
1486 data->vid = w83627thf_read_gpio5(pdev);
1487 } else if (type == w83687thf) {
1488 data->vid = w83687thf_read_vid(pdev);
1491 /* Read VRM & OVT Config only once */
1492 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1494 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1497 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1498 for (i = 1; i <= 3; i++) {
1499 if (!(tmp & BIT_SCFG1[i - 1])) {
1500 data->sens[i - 1] = 4;
1502 if (w83627hf_read_value
1504 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1505 data->sens[i - 1] = 1;
1507 data->sens[i - 1] = 2;
1509 if ((type == w83697hf) && (i == 2))
1515 tmp = w83627hf_read_value(data, W83781D_REG_TEMP2_CONFIG);
1517 dev_warn(&pdev->dev, "Enabling temp2, readings "
1518 "might not make sense\n");
1519 w83627hf_write_value(data, W83781D_REG_TEMP2_CONFIG,
1524 if (type != w83697hf) {
1525 tmp = w83627hf_read_value(data,
1526 W83781D_REG_TEMP3_CONFIG);
1528 dev_warn(&pdev->dev, "Enabling temp3, "
1529 "readings might not make sense\n");
1530 w83627hf_write_value(data,
1531 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1536 /* Start monitoring */
1537 w83627hf_write_value(data, W83781D_REG_CONFIG,
1538 (w83627hf_read_value(data,
1539 W83781D_REG_CONFIG) & 0xf7)
1543 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1545 struct w83627hf_data *data = dev_get_drvdata(dev);
1548 mutex_lock(&data->update_lock);
1550 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1552 for (i = 0; i <= 8; i++) {
1553 /* skip missing sensors */
1554 if (((data->type == w83697hf) && (i == 1)) ||
1555 ((data->type != w83627hf && data->type != w83697hf)
1556 && (i == 5 || i == 6)))
1559 w83627hf_read_value(data, W83781D_REG_IN(i));
1561 w83627hf_read_value(data,
1562 W83781D_REG_IN_MIN(i));
1564 w83627hf_read_value(data,
1565 W83781D_REG_IN_MAX(i));
1567 for (i = 1; i <= 3; i++) {
1569 w83627hf_read_value(data, W83781D_REG_FAN(i));
1570 data->fan_min[i - 1] =
1571 w83627hf_read_value(data,
1572 W83781D_REG_FAN_MIN(i));
1574 for (i = 0; i <= 2; i++) {
1575 u8 tmp = w83627hf_read_value(data,
1576 W836X7HF_REG_PWM(data->type, i));
1577 /* bits 0-3 are reserved in 627THF */
1578 if (data->type == w83627thf)
1582 (data->type == w83627hf || data->type == w83697hf))
1585 if (data->type == w83627hf) {
1586 u8 tmp = w83627hf_read_value(data,
1587 W83627HF_REG_PWM_FREQ);
1588 data->pwm_freq[0] = tmp & 0x07;
1589 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1590 } else if (data->type != w83627thf) {
1591 for (i = 1; i <= 3; i++) {
1592 data->pwm_freq[i - 1] =
1593 w83627hf_read_value(data,
1594 W83637HF_REG_PWM_FREQ[i - 1]);
1595 if (i == 2 && (data->type == w83697hf))
1600 data->temp = w83627hf_read_value(data, W83781D_REG_TEMP(1));
1602 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(1));
1603 data->temp_max_hyst =
1604 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(1));
1606 w83627hf_read_value(data, W83781D_REG_TEMP(2));
1607 data->temp_max_add[0] =
1608 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(2));
1609 data->temp_max_hyst_add[0] =
1610 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(2));
1611 if (data->type != w83697hf) {
1613 w83627hf_read_value(data, W83781D_REG_TEMP(3));
1614 data->temp_max_add[1] =
1615 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(3));
1616 data->temp_max_hyst_add[1] =
1617 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(3));
1620 i = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1621 data->fan_div[0] = (i >> 4) & 0x03;
1622 data->fan_div[1] = (i >> 6) & 0x03;
1623 if (data->type != w83697hf) {
1624 data->fan_div[2] = (w83627hf_read_value(data,
1625 W83781D_REG_PIN) >> 6) & 0x03;
1627 i = w83627hf_read_value(data, W83781D_REG_VBAT);
1628 data->fan_div[0] |= (i >> 3) & 0x04;
1629 data->fan_div[1] |= (i >> 4) & 0x04;
1630 if (data->type != w83697hf)
1631 data->fan_div[2] |= (i >> 5) & 0x04;
1633 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1634 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1635 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1636 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1637 data->beep_enable = i >> 7;
1638 data->beep_mask = ((i & 0x7f) << 8) |
1639 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1640 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1641 data->last_updated = jiffies;
1645 mutex_unlock(&data->update_lock);
1650 static int __init w83627hf_device_add(unsigned short address,
1651 const struct w83627hf_sio_data *sio_data)
1653 struct resource res = {
1654 .start = address + WINB_REGION_OFFSET,
1655 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1657 .flags = IORESOURCE_IO,
1661 pdev = platform_device_alloc(DRVNAME, address);
1664 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1668 err = platform_device_add_resources(pdev, &res, 1);
1670 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1672 goto exit_device_put;
1675 err = platform_device_add_data(pdev, sio_data,
1676 sizeof(struct w83627hf_sio_data));
1678 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1679 goto exit_device_put;
1682 err = platform_device_add(pdev);
1684 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1686 goto exit_device_put;
1692 platform_device_put(pdev);
1697 static int __init sensors_w83627hf_init(void)
1700 unsigned short address;
1701 struct w83627hf_sio_data sio_data;
1703 if (w83627hf_find(0x2e, &address, &sio_data)
1704 && w83627hf_find(0x4e, &address, &sio_data))
1707 err = platform_driver_register(&w83627hf_driver);
1711 /* Sets global pdev as a side effect */
1712 err = w83627hf_device_add(address, &sio_data);
1719 platform_driver_unregister(&w83627hf_driver);
1724 static void __exit sensors_w83627hf_exit(void)
1726 platform_device_unregister(pdev);
1727 platform_driver_unregister(&w83627hf_driver);
1730 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1731 "Philip Edelbrock <phil@netroedge.com>, "
1732 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1733 MODULE_DESCRIPTION("W83627HF driver");
1734 MODULE_LICENSE("GPL");
1736 module_init(sensors_w83627hf_init);
1737 module_exit(sensors_w83627hf_exit);