1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_kms.h"
31 /* Might need a hrtimer here? */
32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
34 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
40 drm_crtc_cleanup(&du->crtc);
41 drm_encoder_cleanup(&du->encoder);
42 drm_connector_cleanup(&du->connector);
46 * Display Unit Cursor functions
49 int vmw_cursor_update_image(struct vmw_private *dev_priv,
50 u32 *image, u32 width, u32 height,
51 u32 hotspotX, u32 hotspotY)
55 SVGAFifoCmdDefineAlphaCursor cursor;
57 u32 image_size = width * height * 4;
58 u32 cmd_size = sizeof(*cmd) + image_size;
63 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
64 if (unlikely(cmd == NULL)) {
65 DRM_ERROR("Fifo reserve failed.\n");
69 memset(cmd, 0, sizeof(*cmd));
71 memcpy(&cmd[1], image, image_size);
73 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
74 cmd->cursor.id = cpu_to_le32(0);
75 cmd->cursor.width = cpu_to_le32(width);
76 cmd->cursor.height = cpu_to_le32(height);
77 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
78 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
80 vmw_fifo_commit(dev_priv, cmd_size);
85 int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
86 struct vmw_dma_buffer *dmabuf,
87 u32 width, u32 height,
88 u32 hotspotX, u32 hotspotY)
90 struct ttm_bo_kmap_obj map;
91 unsigned long kmap_offset;
92 unsigned long kmap_num;
98 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
101 if (unlikely(ret != 0)) {
102 DRM_ERROR("reserve failed\n");
106 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
107 if (unlikely(ret != 0))
110 virtual = ttm_kmap_obj_virtual(&map, &dummy);
111 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
116 ttm_bo_unreserve(&dmabuf->base);
122 void vmw_cursor_update_position(struct vmw_private *dev_priv,
123 bool show, int x, int y)
125 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
128 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
129 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
130 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
131 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
132 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
135 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
136 uint32_t handle, uint32_t width, uint32_t height)
138 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
139 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
140 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
141 struct vmw_surface *surface = NULL;
142 struct vmw_dma_buffer *dmabuf = NULL;
145 /* A lot of the code assumes this */
146 if (handle && (width != 64 || height != 64))
150 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
153 if (!surface->snooper.image) {
154 DRM_ERROR("surface not suitable for cursor\n");
155 vmw_surface_unreference(&surface);
159 ret = vmw_user_dmabuf_lookup(tfile,
162 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
168 /* takedown old cursor */
169 if (du->cursor_surface) {
170 du->cursor_surface->snooper.crtc = NULL;
171 vmw_surface_unreference(&du->cursor_surface);
173 if (du->cursor_dmabuf)
174 vmw_dmabuf_unreference(&du->cursor_dmabuf);
176 /* setup new image */
178 /* vmw_user_surface_lookup takes one reference */
179 du->cursor_surface = surface;
181 du->cursor_surface->snooper.crtc = crtc;
182 du->cursor_age = du->cursor_surface->snooper.age;
183 vmw_cursor_update_image(dev_priv, surface->snooper.image,
184 64, 64, du->hotspot_x, du->hotspot_y);
186 /* vmw_user_surface_lookup takes one reference */
187 du->cursor_dmabuf = dmabuf;
189 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
190 du->hotspot_x, du->hotspot_y);
192 vmw_cursor_update_position(dev_priv, false, 0, 0);
196 vmw_cursor_update_position(dev_priv, true,
197 du->cursor_x + du->hotspot_x,
198 du->cursor_y + du->hotspot_y);
203 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
205 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
206 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
207 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
209 du->cursor_x = x + crtc->x;
210 du->cursor_y = y + crtc->y;
212 vmw_cursor_update_position(dev_priv, shown,
213 du->cursor_x + du->hotspot_x,
214 du->cursor_y + du->hotspot_y);
219 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
220 struct ttm_object_file *tfile,
221 struct ttm_buffer_object *bo,
222 SVGA3dCmdHeader *header)
224 struct ttm_bo_kmap_obj map;
225 unsigned long kmap_offset;
226 unsigned long kmap_num;
232 SVGA3dCmdHeader header;
233 SVGA3dCmdSurfaceDMA dma;
237 cmd = container_of(header, struct vmw_dma_cmd, header);
239 /* No snooper installed */
240 if (!srf->snooper.image)
243 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
244 DRM_ERROR("face and mipmap for cursors should never != 0\n");
248 if (cmd->header.size < 64) {
249 DRM_ERROR("at least one full copy box must be given\n");
253 box = (SVGA3dCopyBox *)&cmd[1];
254 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
255 sizeof(SVGA3dCopyBox);
257 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
258 box->x != 0 || box->y != 0 || box->z != 0 ||
259 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
260 box->d != 1 || box_count != 1) {
261 /* TODO handle none page aligned offsets */
262 /* TODO handle more dst & src != 0 */
263 /* TODO handle more then one copy */
264 DRM_ERROR("Cant snoop dma request for cursor!\n");
265 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
266 box->srcx, box->srcy, box->srcz,
267 box->x, box->y, box->z,
268 box->w, box->h, box->d, box_count,
269 cmd->dma.guest.ptr.offset);
273 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
274 kmap_num = (64*64*4) >> PAGE_SHIFT;
276 ret = ttm_bo_reserve(bo, true, false, false, 0);
277 if (unlikely(ret != 0)) {
278 DRM_ERROR("reserve failed\n");
282 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
283 if (unlikely(ret != 0))
286 virtual = ttm_kmap_obj_virtual(&map, &dummy);
288 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
289 memcpy(srf->snooper.image, virtual, 64*64*4);
291 /* Image is unsigned pointer. */
292 for (i = 0; i < box->h; i++)
293 memcpy(srf->snooper.image + i * 64,
294 virtual + i * cmd->dma.guest.pitch,
300 /* we can't call this function from this function since execbuf has
301 * reserved fifo space.
303 * if (srf->snooper.crtc)
304 * vmw_ldu_crtc_cursor_update_image(dev_priv,
305 * srf->snooper.image, 64, 64,
306 * du->hotspot_x, du->hotspot_y);
311 ttm_bo_unreserve(bo);
314 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
316 struct drm_device *dev = dev_priv->dev;
317 struct vmw_display_unit *du;
318 struct drm_crtc *crtc;
320 mutex_lock(&dev->mode_config.mutex);
322 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
323 du = vmw_crtc_to_du(crtc);
324 if (!du->cursor_surface ||
325 du->cursor_age == du->cursor_surface->snooper.age)
328 du->cursor_age = du->cursor_surface->snooper.age;
329 vmw_cursor_update_image(dev_priv,
330 du->cursor_surface->snooper.image,
331 64, 64, du->hotspot_x, du->hotspot_y);
334 mutex_unlock(&dev->mode_config.mutex);
338 * Generic framebuffer code
341 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
342 struct drm_file *file_priv,
343 unsigned int *handle)
352 * Surface framebuffer code
355 #define vmw_framebuffer_to_vfbs(x) \
356 container_of(x, struct vmw_framebuffer_surface, base.base)
358 struct vmw_framebuffer_surface {
359 struct vmw_framebuffer base;
360 struct vmw_surface *surface;
361 struct vmw_dma_buffer *buffer;
362 struct list_head head;
363 struct drm_master *master;
366 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
368 struct vmw_framebuffer_surface *vfbs =
369 vmw_framebuffer_to_vfbs(framebuffer);
370 struct vmw_master *vmaster = vmw_master(vfbs->master);
373 mutex_lock(&vmaster->fb_surf_mutex);
374 list_del(&vfbs->head);
375 mutex_unlock(&vmaster->fb_surf_mutex);
377 drm_master_put(&vfbs->master);
378 drm_framebuffer_cleanup(framebuffer);
379 vmw_surface_unreference(&vfbs->surface);
380 ttm_base_object_unref(&vfbs->base.user_obj);
385 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
386 struct drm_file *file_priv,
387 struct vmw_framebuffer *framebuffer,
388 unsigned flags, unsigned color,
389 struct drm_clip_rect *clips,
390 unsigned num_clips, int inc)
392 struct drm_clip_rect *clips_ptr;
393 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
394 struct drm_crtc *crtc;
397 int ret = 0; /* silence warning */
398 int left, right, top, bottom;
401 SVGA3dCmdHeader header;
402 SVGA3dCmdBlitSurfaceToScreen body;
404 SVGASignedRect *blits;
408 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
410 if (crtc->fb != &framebuffer->base)
412 units[num_units++] = vmw_crtc_to_du(crtc);
415 BUG_ON(!clips || !num_clips);
417 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
418 cmd = kzalloc(fifo_size, GFP_KERNEL);
419 if (unlikely(cmd == NULL)) {
420 DRM_ERROR("Temporary fifo memory alloc failed.\n");
429 /* skip the first clip rect */
430 for (i = 1, clips_ptr = clips + inc;
431 i < num_clips; i++, clips_ptr += inc) {
432 left = min_t(int, left, (int)clips_ptr->x1);
433 right = max_t(int, right, (int)clips_ptr->x2);
434 top = min_t(int, top, (int)clips_ptr->y1);
435 bottom = max_t(int, bottom, (int)clips_ptr->y2);
438 /* only need to do this once */
439 memset(cmd, 0, fifo_size);
440 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
441 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
443 cmd->body.srcRect.left = left;
444 cmd->body.srcRect.right = right;
445 cmd->body.srcRect.top = top;
446 cmd->body.srcRect.bottom = bottom;
449 blits = (SVGASignedRect *)&cmd[1];
450 for (i = 0; i < num_clips; i++, clips_ptr += inc) {
451 blits[i].left = clips_ptr->x1 - left;
452 blits[i].right = clips_ptr->x2 - left;
453 blits[i].top = clips_ptr->y1 - top;
454 blits[i].bottom = clips_ptr->y2 - top;
457 /* do per unit writing, reuse fifo for each */
458 for (i = 0; i < num_units; i++) {
459 struct vmw_display_unit *unit = units[i];
460 int clip_x1 = left - unit->crtc.x;
461 int clip_y1 = top - unit->crtc.y;
462 int clip_x2 = right - unit->crtc.x;
463 int clip_y2 = bottom - unit->crtc.y;
465 /* skip any crtcs that misses the clip region */
466 if (clip_x1 >= unit->crtc.mode.hdisplay ||
467 clip_y1 >= unit->crtc.mode.vdisplay ||
468 clip_x2 <= 0 || clip_y2 <= 0)
471 /* need to reset sid as it is changed by execbuf */
472 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
474 cmd->body.destScreenId = unit->unit;
477 * The blit command is a lot more resilient then the
478 * readback command when it comes to clip rects. So its
479 * okay to go out of bounds.
482 cmd->body.destRect.left = clip_x1;
483 cmd->body.destRect.right = clip_x2;
484 cmd->body.destRect.top = clip_y1;
485 cmd->body.destRect.bottom = clip_y2;
488 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
491 if (unlikely(ret != 0))
500 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
501 struct drm_file *file_priv,
502 unsigned flags, unsigned color,
503 struct drm_clip_rect *clips,
506 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
507 struct vmw_master *vmaster = vmw_master(file_priv->master);
508 struct vmw_framebuffer_surface *vfbs =
509 vmw_framebuffer_to_vfbs(framebuffer);
510 struct drm_clip_rect norect;
513 if (unlikely(vfbs->master != file_priv->master))
516 /* Require ScreenObject support for 3D */
517 if (!dev_priv->sou_priv)
520 ret = ttm_read_lock(&vmaster->lock, true);
521 if (unlikely(ret != 0))
527 norect.x1 = norect.y1 = 0;
528 norect.x2 = framebuffer->width;
529 norect.y2 = framebuffer->height;
530 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
532 inc = 2; /* skip source rects */
535 ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
537 clips, num_clips, inc);
539 ttm_read_unlock(&vmaster->lock);
543 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
544 .destroy = vmw_framebuffer_surface_destroy,
545 .dirty = vmw_framebuffer_surface_dirty,
546 .create_handle = vmw_framebuffer_create_handle,
549 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
550 struct drm_file *file_priv,
551 struct vmw_surface *surface,
552 struct vmw_framebuffer **out,
553 const struct drm_mode_fb_cmd
557 struct drm_device *dev = dev_priv->dev;
558 struct vmw_framebuffer_surface *vfbs;
559 enum SVGA3dSurfaceFormat format;
560 struct vmw_master *vmaster = vmw_master(file_priv->master);
563 /* 3D is only supported on HWv8 hosts which supports screen objects */
564 if (!dev_priv->sou_priv)
571 if (unlikely(surface->mip_levels[0] != 1 ||
572 surface->num_sizes != 1 ||
573 surface->sizes[0].width < mode_cmd->width ||
574 surface->sizes[0].height < mode_cmd->height ||
575 surface->sizes[0].depth != 1)) {
576 DRM_ERROR("Incompatible surface dimensions "
577 "for requested mode.\n");
581 switch (mode_cmd->depth) {
583 format = SVGA3D_A8R8G8B8;
586 format = SVGA3D_X8R8G8B8;
589 format = SVGA3D_R5G6B5;
592 format = SVGA3D_A1R5G5B5;
595 format = SVGA3D_LUMINANCE8;
598 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
602 if (unlikely(format != surface->format)) {
603 DRM_ERROR("Invalid surface format for requested mode.\n");
607 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
613 ret = drm_framebuffer_init(dev, &vfbs->base.base,
614 &vmw_framebuffer_surface_funcs);
618 if (!vmw_surface_reference(surface)) {
619 DRM_ERROR("failed to reference surface %p\n", surface);
623 /* XXX get the first 3 from the surface info */
624 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
625 vfbs->base.base.pitch = mode_cmd->pitch;
626 vfbs->base.base.depth = mode_cmd->depth;
627 vfbs->base.base.width = mode_cmd->width;
628 vfbs->base.base.height = mode_cmd->height;
629 vfbs->surface = surface;
630 vfbs->base.user_handle = mode_cmd->handle;
631 vfbs->master = drm_master_get(file_priv->master);
633 mutex_lock(&vmaster->fb_surf_mutex);
634 list_add_tail(&vfbs->head, &vmaster->fb_surf);
635 mutex_unlock(&vmaster->fb_surf_mutex);
642 drm_framebuffer_cleanup(&vfbs->base.base);
650 * Dmabuf framebuffer code
653 #define vmw_framebuffer_to_vfbd(x) \
654 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
656 struct vmw_framebuffer_dmabuf {
657 struct vmw_framebuffer base;
658 struct vmw_dma_buffer *buffer;
661 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
663 struct vmw_framebuffer_dmabuf *vfbd =
664 vmw_framebuffer_to_vfbd(framebuffer);
666 drm_framebuffer_cleanup(framebuffer);
667 vmw_dmabuf_unreference(&vfbd->buffer);
668 ttm_base_object_unref(&vfbd->base.user_obj);
673 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
674 struct vmw_framebuffer *framebuffer,
675 unsigned flags, unsigned color,
676 struct drm_clip_rect *clips,
677 unsigned num_clips, int increment)
684 SVGAFifoCmdUpdate body;
687 fifo_size = sizeof(*cmd) * num_clips;
688 cmd = vmw_fifo_reserve(dev_priv, fifo_size);
689 if (unlikely(cmd == NULL)) {
690 DRM_ERROR("Fifo reserve failed.\n");
694 memset(cmd, 0, fifo_size);
695 for (i = 0; i < num_clips; i++, clips += increment) {
696 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
697 cmd[i].body.x = cpu_to_le32(clips->x1);
698 cmd[i].body.y = cpu_to_le32(clips->y1);
699 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
700 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
703 vmw_fifo_commit(dev_priv, fifo_size);
707 static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
708 struct vmw_private *dev_priv,
709 struct vmw_framebuffer *framebuffer)
711 int depth = framebuffer->base.depth;
717 SVGAFifoCmdDefineGMRFB body;
720 /* Emulate RGBA support, contrary to svga_reg.h this is not
721 * supported by hosts. This is only a problem if we are reading
722 * this value later and expecting what we uploaded back.
727 fifo_size = sizeof(*cmd);
728 cmd = kmalloc(fifo_size, GFP_KERNEL);
729 if (unlikely(cmd == NULL)) {
730 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
734 memset(cmd, 0, fifo_size);
735 cmd->header = SVGA_CMD_DEFINE_GMRFB;
736 cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
737 cmd->body.format.colorDepth = depth;
738 cmd->body.format.reserved = 0;
739 cmd->body.bytesPerLine = framebuffer->base.pitch;
740 cmd->body.ptr.gmrId = framebuffer->user_handle;
741 cmd->body.ptr.offset = 0;
743 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
751 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
752 struct vmw_private *dev_priv,
753 struct vmw_framebuffer *framebuffer,
754 unsigned flags, unsigned color,
755 struct drm_clip_rect *clips,
756 unsigned num_clips, int increment)
758 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
759 struct drm_clip_rect *clips_ptr;
760 int i, k, num_units, ret;
761 struct drm_crtc *crtc;
766 SVGAFifoCmdBlitGMRFBToScreen body;
769 ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
770 if (unlikely(ret != 0))
771 return ret; /* define_gmrfb prints warnings */
773 fifo_size = sizeof(*blits) * num_clips;
774 blits = kmalloc(fifo_size, GFP_KERNEL);
775 if (unlikely(blits == NULL)) {
776 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
781 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
782 if (crtc->fb != &framebuffer->base)
784 units[num_units++] = vmw_crtc_to_du(crtc);
787 for (k = 0; k < num_units; k++) {
788 struct vmw_display_unit *unit = units[k];
792 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
793 int clip_x1 = clips_ptr->x1 - unit->crtc.x;
794 int clip_y1 = clips_ptr->y1 - unit->crtc.y;
795 int clip_x2 = clips_ptr->x2 - unit->crtc.x;
796 int clip_y2 = clips_ptr->y2 - unit->crtc.y;
798 /* skip any crtcs that misses the clip region */
799 if (clip_x1 >= unit->crtc.mode.hdisplay ||
800 clip_y1 >= unit->crtc.mode.vdisplay ||
801 clip_x2 <= 0 || clip_y2 <= 0)
804 blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
805 blits[hit_num].body.destScreenId = unit->unit;
806 blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
807 blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
808 blits[hit_num].body.destRect.left = clip_x1;
809 blits[hit_num].body.destRect.top = clip_y1;
810 blits[hit_num].body.destRect.right = clip_x2;
811 blits[hit_num].body.destRect.bottom = clip_y2;
815 /* no clips hit the crtc */
819 fifo_size = sizeof(*blits) * hit_num;
820 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
823 if (unlikely(ret != 0))
832 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
833 struct drm_file *file_priv,
834 unsigned flags, unsigned color,
835 struct drm_clip_rect *clips,
838 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
839 struct vmw_master *vmaster = vmw_master(file_priv->master);
840 struct vmw_framebuffer_dmabuf *vfbd =
841 vmw_framebuffer_to_vfbd(framebuffer);
842 struct drm_clip_rect norect;
843 int ret, increment = 1;
845 ret = ttm_read_lock(&vmaster->lock, true);
846 if (unlikely(ret != 0))
852 norect.x1 = norect.y1 = 0;
853 norect.x2 = framebuffer->width;
854 norect.y2 = framebuffer->height;
855 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
860 if (dev_priv->ldu_priv) {
861 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
863 clips, num_clips, increment);
865 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
867 clips, num_clips, increment);
870 ttm_read_unlock(&vmaster->lock);
874 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
875 .destroy = vmw_framebuffer_dmabuf_destroy,
876 .dirty = vmw_framebuffer_dmabuf_dirty,
877 .create_handle = vmw_framebuffer_create_handle,
881 * Pin the dmabuffer to the start of vram.
883 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
885 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
886 struct vmw_framebuffer_dmabuf *vfbd =
887 vmw_framebuffer_to_vfbd(&vfb->base);
890 /* This code should not be used with screen objects */
891 BUG_ON(dev_priv->sou_priv);
893 vmw_overlay_pause_all(dev_priv);
895 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
897 vmw_overlay_resume_all(dev_priv);
904 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
906 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
907 struct vmw_framebuffer_dmabuf *vfbd =
908 vmw_framebuffer_to_vfbd(&vfb->base);
911 WARN_ON(!vfbd->buffer);
915 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
918 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
919 struct vmw_dma_buffer *dmabuf,
920 struct vmw_framebuffer **out,
921 const struct drm_mode_fb_cmd
925 struct drm_device *dev = dev_priv->dev;
926 struct vmw_framebuffer_dmabuf *vfbd;
927 unsigned int requested_size;
930 requested_size = mode_cmd->height * mode_cmd->pitch;
931 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
932 DRM_ERROR("Screen buffer object size is too small "
933 "for requested mode.\n");
937 /* Limited framebuffer color depth support for screen objects */
938 if (dev_priv->sou_priv) {
939 switch (mode_cmd->depth) {
942 /* Only support 32 bpp for 32 and 24 depth fbs */
943 if (mode_cmd->bpp == 32)
946 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
947 mode_cmd->depth, mode_cmd->bpp);
951 /* Only support 16 bpp for 16 and 15 depth fbs */
952 if (mode_cmd->bpp == 16)
955 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
956 mode_cmd->depth, mode_cmd->bpp);
959 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
964 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
970 ret = drm_framebuffer_init(dev, &vfbd->base.base,
971 &vmw_framebuffer_dmabuf_funcs);
975 if (!vmw_dmabuf_reference(dmabuf)) {
976 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
980 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
981 vfbd->base.base.pitch = mode_cmd->pitch;
982 vfbd->base.base.depth = mode_cmd->depth;
983 vfbd->base.base.width = mode_cmd->width;
984 vfbd->base.base.height = mode_cmd->height;
985 if (!dev_priv->sou_priv) {
986 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
987 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
989 vfbd->base.dmabuf = true;
990 vfbd->buffer = dmabuf;
991 vfbd->base.user_handle = mode_cmd->handle;
997 drm_framebuffer_cleanup(&vfbd->base.base);
1005 * Generic Kernel modesetting functions
1008 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
1009 struct drm_file *file_priv,
1010 struct drm_mode_fb_cmd *mode_cmd)
1012 struct vmw_private *dev_priv = vmw_priv(dev);
1013 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1014 struct vmw_framebuffer *vfb = NULL;
1015 struct vmw_surface *surface = NULL;
1016 struct vmw_dma_buffer *bo = NULL;
1017 struct ttm_base_object *user_obj;
1022 * This code should be conditioned on Screen Objects not being used.
1023 * If screen objects are used, we can allocate a GMR to hold the
1024 * requested framebuffer.
1027 required_size = mode_cmd->pitch * mode_cmd->height;
1028 if (unlikely(required_size > (u64) dev_priv->vram_size)) {
1029 DRM_ERROR("VRAM size is too small for requested mode.\n");
1030 return ERR_PTR(-ENOMEM);
1034 * Take a reference on the user object of the resource
1035 * backing the kms fb. This ensures that user-space handle
1036 * lookups on that resource will always work as long as
1037 * it's registered with a kms framebuffer. This is important,
1038 * since vmw_execbuf_process identifies resources in the
1039 * command stream using user-space handles.
1042 user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
1043 if (unlikely(user_obj == NULL)) {
1044 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1045 return ERR_PTR(-ENOENT);
1049 * End conditioned code.
1052 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
1053 mode_cmd->handle, &surface);
1057 if (!surface->scanout)
1058 goto err_not_scanout;
1060 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
1063 /* vmw_user_surface_lookup takes one ref so does new_fb */
1064 vmw_surface_unreference(&surface);
1067 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1068 ttm_base_object_unref(&user_obj);
1069 return ERR_PTR(ret);
1071 vfb->user_obj = user_obj;
1075 DRM_INFO("%s: trying buffer\n", __func__);
1077 ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
1079 DRM_ERROR("failed to find buffer: %i\n", ret);
1080 return ERR_PTR(-ENOENT);
1083 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1086 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
1087 vmw_dmabuf_unreference(&bo);
1090 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1091 ttm_base_object_unref(&user_obj);
1092 return ERR_PTR(ret);
1094 vfb->user_obj = user_obj;
1099 DRM_ERROR("surface not marked as scanout\n");
1100 /* vmw_user_surface_lookup takes one ref */
1101 vmw_surface_unreference(&surface);
1102 ttm_base_object_unref(&user_obj);
1104 return ERR_PTR(-EINVAL);
1107 static struct drm_mode_config_funcs vmw_kms_funcs = {
1108 .fb_create = vmw_kms_fb_create,
1111 int vmw_kms_present(struct vmw_private *dev_priv,
1112 struct drm_file *file_priv,
1113 struct vmw_framebuffer *vfb,
1114 struct vmw_surface *surface,
1116 int32_t destX, int32_t destY,
1117 struct drm_vmw_rect *clips,
1120 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1121 struct drm_crtc *crtc;
1123 int i, k, num_units;
1124 int ret = 0; /* silence warning */
1127 SVGA3dCmdHeader header;
1128 SVGA3dCmdBlitSurfaceToScreen body;
1130 SVGASignedRect *blits;
1133 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1134 if (crtc->fb != &vfb->base)
1136 units[num_units++] = vmw_crtc_to_du(crtc);
1139 BUG_ON(surface == NULL);
1140 BUG_ON(!clips || !num_clips);
1142 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1143 cmd = kmalloc(fifo_size, GFP_KERNEL);
1144 if (unlikely(cmd == NULL)) {
1145 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1149 /* only need to do this once */
1150 memset(cmd, 0, fifo_size);
1151 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1152 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1154 cmd->body.srcRect.left = 0;
1155 cmd->body.srcRect.right = surface->sizes[0].width;
1156 cmd->body.srcRect.top = 0;
1157 cmd->body.srcRect.bottom = surface->sizes[0].height;
1159 blits = (SVGASignedRect *)&cmd[1];
1160 for (i = 0; i < num_clips; i++) {
1161 blits[i].left = clips[i].x;
1162 blits[i].right = clips[i].x + clips[i].w;
1163 blits[i].top = clips[i].y;
1164 blits[i].bottom = clips[i].y + clips[i].h;
1167 for (k = 0; k < num_units; k++) {
1168 struct vmw_display_unit *unit = units[k];
1169 int clip_x1 = destX - unit->crtc.x;
1170 int clip_y1 = destY - unit->crtc.y;
1171 int clip_x2 = clip_x1 + surface->sizes[0].width;
1172 int clip_y2 = clip_y1 + surface->sizes[0].height;
1174 /* skip any crtcs that misses the clip region */
1175 if (clip_x1 >= unit->crtc.mode.hdisplay ||
1176 clip_y1 >= unit->crtc.mode.vdisplay ||
1177 clip_x2 <= 0 || clip_y2 <= 0)
1180 /* need to reset sid as it is changed by execbuf */
1181 cmd->body.srcImage.sid = sid;
1183 cmd->body.destScreenId = unit->unit;
1186 * The blit command is a lot more resilient then the
1187 * readback command when it comes to clip rects. So its
1188 * okay to go out of bounds.
1191 cmd->body.destRect.left = clip_x1;
1192 cmd->body.destRect.right = clip_x2;
1193 cmd->body.destRect.top = clip_y1;
1194 cmd->body.destRect.bottom = clip_y2;
1196 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1197 fifo_size, 0, NULL);
1199 if (unlikely(ret != 0))
1208 int vmw_kms_readback(struct vmw_private *dev_priv,
1209 struct drm_file *file_priv,
1210 struct vmw_framebuffer *vfb,
1211 struct drm_vmw_fence_rep __user *user_fence_rep,
1212 struct drm_vmw_rect *clips,
1215 struct vmw_framebuffer_dmabuf *vfbd =
1216 vmw_framebuffer_to_vfbd(&vfb->base);
1217 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1218 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1219 struct drm_crtc *crtc;
1221 int i, k, ret, num_units, blits_pos;
1225 SVGAFifoCmdDefineGMRFB body;
1229 SVGAFifoCmdBlitScreenToGMRFB body;
1233 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1234 if (crtc->fb != &vfb->base)
1236 units[num_units++] = vmw_crtc_to_du(crtc);
1239 BUG_ON(dmabuf == NULL);
1240 BUG_ON(!clips || !num_clips);
1242 /* take a safe guess at fifo size */
1243 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1244 cmd = kmalloc(fifo_size, GFP_KERNEL);
1245 if (unlikely(cmd == NULL)) {
1246 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1250 memset(cmd, 0, fifo_size);
1251 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1252 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1253 cmd->body.format.colorDepth = vfb->base.depth;
1254 cmd->body.format.reserved = 0;
1255 cmd->body.bytesPerLine = vfb->base.pitch;
1256 cmd->body.ptr.gmrId = vfb->user_handle;
1257 cmd->body.ptr.offset = 0;
1259 blits = (void *)&cmd[1];
1261 for (i = 0; i < num_units; i++) {
1262 struct drm_vmw_rect *c = clips;
1263 for (k = 0; k < num_clips; k++, c++) {
1264 /* transform clip coords to crtc origin based coords */
1265 int clip_x1 = c->x - units[i]->crtc.x;
1266 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1267 int clip_y1 = c->y - units[i]->crtc.y;
1268 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1272 /* compensate for clipping, we negate
1273 * a negative number and add that.
1281 clip_x1 = max(clip_x1, 0);
1282 clip_y1 = max(clip_y1, 0);
1283 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1284 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1286 /* and cull any rects that misses the crtc */
1287 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1288 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1289 clip_x2 <= 0 || clip_y2 <= 0)
1292 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1293 blits[blits_pos].body.srcScreenId = units[i]->unit;
1294 blits[blits_pos].body.destOrigin.x = dest_x;
1295 blits[blits_pos].body.destOrigin.y = dest_y;
1297 blits[blits_pos].body.srcRect.left = clip_x1;
1298 blits[blits_pos].body.srcRect.top = clip_y1;
1299 blits[blits_pos].body.srcRect.right = clip_x2;
1300 blits[blits_pos].body.srcRect.bottom = clip_y2;
1304 /* reset size here and use calculated exact size from loops */
1305 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1307 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1315 int vmw_kms_init(struct vmw_private *dev_priv)
1317 struct drm_device *dev = dev_priv->dev;
1320 drm_mode_config_init(dev);
1321 dev->mode_config.funcs = &vmw_kms_funcs;
1322 dev->mode_config.min_width = 1;
1323 dev->mode_config.min_height = 1;
1324 /* assumed largest fb size */
1325 dev->mode_config.max_width = 8192;
1326 dev->mode_config.max_height = 8192;
1328 ret = vmw_kms_init_screen_object_display(dev_priv);
1329 if (ret) /* Fallback */
1330 (void)vmw_kms_init_legacy_display_system(dev_priv);
1335 int vmw_kms_close(struct vmw_private *dev_priv)
1338 * Docs says we should take the lock before calling this function
1339 * but since it destroys encoders and our destructor calls
1340 * drm_encoder_cleanup which takes the lock we deadlock.
1342 drm_mode_config_cleanup(dev_priv->dev);
1343 if (dev_priv->sou_priv)
1344 vmw_kms_close_screen_object_display(dev_priv);
1346 vmw_kms_close_legacy_display_system(dev_priv);
1350 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1351 struct drm_file *file_priv)
1353 struct drm_vmw_cursor_bypass_arg *arg = data;
1354 struct vmw_display_unit *du;
1355 struct drm_mode_object *obj;
1356 struct drm_crtc *crtc;
1360 mutex_lock(&dev->mode_config.mutex);
1361 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1363 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1364 du = vmw_crtc_to_du(crtc);
1365 du->hotspot_x = arg->xhot;
1366 du->hotspot_y = arg->yhot;
1369 mutex_unlock(&dev->mode_config.mutex);
1373 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1379 crtc = obj_to_crtc(obj);
1380 du = vmw_crtc_to_du(crtc);
1382 du->hotspot_x = arg->xhot;
1383 du->hotspot_y = arg->yhot;
1386 mutex_unlock(&dev->mode_config.mutex);
1391 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1392 unsigned width, unsigned height, unsigned pitch,
1393 unsigned bpp, unsigned depth)
1395 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1396 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1397 else if (vmw_fifo_have_pitchlock(vmw_priv))
1398 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1399 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1400 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1401 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1403 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1404 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1405 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1412 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1414 struct vmw_vga_topology_state *save;
1417 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1418 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1419 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1420 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1421 vmw_priv->vga_pitchlock =
1422 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1423 else if (vmw_fifo_have_pitchlock(vmw_priv))
1424 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1425 SVGA_FIFO_PITCHLOCK);
1427 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1430 vmw_priv->num_displays = vmw_read(vmw_priv,
1431 SVGA_REG_NUM_GUEST_DISPLAYS);
1433 if (vmw_priv->num_displays == 0)
1434 vmw_priv->num_displays = 1;
1436 for (i = 0; i < vmw_priv->num_displays; ++i) {
1437 save = &vmw_priv->vga_save[i];
1438 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1439 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1440 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1441 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1442 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1443 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1444 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1445 if (i == 0 && vmw_priv->num_displays == 1 &&
1446 save->width == 0 && save->height == 0) {
1449 * It should be fairly safe to assume that these
1450 * values are uninitialized.
1453 save->width = vmw_priv->vga_width - save->pos_x;
1454 save->height = vmw_priv->vga_height - save->pos_y;
1461 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1463 struct vmw_vga_topology_state *save;
1466 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1467 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1468 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1469 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1470 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1471 vmw_priv->vga_pitchlock);
1472 else if (vmw_fifo_have_pitchlock(vmw_priv))
1473 iowrite32(vmw_priv->vga_pitchlock,
1474 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1476 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1479 for (i = 0; i < vmw_priv->num_displays; ++i) {
1480 save = &vmw_priv->vga_save[i];
1481 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1482 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1483 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1484 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1485 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1486 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1487 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1493 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1497 return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1502 * Function called by DRM code called with vbl_lock held.
1504 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1510 * Function called by DRM code called with vbl_lock held.
1512 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1518 * Function called by DRM code called with vbl_lock held.
1520 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1526 * Small shared kms functions.
1529 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1530 struct drm_vmw_rect *rects)
1532 struct drm_device *dev = dev_priv->dev;
1533 struct vmw_display_unit *du;
1534 struct drm_connector *con;
1536 mutex_lock(&dev->mode_config.mutex);
1542 DRM_INFO("%s: new layout ", __func__);
1543 for (i = 0; i < num; i++)
1544 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1545 rects[i].w, rects[i].h);
1550 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1551 du = vmw_connector_to_du(con);
1552 if (num > du->unit) {
1553 du->pref_width = rects[du->unit].w;
1554 du->pref_height = rects[du->unit].h;
1555 du->pref_active = true;
1556 du->gui_x = rects[du->unit].x;
1557 du->gui_y = rects[du->unit].y;
1559 du->pref_width = 800;
1560 du->pref_height = 600;
1561 du->pref_active = false;
1563 con->status = vmw_du_connector_detect(con, true);
1566 mutex_unlock(&dev->mode_config.mutex);
1571 void vmw_du_crtc_save(struct drm_crtc *crtc)
1575 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1579 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1580 u16 *r, u16 *g, u16 *b,
1581 uint32_t start, uint32_t size)
1583 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1586 for (i = 0; i < size; i++) {
1587 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1589 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1590 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1591 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1595 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1599 void vmw_du_connector_save(struct drm_connector *connector)
1603 void vmw_du_connector_restore(struct drm_connector *connector)
1607 enum drm_connector_status
1608 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1610 uint32_t num_displays;
1611 struct drm_device *dev = connector->dev;
1612 struct vmw_private *dev_priv = vmw_priv(dev);
1613 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1615 mutex_lock(&dev_priv->hw_mutex);
1616 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1617 mutex_unlock(&dev_priv->hw_mutex);
1619 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1621 connector_status_connected : connector_status_disconnected);
1624 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1626 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1627 752, 800, 0, 480, 489, 492, 525, 0,
1628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1630 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1631 968, 1056, 0, 600, 601, 605, 628, 0,
1632 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1634 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1635 1184, 1344, 0, 768, 771, 777, 806, 0,
1636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1638 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1639 1344, 1600, 0, 864, 865, 868, 900, 0,
1640 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1642 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1643 1472, 1664, 0, 768, 771, 778, 798, 0,
1644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1646 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1647 1480, 1680, 0, 800, 803, 809, 831, 0,
1648 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1650 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1651 1488, 1800, 0, 960, 961, 964, 1000, 0,
1652 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1653 /* 1280x1024@60Hz */
1654 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1655 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1656 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1658 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1659 1536, 1792, 0, 768, 771, 777, 795, 0,
1660 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1661 /* 1440x1050@60Hz */
1662 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1663 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1664 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1666 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1667 1672, 1904, 0, 900, 903, 909, 934, 0,
1668 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1669 /* 1600x1200@60Hz */
1670 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1671 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1673 /* 1680x1050@60Hz */
1674 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1675 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1676 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677 /* 1792x1344@60Hz */
1678 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1679 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1681 /* 1853x1392@60Hz */
1682 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1683 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1684 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1685 /* 1920x1200@60Hz */
1686 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1687 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1689 /* 1920x1440@60Hz */
1690 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1691 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1692 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1693 /* 2560x1600@60Hz */
1694 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1695 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1696 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1698 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1702 * vmw_guess_mode_timing - Provide fake timings for a
1703 * 60Hz vrefresh mode.
1705 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1706 * members filled in.
1708 static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1710 mode->hsync_start = mode->hdisplay + 50;
1711 mode->hsync_end = mode->hsync_start + 50;
1712 mode->htotal = mode->hsync_end + 50;
1714 mode->vsync_start = mode->vdisplay + 50;
1715 mode->vsync_end = mode->vsync_start + 50;
1716 mode->vtotal = mode->vsync_end + 50;
1718 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1719 mode->vrefresh = drm_mode_vrefresh(mode);
1723 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1724 uint32_t max_width, uint32_t max_height)
1726 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1727 struct drm_device *dev = connector->dev;
1728 struct vmw_private *dev_priv = vmw_priv(dev);
1729 struct drm_display_mode *mode = NULL;
1730 struct drm_display_mode *bmode;
1731 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1732 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1733 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1734 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1738 /* Add preferred mode */
1740 mode = drm_mode_duplicate(dev, &prefmode);
1743 mode->hdisplay = du->pref_width;
1744 mode->vdisplay = du->pref_height;
1745 vmw_guess_mode_timing(mode);
1747 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1749 drm_mode_probed_add(connector, mode);
1751 drm_mode_destroy(dev, mode);
1755 if (du->pref_mode) {
1756 list_del_init(&du->pref_mode->head);
1757 drm_mode_destroy(dev, du->pref_mode);
1760 /* mode might be null here, this is intended */
1761 du->pref_mode = mode;
1764 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1765 bmode = &vmw_kms_connector_builtin[i];
1766 if (bmode->hdisplay > max_width ||
1767 bmode->vdisplay > max_height)
1770 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1774 mode = drm_mode_duplicate(dev, bmode);
1777 mode->vrefresh = drm_mode_vrefresh(mode);
1779 drm_mode_probed_add(connector, mode);
1782 /* Move the prefered mode first, help apps pick the right mode. */
1784 list_move(&du->pref_mode->head, &connector->probed_modes);
1786 drm_mode_connector_list_update(connector);
1791 int vmw_du_connector_set_property(struct drm_connector *connector,
1792 struct drm_property *property,
1799 int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1800 struct drm_file *file_priv)
1802 struct vmw_private *dev_priv = vmw_priv(dev);
1803 struct drm_vmw_update_layout_arg *arg =
1804 (struct drm_vmw_update_layout_arg *)data;
1805 struct vmw_master *vmaster = vmw_master(file_priv->master);
1806 void __user *user_rects;
1807 struct drm_vmw_rect *rects;
1808 unsigned rects_size;
1811 struct drm_mode_config *mode_config = &dev->mode_config;
1813 ret = ttm_read_lock(&vmaster->lock, true);
1814 if (unlikely(ret != 0))
1817 if (!arg->num_outputs) {
1818 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1819 vmw_du_update_layout(dev_priv, 1, &def_rect);
1823 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1824 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1826 if (unlikely(!rects)) {
1831 user_rects = (void __user *)(unsigned long)arg->rects;
1832 ret = copy_from_user(rects, user_rects, rects_size);
1833 if (unlikely(ret != 0)) {
1834 DRM_ERROR("Failed to get rects.\n");
1839 for (i = 0; i < arg->num_outputs; ++i) {
1840 if (rects[i].x < 0 ||
1842 rects[i].x + rects[i].w > mode_config->max_width ||
1843 rects[i].y + rects[i].h > mode_config->max_height) {
1844 DRM_ERROR("Invalid GUI layout.\n");
1850 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1855 ttm_read_unlock(&vmaster->lock);