vmwgfx: Initialize clip rect loop correctly in surface dirty
[pandora-kernel.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
1 /**************************************************************************
2  *
3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27
28 #include "vmwgfx_kms.h"
29
30
31 /* Might need a hrtimer here? */
32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
34 void vmw_display_unit_cleanup(struct vmw_display_unit *du)
35 {
36         if (du->cursor_surface)
37                 vmw_surface_unreference(&du->cursor_surface);
38         if (du->cursor_dmabuf)
39                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
40         drm_crtc_cleanup(&du->crtc);
41         drm_encoder_cleanup(&du->encoder);
42         drm_connector_cleanup(&du->connector);
43 }
44
45 /*
46  * Display Unit Cursor functions
47  */
48
49 int vmw_cursor_update_image(struct vmw_private *dev_priv,
50                             u32 *image, u32 width, u32 height,
51                             u32 hotspotX, u32 hotspotY)
52 {
53         struct {
54                 u32 cmd;
55                 SVGAFifoCmdDefineAlphaCursor cursor;
56         } *cmd;
57         u32 image_size = width * height * 4;
58         u32 cmd_size = sizeof(*cmd) + image_size;
59
60         if (!image)
61                 return -EINVAL;
62
63         cmd = vmw_fifo_reserve(dev_priv, cmd_size);
64         if (unlikely(cmd == NULL)) {
65                 DRM_ERROR("Fifo reserve failed.\n");
66                 return -ENOMEM;
67         }
68
69         memset(cmd, 0, sizeof(*cmd));
70
71         memcpy(&cmd[1], image, image_size);
72
73         cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
74         cmd->cursor.id = cpu_to_le32(0);
75         cmd->cursor.width = cpu_to_le32(width);
76         cmd->cursor.height = cpu_to_le32(height);
77         cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
78         cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
79
80         vmw_fifo_commit(dev_priv, cmd_size);
81
82         return 0;
83 }
84
85 void vmw_cursor_update_position(struct vmw_private *dev_priv,
86                                 bool show, int x, int y)
87 {
88         __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
89         uint32_t count;
90
91         iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
92         iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
93         iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
94         count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
95         iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
96 }
97
98 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
99                            uint32_t handle, uint32_t width, uint32_t height)
100 {
101         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
102         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
103         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
104         struct vmw_surface *surface = NULL;
105         struct vmw_dma_buffer *dmabuf = NULL;
106         int ret;
107
108         if (handle) {
109                 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
110                                                      handle, &surface);
111                 if (!ret) {
112                         if (!surface->snooper.image) {
113                                 DRM_ERROR("surface not suitable for cursor\n");
114                                 vmw_surface_unreference(&surface);
115                                 return -EINVAL;
116                         }
117                 } else {
118                         ret = vmw_user_dmabuf_lookup(tfile,
119                                                      handle, &dmabuf);
120                         if (ret) {
121                                 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
122                                 return -EINVAL;
123                         }
124                 }
125         }
126
127         /* takedown old cursor */
128         if (du->cursor_surface) {
129                 du->cursor_surface->snooper.crtc = NULL;
130                 vmw_surface_unreference(&du->cursor_surface);
131         }
132         if (du->cursor_dmabuf)
133                 vmw_dmabuf_unreference(&du->cursor_dmabuf);
134
135         /* setup new image */
136         if (surface) {
137                 /* vmw_user_surface_lookup takes one reference */
138                 du->cursor_surface = surface;
139
140                 du->cursor_surface->snooper.crtc = crtc;
141                 du->cursor_age = du->cursor_surface->snooper.age;
142                 vmw_cursor_update_image(dev_priv, surface->snooper.image,
143                                         64, 64, du->hotspot_x, du->hotspot_y);
144         } else if (dmabuf) {
145                 struct ttm_bo_kmap_obj map;
146                 unsigned long kmap_offset;
147                 unsigned long kmap_num;
148                 void *virtual;
149                 bool dummy;
150
151                 /* vmw_user_surface_lookup takes one reference */
152                 du->cursor_dmabuf = dmabuf;
153
154                 kmap_offset = 0;
155                 kmap_num = (64*64*4) >> PAGE_SHIFT;
156
157                 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
158                 if (unlikely(ret != 0)) {
159                         DRM_ERROR("reserve failed\n");
160                         return -EINVAL;
161                 }
162
163                 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
164                 if (unlikely(ret != 0))
165                         goto err_unreserve;
166
167                 virtual = ttm_kmap_obj_virtual(&map, &dummy);
168                 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
169                                         du->hotspot_x, du->hotspot_y);
170
171                 ttm_bo_kunmap(&map);
172 err_unreserve:
173                 ttm_bo_unreserve(&dmabuf->base);
174
175         } else {
176                 vmw_cursor_update_position(dev_priv, false, 0, 0);
177                 return 0;
178         }
179
180         vmw_cursor_update_position(dev_priv, true,
181                                    du->cursor_x + du->hotspot_x,
182                                    du->cursor_y + du->hotspot_y);
183
184         return 0;
185 }
186
187 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
188 {
189         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
190         struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
191         bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
192
193         du->cursor_x = x + crtc->x;
194         du->cursor_y = y + crtc->y;
195
196         vmw_cursor_update_position(dev_priv, shown,
197                                    du->cursor_x + du->hotspot_x,
198                                    du->cursor_y + du->hotspot_y);
199
200         return 0;
201 }
202
203 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
204                           struct ttm_object_file *tfile,
205                           struct ttm_buffer_object *bo,
206                           SVGA3dCmdHeader *header)
207 {
208         struct ttm_bo_kmap_obj map;
209         unsigned long kmap_offset;
210         unsigned long kmap_num;
211         SVGA3dCopyBox *box;
212         unsigned box_count;
213         void *virtual;
214         bool dummy;
215         struct vmw_dma_cmd {
216                 SVGA3dCmdHeader header;
217                 SVGA3dCmdSurfaceDMA dma;
218         } *cmd;
219         int i, ret;
220
221         cmd = container_of(header, struct vmw_dma_cmd, header);
222
223         /* No snooper installed */
224         if (!srf->snooper.image)
225                 return;
226
227         if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
228                 DRM_ERROR("face and mipmap for cursors should never != 0\n");
229                 return;
230         }
231
232         if (cmd->header.size < 64) {
233                 DRM_ERROR("at least one full copy box must be given\n");
234                 return;
235         }
236
237         box = (SVGA3dCopyBox *)&cmd[1];
238         box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
239                         sizeof(SVGA3dCopyBox);
240
241         if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
242             box->x != 0    || box->y != 0    || box->z != 0    ||
243             box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
244             box->d != 1    || box_count != 1) {
245                 /* TODO handle none page aligned offsets */
246                 /* TODO handle more dst & src != 0 */
247                 /* TODO handle more then one copy */
248                 DRM_ERROR("Cant snoop dma request for cursor!\n");
249                 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
250                           box->srcx, box->srcy, box->srcz,
251                           box->x, box->y, box->z,
252                           box->w, box->h, box->d, box_count,
253                           cmd->dma.guest.ptr.offset);
254                 return;
255         }
256
257         kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
258         kmap_num = (64*64*4) >> PAGE_SHIFT;
259
260         ret = ttm_bo_reserve(bo, true, false, false, 0);
261         if (unlikely(ret != 0)) {
262                 DRM_ERROR("reserve failed\n");
263                 return;
264         }
265
266         ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
267         if (unlikely(ret != 0))
268                 goto err_unreserve;
269
270         virtual = ttm_kmap_obj_virtual(&map, &dummy);
271
272         if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
273                 memcpy(srf->snooper.image, virtual, 64*64*4);
274         } else {
275                 /* Image is unsigned pointer. */
276                 for (i = 0; i < box->h; i++)
277                         memcpy(srf->snooper.image + i * 64,
278                                virtual + i * cmd->dma.guest.pitch,
279                                box->w * 4);
280         }
281
282         srf->snooper.age++;
283
284         /* we can't call this function from this function since execbuf has
285          * reserved fifo space.
286          *
287          * if (srf->snooper.crtc)
288          *      vmw_ldu_crtc_cursor_update_image(dev_priv,
289          *                                       srf->snooper.image, 64, 64,
290          *                                       du->hotspot_x, du->hotspot_y);
291          */
292
293         ttm_bo_kunmap(&map);
294 err_unreserve:
295         ttm_bo_unreserve(bo);
296 }
297
298 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
299 {
300         struct drm_device *dev = dev_priv->dev;
301         struct vmw_display_unit *du;
302         struct drm_crtc *crtc;
303
304         mutex_lock(&dev->mode_config.mutex);
305
306         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
307                 du = vmw_crtc_to_du(crtc);
308                 if (!du->cursor_surface ||
309                     du->cursor_age == du->cursor_surface->snooper.age)
310                         continue;
311
312                 du->cursor_age = du->cursor_surface->snooper.age;
313                 vmw_cursor_update_image(dev_priv,
314                                         du->cursor_surface->snooper.image,
315                                         64, 64, du->hotspot_x, du->hotspot_y);
316         }
317
318         mutex_unlock(&dev->mode_config.mutex);
319 }
320
321 /*
322  * Generic framebuffer code
323  */
324
325 int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
326                                   struct drm_file *file_priv,
327                                   unsigned int *handle)
328 {
329         if (handle)
330                 handle = 0;
331
332         return 0;
333 }
334
335 /*
336  * Surface framebuffer code
337  */
338
339 #define vmw_framebuffer_to_vfbs(x) \
340         container_of(x, struct vmw_framebuffer_surface, base.base)
341
342 struct vmw_framebuffer_surface {
343         struct vmw_framebuffer base;
344         struct vmw_surface *surface;
345         struct vmw_dma_buffer *buffer;
346         struct list_head head;
347         struct drm_master *master;
348 };
349
350 void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
351 {
352         struct vmw_framebuffer_surface *vfbs =
353                 vmw_framebuffer_to_vfbs(framebuffer);
354         struct vmw_master *vmaster = vmw_master(vfbs->master);
355
356
357         mutex_lock(&vmaster->fb_surf_mutex);
358         list_del(&vfbs->head);
359         mutex_unlock(&vmaster->fb_surf_mutex);
360
361         drm_master_put(&vfbs->master);
362         drm_framebuffer_cleanup(framebuffer);
363         vmw_surface_unreference(&vfbs->surface);
364         ttm_base_object_unref(&vfbs->base.user_obj);
365
366         kfree(vfbs);
367 }
368
369 static int do_surface_dirty_sou(struct vmw_private *dev_priv,
370                                 struct drm_file *file_priv,
371                                 struct vmw_framebuffer *framebuffer,
372                                 unsigned flags, unsigned color,
373                                 struct drm_clip_rect *clips,
374                                 unsigned num_clips, int inc)
375 {
376         struct drm_clip_rect *clips_ptr;
377         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
378         struct drm_crtc *crtc;
379         size_t fifo_size;
380         int i, num_units;
381         int ret = 0; /* silence warning */
382         int left, right, top, bottom;
383
384         struct {
385                 SVGA3dCmdHeader header;
386                 SVGA3dCmdBlitSurfaceToScreen body;
387         } *cmd;
388         SVGASignedRect *blits;
389
390
391         num_units = 0;
392         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
393                             head) {
394                 if (crtc->fb != &framebuffer->base)
395                         continue;
396                 units[num_units++] = vmw_crtc_to_du(crtc);
397         }
398
399         BUG_ON(!clips || !num_clips);
400
401         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
402         cmd = kzalloc(fifo_size, GFP_KERNEL);
403         if (unlikely(cmd == NULL)) {
404                 DRM_ERROR("Temporary fifo memory alloc failed.\n");
405                 return -ENOMEM;
406         }
407
408         left = clips->x1;
409         right = clips->x2;
410         top = clips->y1;
411         bottom = clips->y2;
412
413         /* skip the first clip rect */
414         for (i = 1, clips_ptr = clips + inc;
415              i < num_clips; i++, clips_ptr += inc) {
416                 left = min_t(int, left, (int)clips_ptr->x1);
417                 right = max_t(int, right, (int)clips_ptr->x2);
418                 top = min_t(int, top, (int)clips_ptr->y1);
419                 bottom = max_t(int, bottom, (int)clips_ptr->y2);
420         }
421
422         /* only need to do this once */
423         memset(cmd, 0, fifo_size);
424         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
425         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
426
427         cmd->body.srcRect.left = left;
428         cmd->body.srcRect.right = right;
429         cmd->body.srcRect.top = top;
430         cmd->body.srcRect.bottom = bottom;
431
432         clips_ptr = clips;
433         blits = (SVGASignedRect *)&cmd[1];
434         for (i = 0; i < num_clips; i++, clips_ptr += inc) {
435                 blits[i].left   = clips_ptr->x1 - left;
436                 blits[i].right  = clips_ptr->x2 - left;
437                 blits[i].top    = clips_ptr->y1 - top;
438                 blits[i].bottom = clips_ptr->y2 - top;
439         }
440
441         /* do per unit writing, reuse fifo for each */
442         for (i = 0; i < num_units; i++) {
443                 struct vmw_display_unit *unit = units[i];
444                 int clip_x1 = left - unit->crtc.x;
445                 int clip_y1 = top - unit->crtc.y;
446                 int clip_x2 = right - unit->crtc.x;
447                 int clip_y2 = bottom - unit->crtc.y;
448
449                 /* skip any crtcs that misses the clip region */
450                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
451                     clip_y1 >= unit->crtc.mode.vdisplay ||
452                     clip_x2 <= 0 || clip_y2 <= 0)
453                         continue;
454
455                 /* need to reset sid as it is changed by execbuf */
456                 cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
457
458                 cmd->body.destScreenId = unit->unit;
459
460                 /*
461                  * The blit command is a lot more resilient then the
462                  * readback command when it comes to clip rects. So its
463                  * okay to go out of bounds.
464                  */
465
466                 cmd->body.destRect.left = clip_x1;
467                 cmd->body.destRect.right = clip_x2;
468                 cmd->body.destRect.top = clip_y1;
469                 cmd->body.destRect.bottom = clip_y2;
470
471
472                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
473                                           fifo_size, 0, NULL);
474
475                 if (unlikely(ret != 0))
476                         break;
477         }
478
479         kfree(cmd);
480
481         return ret;
482 }
483
484 int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
485                                   struct drm_file *file_priv,
486                                   unsigned flags, unsigned color,
487                                   struct drm_clip_rect *clips,
488                                   unsigned num_clips)
489 {
490         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
491         struct vmw_master *vmaster = vmw_master(file_priv->master);
492         struct vmw_framebuffer_surface *vfbs =
493                 vmw_framebuffer_to_vfbs(framebuffer);
494         struct drm_clip_rect norect;
495         int ret, inc = 1;
496
497         if (unlikely(vfbs->master != file_priv->master))
498                 return -EINVAL;
499
500         /* Require ScreenObject support for 3D */
501         if (!dev_priv->sou_priv)
502                 return -EINVAL;
503
504         ret = ttm_read_lock(&vmaster->lock, true);
505         if (unlikely(ret != 0))
506                 return ret;
507
508         if (!num_clips) {
509                 num_clips = 1;
510                 clips = &norect;
511                 norect.x1 = norect.y1 = 0;
512                 norect.x2 = framebuffer->width;
513                 norect.y2 = framebuffer->height;
514         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
515                 num_clips /= 2;
516                 inc = 2; /* skip source rects */
517         }
518
519         ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
520                                    flags, color,
521                                    clips, num_clips, inc);
522
523         ttm_read_unlock(&vmaster->lock);
524         return 0;
525 }
526
527 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
528         .destroy = vmw_framebuffer_surface_destroy,
529         .dirty = vmw_framebuffer_surface_dirty,
530         .create_handle = vmw_framebuffer_create_handle,
531 };
532
533 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
534                                            struct drm_file *file_priv,
535                                            struct vmw_surface *surface,
536                                            struct vmw_framebuffer **out,
537                                            const struct drm_mode_fb_cmd
538                                            *mode_cmd)
539
540 {
541         struct drm_device *dev = dev_priv->dev;
542         struct vmw_framebuffer_surface *vfbs;
543         enum SVGA3dSurfaceFormat format;
544         struct vmw_master *vmaster = vmw_master(file_priv->master);
545         int ret;
546
547         /* 3D is only supported on HWv8 hosts which supports screen objects */
548         if (!dev_priv->sou_priv)
549                 return -ENOSYS;
550
551         /*
552          * Sanity checks.
553          */
554
555         if (unlikely(surface->mip_levels[0] != 1 ||
556                      surface->num_sizes != 1 ||
557                      surface->sizes[0].width < mode_cmd->width ||
558                      surface->sizes[0].height < mode_cmd->height ||
559                      surface->sizes[0].depth != 1)) {
560                 DRM_ERROR("Incompatible surface dimensions "
561                           "for requested mode.\n");
562                 return -EINVAL;
563         }
564
565         switch (mode_cmd->depth) {
566         case 32:
567                 format = SVGA3D_A8R8G8B8;
568                 break;
569         case 24:
570                 format = SVGA3D_X8R8G8B8;
571                 break;
572         case 16:
573                 format = SVGA3D_R5G6B5;
574                 break;
575         case 15:
576                 format = SVGA3D_A1R5G5B5;
577                 break;
578         case 8:
579                 format = SVGA3D_LUMINANCE8;
580                 break;
581         default:
582                 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
583                 return -EINVAL;
584         }
585
586         if (unlikely(format != surface->format)) {
587                 DRM_ERROR("Invalid surface format for requested mode.\n");
588                 return -EINVAL;
589         }
590
591         vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
592         if (!vfbs) {
593                 ret = -ENOMEM;
594                 goto out_err1;
595         }
596
597         ret = drm_framebuffer_init(dev, &vfbs->base.base,
598                                    &vmw_framebuffer_surface_funcs);
599         if (ret)
600                 goto out_err2;
601
602         if (!vmw_surface_reference(surface)) {
603                 DRM_ERROR("failed to reference surface %p\n", surface);
604                 goto out_err3;
605         }
606
607         /* XXX get the first 3 from the surface info */
608         vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
609         vfbs->base.base.pitch = mode_cmd->pitch;
610         vfbs->base.base.depth = mode_cmd->depth;
611         vfbs->base.base.width = mode_cmd->width;
612         vfbs->base.base.height = mode_cmd->height;
613         vfbs->surface = surface;
614         vfbs->base.user_handle = mode_cmd->handle;
615         vfbs->master = drm_master_get(file_priv->master);
616
617         mutex_lock(&vmaster->fb_surf_mutex);
618         list_add_tail(&vfbs->head, &vmaster->fb_surf);
619         mutex_unlock(&vmaster->fb_surf_mutex);
620
621         *out = &vfbs->base;
622
623         return 0;
624
625 out_err3:
626         drm_framebuffer_cleanup(&vfbs->base.base);
627 out_err2:
628         kfree(vfbs);
629 out_err1:
630         return ret;
631 }
632
633 /*
634  * Dmabuf framebuffer code
635  */
636
637 #define vmw_framebuffer_to_vfbd(x) \
638         container_of(x, struct vmw_framebuffer_dmabuf, base.base)
639
640 struct vmw_framebuffer_dmabuf {
641         struct vmw_framebuffer base;
642         struct vmw_dma_buffer *buffer;
643 };
644
645 void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
646 {
647         struct vmw_framebuffer_dmabuf *vfbd =
648                 vmw_framebuffer_to_vfbd(framebuffer);
649
650         drm_framebuffer_cleanup(framebuffer);
651         vmw_dmabuf_unreference(&vfbd->buffer);
652         ttm_base_object_unref(&vfbd->base.user_obj);
653
654         kfree(vfbd);
655 }
656
657 static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
658                                struct vmw_framebuffer *framebuffer,
659                                unsigned flags, unsigned color,
660                                struct drm_clip_rect *clips,
661                                unsigned num_clips, int increment)
662 {
663         size_t fifo_size;
664         int i;
665
666         struct {
667                 uint32_t header;
668                 SVGAFifoCmdUpdate body;
669         } *cmd;
670
671         fifo_size = sizeof(*cmd) * num_clips;
672         cmd = vmw_fifo_reserve(dev_priv, fifo_size);
673         if (unlikely(cmd == NULL)) {
674                 DRM_ERROR("Fifo reserve failed.\n");
675                 return -ENOMEM;
676         }
677
678         memset(cmd, 0, fifo_size);
679         for (i = 0; i < num_clips; i++, clips += increment) {
680                 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
681                 cmd[i].body.x = cpu_to_le32(clips->x1);
682                 cmd[i].body.y = cpu_to_le32(clips->y1);
683                 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
684                 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
685         }
686
687         vmw_fifo_commit(dev_priv, fifo_size);
688         return 0;
689 }
690
691 static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
692                                   struct vmw_private *dev_priv,
693                                   struct vmw_framebuffer *framebuffer)
694 {
695         int depth = framebuffer->base.depth;
696         size_t fifo_size;
697         int ret;
698
699         struct {
700                 uint32_t header;
701                 SVGAFifoCmdDefineGMRFB body;
702         } *cmd;
703
704         /* Emulate RGBA support, contrary to svga_reg.h this is not
705          * supported by hosts. This is only a problem if we are reading
706          * this value later and expecting what we uploaded back.
707          */
708         if (depth == 32)
709                 depth = 24;
710
711         fifo_size = sizeof(*cmd);
712         cmd = kmalloc(fifo_size, GFP_KERNEL);
713         if (unlikely(cmd == NULL)) {
714                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
715                 return -ENOMEM;
716         }
717
718         memset(cmd, 0, fifo_size);
719         cmd->header = SVGA_CMD_DEFINE_GMRFB;
720         cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
721         cmd->body.format.colorDepth = depth;
722         cmd->body.format.reserved = 0;
723         cmd->body.bytesPerLine = framebuffer->base.pitch;
724         cmd->body.ptr.gmrId = framebuffer->user_handle;
725         cmd->body.ptr.offset = 0;
726
727         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
728                                   fifo_size, 0, NULL);
729
730         kfree(cmd);
731
732         return ret;
733 }
734
735 static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
736                                struct vmw_private *dev_priv,
737                                struct vmw_framebuffer *framebuffer,
738                                unsigned flags, unsigned color,
739                                struct drm_clip_rect *clips,
740                                unsigned num_clips, int increment)
741 {
742         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
743         struct drm_clip_rect *clips_ptr;
744         int i, k, num_units, ret;
745         struct drm_crtc *crtc;
746         size_t fifo_size;
747
748         struct {
749                 uint32_t header;
750                 SVGAFifoCmdBlitGMRFBToScreen body;
751         } *blits;
752
753         ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
754         if (unlikely(ret != 0))
755                 return ret; /* define_gmrfb prints warnings */
756
757         fifo_size = sizeof(*blits) * num_clips;
758         blits = kmalloc(fifo_size, GFP_KERNEL);
759         if (unlikely(blits == NULL)) {
760                 DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
761                 return -ENOMEM;
762         }
763
764         num_units = 0;
765         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
766                 if (crtc->fb != &framebuffer->base)
767                         continue;
768                 units[num_units++] = vmw_crtc_to_du(crtc);
769         }
770
771         for (k = 0; k < num_units; k++) {
772                 struct vmw_display_unit *unit = units[k];
773                 int hit_num = 0;
774
775                 clips_ptr = clips;
776                 for (i = 0; i < num_clips; i++, clips_ptr += increment) {
777                         int clip_x1 = clips_ptr->x1 - unit->crtc.x;
778                         int clip_y1 = clips_ptr->y1 - unit->crtc.y;
779                         int clip_x2 = clips_ptr->x2 - unit->crtc.x;
780                         int clip_y2 = clips_ptr->y2 - unit->crtc.y;
781
782                         /* skip any crtcs that misses the clip region */
783                         if (clip_x1 >= unit->crtc.mode.hdisplay ||
784                             clip_y1 >= unit->crtc.mode.vdisplay ||
785                             clip_x2 <= 0 || clip_y2 <= 0)
786                                 continue;
787
788                         blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
789                         blits[hit_num].body.destScreenId = unit->unit;
790                         blits[hit_num].body.srcOrigin.x = clips_ptr->x1;
791                         blits[hit_num].body.srcOrigin.y = clips_ptr->y1;
792                         blits[hit_num].body.destRect.left = clip_x1;
793                         blits[hit_num].body.destRect.top = clip_y1;
794                         blits[hit_num].body.destRect.right = clip_x2;
795                         blits[hit_num].body.destRect.bottom = clip_y2;
796                         hit_num++;
797                 }
798
799                 /* no clips hit the crtc */
800                 if (hit_num == 0)
801                         continue;
802
803                 fifo_size = sizeof(*blits) * hit_num;
804                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
805                                           fifo_size, 0, NULL);
806
807                 if (unlikely(ret != 0))
808                         break;
809         }
810
811         kfree(blits);
812
813         return ret;
814 }
815
816 int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
817                                  struct drm_file *file_priv,
818                                  unsigned flags, unsigned color,
819                                  struct drm_clip_rect *clips,
820                                  unsigned num_clips)
821 {
822         struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
823         struct vmw_master *vmaster = vmw_master(file_priv->master);
824         struct vmw_framebuffer_dmabuf *vfbd =
825                 vmw_framebuffer_to_vfbd(framebuffer);
826         struct drm_clip_rect norect;
827         int ret, increment = 1;
828
829         ret = ttm_read_lock(&vmaster->lock, true);
830         if (unlikely(ret != 0))
831                 return ret;
832
833         if (!num_clips) {
834                 num_clips = 1;
835                 clips = &norect;
836                 norect.x1 = norect.y1 = 0;
837                 norect.x2 = framebuffer->width;
838                 norect.y2 = framebuffer->height;
839         } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
840                 num_clips /= 2;
841                 increment = 2;
842         }
843
844         if (dev_priv->ldu_priv) {
845                 ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
846                                           flags, color,
847                                           clips, num_clips, increment);
848         } else {
849                 ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
850                                           flags, color,
851                                           clips, num_clips, increment);
852         }
853
854         ttm_read_unlock(&vmaster->lock);
855         return ret;
856 }
857
858 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
859         .destroy = vmw_framebuffer_dmabuf_destroy,
860         .dirty = vmw_framebuffer_dmabuf_dirty,
861         .create_handle = vmw_framebuffer_create_handle,
862 };
863
864 /**
865  * Pin the dmabuffer to the start of vram.
866  */
867 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
868 {
869         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
870         struct vmw_framebuffer_dmabuf *vfbd =
871                 vmw_framebuffer_to_vfbd(&vfb->base);
872         int ret;
873
874         /* This code should not be used with screen objects */
875         BUG_ON(dev_priv->sou_priv);
876
877         vmw_overlay_pause_all(dev_priv);
878
879         ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
880
881         vmw_overlay_resume_all(dev_priv);
882
883         WARN_ON(ret != 0);
884
885         return 0;
886 }
887
888 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
889 {
890         struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
891         struct vmw_framebuffer_dmabuf *vfbd =
892                 vmw_framebuffer_to_vfbd(&vfb->base);
893
894         if (!vfbd->buffer) {
895                 WARN_ON(!vfbd->buffer);
896                 return 0;
897         }
898
899         return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
900 }
901
902 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
903                                           struct vmw_dma_buffer *dmabuf,
904                                           struct vmw_framebuffer **out,
905                                           const struct drm_mode_fb_cmd
906                                           *mode_cmd)
907
908 {
909         struct drm_device *dev = dev_priv->dev;
910         struct vmw_framebuffer_dmabuf *vfbd;
911         unsigned int requested_size;
912         int ret;
913
914         requested_size = mode_cmd->height * mode_cmd->pitch;
915         if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
916                 DRM_ERROR("Screen buffer object size is too small "
917                           "for requested mode.\n");
918                 return -EINVAL;
919         }
920
921         /* Limited framebuffer color depth support for screen objects */
922         if (dev_priv->sou_priv) {
923                 switch (mode_cmd->depth) {
924                 case 32:
925                 case 24:
926                         /* Only support 32 bpp for 32 and 24 depth fbs */
927                         if (mode_cmd->bpp == 32)
928                                 break;
929
930                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
931                                   mode_cmd->depth, mode_cmd->bpp);
932                         return -EINVAL;
933                 case 16:
934                 case 15:
935                         /* Only support 16 bpp for 16 and 15 depth fbs */
936                         if (mode_cmd->bpp == 16)
937                                 break;
938
939                         DRM_ERROR("Invalid color depth/bbp: %d %d\n",
940                                   mode_cmd->depth, mode_cmd->bpp);
941                         return -EINVAL;
942                 default:
943                         DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
944                         return -EINVAL;
945                 }
946         }
947
948         vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
949         if (!vfbd) {
950                 ret = -ENOMEM;
951                 goto out_err1;
952         }
953
954         ret = drm_framebuffer_init(dev, &vfbd->base.base,
955                                    &vmw_framebuffer_dmabuf_funcs);
956         if (ret)
957                 goto out_err2;
958
959         if (!vmw_dmabuf_reference(dmabuf)) {
960                 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
961                 goto out_err3;
962         }
963
964         vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
965         vfbd->base.base.pitch = mode_cmd->pitch;
966         vfbd->base.base.depth = mode_cmd->depth;
967         vfbd->base.base.width = mode_cmd->width;
968         vfbd->base.base.height = mode_cmd->height;
969         if (!dev_priv->sou_priv) {
970                 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
971                 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
972         }
973         vfbd->base.dmabuf = true;
974         vfbd->buffer = dmabuf;
975         vfbd->base.user_handle = mode_cmd->handle;
976         *out = &vfbd->base;
977
978         return 0;
979
980 out_err3:
981         drm_framebuffer_cleanup(&vfbd->base.base);
982 out_err2:
983         kfree(vfbd);
984 out_err1:
985         return ret;
986 }
987
988 /*
989  * Generic Kernel modesetting functions
990  */
991
992 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
993                                                  struct drm_file *file_priv,
994                                                  struct drm_mode_fb_cmd *mode_cmd)
995 {
996         struct vmw_private *dev_priv = vmw_priv(dev);
997         struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
998         struct vmw_framebuffer *vfb = NULL;
999         struct vmw_surface *surface = NULL;
1000         struct vmw_dma_buffer *bo = NULL;
1001         struct ttm_base_object *user_obj;
1002         u64 required_size;
1003         int ret;
1004
1005         /**
1006          * This code should be conditioned on Screen Objects not being used.
1007          * If screen objects are used, we can allocate a GMR to hold the
1008          * requested framebuffer.
1009          */
1010
1011         required_size = mode_cmd->pitch * mode_cmd->height;
1012         if (unlikely(required_size > (u64) dev_priv->vram_size)) {
1013                 DRM_ERROR("VRAM size is too small for requested mode.\n");
1014                 return ERR_PTR(-ENOMEM);
1015         }
1016
1017         /*
1018          * Take a reference on the user object of the resource
1019          * backing the kms fb. This ensures that user-space handle
1020          * lookups on that resource will always work as long as
1021          * it's registered with a kms framebuffer. This is important,
1022          * since vmw_execbuf_process identifies resources in the
1023          * command stream using user-space handles.
1024          */
1025
1026         user_obj = ttm_base_object_lookup(tfile, mode_cmd->handle);
1027         if (unlikely(user_obj == NULL)) {
1028                 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1029                 return ERR_PTR(-ENOENT);
1030         }
1031
1032         /**
1033          * End conditioned code.
1034          */
1035
1036         ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
1037                                              mode_cmd->handle, &surface);
1038         if (ret)
1039                 goto try_dmabuf;
1040
1041         if (!surface->scanout)
1042                 goto err_not_scanout;
1043
1044         ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv, surface,
1045                                               &vfb, mode_cmd);
1046
1047         /* vmw_user_surface_lookup takes one ref so does new_fb */
1048         vmw_surface_unreference(&surface);
1049
1050         if (ret) {
1051                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1052                 ttm_base_object_unref(&user_obj);
1053                 return ERR_PTR(ret);
1054         } else
1055                 vfb->user_obj = user_obj;
1056         return &vfb->base;
1057
1058 try_dmabuf:
1059         DRM_INFO("%s: trying buffer\n", __func__);
1060
1061         ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
1062         if (ret) {
1063                 DRM_ERROR("failed to find buffer: %i\n", ret);
1064                 return ERR_PTR(-ENOENT);
1065         }
1066
1067         ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
1068                                              mode_cmd);
1069
1070         /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
1071         vmw_dmabuf_unreference(&bo);
1072
1073         if (ret) {
1074                 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
1075                 ttm_base_object_unref(&user_obj);
1076                 return ERR_PTR(ret);
1077         } else
1078                 vfb->user_obj = user_obj;
1079
1080         return &vfb->base;
1081
1082 err_not_scanout:
1083         DRM_ERROR("surface not marked as scanout\n");
1084         /* vmw_user_surface_lookup takes one ref */
1085         vmw_surface_unreference(&surface);
1086         ttm_base_object_unref(&user_obj);
1087
1088         return ERR_PTR(-EINVAL);
1089 }
1090
1091 static struct drm_mode_config_funcs vmw_kms_funcs = {
1092         .fb_create = vmw_kms_fb_create,
1093 };
1094
1095 int vmw_kms_present(struct vmw_private *dev_priv,
1096                     struct drm_file *file_priv,
1097                     struct vmw_framebuffer *vfb,
1098                     struct vmw_surface *surface,
1099                     uint32_t sid,
1100                     int32_t destX, int32_t destY,
1101                     struct drm_vmw_rect *clips,
1102                     uint32_t num_clips)
1103 {
1104         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1105         struct drm_crtc *crtc;
1106         size_t fifo_size;
1107         int i, k, num_units;
1108         int ret = 0; /* silence warning */
1109
1110         struct {
1111                 SVGA3dCmdHeader header;
1112                 SVGA3dCmdBlitSurfaceToScreen body;
1113         } *cmd;
1114         SVGASignedRect *blits;
1115
1116         num_units = 0;
1117         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1118                 if (crtc->fb != &vfb->base)
1119                         continue;
1120                 units[num_units++] = vmw_crtc_to_du(crtc);
1121         }
1122
1123         BUG_ON(surface == NULL);
1124         BUG_ON(!clips || !num_clips);
1125
1126         fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1127         cmd = kmalloc(fifo_size, GFP_KERNEL);
1128         if (unlikely(cmd == NULL)) {
1129                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1130                 return -ENOMEM;
1131         }
1132
1133         /* only need to do this once */
1134         memset(cmd, 0, fifo_size);
1135         cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1136         cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1137
1138         cmd->body.srcRect.left = 0;
1139         cmd->body.srcRect.right = surface->sizes[0].width;
1140         cmd->body.srcRect.top = 0;
1141         cmd->body.srcRect.bottom = surface->sizes[0].height;
1142
1143         blits = (SVGASignedRect *)&cmd[1];
1144         for (i = 0; i < num_clips; i++) {
1145                 blits[i].left   = clips[i].x;
1146                 blits[i].right  = clips[i].x + clips[i].w;
1147                 blits[i].top    = clips[i].y;
1148                 blits[i].bottom = clips[i].y + clips[i].h;
1149         }
1150
1151         for (k = 0; k < num_units; k++) {
1152                 struct vmw_display_unit *unit = units[k];
1153                 int clip_x1 = destX - unit->crtc.x;
1154                 int clip_y1 = destY - unit->crtc.y;
1155                 int clip_x2 = clip_x1 + surface->sizes[0].width;
1156                 int clip_y2 = clip_y1 + surface->sizes[0].height;
1157
1158                 /* skip any crtcs that misses the clip region */
1159                 if (clip_x1 >= unit->crtc.mode.hdisplay ||
1160                     clip_y1 >= unit->crtc.mode.vdisplay ||
1161                     clip_x2 <= 0 || clip_y2 <= 0)
1162                         continue;
1163
1164                 /* need to reset sid as it is changed by execbuf */
1165                 cmd->body.srcImage.sid = sid;
1166
1167                 cmd->body.destScreenId = unit->unit;
1168
1169                 /*
1170                  * The blit command is a lot more resilient then the
1171                  * readback command when it comes to clip rects. So its
1172                  * okay to go out of bounds.
1173                  */
1174
1175                 cmd->body.destRect.left = clip_x1;
1176                 cmd->body.destRect.right = clip_x2;
1177                 cmd->body.destRect.top = clip_y1;
1178                 cmd->body.destRect.bottom = clip_y2;
1179
1180                 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1181                                           fifo_size, 0, NULL);
1182
1183                 if (unlikely(ret != 0))
1184                         break;
1185         }
1186
1187         kfree(cmd);
1188
1189         return ret;
1190 }
1191
1192 int vmw_kms_readback(struct vmw_private *dev_priv,
1193                      struct drm_file *file_priv,
1194                      struct vmw_framebuffer *vfb,
1195                      struct drm_vmw_fence_rep __user *user_fence_rep,
1196                      struct drm_vmw_rect *clips,
1197                      uint32_t num_clips)
1198 {
1199         struct vmw_framebuffer_dmabuf *vfbd =
1200                 vmw_framebuffer_to_vfbd(&vfb->base);
1201         struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1202         struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1203         struct drm_crtc *crtc;
1204         size_t fifo_size;
1205         int i, k, ret, num_units, blits_pos;
1206
1207         struct {
1208                 uint32_t header;
1209                 SVGAFifoCmdDefineGMRFB body;
1210         } *cmd;
1211         struct {
1212                 uint32_t header;
1213                 SVGAFifoCmdBlitScreenToGMRFB body;
1214         } *blits;
1215
1216         num_units = 0;
1217         list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1218                 if (crtc->fb != &vfb->base)
1219                         continue;
1220                 units[num_units++] = vmw_crtc_to_du(crtc);
1221         }
1222
1223         BUG_ON(dmabuf == NULL);
1224         BUG_ON(!clips || !num_clips);
1225
1226         /* take a safe guess at fifo size */
1227         fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1228         cmd = kmalloc(fifo_size, GFP_KERNEL);
1229         if (unlikely(cmd == NULL)) {
1230                 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1231                 return -ENOMEM;
1232         }
1233
1234         memset(cmd, 0, fifo_size);
1235         cmd->header = SVGA_CMD_DEFINE_GMRFB;
1236         cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1237         cmd->body.format.colorDepth = vfb->base.depth;
1238         cmd->body.format.reserved = 0;
1239         cmd->body.bytesPerLine = vfb->base.pitch;
1240         cmd->body.ptr.gmrId = vfb->user_handle;
1241         cmd->body.ptr.offset = 0;
1242
1243         blits = (void *)&cmd[1];
1244         blits_pos = 0;
1245         for (i = 0; i < num_units; i++) {
1246                 struct drm_vmw_rect *c = clips;
1247                 for (k = 0; k < num_clips; k++, c++) {
1248                         /* transform clip coords to crtc origin based coords */
1249                         int clip_x1 = c->x - units[i]->crtc.x;
1250                         int clip_x2 = c->x - units[i]->crtc.x + c->w;
1251                         int clip_y1 = c->y - units[i]->crtc.y;
1252                         int clip_y2 = c->y - units[i]->crtc.y + c->h;
1253                         int dest_x = c->x;
1254                         int dest_y = c->y;
1255
1256                         /* compensate for clipping, we negate
1257                          * a negative number and add that.
1258                          */
1259                         if (clip_x1 < 0)
1260                                 dest_x += -clip_x1;
1261                         if (clip_y1 < 0)
1262                                 dest_y += -clip_y1;
1263
1264                         /* clip */
1265                         clip_x1 = max(clip_x1, 0);
1266                         clip_y1 = max(clip_y1, 0);
1267                         clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1268                         clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1269
1270                         /* and cull any rects that misses the crtc */
1271                         if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1272                             clip_y1 >= units[i]->crtc.mode.vdisplay ||
1273                             clip_x2 <= 0 || clip_y2 <= 0)
1274                                 continue;
1275
1276                         blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1277                         blits[blits_pos].body.srcScreenId = units[i]->unit;
1278                         blits[blits_pos].body.destOrigin.x = dest_x;
1279                         blits[blits_pos].body.destOrigin.y = dest_y;
1280
1281                         blits[blits_pos].body.srcRect.left = clip_x1;
1282                         blits[blits_pos].body.srcRect.top = clip_y1;
1283                         blits[blits_pos].body.srcRect.right = clip_x2;
1284                         blits[blits_pos].body.srcRect.bottom = clip_y2;
1285                         blits_pos++;
1286                 }
1287         }
1288         /* reset size here and use calculated exact size from loops */
1289         fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1290
1291         ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1292                                   0, user_fence_rep);
1293
1294         kfree(cmd);
1295
1296         return ret;
1297 }
1298
1299 int vmw_kms_init(struct vmw_private *dev_priv)
1300 {
1301         struct drm_device *dev = dev_priv->dev;
1302         int ret;
1303
1304         drm_mode_config_init(dev);
1305         dev->mode_config.funcs = &vmw_kms_funcs;
1306         dev->mode_config.min_width = 1;
1307         dev->mode_config.min_height = 1;
1308         /* assumed largest fb size */
1309         dev->mode_config.max_width = 8192;
1310         dev->mode_config.max_height = 8192;
1311
1312         ret = vmw_kms_init_screen_object_display(dev_priv);
1313         if (ret) /* Fallback */
1314                 (void)vmw_kms_init_legacy_display_system(dev_priv);
1315
1316         return 0;
1317 }
1318
1319 int vmw_kms_close(struct vmw_private *dev_priv)
1320 {
1321         /*
1322          * Docs says we should take the lock before calling this function
1323          * but since it destroys encoders and our destructor calls
1324          * drm_encoder_cleanup which takes the lock we deadlock.
1325          */
1326         drm_mode_config_cleanup(dev_priv->dev);
1327         if (dev_priv->sou_priv)
1328                 vmw_kms_close_screen_object_display(dev_priv);
1329         else
1330                 vmw_kms_close_legacy_display_system(dev_priv);
1331         return 0;
1332 }
1333
1334 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1335                                 struct drm_file *file_priv)
1336 {
1337         struct drm_vmw_cursor_bypass_arg *arg = data;
1338         struct vmw_display_unit *du;
1339         struct drm_mode_object *obj;
1340         struct drm_crtc *crtc;
1341         int ret = 0;
1342
1343
1344         mutex_lock(&dev->mode_config.mutex);
1345         if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1346
1347                 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1348                         du = vmw_crtc_to_du(crtc);
1349                         du->hotspot_x = arg->xhot;
1350                         du->hotspot_y = arg->yhot;
1351                 }
1352
1353                 mutex_unlock(&dev->mode_config.mutex);
1354                 return 0;
1355         }
1356
1357         obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
1358         if (!obj) {
1359                 ret = -EINVAL;
1360                 goto out;
1361         }
1362
1363         crtc = obj_to_crtc(obj);
1364         du = vmw_crtc_to_du(crtc);
1365
1366         du->hotspot_x = arg->xhot;
1367         du->hotspot_y = arg->yhot;
1368
1369 out:
1370         mutex_unlock(&dev->mode_config.mutex);
1371
1372         return ret;
1373 }
1374
1375 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1376                         unsigned width, unsigned height, unsigned pitch,
1377                         unsigned bpp, unsigned depth)
1378 {
1379         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1380                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1381         else if (vmw_fifo_have_pitchlock(vmw_priv))
1382                 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1383         vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1384         vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1385         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1386
1387         if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1388                 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1389                           depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1390                 return -EINVAL;
1391         }
1392
1393         return 0;
1394 }
1395
1396 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1397 {
1398         struct vmw_vga_topology_state *save;
1399         uint32_t i;
1400
1401         vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1402         vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1403         vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1404         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1405                 vmw_priv->vga_pitchlock =
1406                   vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1407         else if (vmw_fifo_have_pitchlock(vmw_priv))
1408                 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1409                                                        SVGA_FIFO_PITCHLOCK);
1410
1411         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1412                 return 0;
1413
1414         vmw_priv->num_displays = vmw_read(vmw_priv,
1415                                           SVGA_REG_NUM_GUEST_DISPLAYS);
1416
1417         if (vmw_priv->num_displays == 0)
1418                 vmw_priv->num_displays = 1;
1419
1420         for (i = 0; i < vmw_priv->num_displays; ++i) {
1421                 save = &vmw_priv->vga_save[i];
1422                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1423                 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1424                 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1425                 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1426                 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1427                 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1428                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1429                 if (i == 0 && vmw_priv->num_displays == 1 &&
1430                     save->width == 0 && save->height == 0) {
1431
1432                         /*
1433                          * It should be fairly safe to assume that these
1434                          * values are uninitialized.
1435                          */
1436
1437                         save->width = vmw_priv->vga_width - save->pos_x;
1438                         save->height = vmw_priv->vga_height - save->pos_y;
1439                 }
1440         }
1441
1442         return 0;
1443 }
1444
1445 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1446 {
1447         struct vmw_vga_topology_state *save;
1448         uint32_t i;
1449
1450         vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1451         vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1452         vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1453         if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1454                 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1455                           vmw_priv->vga_pitchlock);
1456         else if (vmw_fifo_have_pitchlock(vmw_priv))
1457                 iowrite32(vmw_priv->vga_pitchlock,
1458                           vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1459
1460         if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1461                 return 0;
1462
1463         for (i = 0; i < vmw_priv->num_displays; ++i) {
1464                 save = &vmw_priv->vga_save[i];
1465                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1466                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1467                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1468                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1469                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1470                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1471                 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1472         }
1473
1474         return 0;
1475 }
1476
1477 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1478                                 uint32_t pitch,
1479                                 uint32_t height)
1480 {
1481         return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
1482 }
1483
1484
1485 /**
1486  * Function called by DRM code called with vbl_lock held.
1487  */
1488 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1489 {
1490         return 0;
1491 }
1492
1493 /**
1494  * Function called by DRM code called with vbl_lock held.
1495  */
1496 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1497 {
1498         return -ENOSYS;
1499 }
1500
1501 /**
1502  * Function called by DRM code called with vbl_lock held.
1503  */
1504 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1505 {
1506 }
1507
1508
1509 /*
1510  * Small shared kms functions.
1511  */
1512
1513 int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1514                          struct drm_vmw_rect *rects)
1515 {
1516         struct drm_device *dev = dev_priv->dev;
1517         struct vmw_display_unit *du;
1518         struct drm_connector *con;
1519
1520         mutex_lock(&dev->mode_config.mutex);
1521
1522 #if 0
1523         {
1524                 unsigned int i;
1525
1526                 DRM_INFO("%s: new layout ", __func__);
1527                 for (i = 0; i < num; i++)
1528                         DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1529                                  rects[i].w, rects[i].h);
1530                 DRM_INFO("\n");
1531         }
1532 #endif
1533
1534         list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1535                 du = vmw_connector_to_du(con);
1536                 if (num > du->unit) {
1537                         du->pref_width = rects[du->unit].w;
1538                         du->pref_height = rects[du->unit].h;
1539                         du->pref_active = true;
1540                         du->gui_x = rects[du->unit].x;
1541                         du->gui_y = rects[du->unit].y;
1542                 } else {
1543                         du->pref_width = 800;
1544                         du->pref_height = 600;
1545                         du->pref_active = false;
1546                 }
1547                 con->status = vmw_du_connector_detect(con, true);
1548         }
1549
1550         mutex_unlock(&dev->mode_config.mutex);
1551
1552         return 0;
1553 }
1554
1555 void vmw_du_crtc_save(struct drm_crtc *crtc)
1556 {
1557 }
1558
1559 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1560 {
1561 }
1562
1563 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1564                            u16 *r, u16 *g, u16 *b,
1565                            uint32_t start, uint32_t size)
1566 {
1567         struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1568         int i;
1569
1570         for (i = 0; i < size; i++) {
1571                 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1572                           r[i], g[i], b[i]);
1573                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1574                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1575                 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1576         }
1577 }
1578
1579 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1580 {
1581 }
1582
1583 void vmw_du_connector_save(struct drm_connector *connector)
1584 {
1585 }
1586
1587 void vmw_du_connector_restore(struct drm_connector *connector)
1588 {
1589 }
1590
1591 enum drm_connector_status
1592 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1593 {
1594         uint32_t num_displays;
1595         struct drm_device *dev = connector->dev;
1596         struct vmw_private *dev_priv = vmw_priv(dev);
1597         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1598
1599         mutex_lock(&dev_priv->hw_mutex);
1600         num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1601         mutex_unlock(&dev_priv->hw_mutex);
1602
1603         return ((vmw_connector_to_du(connector)->unit < num_displays &&
1604                  du->pref_active) ?
1605                 connector_status_connected : connector_status_disconnected);
1606 }
1607
1608 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1609         /* 640x480@60Hz */
1610         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1611                    752, 800, 0, 480, 489, 492, 525, 0,
1612                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1613         /* 800x600@60Hz */
1614         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1615                    968, 1056, 0, 600, 601, 605, 628, 0,
1616                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1617         /* 1024x768@60Hz */
1618         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1619                    1184, 1344, 0, 768, 771, 777, 806, 0,
1620                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1621         /* 1152x864@75Hz */
1622         { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1623                    1344, 1600, 0, 864, 865, 868, 900, 0,
1624                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625         /* 1280x768@60Hz */
1626         { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1627                    1472, 1664, 0, 768, 771, 778, 798, 0,
1628                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1629         /* 1280x800@60Hz */
1630         { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1631                    1480, 1680, 0, 800, 803, 809, 831, 0,
1632                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1633         /* 1280x960@60Hz */
1634         { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1635                    1488, 1800, 0, 960, 961, 964, 1000, 0,
1636                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1637         /* 1280x1024@60Hz */
1638         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1639                    1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1640                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1641         /* 1360x768@60Hz */
1642         { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1643                    1536, 1792, 0, 768, 771, 777, 795, 0,
1644                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1645         /* 1440x1050@60Hz */
1646         { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1647                    1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1648                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1649         /* 1440x900@60Hz */
1650         { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1651                    1672, 1904, 0, 900, 903, 909, 934, 0,
1652                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1653         /* 1600x1200@60Hz */
1654         { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1655                    1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1656                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1657         /* 1680x1050@60Hz */
1658         { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1659                    1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1660                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1661         /* 1792x1344@60Hz */
1662         { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1663                    2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1664                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1665         /* 1853x1392@60Hz */
1666         { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1667                    2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1668                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1669         /* 1920x1200@60Hz */
1670         { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1671                    2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1672                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1673         /* 1920x1440@60Hz */
1674         { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1675                    2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1676                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1677         /* 2560x1600@60Hz */
1678         { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1679                    3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1680                    DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1681         /* Terminate */
1682         { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1683 };
1684
1685 /**
1686  * vmw_guess_mode_timing - Provide fake timings for a
1687  * 60Hz vrefresh mode.
1688  *
1689  * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1690  * members filled in.
1691  */
1692 static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1693 {
1694         mode->hsync_start = mode->hdisplay + 50;
1695         mode->hsync_end = mode->hsync_start + 50;
1696         mode->htotal = mode->hsync_end + 50;
1697
1698         mode->vsync_start = mode->vdisplay + 50;
1699         mode->vsync_end = mode->vsync_start + 50;
1700         mode->vtotal = mode->vsync_end + 50;
1701
1702         mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1703         mode->vrefresh = drm_mode_vrefresh(mode);
1704 }
1705
1706
1707 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1708                                 uint32_t max_width, uint32_t max_height)
1709 {
1710         struct vmw_display_unit *du = vmw_connector_to_du(connector);
1711         struct drm_device *dev = connector->dev;
1712         struct vmw_private *dev_priv = vmw_priv(dev);
1713         struct drm_display_mode *mode = NULL;
1714         struct drm_display_mode *bmode;
1715         struct drm_display_mode prefmode = { DRM_MODE("preferred",
1716                 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1717                 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1718                 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1719         };
1720         int i;
1721
1722         /* Add preferred mode */
1723         {
1724                 mode = drm_mode_duplicate(dev, &prefmode);
1725                 if (!mode)
1726                         return 0;
1727                 mode->hdisplay = du->pref_width;
1728                 mode->vdisplay = du->pref_height;
1729                 vmw_guess_mode_timing(mode);
1730
1731                 if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
1732                                                mode->vdisplay)) {
1733                         drm_mode_probed_add(connector, mode);
1734                 } else {
1735                         drm_mode_destroy(dev, mode);
1736                         mode = NULL;
1737                 }
1738
1739                 if (du->pref_mode) {
1740                         list_del_init(&du->pref_mode->head);
1741                         drm_mode_destroy(dev, du->pref_mode);
1742                 }
1743
1744                 /* mode might be null here, this is intended */
1745                 du->pref_mode = mode;
1746         }
1747
1748         for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1749                 bmode = &vmw_kms_connector_builtin[i];
1750                 if (bmode->hdisplay > max_width ||
1751                     bmode->vdisplay > max_height)
1752                         continue;
1753
1754                 if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
1755                                                 bmode->vdisplay))
1756                         continue;
1757
1758                 mode = drm_mode_duplicate(dev, bmode);
1759                 if (!mode)
1760                         return 0;
1761                 mode->vrefresh = drm_mode_vrefresh(mode);
1762
1763                 drm_mode_probed_add(connector, mode);
1764         }
1765
1766         /* Move the prefered mode first, help apps pick the right mode. */
1767         if (du->pref_mode)
1768                 list_move(&du->pref_mode->head, &connector->probed_modes);
1769
1770         drm_mode_connector_list_update(connector);
1771
1772         return 1;
1773 }
1774
1775 int vmw_du_connector_set_property(struct drm_connector *connector,
1776                                   struct drm_property *property,
1777                                   uint64_t val)
1778 {
1779         return 0;
1780 }
1781
1782
1783 int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1784                                 struct drm_file *file_priv)
1785 {
1786         struct vmw_private *dev_priv = vmw_priv(dev);
1787         struct drm_vmw_update_layout_arg *arg =
1788                 (struct drm_vmw_update_layout_arg *)data;
1789         struct vmw_master *vmaster = vmw_master(file_priv->master);
1790         void __user *user_rects;
1791         struct drm_vmw_rect *rects;
1792         unsigned rects_size;
1793         int ret;
1794         int i;
1795         struct drm_mode_config *mode_config = &dev->mode_config;
1796
1797         ret = ttm_read_lock(&vmaster->lock, true);
1798         if (unlikely(ret != 0))
1799                 return ret;
1800
1801         if (!arg->num_outputs) {
1802                 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1803                 vmw_du_update_layout(dev_priv, 1, &def_rect);
1804                 goto out_unlock;
1805         }
1806
1807         rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1808         rects = kzalloc(rects_size, GFP_KERNEL);
1809         if (unlikely(!rects)) {
1810                 ret = -ENOMEM;
1811                 goto out_unlock;
1812         }
1813
1814         user_rects = (void __user *)(unsigned long)arg->rects;
1815         ret = copy_from_user(rects, user_rects, rects_size);
1816         if (unlikely(ret != 0)) {
1817                 DRM_ERROR("Failed to get rects.\n");
1818                 ret = -EFAULT;
1819                 goto out_free;
1820         }
1821
1822         for (i = 0; i < arg->num_outputs; ++i) {
1823                 if (rects->x < 0 ||
1824                     rects->y < 0 ||
1825                     rects->x + rects->w > mode_config->max_width ||
1826                     rects->y + rects->h > mode_config->max_height) {
1827                         DRM_ERROR("Invalid GUI layout.\n");
1828                         ret = -EINVAL;
1829                         goto out_free;
1830                 }
1831         }
1832
1833         vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1834
1835 out_free:
1836         kfree(rects);
1837 out_unlock:
1838         ttm_read_unlock(&vmaster->lock);
1839         return ret;
1840 }