1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "vmwgfx_drv.h"
30 #include "ttm/ttm_placement.h"
31 #include "ttm/ttm_bo_driver.h"
32 #include "ttm/ttm_object.h"
33 #include "ttm/ttm_module.h"
35 #define VMWGFX_DRIVER_NAME "vmwgfx"
36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37 #define VMWGFX_CHIP_SVGAII 0
38 #define VMW_FB_RESERVATION 0
41 * Fully encoded drm commands. Might move to vmw_drm.h
44 #define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47 #define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50 #define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53 #define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
57 #define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60 #define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63 #define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
67 #define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70 #define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73 #define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76 #define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79 #define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82 #define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85 #define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88 #define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
94 * The core DRM version of this macro doesn't account for
98 #define VMW_IOCTL_DEF(ioctl, func, flags) \
99 [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
105 static struct drm_ioctl_desc vmw_ioctls[] = {
106 VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
107 DRM_AUTH | DRM_UNLOCKED),
108 VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
109 DRM_AUTH | DRM_UNLOCKED),
110 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
111 DRM_AUTH | DRM_UNLOCKED),
112 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
113 vmw_kms_cursor_bypass_ioctl,
114 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
116 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
118 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
119 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
120 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
121 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
123 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
124 DRM_AUTH | DRM_UNLOCKED),
125 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
126 DRM_AUTH | DRM_UNLOCKED),
127 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
128 DRM_AUTH | DRM_UNLOCKED),
129 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
130 DRM_AUTH | DRM_UNLOCKED),
131 VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
132 DRM_AUTH | DRM_UNLOCKED),
133 VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
134 DRM_AUTH | DRM_UNLOCKED),
135 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
136 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
137 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
138 DRM_AUTH | DRM_UNLOCKED)
141 static struct pci_device_id vmw_pci_id_list[] = {
142 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
146 static char *vmw_devname = "vmwgfx";
148 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
149 static void vmw_master_init(struct vmw_master *);
150 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
153 static void vmw_print_capabilities(uint32_t capabilities)
155 DRM_INFO("Capabilities:\n");
156 if (capabilities & SVGA_CAP_RECT_COPY)
157 DRM_INFO(" Rect copy.\n");
158 if (capabilities & SVGA_CAP_CURSOR)
159 DRM_INFO(" Cursor.\n");
160 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
161 DRM_INFO(" Cursor bypass.\n");
162 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
163 DRM_INFO(" Cursor bypass 2.\n");
164 if (capabilities & SVGA_CAP_8BIT_EMULATION)
165 DRM_INFO(" 8bit emulation.\n");
166 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
167 DRM_INFO(" Alpha cursor.\n");
168 if (capabilities & SVGA_CAP_3D)
170 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
171 DRM_INFO(" Extended Fifo.\n");
172 if (capabilities & SVGA_CAP_MULTIMON)
173 DRM_INFO(" Multimon.\n");
174 if (capabilities & SVGA_CAP_PITCHLOCK)
175 DRM_INFO(" Pitchlock.\n");
176 if (capabilities & SVGA_CAP_IRQMASK)
177 DRM_INFO(" Irq mask.\n");
178 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
179 DRM_INFO(" Display Topology.\n");
180 if (capabilities & SVGA_CAP_GMR)
182 if (capabilities & SVGA_CAP_TRACES)
183 DRM_INFO(" Traces.\n");
186 static int vmw_request_device(struct vmw_private *dev_priv)
190 vmw_kms_save_vga(dev_priv);
192 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
193 if (unlikely(ret != 0)) {
194 DRM_ERROR("Unable to initialize FIFO.\n");
201 static void vmw_release_device(struct vmw_private *dev_priv)
203 vmw_fifo_release(dev_priv, &dev_priv->fifo);
204 vmw_kms_restore_vga(dev_priv);
208 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
210 struct vmw_private *dev_priv;
214 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
215 if (unlikely(dev_priv == NULL)) {
216 DRM_ERROR("Failed allocating a device private struct.\n");
219 memset(dev_priv, 0, sizeof(*dev_priv));
222 dev_priv->vmw_chipset = chipset;
223 dev_priv->last_read_sequence = (uint32_t) -100;
224 mutex_init(&dev_priv->hw_mutex);
225 mutex_init(&dev_priv->cmdbuf_mutex);
226 rwlock_init(&dev_priv->resource_lock);
227 idr_init(&dev_priv->context_idr);
228 idr_init(&dev_priv->surface_idr);
229 idr_init(&dev_priv->stream_idr);
230 ida_init(&dev_priv->gmr_ida);
231 mutex_init(&dev_priv->init_mutex);
232 init_waitqueue_head(&dev_priv->fence_queue);
233 init_waitqueue_head(&dev_priv->fifo_queue);
234 atomic_set(&dev_priv->fence_queue_waiters, 0);
235 atomic_set(&dev_priv->fifo_queue_waiters, 0);
236 INIT_LIST_HEAD(&dev_priv->gmr_lru);
238 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
239 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
240 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
242 mutex_lock(&dev_priv->hw_mutex);
244 vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
245 svga_id = vmw_read(dev_priv, SVGA_REG_ID);
246 if (svga_id != SVGA_ID_2) {
248 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
249 mutex_unlock(&dev_priv->hw_mutex);
253 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
255 if (dev_priv->capabilities & SVGA_CAP_GMR) {
256 dev_priv->max_gmr_descriptors =
258 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
259 dev_priv->max_gmr_ids =
260 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
263 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
264 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
265 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
266 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
268 mutex_unlock(&dev_priv->hw_mutex);
270 vmw_print_capabilities(dev_priv->capabilities);
272 if (dev_priv->capabilities & SVGA_CAP_GMR) {
273 DRM_INFO("Max GMR ids is %u\n",
274 (unsigned)dev_priv->max_gmr_ids);
275 DRM_INFO("Max GMR descriptors is %u\n",
276 (unsigned)dev_priv->max_gmr_descriptors);
278 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
279 dev_priv->vram_start, dev_priv->vram_size / 1024);
280 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
281 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
283 ret = vmw_ttm_global_init(dev_priv);
284 if (unlikely(ret != 0))
288 vmw_master_init(&dev_priv->fbdev_master);
289 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
290 dev_priv->active_master = &dev_priv->fbdev_master;
293 ret = ttm_bo_device_init(&dev_priv->bdev,
294 dev_priv->bo_global_ref.ref.object,
295 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
297 if (unlikely(ret != 0)) {
298 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
302 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
303 (dev_priv->vram_size >> PAGE_SHIFT));
304 if (unlikely(ret != 0)) {
305 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
309 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
310 dev_priv->mmio_size, DRM_MTRR_WC);
312 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
313 dev_priv->mmio_size);
315 if (unlikely(dev_priv->mmio_virt == NULL)) {
317 DRM_ERROR("Failed mapping MMIO.\n");
321 /* Need mmio memory to check for fifo pitchlock cap. */
322 if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY) &&
323 !(dev_priv->capabilities & SVGA_CAP_PITCHLOCK) &&
324 !vmw_fifo_have_pitchlock(dev_priv)) {
326 DRM_ERROR("Hardware has no pitchlock\n");
330 dev_priv->tdev = ttm_object_device_init
331 (dev_priv->mem_global_ref.object, 12);
333 if (unlikely(dev_priv->tdev == NULL)) {
334 DRM_ERROR("Unable to initialize TTM object management.\n");
339 dev->dev_private = dev_priv;
342 dev->devname = vmw_devname;
344 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
345 ret = drm_irq_install(dev);
346 if (unlikely(ret != 0)) {
347 DRM_ERROR("Failed installing irq: %d\n", ret);
352 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
353 dev_priv->stealth = (ret != 0);
354 if (dev_priv->stealth) {
356 * Request at least the mmio PCI resource.
359 DRM_INFO("It appears like vesafb is loaded. "
360 "Ignore above error if any.\n");
361 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
362 if (unlikely(ret != 0)) {
363 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
367 ret = vmw_request_device(dev_priv);
368 if (unlikely(ret != 0))
370 vmw_kms_init(dev_priv);
371 vmw_overlay_init(dev_priv);
372 vmw_fb_init(dev_priv);
374 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
375 register_pm_notifier(&dev_priv->pm_nb);
377 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
382 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
383 drm_irq_uninstall(dev_priv->dev);
384 if (dev->devname == vmw_devname)
387 ttm_object_device_release(&dev_priv->tdev);
389 iounmap(dev_priv->mmio_virt);
391 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
392 dev_priv->mmio_size, DRM_MTRR_WC);
393 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
395 (void)ttm_bo_device_release(&dev_priv->bdev);
397 vmw_ttm_global_release(dev_priv);
399 ida_destroy(&dev_priv->gmr_ida);
400 idr_destroy(&dev_priv->surface_idr);
401 idr_destroy(&dev_priv->context_idr);
402 idr_destroy(&dev_priv->stream_idr);
407 static int vmw_driver_unload(struct drm_device *dev)
409 struct vmw_private *dev_priv = vmw_priv(dev);
411 unregister_pm_notifier(&dev_priv->pm_nb);
413 vmw_fb_close(dev_priv);
414 vmw_kms_close(dev_priv);
415 vmw_overlay_close(dev_priv);
416 vmw_release_device(dev_priv);
417 if (dev_priv->stealth)
418 pci_release_region(dev->pdev, 2);
420 pci_release_regions(dev->pdev);
422 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
423 drm_irq_uninstall(dev_priv->dev);
424 if (dev->devname == vmw_devname)
426 ttm_object_device_release(&dev_priv->tdev);
427 iounmap(dev_priv->mmio_virt);
428 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
429 dev_priv->mmio_size, DRM_MTRR_WC);
430 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
431 (void)ttm_bo_device_release(&dev_priv->bdev);
432 vmw_ttm_global_release(dev_priv);
433 ida_destroy(&dev_priv->gmr_ida);
434 idr_destroy(&dev_priv->surface_idr);
435 idr_destroy(&dev_priv->context_idr);
436 idr_destroy(&dev_priv->stream_idr);
443 static void vmw_postclose(struct drm_device *dev,
444 struct drm_file *file_priv)
446 struct vmw_fpriv *vmw_fp;
448 vmw_fp = vmw_fpriv(file_priv);
449 ttm_object_file_release(&vmw_fp->tfile);
450 if (vmw_fp->locked_master)
451 drm_master_put(&vmw_fp->locked_master);
455 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
457 struct vmw_private *dev_priv = vmw_priv(dev);
458 struct vmw_fpriv *vmw_fp;
461 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
462 if (unlikely(vmw_fp == NULL))
465 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
466 if (unlikely(vmw_fp->tfile == NULL))
469 file_priv->driver_priv = vmw_fp;
471 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
472 dev_priv->bdev.dev_mapping =
473 file_priv->filp->f_path.dentry->d_inode->i_mapping;
482 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
485 struct drm_file *file_priv = filp->private_data;
486 struct drm_device *dev = file_priv->minor->dev;
487 unsigned int nr = DRM_IOCTL_NR(cmd);
490 * Do extra checking on driver private ioctls.
493 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
494 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
495 struct drm_ioctl_desc *ioctl =
496 &vmw_ioctls[nr - DRM_COMMAND_BASE];
498 if (unlikely(ioctl->cmd != cmd)) {
499 DRM_ERROR("Invalid command format, ioctl %d\n",
500 nr - DRM_COMMAND_BASE);
505 return drm_ioctl(filp, cmd, arg);
508 static int vmw_firstopen(struct drm_device *dev)
510 struct vmw_private *dev_priv = vmw_priv(dev);
511 dev_priv->is_opened = true;
516 static void vmw_lastclose(struct drm_device *dev)
518 struct vmw_private *dev_priv = vmw_priv(dev);
519 struct drm_crtc *crtc;
520 struct drm_mode_set set;
524 * Do nothing on the lastclose call from drm_unload.
527 if (!dev_priv->is_opened)
530 dev_priv->is_opened = false;
535 set.connectors = NULL;
536 set.num_connectors = 0;
538 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
540 ret = crtc->funcs->set_config(&set);
546 static void vmw_master_init(struct vmw_master *vmaster)
548 ttm_lock_init(&vmaster->lock);
551 static int vmw_master_create(struct drm_device *dev,
552 struct drm_master *master)
554 struct vmw_master *vmaster;
556 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
557 if (unlikely(vmaster == NULL))
560 ttm_lock_init(&vmaster->lock);
561 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
562 master->driver_priv = vmaster;
567 static void vmw_master_destroy(struct drm_device *dev,
568 struct drm_master *master)
570 struct vmw_master *vmaster = vmw_master(master);
572 master->driver_priv = NULL;
577 static int vmw_master_set(struct drm_device *dev,
578 struct drm_file *file_priv,
581 struct vmw_private *dev_priv = vmw_priv(dev);
582 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
583 struct vmw_master *active = dev_priv->active_master;
584 struct vmw_master *vmaster = vmw_master(file_priv->master);
588 BUG_ON(active != &dev_priv->fbdev_master);
589 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
590 if (unlikely(ret != 0))
591 goto out_no_active_lock;
593 ttm_lock_set_kill(&active->lock, true, SIGTERM);
594 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
595 if (unlikely(ret != 0)) {
596 DRM_ERROR("Unable to clean VRAM on "
600 dev_priv->active_master = NULL;
603 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
605 ttm_vt_unlock(&vmaster->lock);
606 BUG_ON(vmw_fp->locked_master != file_priv->master);
607 drm_master_put(&vmw_fp->locked_master);
610 dev_priv->active_master = vmaster;
615 vmw_release_device(dev_priv);
619 static void vmw_master_drop(struct drm_device *dev,
620 struct drm_file *file_priv,
623 struct vmw_private *dev_priv = vmw_priv(dev);
624 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
625 struct vmw_master *vmaster = vmw_master(file_priv->master);
629 * Make sure the master doesn't disappear while we have
633 vmw_fp->locked_master = drm_master_get(file_priv->master);
634 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
636 if (unlikely((ret != 0))) {
637 DRM_ERROR("Unable to lock TTM at VT switch.\n");
638 drm_master_put(&vmw_fp->locked_master);
641 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
643 dev_priv->active_master = &dev_priv->fbdev_master;
644 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
645 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
651 static void vmw_remove(struct pci_dev *pdev)
653 struct drm_device *dev = pci_get_drvdata(pdev);
658 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
661 struct vmw_private *dev_priv =
662 container_of(nb, struct vmw_private, pm_nb);
663 struct vmw_master *vmaster = dev_priv->active_master;
666 case PM_HIBERNATION_PREPARE:
667 case PM_SUSPEND_PREPARE:
668 ttm_suspend_lock(&vmaster->lock);
671 * This empties VRAM and unbinds all GMR bindings.
672 * Buffer contents is moved to swappable memory.
674 ttm_bo_swapout_all(&dev_priv->bdev);
676 case PM_POST_HIBERNATION:
677 case PM_POST_SUSPEND:
678 ttm_suspend_unlock(&vmaster->lock);
680 case PM_RESTORE_PREPARE:
682 case PM_POST_RESTORE:
691 * These might not be needed with the virtual SVGA device.
694 int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
696 pci_save_state(pdev);
697 pci_disable_device(pdev);
698 pci_set_power_state(pdev, PCI_D3hot);
702 int vmw_pci_resume(struct pci_dev *pdev)
704 pci_set_power_state(pdev, PCI_D0);
705 pci_restore_state(pdev);
706 return pci_enable_device(pdev);
709 static struct drm_driver driver = {
710 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
712 .load = vmw_driver_load,
713 .unload = vmw_driver_unload,
714 .firstopen = vmw_firstopen,
715 .lastclose = vmw_lastclose,
716 .irq_preinstall = vmw_irq_preinstall,
717 .irq_postinstall = vmw_irq_postinstall,
718 .irq_uninstall = vmw_irq_uninstall,
719 .irq_handler = vmw_irq_handler,
720 .reclaim_buffers_locked = NULL,
721 .get_map_ofs = drm_core_get_map_ofs,
722 .get_reg_ofs = drm_core_get_reg_ofs,
723 .ioctls = vmw_ioctls,
724 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
725 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
726 .master_create = vmw_master_create,
727 .master_destroy = vmw_master_destroy,
728 .master_set = vmw_master_set,
729 .master_drop = vmw_master_drop,
730 .open = vmw_driver_open,
731 .postclose = vmw_postclose,
733 .owner = THIS_MODULE,
735 .release = drm_release,
736 .unlocked_ioctl = vmw_unlocked_ioctl,
739 .fasync = drm_fasync,
740 #if defined(CONFIG_COMPAT)
741 .compat_ioctl = drm_compat_ioctl,
745 .name = VMWGFX_DRIVER_NAME,
746 .id_table = vmw_pci_id_list,
748 .remove = vmw_remove,
749 .suspend = vmw_pci_suspend,
750 .resume = vmw_pci_resume
752 .name = VMWGFX_DRIVER_NAME,
753 .desc = VMWGFX_DRIVER_DESC,
754 .date = VMWGFX_DRIVER_DATE,
755 .major = VMWGFX_DRIVER_MAJOR,
756 .minor = VMWGFX_DRIVER_MINOR,
757 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
760 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
762 return drm_get_dev(pdev, ent, &driver);
765 static int __init vmwgfx_init(void)
768 ret = drm_init(&driver);
770 DRM_ERROR("Failed initializing DRM.\n");
774 static void __exit vmwgfx_exit(void)
779 module_init(vmwgfx_init);
780 module_exit(vmwgfx_exit);
782 MODULE_AUTHOR("VMware Inc. and others");
783 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
784 MODULE_LICENSE("GPL and additional rights");