drm/i915: drop pointer to drm_gem_object
[pandora-kernel.git] / drivers / gpu / drm / radeon / radeon_ttm.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32 #include <ttm/ttm_bo_api.h>
33 #include <ttm/ttm_bo_driver.h>
34 #include <ttm/ttm_placement.h>
35 #include <ttm/ttm_module.h>
36 #include <ttm/ttm_page_alloc.h>
37 #include <drm/drmP.h>
38 #include <drm/radeon_drm.h>
39 #include <linux/seq_file.h>
40 #include <linux/slab.h>
41 #include "radeon_reg.h"
42 #include "radeon.h"
43
44 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
45
46 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
47
48 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
49 {
50         struct radeon_mman *mman;
51         struct radeon_device *rdev;
52
53         mman = container_of(bdev, struct radeon_mman, bdev);
54         rdev = container_of(mman, struct radeon_device, mman);
55         return rdev;
56 }
57
58
59 /*
60  * Global memory.
61  */
62 static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
63 {
64         return ttm_mem_global_init(ref->object);
65 }
66
67 static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
68 {
69         ttm_mem_global_release(ref->object);
70 }
71
72 static int radeon_ttm_global_init(struct radeon_device *rdev)
73 {
74         struct ttm_global_reference *global_ref;
75         int r;
76
77         rdev->mman.mem_global_referenced = false;
78         global_ref = &rdev->mman.mem_global_ref;
79         global_ref->global_type = TTM_GLOBAL_TTM_MEM;
80         global_ref->size = sizeof(struct ttm_mem_global);
81         global_ref->init = &radeon_ttm_mem_global_init;
82         global_ref->release = &radeon_ttm_mem_global_release;
83         r = ttm_global_item_ref(global_ref);
84         if (r != 0) {
85                 DRM_ERROR("Failed setting up TTM memory accounting "
86                           "subsystem.\n");
87                 return r;
88         }
89
90         rdev->mman.bo_global_ref.mem_glob =
91                 rdev->mman.mem_global_ref.object;
92         global_ref = &rdev->mman.bo_global_ref.ref;
93         global_ref->global_type = TTM_GLOBAL_TTM_BO;
94         global_ref->size = sizeof(struct ttm_bo_global);
95         global_ref->init = &ttm_bo_global_init;
96         global_ref->release = &ttm_bo_global_release;
97         r = ttm_global_item_ref(global_ref);
98         if (r != 0) {
99                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
100                 ttm_global_item_unref(&rdev->mman.mem_global_ref);
101                 return r;
102         }
103
104         rdev->mman.mem_global_referenced = true;
105         return 0;
106 }
107
108 static void radeon_ttm_global_fini(struct radeon_device *rdev)
109 {
110         if (rdev->mman.mem_global_referenced) {
111                 ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
112                 ttm_global_item_unref(&rdev->mman.mem_global_ref);
113                 rdev->mman.mem_global_referenced = false;
114         }
115 }
116
117 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
118
119 static struct ttm_backend*
120 radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
121 {
122         struct radeon_device *rdev;
123
124         rdev = radeon_get_rdev(bdev);
125 #if __OS_HAS_AGP
126         if (rdev->flags & RADEON_IS_AGP) {
127                 return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
128         } else
129 #endif
130         {
131                 return radeon_ttm_backend_create(rdev);
132         }
133 }
134
135 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
136 {
137         return 0;
138 }
139
140 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
141                                 struct ttm_mem_type_manager *man)
142 {
143         struct radeon_device *rdev;
144
145         rdev = radeon_get_rdev(bdev);
146
147         switch (type) {
148         case TTM_PL_SYSTEM:
149                 /* System memory */
150                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
151                 man->available_caching = TTM_PL_MASK_CACHING;
152                 man->default_caching = TTM_PL_FLAG_CACHED;
153                 break;
154         case TTM_PL_TT:
155                 man->gpu_offset = rdev->mc.gtt_start;
156                 man->available_caching = TTM_PL_MASK_CACHING;
157                 man->default_caching = TTM_PL_FLAG_CACHED;
158                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
159 #if __OS_HAS_AGP
160                 if (rdev->flags & RADEON_IS_AGP) {
161                         if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
162                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
163                                           (unsigned)type);
164                                 return -EINVAL;
165                         }
166                         man->io_offset = rdev->mc.agp_base;
167                         man->io_size = rdev->mc.gtt_size;
168                         man->io_addr = NULL;
169                         if (!rdev->ddev->agp->cant_use_aperture)
170                                 man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
171                                              TTM_MEMTYPE_FLAG_MAPPABLE;
172                         man->available_caching = TTM_PL_FLAG_UNCACHED |
173                                                  TTM_PL_FLAG_WC;
174                         man->default_caching = TTM_PL_FLAG_WC;
175                 } else
176 #endif
177                 {
178                         man->io_offset = 0;
179                         man->io_size = 0;
180                         man->io_addr = NULL;
181                 }
182                 break;
183         case TTM_PL_VRAM:
184                 /* "On-card" video ram */
185                 man->gpu_offset = rdev->mc.vram_start;
186                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
187                              TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
188                              TTM_MEMTYPE_FLAG_MAPPABLE;
189                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
190                 man->default_caching = TTM_PL_FLAG_WC;
191                 man->io_addr = NULL;
192                 man->io_offset = rdev->mc.aper_base;
193                 man->io_size = rdev->mc.aper_size;
194                 break;
195         default:
196                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
197                 return -EINVAL;
198         }
199         return 0;
200 }
201
202 static void radeon_evict_flags(struct ttm_buffer_object *bo,
203                                 struct ttm_placement *placement)
204 {
205         struct radeon_bo *rbo;
206         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
207
208         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
209                 placement->fpfn = 0;
210                 placement->lpfn = 0;
211                 placement->placement = &placements;
212                 placement->busy_placement = &placements;
213                 placement->num_placement = 1;
214                 placement->num_busy_placement = 1;
215                 return;
216         }
217         rbo = container_of(bo, struct radeon_bo, tbo);
218         switch (bo->mem.mem_type) {
219         case TTM_PL_VRAM:
220                 if (rbo->rdev->cp.ready == false)
221                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
222                 else
223                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
224                 break;
225         case TTM_PL_TT:
226         default:
227                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
228         }
229         *placement = rbo->placement;
230 }
231
232 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
233 {
234         return 0;
235 }
236
237 static void radeon_move_null(struct ttm_buffer_object *bo,
238                              struct ttm_mem_reg *new_mem)
239 {
240         struct ttm_mem_reg *old_mem = &bo->mem;
241
242         BUG_ON(old_mem->mm_node != NULL);
243         *old_mem = *new_mem;
244         new_mem->mm_node = NULL;
245 }
246
247 static int radeon_move_blit(struct ttm_buffer_object *bo,
248                             bool evict, int no_wait,
249                             struct ttm_mem_reg *new_mem,
250                             struct ttm_mem_reg *old_mem)
251 {
252         struct radeon_device *rdev;
253         uint64_t old_start, new_start;
254         struct radeon_fence *fence;
255         int r;
256
257         rdev = radeon_get_rdev(bo->bdev);
258         r = radeon_fence_create(rdev, &fence);
259         if (unlikely(r)) {
260                 return r;
261         }
262         old_start = old_mem->mm_node->start << PAGE_SHIFT;
263         new_start = new_mem->mm_node->start << PAGE_SHIFT;
264
265         switch (old_mem->mem_type) {
266         case TTM_PL_VRAM:
267                 old_start += rdev->mc.vram_start;
268                 break;
269         case TTM_PL_TT:
270                 old_start += rdev->mc.gtt_start;
271                 break;
272         default:
273                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
274                 return -EINVAL;
275         }
276         switch (new_mem->mem_type) {
277         case TTM_PL_VRAM:
278                 new_start += rdev->mc.vram_start;
279                 break;
280         case TTM_PL_TT:
281                 new_start += rdev->mc.gtt_start;
282                 break;
283         default:
284                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
285                 return -EINVAL;
286         }
287         if (!rdev->cp.ready) {
288                 DRM_ERROR("Trying to move memory with CP turned off.\n");
289                 return -EINVAL;
290         }
291         r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
292         /* FIXME: handle copy error */
293         r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
294                                       evict, no_wait, new_mem);
295         radeon_fence_unref(&fence);
296         return r;
297 }
298
299 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
300                                 bool evict, bool interruptible, bool no_wait,
301                                 struct ttm_mem_reg *new_mem)
302 {
303         struct radeon_device *rdev;
304         struct ttm_mem_reg *old_mem = &bo->mem;
305         struct ttm_mem_reg tmp_mem;
306         u32 placements;
307         struct ttm_placement placement;
308         int r;
309
310         rdev = radeon_get_rdev(bo->bdev);
311         tmp_mem = *new_mem;
312         tmp_mem.mm_node = NULL;
313         placement.fpfn = 0;
314         placement.lpfn = 0;
315         placement.num_placement = 1;
316         placement.placement = &placements;
317         placement.num_busy_placement = 1;
318         placement.busy_placement = &placements;
319         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
320         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
321                              interruptible, no_wait);
322         if (unlikely(r)) {
323                 return r;
324         }
325
326         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
327         if (unlikely(r)) {
328                 goto out_cleanup;
329         }
330
331         r = ttm_tt_bind(bo->ttm, &tmp_mem);
332         if (unlikely(r)) {
333                 goto out_cleanup;
334         }
335         r = radeon_move_blit(bo, true, no_wait, &tmp_mem, old_mem);
336         if (unlikely(r)) {
337                 goto out_cleanup;
338         }
339         r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
340 out_cleanup:
341         if (tmp_mem.mm_node) {
342                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
343
344                 spin_lock(&glob->lru_lock);
345                 drm_mm_put_block(tmp_mem.mm_node);
346                 spin_unlock(&glob->lru_lock);
347                 return r;
348         }
349         return r;
350 }
351
352 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
353                                 bool evict, bool interruptible, bool no_wait,
354                                 struct ttm_mem_reg *new_mem)
355 {
356         struct radeon_device *rdev;
357         struct ttm_mem_reg *old_mem = &bo->mem;
358         struct ttm_mem_reg tmp_mem;
359         struct ttm_placement placement;
360         u32 placements;
361         int r;
362
363         rdev = radeon_get_rdev(bo->bdev);
364         tmp_mem = *new_mem;
365         tmp_mem.mm_node = NULL;
366         placement.fpfn = 0;
367         placement.lpfn = 0;
368         placement.num_placement = 1;
369         placement.placement = &placements;
370         placement.num_busy_placement = 1;
371         placement.busy_placement = &placements;
372         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
373         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait);
374         if (unlikely(r)) {
375                 return r;
376         }
377         r = ttm_bo_move_ttm(bo, true, no_wait, &tmp_mem);
378         if (unlikely(r)) {
379                 goto out_cleanup;
380         }
381         r = radeon_move_blit(bo, true, no_wait, new_mem, old_mem);
382         if (unlikely(r)) {
383                 goto out_cleanup;
384         }
385 out_cleanup:
386         if (tmp_mem.mm_node) {
387                 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
388
389                 spin_lock(&glob->lru_lock);
390                 drm_mm_put_block(tmp_mem.mm_node);
391                 spin_unlock(&glob->lru_lock);
392                 return r;
393         }
394         return r;
395 }
396
397 static int radeon_bo_move(struct ttm_buffer_object *bo,
398                           bool evict, bool interruptible, bool no_wait,
399                           struct ttm_mem_reg *new_mem)
400 {
401         struct radeon_device *rdev;
402         struct ttm_mem_reg *old_mem = &bo->mem;
403         int r;
404
405         rdev = radeon_get_rdev(bo->bdev);
406         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
407                 radeon_move_null(bo, new_mem);
408                 return 0;
409         }
410         if ((old_mem->mem_type == TTM_PL_TT &&
411              new_mem->mem_type == TTM_PL_SYSTEM) ||
412             (old_mem->mem_type == TTM_PL_SYSTEM &&
413              new_mem->mem_type == TTM_PL_TT)) {
414                 /* bind is enough */
415                 radeon_move_null(bo, new_mem);
416                 return 0;
417         }
418         if (!rdev->cp.ready || rdev->asic->copy == NULL) {
419                 /* use memcpy */
420                 goto memcpy;
421         }
422
423         if (old_mem->mem_type == TTM_PL_VRAM &&
424             new_mem->mem_type == TTM_PL_SYSTEM) {
425                 r = radeon_move_vram_ram(bo, evict, interruptible,
426                                             no_wait, new_mem);
427         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
428                    new_mem->mem_type == TTM_PL_VRAM) {
429                 r = radeon_move_ram_vram(bo, evict, interruptible,
430                                             no_wait, new_mem);
431         } else {
432                 r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
433         }
434
435         if (r) {
436 memcpy:
437                 r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
438         }
439
440         return r;
441 }
442
443 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
444                                 bool lazy, bool interruptible)
445 {
446         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
447 }
448
449 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
450 {
451         return 0;
452 }
453
454 static void radeon_sync_obj_unref(void **sync_obj)
455 {
456         radeon_fence_unref((struct radeon_fence **)sync_obj);
457 }
458
459 static void *radeon_sync_obj_ref(void *sync_obj)
460 {
461         return radeon_fence_ref((struct radeon_fence *)sync_obj);
462 }
463
464 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
465 {
466         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
467 }
468
469 static struct ttm_bo_driver radeon_bo_driver = {
470         .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
471         .invalidate_caches = &radeon_invalidate_caches,
472         .init_mem_type = &radeon_init_mem_type,
473         .evict_flags = &radeon_evict_flags,
474         .move = &radeon_bo_move,
475         .verify_access = &radeon_verify_access,
476         .sync_obj_signaled = &radeon_sync_obj_signaled,
477         .sync_obj_wait = &radeon_sync_obj_wait,
478         .sync_obj_flush = &radeon_sync_obj_flush,
479         .sync_obj_unref = &radeon_sync_obj_unref,
480         .sync_obj_ref = &radeon_sync_obj_ref,
481         .move_notify = &radeon_bo_move_notify,
482         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
483 };
484
485 int radeon_ttm_init(struct radeon_device *rdev)
486 {
487         int r;
488
489         r = radeon_ttm_global_init(rdev);
490         if (r) {
491                 return r;
492         }
493         /* No others user of address space so set it to 0 */
494         r = ttm_bo_device_init(&rdev->mman.bdev,
495                                rdev->mman.bo_global_ref.ref.object,
496                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
497                                rdev->need_dma32);
498         if (r) {
499                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
500                 return r;
501         }
502         rdev->mman.initialized = true;
503         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
504                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
505         if (r) {
506                 DRM_ERROR("Failed initializing VRAM heap.\n");
507                 return r;
508         }
509         r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
510                                 RADEON_GEM_DOMAIN_VRAM,
511                                 &rdev->stollen_vga_memory);
512         if (r) {
513                 return r;
514         }
515         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
516         if (r)
517                 return r;
518         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
519         radeon_bo_unreserve(rdev->stollen_vga_memory);
520         if (r) {
521                 radeon_bo_unref(&rdev->stollen_vga_memory);
522                 return r;
523         }
524         DRM_INFO("radeon: %uM of VRAM memory ready\n",
525                  (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
526         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
527                                 rdev->mc.gtt_size >> PAGE_SHIFT);
528         if (r) {
529                 DRM_ERROR("Failed initializing GTT heap.\n");
530                 return r;
531         }
532         DRM_INFO("radeon: %uM of GTT memory ready.\n",
533                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
534         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
535                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
536         }
537
538         r = radeon_ttm_debugfs_init(rdev);
539         if (r) {
540                 DRM_ERROR("Failed to init debugfs\n");
541                 return r;
542         }
543         return 0;
544 }
545
546 void radeon_ttm_fini(struct radeon_device *rdev)
547 {
548         int r;
549
550         if (!rdev->mman.initialized)
551                 return;
552         if (rdev->stollen_vga_memory) {
553                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
554                 if (r == 0) {
555                         radeon_bo_unpin(rdev->stollen_vga_memory);
556                         radeon_bo_unreserve(rdev->stollen_vga_memory);
557                 }
558                 radeon_bo_unref(&rdev->stollen_vga_memory);
559         }
560         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
561         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
562         ttm_bo_device_release(&rdev->mman.bdev);
563         radeon_gart_fini(rdev);
564         radeon_ttm_global_fini(rdev);
565         rdev->mman.initialized = false;
566         DRM_INFO("radeon: ttm finalized\n");
567 }
568
569 static struct vm_operations_struct radeon_ttm_vm_ops;
570 static const struct vm_operations_struct *ttm_vm_ops = NULL;
571
572 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
573 {
574         struct ttm_buffer_object *bo;
575         int r;
576
577         bo = (struct ttm_buffer_object *)vma->vm_private_data;
578         if (bo == NULL) {
579                 return VM_FAULT_NOPAGE;
580         }
581         r = ttm_vm_ops->fault(vma, vmf);
582         return r;
583 }
584
585 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
586 {
587         struct drm_file *file_priv;
588         struct radeon_device *rdev;
589         int r;
590
591         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
592                 return drm_mmap(filp, vma);
593         }
594
595         file_priv = (struct drm_file *)filp->private_data;
596         rdev = file_priv->minor->dev->dev_private;
597         if (rdev == NULL) {
598                 return -EINVAL;
599         }
600         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
601         if (unlikely(r != 0)) {
602                 return r;
603         }
604         if (unlikely(ttm_vm_ops == NULL)) {
605                 ttm_vm_ops = vma->vm_ops;
606                 radeon_ttm_vm_ops = *ttm_vm_ops;
607                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
608         }
609         vma->vm_ops = &radeon_ttm_vm_ops;
610         return 0;
611 }
612
613
614 /*
615  * TTM backend functions.
616  */
617 struct radeon_ttm_backend {
618         struct ttm_backend              backend;
619         struct radeon_device            *rdev;
620         unsigned long                   num_pages;
621         struct page                     **pages;
622         struct page                     *dummy_read_page;
623         bool                            populated;
624         bool                            bound;
625         unsigned                        offset;
626 };
627
628 static int radeon_ttm_backend_populate(struct ttm_backend *backend,
629                                        unsigned long num_pages,
630                                        struct page **pages,
631                                        struct page *dummy_read_page)
632 {
633         struct radeon_ttm_backend *gtt;
634
635         gtt = container_of(backend, struct radeon_ttm_backend, backend);
636         gtt->pages = pages;
637         gtt->num_pages = num_pages;
638         gtt->dummy_read_page = dummy_read_page;
639         gtt->populated = true;
640         return 0;
641 }
642
643 static void radeon_ttm_backend_clear(struct ttm_backend *backend)
644 {
645         struct radeon_ttm_backend *gtt;
646
647         gtt = container_of(backend, struct radeon_ttm_backend, backend);
648         gtt->pages = NULL;
649         gtt->num_pages = 0;
650         gtt->dummy_read_page = NULL;
651         gtt->populated = false;
652         gtt->bound = false;
653 }
654
655
656 static int radeon_ttm_backend_bind(struct ttm_backend *backend,
657                                    struct ttm_mem_reg *bo_mem)
658 {
659         struct radeon_ttm_backend *gtt;
660         int r;
661
662         gtt = container_of(backend, struct radeon_ttm_backend, backend);
663         gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
664         if (!gtt->num_pages) {
665                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
666         }
667         r = radeon_gart_bind(gtt->rdev, gtt->offset,
668                              gtt->num_pages, gtt->pages);
669         if (r) {
670                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
671                           gtt->num_pages, gtt->offset);
672                 return r;
673         }
674         gtt->bound = true;
675         return 0;
676 }
677
678 static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
679 {
680         struct radeon_ttm_backend *gtt;
681
682         gtt = container_of(backend, struct radeon_ttm_backend, backend);
683         radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
684         gtt->bound = false;
685         return 0;
686 }
687
688 static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
689 {
690         struct radeon_ttm_backend *gtt;
691
692         gtt = container_of(backend, struct radeon_ttm_backend, backend);
693         if (gtt->bound) {
694                 radeon_ttm_backend_unbind(backend);
695         }
696         kfree(gtt);
697 }
698
699 static struct ttm_backend_func radeon_backend_func = {
700         .populate = &radeon_ttm_backend_populate,
701         .clear = &radeon_ttm_backend_clear,
702         .bind = &radeon_ttm_backend_bind,
703         .unbind = &radeon_ttm_backend_unbind,
704         .destroy = &radeon_ttm_backend_destroy,
705 };
706
707 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
708 {
709         struct radeon_ttm_backend *gtt;
710
711         gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
712         if (gtt == NULL) {
713                 return NULL;
714         }
715         gtt->backend.bdev = &rdev->mman.bdev;
716         gtt->backend.flags = 0;
717         gtt->backend.func = &radeon_backend_func;
718         gtt->rdev = rdev;
719         gtt->pages = NULL;
720         gtt->num_pages = 0;
721         gtt->dummy_read_page = NULL;
722         gtt->populated = false;
723         gtt->bound = false;
724         return &gtt->backend;
725 }
726
727 #define RADEON_DEBUGFS_MEM_TYPES 2
728
729 #if defined(CONFIG_DEBUG_FS)
730 static int radeon_mm_dump_table(struct seq_file *m, void *data)
731 {
732         struct drm_info_node *node = (struct drm_info_node *)m->private;
733         struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
734         struct drm_device *dev = node->minor->dev;
735         struct radeon_device *rdev = dev->dev_private;
736         int ret;
737         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
738
739         spin_lock(&glob->lru_lock);
740         ret = drm_mm_dump_table(m, mm);
741         spin_unlock(&glob->lru_lock);
742         return ret;
743 }
744 #endif
745
746 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
747 {
748 #if defined(CONFIG_DEBUG_FS)
749         static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+1];
750         static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+1][32];
751         unsigned i;
752
753         for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
754                 if (i == 0)
755                         sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
756                 else
757                         sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
758                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
759                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
760                 radeon_mem_types_list[i].driver_features = 0;
761                 if (i == 0)
762                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
763                 else
764                         radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
765
766         }
767         /* Add ttm page pool to debugfs */
768         sprintf(radeon_mem_types_names[i], "ttm_page_pool");
769         radeon_mem_types_list[i].name = radeon_mem_types_names[i];
770         radeon_mem_types_list[i].show = &ttm_page_alloc_debugfs;
771         radeon_mem_types_list[i].driver_features = 0;
772         radeon_mem_types_list[i].data = NULL;
773         return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES+1);
774
775 #endif
776         return 0;
777 }