drivers/gpu/drm/radeon/radeon_object.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <linux/list.h>
  33 #include <drm/drmP.h>
  34 #include "radeon_drm.h"
  35 #include "radeon.h"
  36
  37
  38 int radeon_ttm_init(struct radeon_device *rdev);
  39 void radeon_ttm_fini(struct radeon_device *rdev);
  40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  41
  42 /*
  43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  44  * function are calling it.
  45  */
  46
  47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  48 {
  49         struct radeon_bo *bo;
  50
  51         bo = container_of(tbo, struct radeon_bo, tbo);
  52         mutex_lock(&bo->rdev->gem.mutex);
  53         list_del_init(&bo->list);
  54         mutex_unlock(&bo->rdev->gem.mutex);
  55         radeon_bo_clear_surface_reg(bo);
  56         kfree(bo);
  57 }
  58
  59 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
  60 {
  61         if (bo->destroy == &radeon_ttm_bo_destroy)
  62                 return true;
  63         return false;
  64 }
  65
  66 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
  67 {
  68         u32 c = 0;
  69
  70         rbo->placement.fpfn = 0;
  71         rbo->placement.lpfn = 0;
  72         rbo->placement.placement = rbo->placements;
  73         rbo->placement.busy_placement = rbo->placements;
  74         if (domain & RADEON_GEM_DOMAIN_VRAM)
  75                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
  76                                         TTM_PL_FLAG_VRAM;
  77         if (domain & RADEON_GEM_DOMAIN_GTT)
  78                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  79         if (domain & RADEON_GEM_DOMAIN_CPU)
  80                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  81         if (!c)
  82                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  83         rbo->placement.num_placement = c;
  84         rbo->placement.num_busy_placement = c;
  85 }
  86
  87 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  88                         unsigned long size, bool kernel, u32 domain,
  89                         struct radeon_bo **bo_ptr)
  90 {
  91         struct radeon_bo *bo;
  92         enum ttm_bo_type type;
  93         int r;
  94
  95         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  96                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  97         }
  98         if (kernel) {
  99                 type = ttm_bo_type_kernel;
 100         } else {
 101                 type = ttm_bo_type_device;
 102         }
 103         *bo_ptr = NULL;
 104         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
 105         if (bo == NULL)
 106                 return -ENOMEM;
 107         bo->rdev = rdev;
 108         bo->gobj = gobj;
 109         bo->surface_reg = -1;
 110         INIT_LIST_HEAD(&bo->list);
 111
 112         radeon_ttm_placement_from_domain(bo, domain);
 113         /* Kernel allocation are uninterruptible */
 114         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
 115                         &bo->placement, 0, 0, !kernel, NULL, size,
 116                         &radeon_ttm_bo_destroy);
 117         if (unlikely(r != 0)) {
 118                 if (r != -ERESTARTSYS)
 119                         dev_err(rdev->dev,
 120                                 "object_init failed for (%lu, 0x%08X)\n",
 121                                 size, domain);
 122                 return r;
 123         }
 124         *bo_ptr = bo;
 125         if (gobj) {
 126                 mutex_lock(&bo->rdev->gem.mutex);
 127                 list_add_tail(&bo->list, &rdev->gem.objects);
 128                 mutex_unlock(&bo->rdev->gem.mutex);
 129         }
 130         return 0;
 131 }
 132
 133 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 134 {
 135         bool is_iomem;
 136         int r;
 137
 138         if (bo->kptr) {
 139                 if (ptr) {
 140                         *ptr = bo->kptr;
 141                 }
 142                 return 0;
 143         }
 144         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 145         if (r) {
 146                 return r;
 147         }
 148         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 149         if (ptr) {
 150                 *ptr = bo->kptr;
 151         }
 152         radeon_bo_check_tiling(bo, 0, 0);
 153         return 0;
 154 }
 155
 156 void radeon_bo_kunmap(struct radeon_bo *bo)
 157 {
 158         if (bo->kptr == NULL)
 159                 return;
 160         bo->kptr = NULL;
 161         radeon_bo_check_tiling(bo, 0, 0);
 162         ttm_bo_kunmap(&bo->kmap);
 163 }
 164
 165 void radeon_bo_unref(struct radeon_bo **bo)
 166 {
 167         struct ttm_buffer_object *tbo;
 168
 169         if ((*bo) == NULL)
 170                 return;
 171         tbo = &((*bo)->tbo);
 172         ttm_bo_unref(&tbo);
 173         if (tbo == NULL)
 174                 *bo = NULL;
 175 }
 176
 177 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 178 {
 179         int r, i;
 180
 181         radeon_ttm_placement_from_domain(bo, domain);
 182         if (bo->pin_count) {
 183                 bo->pin_count++;
 184                 if (gpu_addr)
 185                         *gpu_addr = radeon_bo_gpu_offset(bo);
 186                 return 0;
 187         }
 188         radeon_ttm_placement_from_domain(bo, domain);
 189         for (i = 0; i < bo->placement.num_placement; i++)
 190                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
 191         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 192         if (likely(r == 0)) {
 193                 bo->pin_count = 1;
 194                 if (gpu_addr != NULL)
 195                         *gpu_addr = radeon_bo_gpu_offset(bo);
 196         }
 197         if (unlikely(r != 0))
 198                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 199         return r;
 200 }
 201
 202 int radeon_bo_unpin(struct radeon_bo *bo)
 203 {
 204         int r, i;
 205
 206         if (!bo->pin_count) {
 207                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
 208                 return 0;
 209         }
 210         bo->pin_count--;
 211         if (bo->pin_count)
 212                 return 0;
 213         for (i = 0; i < bo->placement.num_placement; i++)
 214                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
 215         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 216         if (unlikely(r != 0))
 217                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 218         return r;
 219 }
 220
 221 int radeon_bo_evict_vram(struct radeon_device *rdev)
 222 {
 223         /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
 224         if (0 && (rdev->flags & RADEON_IS_IGP)) {
 225                 if (rdev->mc.igp_sideport_enabled == false)
 226                         /* Useless to evict on IGP chips */
 227                         return 0;
 228         }
 229         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 230 }
 231
 232 void radeon_bo_force_delete(struct radeon_device *rdev)
 233 {
 234         struct radeon_bo *bo, *n;
 235         struct drm_gem_object *gobj;
 236
 237         if (list_empty(&rdev->gem.objects)) {
 238                 return;
 239         }
 240         dev_err(rdev->dev, "Userspace still has active objects !\n");
 241         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 242                 mutex_lock(&rdev->ddev->struct_mutex);
 243                 gobj = bo->gobj;
 244                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
 245                         gobj, bo, (unsigned long)gobj->size,
 246                         *((unsigned long *)&gobj->refcount));
 247                 mutex_lock(&bo->rdev->gem.mutex);
 248                 list_del_init(&bo->list);
 249                 mutex_unlock(&bo->rdev->gem.mutex);
 250                 radeon_bo_unref(&bo);
 251                 gobj->driver_private = NULL;
 252                 drm_gem_object_unreference(gobj);
 253                 mutex_unlock(&rdev->ddev->struct_mutex);
 254         }
 255 }
 256
 257 int radeon_bo_init(struct radeon_device *rdev)
 258 {
 259         /* Add an MTRR for the VRAM */
 260         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
 261                         MTRR_TYPE_WRCOMB, 1);
 262         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 263                 rdev->mc.mc_vram_size >> 20,
 264                 (unsigned long long)rdev->mc.aper_size >> 20);
 265         DRM_INFO("RAM width %dbits %cDR\n",
 266                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
 267         return radeon_ttm_init(rdev);
 268 }
 269
 270 void radeon_bo_fini(struct radeon_device *rdev)
 271 {
 272         radeon_ttm_fini(rdev);
 273 }
 274
 275 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 276                                 struct list_head *head)
 277 {
 278         if (lobj->wdomain) {
 279                 list_add(&lobj->list, head);
 280         } else {
 281                 list_add_tail(&lobj->list, head);
 282         }
 283 }
 284
 285 int radeon_bo_list_reserve(struct list_head *head)
 286 {
 287         struct radeon_bo_list *lobj;
 288         int r;
 289
 290         list_for_each_entry(lobj, head, list){
 291                 r = radeon_bo_reserve(lobj->bo, false);
 292                 if (unlikely(r != 0))
 293                         return r;
 294         }
 295         return 0;
 296 }
 297
 298 void radeon_bo_list_unreserve(struct list_head *head)
 299 {
 300         struct radeon_bo_list *lobj;
 301
 302         list_for_each_entry(lobj, head, list) {
 303                 /* only unreserve object we successfully reserved */
 304                 if (radeon_bo_is_reserved(lobj->bo))
 305                         radeon_bo_unreserve(lobj->bo);
 306         }
 307 }
 308
 309 int radeon_bo_list_validate(struct list_head *head)
 310 {
 311         struct radeon_bo_list *lobj;
 312         struct radeon_bo *bo;
 313         int r;
 314
 315         r = radeon_bo_list_reserve(head);
 316         if (unlikely(r != 0)) {
 317                 return r;
 318         }
 319         list_for_each_entry(lobj, head, list) {
 320                 bo = lobj->bo;
 321                 if (!bo->pin_count) {
 322                         if (lobj->wdomain) {
 323                                 radeon_ttm_placement_from_domain(bo,
 324                                                                 lobj->wdomain);
 325                         } else {
 326                                 radeon_ttm_placement_from_domain(bo,
 327                                                                 lobj->rdomain);
 328                         }
 329                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
 330                                                 true, false);
 331                         if (unlikely(r))
 332                                 return r;
 333                 }
 334                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
 335                 lobj->tiling_flags = bo->tiling_flags;
 336         }
 337         return 0;
 338 }
 339
 340 void radeon_bo_list_fence(struct list_head *head, void *fence)
 341 {
 342         struct radeon_bo_list *lobj;
 343         struct radeon_bo *bo;
 344         struct radeon_fence *old_fence = NULL;
 345
 346         list_for_each_entry(lobj, head, list) {
 347                 bo = lobj->bo;
 348                 spin_lock(&bo->tbo.lock);
 349                 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
 350                 bo->tbo.sync_obj = radeon_fence_ref(fence);
 351                 bo->tbo.sync_obj_arg = NULL;
 352                 spin_unlock(&bo->tbo.lock);
 353                 if (old_fence) {
 354                         radeon_fence_unref(&old_fence);
 355                 }
 356         }
 357 }
 358
 359 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 360                              struct vm_area_struct *vma)
 361 {
 362         return ttm_fbdev_mmap(vma, &bo->tbo);
 363 }
 364
 365 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 366 {
 367         struct radeon_device *rdev = bo->rdev;
 368         struct radeon_surface_reg *reg;
 369         struct radeon_bo *old_object;
 370         int steal;
 371         int i;
 372
 373         BUG_ON(!atomic_read(&bo->tbo.reserved));
 374
 375         if (!bo->tiling_flags)
 376                 return 0;
 377
 378         if (bo->surface_reg >= 0) {
 379                 reg = &rdev->surface_regs[bo->surface_reg];
 380                 i = bo->surface_reg;
 381                 goto out;
 382         }
 383
 384         steal = -1;
 385         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 386
 387                 reg = &rdev->surface_regs[i];
 388                 if (!reg->bo)
 389                         break;
 390
 391                 old_object = reg->bo;
 392                 if (old_object->pin_count == 0)
 393                         steal = i;
 394         }
 395
 396         /* if we are all out */
 397         if (i == RADEON_GEM_MAX_SURFACES) {
 398                 if (steal == -1)
 399                         return -ENOMEM;
 400                 /* find someone with a surface reg and nuke their BO */
 401                 reg = &rdev->surface_regs[steal];
 402                 old_object = reg->bo;
 403                 /* blow away the mapping */
 404                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
 405                 ttm_bo_unmap_virtual(&old_object->tbo);
 406                 old_object->surface_reg = -1;
 407                 i = steal;
 408         }
 409
 410         bo->surface_reg = i;
 411         reg->bo = bo;
 412
 413 out:
 414         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
 415                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
 416                                bo->tbo.num_pages << PAGE_SHIFT);
 417         return 0;
 418 }
 419
 420 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 421 {
 422         struct radeon_device *rdev = bo->rdev;
 423         struct radeon_surface_reg *reg;
 424
 425         if (bo->surface_reg == -1)
 426                 return;
 427
 428         reg = &rdev->surface_regs[bo->surface_reg];
 429         radeon_clear_surface_reg(rdev, bo->surface_reg);
 430
 431         reg->bo = NULL;
 432         bo->surface_reg = -1;
 433 }
 434
 435 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 436                                 uint32_t tiling_flags, uint32_t pitch)
 437 {
 438         int r;
 439
 440         r = radeon_bo_reserve(bo, false);
 441         if (unlikely(r != 0))
 442                 return r;
 443         bo->tiling_flags = tiling_flags;
 444         bo->pitch = pitch;
 445         radeon_bo_unreserve(bo);
 446         return 0;
 447 }
 448
 449 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 450                                 uint32_t *tiling_flags,
 451                                 uint32_t *pitch)
 452 {
 453         BUG_ON(!atomic_read(&bo->tbo.reserved));
 454         if (tiling_flags)
 455                 *tiling_flags = bo->tiling_flags;
 456         if (pitch)
 457                 *pitch = bo->pitch;
 458 }
 459
 460 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 461                                 bool force_drop)
 462 {
 463         BUG_ON(!atomic_read(&bo->tbo.reserved));
 464
 465         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 466                 return 0;
 467
 468         if (force_drop) {
 469                 radeon_bo_clear_surface_reg(bo);
 470                 return 0;
 471         }
 472
 473         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 474                 if (!has_moved)
 475                         return 0;
 476
 477                 if (bo->surface_reg >= 0)
 478                         radeon_bo_clear_surface_reg(bo);
 479                 return 0;
 480         }
 481
 482         if ((bo->surface_reg >= 0) && !has_moved)
 483                 return 0;
 484
 485         return radeon_bo_get_surface_reg(bo);
 486 }
 487
 488 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 489                            struct ttm_mem_reg *mem)
 490 {
 491         struct radeon_bo *rbo;
 492         if (!radeon_ttm_bo_is_radeon_bo(bo))
 493                 return;
 494         rbo = container_of(bo, struct radeon_bo, tbo);
 495         radeon_bo_check_tiling(rbo, 0, 1);
 496 }
 497
 498 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 499 {
 500         struct radeon_bo *rbo;
 501         if (!radeon_ttm_bo_is_radeon_bo(bo))
 502                 return;
 503         rbo = container_of(bo, struct radeon_bo, tbo);
 504         radeon_bo_check_tiling(rbo, 0, 0);
 505 }