drivers/gpu/drm/radeon/radeon_object.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <linux/list.h>
  33 #include <drm/drmP.h>
  34 #include "radeon_drm.h"
  35 #include "radeon.h"
  36
  37
  38 int radeon_ttm_init(struct radeon_device *rdev);
  39 void radeon_ttm_fini(struct radeon_device *rdev);
  40 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  41
  42 /*
  43  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  44  * function are calling it.
  45  */
  46
  47 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  48 {
  49         struct radeon_bo *bo;
  50
  51         bo = container_of(tbo, struct radeon_bo, tbo);
  52         mutex_lock(&bo->rdev->gem.mutex);
  53         list_del_init(&bo->list);
  54         mutex_unlock(&bo->rdev->gem.mutex);
  55         radeon_bo_clear_surface_reg(bo);
  56         kfree(bo);
  57 }
  58
  59 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
  60 {
  61         if (bo->destroy == &radeon_ttm_bo_destroy)
  62                 return true;
  63         return false;
  64 }
  65
  66 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
  67 {
  68         u32 c = 0;
  69
  70         rbo->placement.fpfn = 0;
  71         rbo->placement.lpfn = 0;
  72         rbo->placement.placement = rbo->placements;
  73         rbo->placement.busy_placement = rbo->placements;
  74         if (domain & RADEON_GEM_DOMAIN_VRAM)
  75                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
  76                                         TTM_PL_FLAG_VRAM;
  77         if (domain & RADEON_GEM_DOMAIN_GTT)
  78                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  79         if (domain & RADEON_GEM_DOMAIN_CPU)
  80                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  81         if (!c)
  82                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  83         rbo->placement.num_placement = c;
  84         rbo->placement.num_busy_placement = c;
  85 }
  86
  87 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  88                         unsigned long size, bool kernel, u32 domain,
  89                         struct radeon_bo **bo_ptr)
  90 {
  91         struct radeon_bo *bo;
  92         enum ttm_bo_type type;
  93         int r;
  94
  95         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  96                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  97         }
  98         if (kernel) {
  99                 type = ttm_bo_type_kernel;
 100         } else {
 101                 type = ttm_bo_type_device;
 102         }
 103         *bo_ptr = NULL;
 104         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
 105         if (bo == NULL)
 106                 return -ENOMEM;
 107         bo->rdev = rdev;
 108         bo->gobj = gobj;
 109         bo->surface_reg = -1;
 110         INIT_LIST_HEAD(&bo->list);
 111
 112         radeon_ttm_placement_from_domain(bo, domain);
 113         /* Kernel allocation are uninterruptible */
 114         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
 115                         &bo->placement, 0, 0, !kernel, NULL, size,
 116                         &radeon_ttm_bo_destroy);
 117         if (unlikely(r != 0)) {
 118                 if (r != -ERESTARTSYS)
 119                         dev_err(rdev->dev,
 120                                 "object_init failed for (%lu, 0x%08X)\n",
 121                                 size, domain);
 122                 return r;
 123         }
 124         *bo_ptr = bo;
 125         if (gobj) {
 126                 mutex_lock(&bo->rdev->gem.mutex);
 127                 list_add_tail(&bo->list, &rdev->gem.objects);
 128                 mutex_unlock(&bo->rdev->gem.mutex);
 129         }
 130         return 0;
 131 }
 132
 133 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 134 {
 135         bool is_iomem;
 136         int r;
 137
 138         if (bo->kptr) {
 139                 if (ptr) {
 140                         *ptr = bo->kptr;
 141                 }
 142                 return 0;
 143         }
 144         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 145         if (r) {
 146                 return r;
 147         }
 148         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 149         if (ptr) {
 150                 *ptr = bo->kptr;
 151         }
 152         radeon_bo_check_tiling(bo, 0, 0);
 153         return 0;
 154 }
 155
 156 void radeon_bo_kunmap(struct radeon_bo *bo)
 157 {
 158         if (bo->kptr == NULL)
 159                 return;
 160         bo->kptr = NULL;
 161         radeon_bo_check_tiling(bo, 0, 0);
 162         ttm_bo_kunmap(&bo->kmap);
 163 }
 164
 165 void radeon_bo_unref(struct radeon_bo **bo)
 166 {
 167         struct ttm_buffer_object *tbo;
 168
 169         if ((*bo) == NULL)
 170                 return;
 171         tbo = &((*bo)->tbo);
 172         ttm_bo_unref(&tbo);
 173         if (tbo == NULL)
 174                 *bo = NULL;
 175 }
 176
 177 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 178 {
 179         int r, i;
 180
 181         radeon_ttm_placement_from_domain(bo, domain);
 182         if (bo->pin_count) {
 183                 bo->pin_count++;
 184                 if (gpu_addr)
 185                         *gpu_addr = radeon_bo_gpu_offset(bo);
 186                 return 0;
 187         }
 188         radeon_ttm_placement_from_domain(bo, domain);
 189         for (i = 0; i < bo->placement.num_placement; i++)
 190                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
 191         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 192         if (likely(r == 0)) {
 193                 bo->pin_count = 1;
 194                 if (gpu_addr != NULL)
 195                         *gpu_addr = radeon_bo_gpu_offset(bo);
 196         }
 197         if (unlikely(r != 0))
 198                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 199         return r;
 200 }
 201
 202 int radeon_bo_unpin(struct radeon_bo *bo)
 203 {
 204         int r, i;
 205
 206         if (!bo->pin_count) {
 207                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
 208                 return 0;
 209         }
 210         bo->pin_count--;
 211         if (bo->pin_count)
 212                 return 0;
 213         for (i = 0; i < bo->placement.num_placement; i++)
 214                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
 215         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
 216         if (unlikely(r != 0))
 217                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 218         return r;
 219 }
 220
 221 int radeon_bo_evict_vram(struct radeon_device *rdev)
 222 {
 223         if (rdev->flags & RADEON_IS_IGP) {
 224                 /* Useless to evict on IGP chips */
 225                 return 0;
 226         }
 227         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 228 }
 229
 230 void radeon_bo_force_delete(struct radeon_device *rdev)
 231 {
 232         struct radeon_bo *bo, *n;
 233         struct drm_gem_object *gobj;
 234
 235         if (list_empty(&rdev->gem.objects)) {
 236                 return;
 237         }
 238         dev_err(rdev->dev, "Userspace still has active objects !\n");
 239         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 240                 mutex_lock(&rdev->ddev->struct_mutex);
 241                 gobj = bo->gobj;
 242                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
 243                         gobj, bo, (unsigned long)gobj->size,
 244                         *((unsigned long *)&gobj->refcount));
 245                 mutex_lock(&bo->rdev->gem.mutex);
 246                 list_del_init(&bo->list);
 247                 mutex_unlock(&bo->rdev->gem.mutex);
 248                 radeon_bo_unref(&bo);
 249                 gobj->driver_private = NULL;
 250                 drm_gem_object_unreference(gobj);
 251                 mutex_unlock(&rdev->ddev->struct_mutex);
 252         }
 253 }
 254
 255 int radeon_bo_init(struct radeon_device *rdev)
 256 {
 257         /* Add an MTRR for the VRAM */
 258         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
 259                         MTRR_TYPE_WRCOMB, 1);
 260         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 261                 rdev->mc.mc_vram_size >> 20,
 262                 (unsigned long long)rdev->mc.aper_size >> 20);
 263         DRM_INFO("RAM width %dbits %cDR\n",
 264                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
 265         return radeon_ttm_init(rdev);
 266 }
 267
 268 void radeon_bo_fini(struct radeon_device *rdev)
 269 {
 270         radeon_ttm_fini(rdev);
 271 }
 272
 273 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 274                                 struct list_head *head)
 275 {
 276         if (lobj->wdomain) {
 277                 list_add(&lobj->list, head);
 278         } else {
 279                 list_add_tail(&lobj->list, head);
 280         }
 281 }
 282
 283 int radeon_bo_list_reserve(struct list_head *head)
 284 {
 285         struct radeon_bo_list *lobj;
 286         int r;
 287
 288         list_for_each_entry(lobj, head, list){
 289                 r = radeon_bo_reserve(lobj->bo, false);
 290                 if (unlikely(r != 0))
 291                         return r;
 292         }
 293         return 0;
 294 }
 295
 296 void radeon_bo_list_unreserve(struct list_head *head)
 297 {
 298         struct radeon_bo_list *lobj;
 299
 300         list_for_each_entry(lobj, head, list) {
 301                 /* only unreserve object we successfully reserved */
 302                 if (radeon_bo_is_reserved(lobj->bo))
 303                         radeon_bo_unreserve(lobj->bo);
 304         }
 305 }
 306
 307 int radeon_bo_list_validate(struct list_head *head, void *fence)
 308 {
 309         struct radeon_bo_list *lobj;
 310         struct radeon_bo *bo;
 311         struct radeon_fence *old_fence = NULL;
 312         int r;
 313
 314         r = radeon_bo_list_reserve(head);
 315         if (unlikely(r != 0)) {
 316                 return r;
 317         }
 318         list_for_each_entry(lobj, head, list) {
 319                 bo = lobj->bo;
 320                 if (!bo->pin_count) {
 321                         if (lobj->wdomain) {
 322                                 radeon_ttm_placement_from_domain(bo,
 323                                                                 lobj->wdomain);
 324                         } else {
 325                                 radeon_ttm_placement_from_domain(bo,
 326                                                                 lobj->rdomain);
 327                         }
 328                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
 329                                                 true, false);
 330                         if (unlikely(r))
 331                                 return r;
 332                 }
 333                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
 334                 lobj->tiling_flags = bo->tiling_flags;
 335                 if (fence) {
 336                         old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
 337                         bo->tbo.sync_obj = radeon_fence_ref(fence);
 338                         bo->tbo.sync_obj_arg = NULL;
 339                 }
 340                 if (old_fence) {
 341                         radeon_fence_unref(&old_fence);
 342                 }
 343         }
 344         return 0;
 345 }
 346
 347 void radeon_bo_list_unvalidate(struct list_head *head, void *fence)
 348 {
 349         struct radeon_bo_list *lobj;
 350         struct radeon_fence *old_fence;
 351
 352         if (fence)
 353                 list_for_each_entry(lobj, head, list) {
 354                         old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj);
 355                         if (old_fence == fence) {
 356                                 lobj->bo->tbo.sync_obj = NULL;
 357                                 radeon_fence_unref(&old_fence);
 358                         }
 359                 }
 360         radeon_bo_list_unreserve(head);
 361 }
 362
 363 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 364                              struct vm_area_struct *vma)
 365 {
 366         return ttm_fbdev_mmap(vma, &bo->tbo);
 367 }
 368
 369 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 370 {
 371         struct radeon_device *rdev = bo->rdev;
 372         struct radeon_surface_reg *reg;
 373         struct radeon_bo *old_object;
 374         int steal;
 375         int i;
 376
 377         BUG_ON(!atomic_read(&bo->tbo.reserved));
 378
 379         if (!bo->tiling_flags)
 380                 return 0;
 381
 382         if (bo->surface_reg >= 0) {
 383                 reg = &rdev->surface_regs[bo->surface_reg];
 384                 i = bo->surface_reg;
 385                 goto out;
 386         }
 387
 388         steal = -1;
 389         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 390
 391                 reg = &rdev->surface_regs[i];
 392                 if (!reg->bo)
 393                         break;
 394
 395                 old_object = reg->bo;
 396                 if (old_object->pin_count == 0)
 397                         steal = i;
 398         }
 399
 400         /* if we are all out */
 401         if (i == RADEON_GEM_MAX_SURFACES) {
 402                 if (steal == -1)
 403                         return -ENOMEM;
 404                 /* find someone with a surface reg and nuke their BO */
 405                 reg = &rdev->surface_regs[steal];
 406                 old_object = reg->bo;
 407                 /* blow away the mapping */
 408                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
 409                 ttm_bo_unmap_virtual(&old_object->tbo);
 410                 old_object->surface_reg = -1;
 411                 i = steal;
 412         }
 413
 414         bo->surface_reg = i;
 415         reg->bo = bo;
 416
 417 out:
 418         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
 419                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
 420                                bo->tbo.num_pages << PAGE_SHIFT);
 421         return 0;
 422 }
 423
 424 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 425 {
 426         struct radeon_device *rdev = bo->rdev;
 427         struct radeon_surface_reg *reg;
 428
 429         if (bo->surface_reg == -1)
 430                 return;
 431
 432         reg = &rdev->surface_regs[bo->surface_reg];
 433         radeon_clear_surface_reg(rdev, bo->surface_reg);
 434
 435         reg->bo = NULL;
 436         bo->surface_reg = -1;
 437 }
 438
 439 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 440                                 uint32_t tiling_flags, uint32_t pitch)
 441 {
 442         int r;
 443
 444         r = radeon_bo_reserve(bo, false);
 445         if (unlikely(r != 0))
 446                 return r;
 447         bo->tiling_flags = tiling_flags;
 448         bo->pitch = pitch;
 449         radeon_bo_unreserve(bo);
 450         return 0;
 451 }
 452
 453 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 454                                 uint32_t *tiling_flags,
 455                                 uint32_t *pitch)
 456 {
 457         BUG_ON(!atomic_read(&bo->tbo.reserved));
 458         if (tiling_flags)
 459                 *tiling_flags = bo->tiling_flags;
 460         if (pitch)
 461                 *pitch = bo->pitch;
 462 }
 463
 464 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 465                                 bool force_drop)
 466 {
 467         BUG_ON(!atomic_read(&bo->tbo.reserved));
 468
 469         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 470                 return 0;
 471
 472         if (force_drop) {
 473                 radeon_bo_clear_surface_reg(bo);
 474                 return 0;
 475         }
 476
 477         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 478                 if (!has_moved)
 479                         return 0;
 480
 481                 if (bo->surface_reg >= 0)
 482                         radeon_bo_clear_surface_reg(bo);
 483                 return 0;
 484         }
 485
 486         if ((bo->surface_reg >= 0) && !has_moved)
 487                 return 0;
 488
 489         return radeon_bo_get_surface_reg(bo);
 490 }
 491
 492 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 493                            struct ttm_mem_reg *mem)
 494 {
 495         struct radeon_bo *rbo;
 496         if (!radeon_ttm_bo_is_radeon_bo(bo))
 497                 return;
 498         rbo = container_of(bo, struct radeon_bo, tbo);
 499         radeon_bo_check_tiling(rbo, 0, 1);
 500 }
 501
 502 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 503 {
 504         struct radeon_bo *rbo;
 505         if (!radeon_ttm_bo_is_radeon_bo(bo))
 506                 return;
 507         rbo = container_of(bo, struct radeon_bo, tbo);
 508         radeon_bo_check_tiling(rbo, 0, 0);
 509 }