2 * Copyright 2012 Red Hat Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include <subdev/fb.h>
26 #include <subdev/timer.h>
31 gf100_ltc_cbc_clear(struct nvkm_ltc_priv *priv, u32 start, u32 limit)
33 nv_wr32(priv, 0x17e8cc, start);
34 nv_wr32(priv, 0x17e8d0, limit);
35 nv_wr32(priv, 0x17e8c8, 0x00000004);
39 gf100_ltc_cbc_wait(struct nvkm_ltc_priv *priv)
42 for (c = 0; c < priv->ltc_nr; c++) {
43 for (s = 0; s < priv->lts_nr; s++)
44 nv_wait(priv, 0x1410c8 + c * 0x2000 + s * 0x400, ~0, 0);
49 gf100_ltc_zbc_clear_color(struct nvkm_ltc_priv *priv, int i, const u32 color[4])
51 nv_mask(priv, 0x17ea44, 0x0000000f, i);
52 nv_wr32(priv, 0x17ea48, color[0]);
53 nv_wr32(priv, 0x17ea4c, color[1]);
54 nv_wr32(priv, 0x17ea50, color[2]);
55 nv_wr32(priv, 0x17ea54, color[3]);
59 gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *priv, int i, const u32 depth)
61 nv_mask(priv, 0x17ea44, 0x0000000f, i);
62 nv_wr32(priv, 0x17ea58, depth);
66 gf100_ltc_lts_isr(struct nvkm_ltc_priv *priv, int ltc, int lts)
68 u32 base = 0x141000 + (ltc * 0x2000) + (lts * 0x400);
69 u32 stat = nv_rd32(priv, base + 0x020);
72 nv_info(priv, "LTC%d_LTS%d: 0x%08x\n", ltc, lts, stat);
73 nv_wr32(priv, base + 0x020, stat);
78 gf100_ltc_intr(struct nouveau_subdev *subdev)
80 struct nvkm_ltc_priv *priv = (void *)subdev;
83 mask = nv_rd32(priv, 0x00017c);
85 u32 lts, ltc = __ffs(mask);
86 for (lts = 0; lts < priv->lts_nr; lts++)
87 gf100_ltc_lts_isr(priv, ltc, lts);
91 /* we do something horribly wrong and upset PMFB a lot, so mask off
92 * interrupts from it after the first one until it's fixed
94 nv_mask(priv, 0x000640, 0x02000000, 0x00000000);
98 gf100_ltc_init(struct nouveau_object *object)
100 struct nvkm_ltc_priv *priv = (void *)object;
103 ret = nvkm_ltc_init(priv);
107 nv_mask(priv, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
108 nv_wr32(priv, 0x17e8d8, priv->ltc_nr);
109 nv_wr32(priv, 0x17e8d4, priv->tag_base);
114 gf100_ltc_dtor(struct nouveau_object *object)
116 struct nouveau_fb *pfb = nouveau_fb(object);
117 struct nvkm_ltc_priv *priv = (void *)object;
119 nouveau_mm_fini(&priv->tags);
120 nouveau_mm_free(&pfb->vram, &priv->tag_ram);
122 nvkm_ltc_destroy(priv);
125 /* TODO: Figure out tag memory details and drop the over-cautious allocation.
128 gf100_ltc_init_tag_ram(struct nouveau_fb *pfb, struct nvkm_ltc_priv *priv)
130 u32 tag_size, tag_margin, tag_align;
133 /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
134 priv->num_tags = (pfb->ram->size >> 17) / 4;
135 if (priv->num_tags > (1 << 17))
136 priv->num_tags = 1 << 17; /* we have 17 bits in PTE */
137 priv->num_tags = (priv->num_tags + 63) & ~63; /* round up to 64 */
139 tag_align = priv->ltc_nr * 0x800;
140 tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
142 /* 4 part 4 sub: 0x2000 bytes for 56 tags */
143 /* 3 part 4 sub: 0x6000 bytes for 168 tags */
145 * About 147 bytes per tag. Let's be safe and allocate x2, which makes
146 * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
148 * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
150 tag_size = (priv->num_tags / 64) * 0x6000 + tag_margin;
151 tag_size += tag_align;
152 tag_size = (tag_size + 0xfff) >> 12; /* round up */
154 ret = nouveau_mm_tail(&pfb->vram, 1, tag_size, tag_size, 1,
159 u64 tag_base = (priv->tag_ram->offset << 12) + tag_margin;
161 tag_base += tag_align - 1;
162 ret = do_div(tag_base, tag_align);
164 priv->tag_base = tag_base;
167 ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
172 gf100_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
173 struct nouveau_oclass *oclass, void *data, u32 size,
174 struct nouveau_object **pobject)
176 struct nouveau_fb *pfb = nouveau_fb(parent);
177 struct nvkm_ltc_priv *priv;
181 ret = nvkm_ltc_create(parent, engine, oclass, &priv);
182 *pobject = nv_object(priv);
186 parts = nv_rd32(priv, 0x022438);
187 mask = nv_rd32(priv, 0x022554);
188 for (i = 0; i < parts; i++) {
189 if (!(mask & (1 << i)))
192 priv->lts_nr = nv_rd32(priv, 0x17e8dc) >> 28;
194 ret = gf100_ltc_init_tag_ram(pfb, priv);
198 nv_subdev(priv)->intr = gf100_ltc_intr;
202 struct nouveau_oclass *
203 gf100_ltc_oclass = &(struct nvkm_ltc_impl) {
204 .base.handle = NV_SUBDEV(LTC, 0xc0),
205 .base.ofuncs = &(struct nouveau_ofuncs) {
206 .ctor = gf100_ltc_ctor,
207 .dtor = gf100_ltc_dtor,
208 .init = gf100_ltc_init,
209 .fini = _nvkm_ltc_fini,
211 .intr = gf100_ltc_intr,
212 .cbc_clear = gf100_ltc_cbc_clear,
213 .cbc_wait = gf100_ltc_cbc_wait,
215 .zbc_clear_color = gf100_ltc_zbc_clear_color,
216 .zbc_clear_depth = gf100_ltc_zbc_clear_depth,