drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include <linux/export.h>
  32 #include <drm/drmP.h>
  33 #include <drm/drm_crtc.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                         SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  50 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  53
  54
  55 static const char *tv_format_names[] = {
  56         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  57         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  58         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  59         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  60         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  61         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  62         "SECAM_60"
  63 };
  64
  65 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  66
  67 struct intel_sdvo {
  68         struct intel_encoder base;
  69
  70         struct i2c_adapter *i2c;
  71         u8 slave_addr;
  72
  73         struct i2c_adapter ddc;
  74
  75         /* Register for the SDVO device: SDVOB or SDVOC */
  76         uint32_t sdvo_reg;
  77
  78         /* Active outputs controlled by this SDVO output */
  79         uint16_t controlled_output;
  80
  81         /*
  82          * Capabilities of the SDVO device returned by
  83          * intel_sdvo_get_capabilities()
  84          */
  85         struct intel_sdvo_caps caps;
  86
  87         /* Pixel clock limitations reported by the SDVO device, in kHz */
  88         int pixel_clock_min, pixel_clock_max;
  89
  90         /*
  91         * For multiple function SDVO device,
  92         * this is for current attached outputs.
  93         */
  94         uint16_t attached_output;
  95
  96         /*
  97          * Hotplug activation bits for this device
  98          */
  99         uint16_t hotplug_active;
 100
 101         /**
 102          * This is used to select the color range of RBG outputs in HDMI mode.
 103          * It is only valid when using TMDS encoding and 8 bit per color mode.
 104          */
 105         uint32_t color_range;
 106         bool color_range_auto;
 107
 108         /**
 109          * This is set if we're going to treat the device as TV-out.
 110          *
 111          * While we have these nice friendly flags for output types that ought
 112          * to decide this for us, the S-Video output on our HDMI+S-Video card
 113          * shows up as RGB1 (VGA).
 114          */
 115         bool is_tv;
 116
 117         /* On different gens SDVOB is at different places. */
 118         bool is_sdvob;
 119
 120         /* This is for current tv format name */
 121         int tv_format_index;
 122
 123         /**
 124          * This is set if we treat the device as HDMI, instead of DVI.
 125          */
 126         bool is_hdmi;
 127         bool has_hdmi_monitor;
 128         bool has_hdmi_audio;
 129         bool rgb_quant_range_selectable;
 130
 131         /**
 132          * This is set if we detect output of sdvo device as LVDS and
 133          * have a valid fixed mode to use with the panel.
 134          */
 135         bool is_lvds;
 136
 137         /**
 138          * This is sdvo fixed pannel mode pointer
 139          */
 140         struct drm_display_mode *sdvo_lvds_fixed_mode;
 141
 142         /* DDC bus used by this SDVO encoder */
 143         uint8_t ddc_bus;
 144
 145         /*
 146          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 147          */
 148         uint8_t dtd_sdvo_flags;
 149 };
 150
 151 struct intel_sdvo_connector {
 152         struct intel_connector base;
 153
 154         /* Mark the type of connector */
 155         uint16_t output_flag;
 156
 157         enum hdmi_force_audio force_audio;
 158
 159         /* This contains all current supported TV format */
 160         u8 tv_format_supported[TV_FORMAT_NUM];
 161         int   format_supported_num;
 162         struct drm_property *tv_format;
 163
 164         /* add the property for the SDVO-TV */
 165         struct drm_property *left;
 166         struct drm_property *right;
 167         struct drm_property *top;
 168         struct drm_property *bottom;
 169         struct drm_property *hpos;
 170         struct drm_property *vpos;
 171         struct drm_property *contrast;
 172         struct drm_property *saturation;
 173         struct drm_property *hue;
 174         struct drm_property *sharpness;
 175         struct drm_property *flicker_filter;
 176         struct drm_property *flicker_filter_adaptive;
 177         struct drm_property *flicker_filter_2d;
 178         struct drm_property *tv_chroma_filter;
 179         struct drm_property *tv_luma_filter;
 180         struct drm_property *dot_crawl;
 181
 182         /* add the property for the SDVO-TV/LVDS */
 183         struct drm_property *brightness;
 184
 185         /* Add variable to record current setting for the above property */
 186         u32     left_margin, right_margin, top_margin, bottom_margin;
 187
 188         /* this is to get the range of margin.*/
 189         u32     max_hscan,  max_vscan;
 190         u32     max_hpos, cur_hpos;
 191         u32     max_vpos, cur_vpos;
 192         u32     cur_brightness, max_brightness;
 193         u32     cur_contrast,   max_contrast;
 194         u32     cur_saturation, max_saturation;
 195         u32     cur_hue,        max_hue;
 196         u32     cur_sharpness,  max_sharpness;
 197         u32     cur_flicker_filter,             max_flicker_filter;
 198         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 199         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 200         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 201         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 202         u32     cur_dot_crawl,  max_dot_crawl;
 203 };
 204
 205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 206 {
 207         return container_of(encoder, struct intel_sdvo, base);
 208 }
 209
 210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 211 {
 212         return to_sdvo(intel_attached_encoder(connector));
 213 }
 214
 215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 216 {
 217         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 218 }
 219
 220 static bool
 221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 222 static bool
 223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 224                               struct intel_sdvo_connector *intel_sdvo_connector,
 225                               int type);
 226 static bool
 227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 228                                    struct intel_sdvo_connector *intel_sdvo_connector);
 229
 230 /**
 231  * Writes the SDVOB or SDVOC with the given value, but always writes both
 232  * SDVOB and SDVOC to work around apparent hardware issues (according to
 233  * comments in the BIOS).
 234  */
 235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 236 {
 237         struct drm_device *dev = intel_sdvo->base.base.dev;
 238         struct drm_i915_private *dev_priv = dev->dev_private;
 239         u32 bval = val, cval = val;
 240         int i;
 241
 242         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 243                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 244                 I915_READ(intel_sdvo->sdvo_reg);
 245                 return;
 246         }
 247
 248         if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
 249                 cval = I915_READ(GEN3_SDVOC);
 250         else
 251                 bval = I915_READ(GEN3_SDVOB);
 252
 253         /*
 254          * Write the registers twice for luck. Sometimes,
 255          * writing them only once doesn't appear to 'stick'.
 256          * The BIOS does this too. Yay, magic
 257          */
 258         for (i = 0; i < 2; i++)
 259         {
 260                 I915_WRITE(GEN3_SDVOB, bval);
 261                 I915_READ(GEN3_SDVOB);
 262                 I915_WRITE(GEN3_SDVOC, cval);
 263                 I915_READ(GEN3_SDVOC);
 264         }
 265 }
 266
 267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 268 {
 269         struct i2c_msg msgs[] = {
 270                 {
 271                         .addr = intel_sdvo->slave_addr,
 272                         .flags = 0,
 273                         .len = 1,
 274                         .buf = &addr,
 275                 },
 276                 {
 277                         .addr = intel_sdvo->slave_addr,
 278                         .flags = I2C_M_RD,
 279                         .len = 1,
 280                         .buf = ch,
 281                 }
 282         };
 283         int ret;
 284
 285         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 286                 return true;
 287
 288         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 289         return false;
 290 }
 291
 292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 293 /** Mapping of command numbers to names, for debug output */
 294 static const struct _sdvo_cmd_name {
 295         u8 cmd;
 296         const char *name;
 297 } sdvo_cmd_names[] = {
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 321         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 322         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 341
 342         /* Add the op code for SDVO enhancements */
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 367         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 368         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 387
 388         /* HDMI op code */
 389         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 390         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 391         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 392         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 393         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 394         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 395         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 396         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 397         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 398         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 399         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 400         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 401         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 402         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 403         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 404         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 405         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 406         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 407         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 408         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 409 };
 410
 411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
 412
 413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 414                                    const void *args, int args_len)
 415 {
 416         int i;
 417
 418         DRM_DEBUG_KMS("%s: W: %02X ",
 419                                 SDVO_NAME(intel_sdvo), cmd);
 420         for (i = 0; i < args_len; i++)
 421                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 422         for (; i < 8; i++)
 423                 DRM_LOG_KMS("   ");
 424         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 425                 if (cmd == sdvo_cmd_names[i].cmd) {
 426                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 427                         break;
 428                 }
 429         }
 430         if (i == ARRAY_SIZE(sdvo_cmd_names))
 431                 DRM_LOG_KMS("(%02X)", cmd);
 432         DRM_LOG_KMS("\n");
 433 }
 434
 435 static const char *cmd_status_names[] = {
 436         "Power on",
 437         "Success",
 438         "Not supported",
 439         "Invalid arg",
 440         "Pending",
 441         "Target not specified",
 442         "Scaling not supported"
 443 };
 444
 445 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 446                                  const void *args, int args_len)
 447 {
 448         u8 *buf, status;
 449         struct i2c_msg *msgs;
 450         int i, ret = true;
 451
 452         /* Would be simpler to allocate both in one go ? */
 453         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 454         if (!buf)
 455                 return false;
 456
 457         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 458         if (!msgs) {
 459                 kfree(buf);
 460                 return false;
 461         }
 462
 463         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 464
 465         for (i = 0; i < args_len; i++) {
 466                 msgs[i].addr = intel_sdvo->slave_addr;
 467                 msgs[i].flags = 0;
 468                 msgs[i].len = 2;
 469                 msgs[i].buf = buf + 2 *i;
 470                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 471                 buf[2*i + 1] = ((u8*)args)[i];
 472         }
 473         msgs[i].addr = intel_sdvo->slave_addr;
 474         msgs[i].flags = 0;
 475         msgs[i].len = 2;
 476         msgs[i].buf = buf + 2*i;
 477         buf[2*i + 0] = SDVO_I2C_OPCODE;
 478         buf[2*i + 1] = cmd;
 479
 480         /* the following two are to read the response */
 481         status = SDVO_I2C_CMD_STATUS;
 482         msgs[i+1].addr = intel_sdvo->slave_addr;
 483         msgs[i+1].flags = 0;
 484         msgs[i+1].len = 1;
 485         msgs[i+1].buf = &status;
 486
 487         msgs[i+2].addr = intel_sdvo->slave_addr;
 488         msgs[i+2].flags = I2C_M_RD;
 489         msgs[i+2].len = 1;
 490         msgs[i+2].buf = &status;
 491
 492         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 493         if (ret < 0) {
 494                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 495                 ret = false;
 496                 goto out;
 497         }
 498         if (ret != i+3) {
 499                 /* failure in I2C transfer */
 500                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 501                 ret = false;
 502         }
 503
 504 out:
 505         kfree(msgs);
 506         kfree(buf);
 507         return ret;
 508 }
 509
 510 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 511                                      void *response, int response_len)
 512 {
 513         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 514         u8 status;
 515         int i;
 516
 517         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 518
 519         /*
 520          * The documentation states that all commands will be
 521          * processed within 15µs, and that we need only poll
 522          * the status byte a maximum of 3 times in order for the
 523          * command to be complete.
 524          *
 525          * Check 5 times in case the hardware failed to read the docs.
 526          *
 527          * Also beware that the first response by many devices is to
 528          * reply PENDING and stall for time. TVs are notorious for
 529          * requiring longer than specified to complete their replies.
 530          * Originally (in the DDX long ago), the delay was only ever 15ms
 531          * with an additional delay of 30ms applied for TVs added later after
 532          * many experiments. To accommodate both sets of delays, we do a
 533          * sequence of slow checks if the device is falling behind and fails
 534          * to reply within 5*15µs.
 535          */
 536         if (!intel_sdvo_read_byte(intel_sdvo,
 537                                   SDVO_I2C_CMD_STATUS,
 538                                   &status))
 539                 goto log_fail;
 540
 541         while ((status == SDVO_CMD_STATUS_PENDING ||
 542                         status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 543                 if (retry < 10)
 544                         msleep(15);
 545                 else
 546                         udelay(15);
 547
 548                 if (!intel_sdvo_read_byte(intel_sdvo,
 549                                           SDVO_I2C_CMD_STATUS,
 550                                           &status))
 551                         goto log_fail;
 552         }
 553
 554         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 555                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 556         else
 557                 DRM_LOG_KMS("(??? %d)", status);
 558
 559         if (status != SDVO_CMD_STATUS_SUCCESS)
 560                 goto log_fail;
 561
 562         /* Read the command response */
 563         for (i = 0; i < response_len; i++) {
 564                 if (!intel_sdvo_read_byte(intel_sdvo,
 565                                           SDVO_I2C_RETURN_0 + i,
 566                                           &((u8 *)response)[i]))
 567                         goto log_fail;
 568                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 569         }
 570         DRM_LOG_KMS("\n");
 571         return true;
 572
 573 log_fail:
 574         DRM_LOG_KMS("... failed\n");
 575         return false;
 576 }
 577
 578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 579 {
 580         if (mode->clock >= 100000)
 581                 return 1;
 582         else if (mode->clock >= 50000)
 583                 return 2;
 584         else
 585                 return 4;
 586 }
 587
 588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 589                                               u8 ddc_bus)
 590 {
 591         /* This must be the immediately preceding write before the i2c xfer */
 592         return intel_sdvo_write_cmd(intel_sdvo,
 593                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 594                                     &ddc_bus, 1);
 595 }
 596
 597 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 598 {
 599         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 600                 return false;
 601
 602         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 603 }
 604
 605 static bool
 606 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 607 {
 608         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 609                 return false;
 610
 611         return intel_sdvo_read_response(intel_sdvo, value, len);
 612 }
 613
 614 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 615 {
 616         struct intel_sdvo_set_target_input_args targets = {0};
 617         return intel_sdvo_set_value(intel_sdvo,
 618                                     SDVO_CMD_SET_TARGET_INPUT,
 619                                     &targets, sizeof(targets));
 620 }
 621
 622 /**
 623  * Return whether each input is trained.
 624  *
 625  * This function is making an assumption about the layout of the response,
 626  * which should be checked against the docs.
 627  */
 628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 629 {
 630         struct intel_sdvo_get_trained_inputs_response response;
 631
 632         BUILD_BUG_ON(sizeof(response) != 1);
 633         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 634                                   &response, sizeof(response)))
 635                 return false;
 636
 637         *input_1 = response.input0_trained;
 638         *input_2 = response.input1_trained;
 639         return true;
 640 }
 641
 642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 643                                           u16 outputs)
 644 {
 645         return intel_sdvo_set_value(intel_sdvo,
 646                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 647                                     &outputs, sizeof(outputs));
 648 }
 649
 650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 651                                           u16 *outputs)
 652 {
 653         return intel_sdvo_get_value(intel_sdvo,
 654                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 655                                     outputs, sizeof(*outputs));
 656 }
 657
 658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 659                                                int mode)
 660 {
 661         u8 state = SDVO_ENCODER_STATE_ON;
 662
 663         switch (mode) {
 664         case DRM_MODE_DPMS_ON:
 665                 state = SDVO_ENCODER_STATE_ON;
 666                 break;
 667         case DRM_MODE_DPMS_STANDBY:
 668                 state = SDVO_ENCODER_STATE_STANDBY;
 669                 break;
 670         case DRM_MODE_DPMS_SUSPEND:
 671                 state = SDVO_ENCODER_STATE_SUSPEND;
 672                 break;
 673         case DRM_MODE_DPMS_OFF:
 674                 state = SDVO_ENCODER_STATE_OFF;
 675                 break;
 676         }
 677
 678         return intel_sdvo_set_value(intel_sdvo,
 679                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 680 }
 681
 682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 683                                                    int *clock_min,
 684                                                    int *clock_max)
 685 {
 686         struct intel_sdvo_pixel_clock_range clocks;
 687
 688         BUILD_BUG_ON(sizeof(clocks) != 4);
 689         if (!intel_sdvo_get_value(intel_sdvo,
 690                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 691                                   &clocks, sizeof(clocks)))
 692                 return false;
 693
 694         /* Convert the values from units of 10 kHz to kHz. */
 695         *clock_min = clocks.min * 10;
 696         *clock_max = clocks.max * 10;
 697         return true;
 698 }
 699
 700 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 701                                          u16 outputs)
 702 {
 703         return intel_sdvo_set_value(intel_sdvo,
 704                                     SDVO_CMD_SET_TARGET_OUTPUT,
 705                                     &outputs, sizeof(outputs));
 706 }
 707
 708 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 709                                   struct intel_sdvo_dtd *dtd)
 710 {
 711         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 712                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 713 }
 714
 715 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 716                                   struct intel_sdvo_dtd *dtd)
 717 {
 718         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 719                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 720 }
 721
 722 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 723                                          struct intel_sdvo_dtd *dtd)
 724 {
 725         return intel_sdvo_set_timing(intel_sdvo,
 726                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 727 }
 728
 729 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 730                                          struct intel_sdvo_dtd *dtd)
 731 {
 732         return intel_sdvo_set_timing(intel_sdvo,
 733                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 734 }
 735
 736 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 737                                         struct intel_sdvo_dtd *dtd)
 738 {
 739         return intel_sdvo_get_timing(intel_sdvo,
 740                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 741 }
 742
 743 static bool
 744 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 745                                          uint16_t clock,
 746                                          uint16_t width,
 747                                          uint16_t height)
 748 {
 749         struct intel_sdvo_preferred_input_timing_args args;
 750
 751         memset(&args, 0, sizeof(args));
 752         args.clock = clock;
 753         args.width = width;
 754         args.height = height;
 755         args.interlace = 0;
 756
 757         if (intel_sdvo->is_lvds &&
 758            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 759             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 760                 args.scaled = 1;
 761
 762         return intel_sdvo_set_value(intel_sdvo,
 763                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 764                                     &args, sizeof(args));
 765 }
 766
 767 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 768                                                   struct intel_sdvo_dtd *dtd)
 769 {
 770         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 771         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 772         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 773                                     &dtd->part1, sizeof(dtd->part1)) &&
 774                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 775                                      &dtd->part2, sizeof(dtd->part2));
 776 }
 777
 778 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 779 {
 780         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 781 }
 782
 783 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 784                                          const struct drm_display_mode *mode)
 785 {
 786         uint16_t width, height;
 787         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 788         uint16_t h_sync_offset, v_sync_offset;
 789         int mode_clock;
 790
 791         width = mode->hdisplay;
 792         height = mode->vdisplay;
 793
 794         /* do some mode translations */
 795         h_blank_len = mode->htotal - mode->hdisplay;
 796         h_sync_len = mode->hsync_end - mode->hsync_start;
 797
 798         v_blank_len = mode->vtotal - mode->vdisplay;
 799         v_sync_len = mode->vsync_end - mode->vsync_start;
 800
 801         h_sync_offset = mode->hsync_start - mode->hdisplay;
 802         v_sync_offset = mode->vsync_start - mode->vdisplay;
 803
 804         mode_clock = mode->clock;
 805         mode_clock /= 10;
 806         dtd->part1.clock = mode_clock;
 807
 808         dtd->part1.h_active = width & 0xff;
 809         dtd->part1.h_blank = h_blank_len & 0xff;
 810         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 811                 ((h_blank_len >> 8) & 0xf);
 812         dtd->part1.v_active = height & 0xff;
 813         dtd->part1.v_blank = v_blank_len & 0xff;
 814         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 815                 ((v_blank_len >> 8) & 0xf);
 816
 817         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 818         dtd->part2.h_sync_width = h_sync_len & 0xff;
 819         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 820                 (v_sync_len & 0xf);
 821         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 822                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 823                 ((v_sync_len & 0x30) >> 4);
 824
 825         dtd->part2.dtd_flags = 0x18;
 826         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 827                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 828         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 829                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 830         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 831                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 832
 833         dtd->part2.sdvo_flags = 0;
 834         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 835         dtd->part2.reserved = 0;
 836 }
 837
 838 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 839                                          const struct intel_sdvo_dtd *dtd)
 840 {
 841         mode->hdisplay = dtd->part1.h_active;
 842         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 843         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 844         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 845         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 846         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 847         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 848         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 849
 850         mode->vdisplay = dtd->part1.v_active;
 851         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 852         mode->vsync_start = mode->vdisplay;
 853         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 854         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 855         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 856         mode->vsync_end = mode->vsync_start +
 857                 (dtd->part2.v_sync_off_width & 0xf);
 858         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 859         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 860         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 861
 862         mode->clock = dtd->part1.clock * 10;
 863
 864         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 865         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 866                 mode->flags |= DRM_MODE_FLAG_INTERLACE;
 867         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 868                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 869         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 870                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 871 }
 872
 873 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 874 {
 875         struct intel_sdvo_encode encode;
 876
 877         BUILD_BUG_ON(sizeof(encode) != 2);
 878         return intel_sdvo_get_value(intel_sdvo,
 879                                   SDVO_CMD_GET_SUPP_ENCODE,
 880                                   &encode, sizeof(encode));
 881 }
 882
 883 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 884                                   uint8_t mode)
 885 {
 886         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 887 }
 888
 889 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 890                                        uint8_t mode)
 891 {
 892         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 893 }
 894
 895 #if 0
 896 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 897 {
 898         int i, j;
 899         uint8_t set_buf_index[2];
 900         uint8_t av_split;
 901         uint8_t buf_size;
 902         uint8_t buf[48];
 903         uint8_t *pos;
 904
 905         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 906
 907         for (i = 0; i <= av_split; i++) {
 908                 set_buf_index[0] = i; set_buf_index[1] = 0;
 909                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 910                                      set_buf_index, 2);
 911                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 912                 intel_sdvo_read_response(encoder, &buf_size, 1);
 913
 914                 pos = buf;
 915                 for (j = 0; j <= buf_size; j += 8) {
 916                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 917                                              NULL, 0);
 918                         intel_sdvo_read_response(encoder, pos, 8);
 919                         pos += 8;
 920                 }
 921         }
 922 }
 923 #endif
 924
 925 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 926                                        unsigned if_index, uint8_t tx_rate,
 927                                        uint8_t *data, unsigned length)
 928 {
 929         uint8_t set_buf_index[2] = { if_index, 0 };
 930         uint8_t hbuf_size, tmp[8];
 931         int i;
 932
 933         if (!intel_sdvo_set_value(intel_sdvo,
 934                                   SDVO_CMD_SET_HBUF_INDEX,
 935                                   set_buf_index, 2))
 936                 return false;
 937
 938         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 939                                   &hbuf_size, 1))
 940                 return false;
 941
 942         /* Buffer size is 0 based, hooray! */
 943         hbuf_size++;
 944
 945         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 946                       if_index, length, hbuf_size);
 947
 948         for (i = 0; i < hbuf_size; i += 8) {
 949                 memset(tmp, 0, 8);
 950                 if (i < length)
 951                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 952
 953                 if (!intel_sdvo_set_value(intel_sdvo,
 954                                           SDVO_CMD_SET_HBUF_DATA,
 955                                           tmp, 8))
 956                         return false;
 957         }
 958
 959         return intel_sdvo_set_value(intel_sdvo,
 960                                     SDVO_CMD_SET_HBUF_TXRATE,
 961                                     &tx_rate, 1);
 962 }
 963
 964 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
 965                                          const struct drm_display_mode *adjusted_mode)
 966 {
 967         uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
 968         struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
 969         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 970         union hdmi_infoframe frame;
 971         int ret;
 972         ssize_t len;
 973
 974         ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
 975                                                        adjusted_mode);
 976         if (ret < 0) {
 977                 DRM_ERROR("couldn't fill AVI infoframe\n");
 978                 return false;
 979         }
 980
 981         if (intel_sdvo->rgb_quant_range_selectable) {
 982                 if (intel_crtc->config.limited_color_range)
 983                         frame.avi.quantization_range =
 984                                 HDMI_QUANTIZATION_RANGE_LIMITED;
 985                 else
 986                         frame.avi.quantization_range =
 987                                 HDMI_QUANTIZATION_RANGE_FULL;
 988         }
 989
 990         len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
 991         if (len < 0)
 992                 return false;
 993
 994         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
 995                                           SDVO_HBUF_TX_VSYNC,
 996                                           sdvo_data, sizeof(sdvo_data));
 997 }
 998
 999 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1000 {
1001         struct intel_sdvo_tv_format format;
1002         uint32_t format_map;
1003
1004         format_map = 1 << intel_sdvo->tv_format_index;
1005         memset(&format, 0, sizeof(format));
1006         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1007
1008         BUILD_BUG_ON(sizeof(format) != 6);
1009         return intel_sdvo_set_value(intel_sdvo,
1010                                     SDVO_CMD_SET_TV_FORMAT,
1011                                     &format, sizeof(format));
1012 }
1013
1014 static bool
1015 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1016                                         const struct drm_display_mode *mode)
1017 {
1018         struct intel_sdvo_dtd output_dtd;
1019
1020         if (!intel_sdvo_set_target_output(intel_sdvo,
1021                                           intel_sdvo->attached_output))
1022                 return false;
1023
1024         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1025         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1026                 return false;
1027
1028         return true;
1029 }
1030
1031 /* Asks the sdvo controller for the preferred input mode given the output mode.
1032  * Unfortunately we have to set up the full output mode to do that. */
1033 static bool
1034 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1035                                     const struct drm_display_mode *mode,
1036                                     struct drm_display_mode *adjusted_mode)
1037 {
1038         struct intel_sdvo_dtd input_dtd;
1039
1040         /* Reset the input timing to the screen. Assume always input 0. */
1041         if (!intel_sdvo_set_target_input(intel_sdvo))
1042                 return false;
1043
1044         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1045                                                       mode->clock / 10,
1046                                                       mode->hdisplay,
1047                                                       mode->vdisplay))
1048                 return false;
1049
1050         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1051                                                    &input_dtd))
1052                 return false;
1053
1054         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1055         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1056
1057         return true;
1058 }
1059
1060 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1061 {
1062         unsigned dotclock = pipe_config->adjusted_mode.clock;
1063         struct dpll *clock = &pipe_config->dpll;
1064
1065         /* SDVO TV has fixed PLL values depend on its clock range,
1066            this mirrors vbios setting. */
1067         if (dotclock >= 100000 && dotclock < 140500) {
1068                 clock->p1 = 2;
1069                 clock->p2 = 10;
1070                 clock->n = 3;
1071                 clock->m1 = 16;
1072                 clock->m2 = 8;
1073         } else if (dotclock >= 140500 && dotclock <= 200000) {
1074                 clock->p1 = 1;
1075                 clock->p2 = 10;
1076                 clock->n = 6;
1077                 clock->m1 = 12;
1078                 clock->m2 = 8;
1079         } else {
1080                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1081         }
1082
1083         pipe_config->clock_set = true;
1084 }
1085
1086 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1087                                       struct intel_crtc_config *pipe_config)
1088 {
1089         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1090         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1091         struct drm_display_mode *mode = &pipe_config->requested_mode;
1092
1093         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1094         pipe_config->pipe_bpp = 8*3;
1095
1096         if (HAS_PCH_SPLIT(encoder->base.dev))
1097                 pipe_config->has_pch_encoder = true;
1098
1099         /* We need to construct preferred input timings based on our
1100          * output timings.  To do that, we have to set the output
1101          * timings, even though this isn't really the right place in
1102          * the sequence to do it. Oh well.
1103          */
1104         if (intel_sdvo->is_tv) {
1105                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1106                         return false;
1107
1108                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1109                                                            mode,
1110                                                            adjusted_mode);
1111                 pipe_config->sdvo_tv_clock = true;
1112         } else if (intel_sdvo->is_lvds) {
1113                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1114                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1115                         return false;
1116
1117                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1118                                                            mode,
1119                                                            adjusted_mode);
1120         }
1121
1122         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1123          * SDVO device will factor out the multiplier during mode_set.
1124          */
1125         pipe_config->pixel_multiplier =
1126                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1127         adjusted_mode->clock *= pipe_config->pixel_multiplier;
1128
1129         if (intel_sdvo->color_range_auto) {
1130                 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1131                 /* FIXME: This bit is only valid when using TMDS encoding and 8
1132                  * bit per color mode. */
1133                 if (intel_sdvo->has_hdmi_monitor &&
1134                     drm_match_cea_mode(adjusted_mode) > 1)
1135                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1136                 else
1137                         intel_sdvo->color_range = 0;
1138         }
1139
1140         if (intel_sdvo->color_range)
1141                 pipe_config->limited_color_range = true;
1142
1143         /* Clock computation needs to happen after pixel multiplier. */
1144         if (intel_sdvo->is_tv)
1145                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1146
1147         return true;
1148 }
1149
1150 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1151 {
1152         struct drm_device *dev = intel_encoder->base.dev;
1153         struct drm_i915_private *dev_priv = dev->dev_private;
1154         struct drm_crtc *crtc = intel_encoder->base.crtc;
1155         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1156         struct drm_display_mode *adjusted_mode =
1157                 &intel_crtc->config.adjusted_mode;
1158         struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
1159         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1160         u32 sdvox;
1161         struct intel_sdvo_in_out_map in_out;
1162         struct intel_sdvo_dtd input_dtd, output_dtd;
1163         int rate;
1164
1165         if (!mode)
1166                 return;
1167
1168         /* First, set the input mapping for the first input to our controlled
1169          * output. This is only correct if we're a single-input device, in
1170          * which case the first input is the output from the appropriate SDVO
1171          * channel on the motherboard.  In a two-input device, the first input
1172          * will be SDVOB and the second SDVOC.
1173          */
1174         in_out.in0 = intel_sdvo->attached_output;
1175         in_out.in1 = 0;
1176
1177         intel_sdvo_set_value(intel_sdvo,
1178                              SDVO_CMD_SET_IN_OUT_MAP,
1179                              &in_out, sizeof(in_out));
1180
1181         /* Set the output timings to the screen */
1182         if (!intel_sdvo_set_target_output(intel_sdvo,
1183                                           intel_sdvo->attached_output))
1184                 return;
1185
1186         /* lvds has a special fixed output timing. */
1187         if (intel_sdvo->is_lvds)
1188                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1189                                              intel_sdvo->sdvo_lvds_fixed_mode);
1190         else
1191                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1192         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1193                 DRM_INFO("Setting output timings on %s failed\n",
1194                          SDVO_NAME(intel_sdvo));
1195
1196         /* Set the input timing to the screen. Assume always input 0. */
1197         if (!intel_sdvo_set_target_input(intel_sdvo))
1198                 return;
1199
1200         if (intel_sdvo->has_hdmi_monitor) {
1201                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1202                 intel_sdvo_set_colorimetry(intel_sdvo,
1203                                            SDVO_COLORIMETRY_RGB256);
1204                 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1205         } else
1206                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1207
1208         if (intel_sdvo->is_tv &&
1209             !intel_sdvo_set_tv_format(intel_sdvo))
1210                 return;
1211
1212         /* We have tried to get input timing in mode_fixup, and filled into
1213          * adjusted_mode.
1214          */
1215         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1216         if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1217                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1218         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1219                 DRM_INFO("Setting input timings on %s failed\n",
1220                          SDVO_NAME(intel_sdvo));
1221
1222         switch (intel_crtc->config.pixel_multiplier) {
1223         default:
1224                 WARN(1, "unknown pixel mutlipler specified\n");
1225         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1226         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1227         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1228         }
1229         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1230                 return;
1231
1232         /* Set the SDVO control regs. */
1233         if (INTEL_INFO(dev)->gen >= 4) {
1234                 /* The real mode polarity is set by the SDVO commands, using
1235                  * struct intel_sdvo_dtd. */
1236                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1237                 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1238                         sdvox |= intel_sdvo->color_range;
1239                 if (INTEL_INFO(dev)->gen < 5)
1240                         sdvox |= SDVO_BORDER_ENABLE;
1241         } else {
1242                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1243                 switch (intel_sdvo->sdvo_reg) {
1244                 case GEN3_SDVOB:
1245                         sdvox &= SDVOB_PRESERVE_MASK;
1246                         break;
1247                 case GEN3_SDVOC:
1248                         sdvox &= SDVOC_PRESERVE_MASK;
1249                         break;
1250                 }
1251                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1252         }
1253
1254         if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1255                 sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
1256         else
1257                 sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
1258
1259         if (intel_sdvo->has_hdmi_audio)
1260                 sdvox |= SDVO_AUDIO_ENABLE;
1261
1262         if (INTEL_INFO(dev)->gen >= 4) {
1263                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1264         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1265                 /* done in crtc_mode_set as it lives inside the dpll register */
1266         } else {
1267                 sdvox |= (intel_crtc->config.pixel_multiplier - 1)
1268                         << SDVO_PORT_MULTIPLY_SHIFT;
1269         }
1270
1271         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1272             INTEL_INFO(dev)->gen < 5)
1273                 sdvox |= SDVO_STALL_SELECT;
1274         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1275 }
1276
1277 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1278 {
1279         struct intel_sdvo_connector *intel_sdvo_connector =
1280                 to_intel_sdvo_connector(&connector->base);
1281         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1282         u16 active_outputs = 0;
1283
1284         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1285
1286         if (active_outputs & intel_sdvo_connector->output_flag)
1287                 return true;
1288         else
1289                 return false;
1290 }
1291
1292 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1293                                     enum pipe *pipe)
1294 {
1295         struct drm_device *dev = encoder->base.dev;
1296         struct drm_i915_private *dev_priv = dev->dev_private;
1297         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1298         u16 active_outputs = 0;
1299         u32 tmp;
1300
1301         tmp = I915_READ(intel_sdvo->sdvo_reg);
1302         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1303
1304         if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1305                 return false;
1306
1307         if (HAS_PCH_CPT(dev))
1308                 *pipe = PORT_TO_PIPE_CPT(tmp);
1309         else
1310                 *pipe = PORT_TO_PIPE(tmp);
1311
1312         return true;
1313 }
1314
1315 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1316                                   struct intel_crtc_config *pipe_config)
1317 {
1318         struct drm_device *dev = encoder->base.dev;
1319         struct drm_i915_private *dev_priv = dev->dev_private;
1320         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1321         struct intel_sdvo_dtd dtd;
1322         int encoder_pixel_multiplier = 0;
1323         u32 flags = 0, sdvox;
1324         u8 val;
1325         bool ret;
1326
1327         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1328         if (!ret) {
1329                 /* Some sdvo encoders are not spec compliant and don't
1330                  * implement the mandatory get_timings function. */
1331                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1332                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1333         } else {
1334                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1335                         flags |= DRM_MODE_FLAG_PHSYNC;
1336                 else
1337                         flags |= DRM_MODE_FLAG_NHSYNC;
1338
1339                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1340                         flags |= DRM_MODE_FLAG_PVSYNC;
1341                 else
1342                         flags |= DRM_MODE_FLAG_NVSYNC;
1343         }
1344
1345         pipe_config->adjusted_mode.flags |= flags;
1346
1347         /*
1348          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1349          * the sdvo port register, on all other platforms it is part of the dpll
1350          * state. Since the general pipe state readout happens before the
1351          * encoder->get_config we so already have a valid pixel multplier on all
1352          * other platfroms.
1353          */
1354         if (IS_I915G(dev) || IS_I915GM(dev)) {
1355                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1356                 pipe_config->pixel_multiplier =
1357                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1358                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1359         }
1360
1361         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1362         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1363                                  &val, 1)) {
1364                 switch (val) {
1365                 case SDVO_CLOCK_RATE_MULT_1X:
1366                         encoder_pixel_multiplier = 1;
1367                         break;
1368                 case SDVO_CLOCK_RATE_MULT_2X:
1369                         encoder_pixel_multiplier = 2;
1370                         break;
1371                 case SDVO_CLOCK_RATE_MULT_4X:
1372                         encoder_pixel_multiplier = 4;
1373                         break;
1374                 }
1375         }
1376
1377         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1378              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1379              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1380 }
1381
1382 static void intel_disable_sdvo(struct intel_encoder *encoder)
1383 {
1384         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1385         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1386         u32 temp;
1387
1388         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1389         if (0)
1390                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1391                                                    DRM_MODE_DPMS_OFF);
1392
1393         temp = I915_READ(intel_sdvo->sdvo_reg);
1394         if ((temp & SDVO_ENABLE) != 0) {
1395                 /* HW workaround for IBX, we need to move the port to
1396                  * transcoder A before disabling it. */
1397                 if (HAS_PCH_IBX(encoder->base.dev)) {
1398                         struct drm_crtc *crtc = encoder->base.crtc;
1399                         int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1400
1401                         if (temp & SDVO_PIPE_B_SELECT) {
1402                                 temp &= ~SDVO_PIPE_B_SELECT;
1403                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1404                                 POSTING_READ(intel_sdvo->sdvo_reg);
1405
1406                                 /* Again we need to write this twice. */
1407                                 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1408                                 POSTING_READ(intel_sdvo->sdvo_reg);
1409
1410                                 /* Transcoder selection bits only update
1411                                  * effectively on vblank. */
1412                                 if (crtc)
1413                                         intel_wait_for_vblank(encoder->base.dev, pipe);
1414                                 else
1415                                         msleep(50);
1416                         }
1417                 }
1418
1419                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1420         }
1421 }
1422
1423 static void intel_enable_sdvo(struct intel_encoder *encoder)
1424 {
1425         struct drm_device *dev = encoder->base.dev;
1426         struct drm_i915_private *dev_priv = dev->dev_private;
1427         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1428         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1429         u32 temp;
1430         bool input1, input2;
1431         int i;
1432         u8 status;
1433
1434         temp = I915_READ(intel_sdvo->sdvo_reg);
1435         if ((temp & SDVO_ENABLE) == 0) {
1436                 /* HW workaround for IBX, we need to move the port
1437                  * to transcoder A before disabling it, so restore it here. */
1438                 if (HAS_PCH_IBX(dev))
1439                         temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1440
1441                 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1442         }
1443         for (i = 0; i < 2; i++)
1444                 intel_wait_for_vblank(dev, intel_crtc->pipe);
1445
1446         status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1447         /* Warn if the device reported failure to sync.
1448          * A lot of SDVO devices fail to notify of sync, but it's
1449          * a given it the status is a success, we succeeded.
1450          */
1451         if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1452                 DRM_DEBUG_KMS("First %s output reported failure to "
1453                                 "sync\n", SDVO_NAME(intel_sdvo));
1454         }
1455
1456         if (0)
1457                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1458                                                    DRM_MODE_DPMS_ON);
1459         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1460 }
1461
1462 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1463 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1464 {
1465         struct drm_crtc *crtc;
1466         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1467
1468         /* dvo supports only 2 dpms states. */
1469         if (mode != DRM_MODE_DPMS_ON)
1470                 mode = DRM_MODE_DPMS_OFF;
1471
1472         if (mode == connector->dpms)
1473                 return;
1474
1475         connector->dpms = mode;
1476
1477         /* Only need to change hw state when actually enabled */
1478         crtc = intel_sdvo->base.base.crtc;
1479         if (!crtc) {
1480                 intel_sdvo->base.connectors_active = false;
1481                 return;
1482         }
1483
1484         /* We set active outputs manually below in case pipe dpms doesn't change
1485          * due to cloning. */
1486         if (mode != DRM_MODE_DPMS_ON) {
1487                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1488                 if (0)
1489                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1490
1491                 intel_sdvo->base.connectors_active = false;
1492
1493                 intel_crtc_update_dpms(crtc);
1494         } else {
1495                 intel_sdvo->base.connectors_active = true;
1496
1497                 intel_crtc_update_dpms(crtc);
1498
1499                 if (0)
1500                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1501                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1502         }
1503
1504         intel_modeset_check_state(connector->dev);
1505 }
1506
1507 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1508                                  struct drm_display_mode *mode)
1509 {
1510         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1511
1512         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1513                 return MODE_NO_DBLESCAN;
1514
1515         if (intel_sdvo->pixel_clock_min > mode->clock)
1516                 return MODE_CLOCK_LOW;
1517
1518         if (intel_sdvo->pixel_clock_max < mode->clock)
1519                 return MODE_CLOCK_HIGH;
1520
1521         if (intel_sdvo->is_lvds) {
1522                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1523                         return MODE_PANEL;
1524
1525                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1526                         return MODE_PANEL;
1527         }
1528
1529         return MODE_OK;
1530 }
1531
1532 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1533 {
1534         BUILD_BUG_ON(sizeof(*caps) != 8);
1535         if (!intel_sdvo_get_value(intel_sdvo,
1536                                   SDVO_CMD_GET_DEVICE_CAPS,
1537                                   caps, sizeof(*caps)))
1538                 return false;
1539
1540         DRM_DEBUG_KMS("SDVO capabilities:\n"
1541                       "  vendor_id: %d\n"
1542                       "  device_id: %d\n"
1543                       "  device_rev_id: %d\n"
1544                       "  sdvo_version_major: %d\n"
1545                       "  sdvo_version_minor: %d\n"
1546                       "  sdvo_inputs_mask: %d\n"
1547                       "  smooth_scaling: %d\n"
1548                       "  sharp_scaling: %d\n"
1549                       "  up_scaling: %d\n"
1550                       "  down_scaling: %d\n"
1551                       "  stall_support: %d\n"
1552                       "  output_flags: %d\n",
1553                       caps->vendor_id,
1554                       caps->device_id,
1555                       caps->device_rev_id,
1556                       caps->sdvo_version_major,
1557                       caps->sdvo_version_minor,
1558                       caps->sdvo_inputs_mask,
1559                       caps->smooth_scaling,
1560                       caps->sharp_scaling,
1561                       caps->up_scaling,
1562                       caps->down_scaling,
1563                       caps->stall_support,
1564                       caps->output_flags);
1565
1566         return true;
1567 }
1568
1569 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1570 {
1571         struct drm_device *dev = intel_sdvo->base.base.dev;
1572         uint16_t hotplug;
1573
1574         /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1575          * on the line. */
1576         if (IS_I945G(dev) || IS_I945GM(dev))
1577                 return 0;
1578
1579         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1580                                         &hotplug, sizeof(hotplug)))
1581                 return 0;
1582
1583         return hotplug;
1584 }
1585
1586 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1587 {
1588         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1589
1590         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1591                         &intel_sdvo->hotplug_active, 2);
1592 }
1593
1594 static bool
1595 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1596 {
1597         /* Is there more than one type of output? */
1598         return hweight16(intel_sdvo->caps.output_flags) > 1;
1599 }
1600
1601 static struct edid *
1602 intel_sdvo_get_edid(struct drm_connector *connector)
1603 {
1604         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1605         return drm_get_edid(connector, &sdvo->ddc);
1606 }
1607
1608 /* Mac mini hack -- use the same DDC as the analog connector */
1609 static struct edid *
1610 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1611 {
1612         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1613
1614         return drm_get_edid(connector,
1615                             intel_gmbus_get_adapter(dev_priv,
1616                                                     dev_priv->vbt.crt_ddc_pin));
1617 }
1618
1619 static enum drm_connector_status
1620 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1621 {
1622         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1623         enum drm_connector_status status;
1624         struct edid *edid;
1625
1626         edid = intel_sdvo_get_edid(connector);
1627
1628         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1629                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1630
1631                 /*
1632                  * Don't use the 1 as the argument of DDC bus switch to get
1633                  * the EDID. It is used for SDVO SPD ROM.
1634                  */
1635                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1636                         intel_sdvo->ddc_bus = ddc;
1637                         edid = intel_sdvo_get_edid(connector);
1638                         if (edid)
1639                                 break;
1640                 }
1641                 /*
1642                  * If we found the EDID on the other bus,
1643                  * assume that is the correct DDC bus.
1644                  */
1645                 if (edid == NULL)
1646                         intel_sdvo->ddc_bus = saved_ddc;
1647         }
1648
1649         /*
1650          * When there is no edid and no monitor is connected with VGA
1651          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1652          */
1653         if (edid == NULL)
1654                 edid = intel_sdvo_get_analog_edid(connector);
1655
1656         status = connector_status_unknown;
1657         if (edid != NULL) {
1658                 /* DDC bus is shared, match EDID to connector type */
1659                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1660                         status = connector_status_connected;
1661                         if (intel_sdvo->is_hdmi) {
1662                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1663                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1664                                 intel_sdvo->rgb_quant_range_selectable =
1665                                         drm_rgb_quant_range_selectable(edid);
1666                         }
1667                 } else
1668                         status = connector_status_disconnected;
1669                 kfree(edid);
1670         }
1671
1672         if (status == connector_status_connected) {
1673                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1674                 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1675                         intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1676         }
1677
1678         return status;
1679 }
1680
1681 static bool
1682 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1683                                   struct edid *edid)
1684 {
1685         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1686         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1687
1688         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1689                       connector_is_digital, monitor_is_digital);
1690         return connector_is_digital == monitor_is_digital;
1691 }
1692
1693 static enum drm_connector_status
1694 intel_sdvo_detect(struct drm_connector *connector, bool force)
1695 {
1696         uint16_t response;
1697         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1698         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1699         enum drm_connector_status ret;
1700
1701         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1702                       connector->base.id, drm_get_connector_name(connector));
1703
1704         if (!intel_sdvo_get_value(intel_sdvo,
1705                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1706                                   &response, 2))
1707                 return connector_status_unknown;
1708
1709         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1710                       response & 0xff, response >> 8,
1711                       intel_sdvo_connector->output_flag);
1712
1713         if (response == 0)
1714                 return connector_status_disconnected;
1715
1716         intel_sdvo->attached_output = response;
1717
1718         intel_sdvo->has_hdmi_monitor = false;
1719         intel_sdvo->has_hdmi_audio = false;
1720         intel_sdvo->rgb_quant_range_selectable = false;
1721
1722         if ((intel_sdvo_connector->output_flag & response) == 0)
1723                 ret = connector_status_disconnected;
1724         else if (IS_TMDS(intel_sdvo_connector))
1725                 ret = intel_sdvo_tmds_sink_detect(connector);
1726         else {
1727                 struct edid *edid;
1728
1729                 /* if we have an edid check it matches the connection */
1730                 edid = intel_sdvo_get_edid(connector);
1731                 if (edid == NULL)
1732                         edid = intel_sdvo_get_analog_edid(connector);
1733                 if (edid != NULL) {
1734                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1735                                                               edid))
1736                                 ret = connector_status_connected;
1737                         else
1738                                 ret = connector_status_disconnected;
1739
1740                         kfree(edid);
1741                 } else
1742                         ret = connector_status_connected;
1743         }
1744
1745         /* May update encoder flag for like clock for SDVO TV, etc.*/
1746         if (ret == connector_status_connected) {
1747                 intel_sdvo->is_tv = false;
1748                 intel_sdvo->is_lvds = false;
1749
1750                 if (response & SDVO_TV_MASK)
1751                         intel_sdvo->is_tv = true;
1752                 if (response & SDVO_LVDS_MASK)
1753                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1754         }
1755
1756         return ret;
1757 }
1758
1759 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1760 {
1761         struct edid *edid;
1762
1763         /* set the bus switch and get the modes */
1764         edid = intel_sdvo_get_edid(connector);
1765
1766         /*
1767          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1768          * link between analog and digital outputs. So, if the regular SDVO
1769          * DDC fails, check to see if the analog output is disconnected, in
1770          * which case we'll look there for the digital DDC data.
1771          */
1772         if (edid == NULL)
1773                 edid = intel_sdvo_get_analog_edid(connector);
1774
1775         if (edid != NULL) {
1776                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1777                                                       edid)) {
1778                         drm_mode_connector_update_edid_property(connector, edid);
1779                         drm_add_edid_modes(connector, edid);
1780                 }
1781
1782                 kfree(edid);
1783         }
1784 }
1785
1786 /*
1787  * Set of SDVO TV modes.
1788  * Note!  This is in reply order (see loop in get_tv_modes).
1789  * XXX: all 60Hz refresh?
1790  */
1791 static const struct drm_display_mode sdvo_tv_modes[] = {
1792         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1793                    416, 0, 200, 201, 232, 233, 0,
1794                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1795         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1796                    416, 0, 240, 241, 272, 273, 0,
1797                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1798         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1799                    496, 0, 300, 301, 332, 333, 0,
1800                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1801         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1802                    736, 0, 350, 351, 382, 383, 0,
1803                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1804         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1805                    736, 0, 400, 401, 432, 433, 0,
1806                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1807         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1808                    736, 0, 480, 481, 512, 513, 0,
1809                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1810         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1811                    800, 0, 480, 481, 512, 513, 0,
1812                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1813         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1814                    800, 0, 576, 577, 608, 609, 0,
1815                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1816         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1817                    816, 0, 350, 351, 382, 383, 0,
1818                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1819         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1820                    816, 0, 400, 401, 432, 433, 0,
1821                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1822         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1823                    816, 0, 480, 481, 512, 513, 0,
1824                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1825         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1826                    816, 0, 540, 541, 572, 573, 0,
1827                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1828         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1829                    816, 0, 576, 577, 608, 609, 0,
1830                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1831         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1832                    864, 0, 576, 577, 608, 609, 0,
1833                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1834         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1835                    896, 0, 600, 601, 632, 633, 0,
1836                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1837         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1838                    928, 0, 624, 625, 656, 657, 0,
1839                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1840         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1841                    1016, 0, 766, 767, 798, 799, 0,
1842                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1843         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1844                    1120, 0, 768, 769, 800, 801, 0,
1845                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1846         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1847                    1376, 0, 1024, 1025, 1056, 1057, 0,
1848                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1849 };
1850
1851 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1852 {
1853         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1854         struct intel_sdvo_sdtv_resolution_request tv_res;
1855         uint32_t reply = 0, format_map = 0;
1856         int i;
1857
1858         /* Read the list of supported input resolutions for the selected TV
1859          * format.
1860          */
1861         format_map = 1 << intel_sdvo->tv_format_index;
1862         memcpy(&tv_res, &format_map,
1863                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1864
1865         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1866                 return;
1867
1868         BUILD_BUG_ON(sizeof(tv_res) != 3);
1869         if (!intel_sdvo_write_cmd(intel_sdvo,
1870                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1871                                   &tv_res, sizeof(tv_res)))
1872                 return;
1873         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1874                 return;
1875
1876         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1877                 if (reply & (1 << i)) {
1878                         struct drm_display_mode *nmode;
1879                         nmode = drm_mode_duplicate(connector->dev,
1880                                                    &sdvo_tv_modes[i]);
1881                         if (nmode)
1882                                 drm_mode_probed_add(connector, nmode);
1883                 }
1884 }
1885
1886 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1887 {
1888         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1889         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1890         struct drm_display_mode *newmode;
1891
1892         /*
1893          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1894          * SDVO->LVDS transcoders can't cope with the EDID mode.
1895          */
1896         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1897                 newmode = drm_mode_duplicate(connector->dev,
1898                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
1899                 if (newmode != NULL) {
1900                         /* Guarantee the mode is preferred */
1901                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1902                                          DRM_MODE_TYPE_DRIVER);
1903                         drm_mode_probed_add(connector, newmode);
1904                 }
1905         }
1906
1907         /*
1908          * Attempt to get the mode list from DDC.
1909          * Assume that the preferred modes are
1910          * arranged in priority order.
1911          */
1912         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1913
1914         list_for_each_entry(newmode, &connector->probed_modes, head) {
1915                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1916                         intel_sdvo->sdvo_lvds_fixed_mode =
1917                                 drm_mode_duplicate(connector->dev, newmode);
1918
1919                         intel_sdvo->is_lvds = true;
1920                         break;
1921                 }
1922         }
1923
1924 }
1925
1926 static int intel_sdvo_get_modes(struct drm_connector *connector)
1927 {
1928         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1929
1930         if (IS_TV(intel_sdvo_connector))
1931                 intel_sdvo_get_tv_modes(connector);
1932         else if (IS_LVDS(intel_sdvo_connector))
1933                 intel_sdvo_get_lvds_modes(connector);
1934         else
1935                 intel_sdvo_get_ddc_modes(connector);
1936
1937         return !list_empty(&connector->probed_modes);
1938 }
1939
1940 static void
1941 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1942 {
1943         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1944         struct drm_device *dev = connector->dev;
1945
1946         if (intel_sdvo_connector->left)
1947                 drm_property_destroy(dev, intel_sdvo_connector->left);
1948         if (intel_sdvo_connector->right)
1949                 drm_property_destroy(dev, intel_sdvo_connector->right);
1950         if (intel_sdvo_connector->top)
1951                 drm_property_destroy(dev, intel_sdvo_connector->top);
1952         if (intel_sdvo_connector->bottom)
1953                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1954         if (intel_sdvo_connector->hpos)
1955                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1956         if (intel_sdvo_connector->vpos)
1957                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1958         if (intel_sdvo_connector->saturation)
1959                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1960         if (intel_sdvo_connector->contrast)
1961                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1962         if (intel_sdvo_connector->hue)
1963                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1964         if (intel_sdvo_connector->sharpness)
1965                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1966         if (intel_sdvo_connector->flicker_filter)
1967                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1968         if (intel_sdvo_connector->flicker_filter_2d)
1969                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1970         if (intel_sdvo_connector->flicker_filter_adaptive)
1971                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1972         if (intel_sdvo_connector->tv_luma_filter)
1973                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1974         if (intel_sdvo_connector->tv_chroma_filter)
1975                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1976         if (intel_sdvo_connector->dot_crawl)
1977                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1978         if (intel_sdvo_connector->brightness)
1979                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1980 }
1981
1982 static void intel_sdvo_destroy(struct drm_connector *connector)
1983 {
1984         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1985
1986         if (intel_sdvo_connector->tv_format)
1987                 drm_property_destroy(connector->dev,
1988                                      intel_sdvo_connector->tv_format);
1989
1990         intel_sdvo_destroy_enhance_property(connector);
1991         drm_sysfs_connector_remove(connector);
1992         drm_connector_cleanup(connector);
1993         kfree(intel_sdvo_connector);
1994 }
1995
1996 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1997 {
1998         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1999         struct edid *edid;
2000         bool has_audio = false;
2001
2002         if (!intel_sdvo->is_hdmi)
2003                 return false;
2004
2005         edid = intel_sdvo_get_edid(connector);
2006         if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2007                 has_audio = drm_detect_monitor_audio(edid);
2008         kfree(edid);
2009
2010         return has_audio;
2011 }
2012
2013 static int
2014 intel_sdvo_set_property(struct drm_connector *connector,
2015                         struct drm_property *property,
2016                         uint64_t val)
2017 {
2018         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2019         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2020         struct drm_i915_private *dev_priv = connector->dev->dev_private;
2021         uint16_t temp_value;
2022         uint8_t cmd;
2023         int ret;
2024
2025         ret = drm_object_property_set_value(&connector->base, property, val);
2026         if (ret)
2027                 return ret;
2028
2029         if (property == dev_priv->force_audio_property) {
2030                 int i = val;
2031                 bool has_audio;
2032
2033                 if (i == intel_sdvo_connector->force_audio)
2034                         return 0;
2035
2036                 intel_sdvo_connector->force_audio = i;
2037
2038                 if (i == HDMI_AUDIO_AUTO)
2039                         has_audio = intel_sdvo_detect_hdmi_audio(connector);
2040                 else
2041                         has_audio = (i == HDMI_AUDIO_ON);
2042
2043                 if (has_audio == intel_sdvo->has_hdmi_audio)
2044                         return 0;
2045
2046                 intel_sdvo->has_hdmi_audio = has_audio;
2047                 goto done;
2048         }
2049
2050         if (property == dev_priv->broadcast_rgb_property) {
2051                 bool old_auto = intel_sdvo->color_range_auto;
2052                 uint32_t old_range = intel_sdvo->color_range;
2053
2054                 switch (val) {
2055                 case INTEL_BROADCAST_RGB_AUTO:
2056                         intel_sdvo->color_range_auto = true;
2057                         break;
2058                 case INTEL_BROADCAST_RGB_FULL:
2059                         intel_sdvo->color_range_auto = false;
2060                         intel_sdvo->color_range = 0;
2061                         break;
2062                 case INTEL_BROADCAST_RGB_LIMITED:
2063                         intel_sdvo->color_range_auto = false;
2064                         /* FIXME: this bit is only valid when using TMDS
2065                          * encoding and 8 bit per color mode. */
2066                         intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2067                         break;
2068                 default:
2069                         return -EINVAL;
2070                 }
2071
2072                 if (old_auto == intel_sdvo->color_range_auto &&
2073                     old_range == intel_sdvo->color_range)
2074                         return 0;
2075
2076                 goto done;
2077         }
2078
2079 #define CHECK_PROPERTY(name, NAME) \
2080         if (intel_sdvo_connector->name == property) { \
2081                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2082                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2083                 cmd = SDVO_CMD_SET_##NAME; \
2084                 intel_sdvo_connector->cur_##name = temp_value; \
2085                 goto set_value; \
2086         }
2087
2088         if (property == intel_sdvo_connector->tv_format) {
2089                 if (val >= TV_FORMAT_NUM)
2090                         return -EINVAL;
2091
2092                 if (intel_sdvo->tv_format_index ==
2093                     intel_sdvo_connector->tv_format_supported[val])
2094                         return 0;
2095
2096                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2097                 goto done;
2098         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2099                 temp_value = val;
2100                 if (intel_sdvo_connector->left == property) {
2101                         drm_object_property_set_value(&connector->base,
2102                                                          intel_sdvo_connector->right, val);
2103                         if (intel_sdvo_connector->left_margin == temp_value)
2104                                 return 0;
2105
2106                         intel_sdvo_connector->left_margin = temp_value;
2107                         intel_sdvo_connector->right_margin = temp_value;
2108                         temp_value = intel_sdvo_connector->max_hscan -
2109                                 intel_sdvo_connector->left_margin;
2110                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2111                         goto set_value;
2112                 } else if (intel_sdvo_connector->right == property) {
2113                         drm_object_property_set_value(&connector->base,
2114                                                          intel_sdvo_connector->left, val);
2115                         if (intel_sdvo_connector->right_margin == temp_value)
2116                                 return 0;
2117
2118                         intel_sdvo_connector->left_margin = temp_value;
2119                         intel_sdvo_connector->right_margin = temp_value;
2120                         temp_value = intel_sdvo_connector->max_hscan -
2121                                 intel_sdvo_connector->left_margin;
2122                         cmd = SDVO_CMD_SET_OVERSCAN_H;
2123                         goto set_value;
2124                 } else if (intel_sdvo_connector->top == property) {
2125                         drm_object_property_set_value(&connector->base,
2126                                                          intel_sdvo_connector->bottom, val);
2127                         if (intel_sdvo_connector->top_margin == temp_value)
2128                                 return 0;
2129
2130                         intel_sdvo_connector->top_margin = temp_value;
2131                         intel_sdvo_connector->bottom_margin = temp_value;
2132                         temp_value = intel_sdvo_connector->max_vscan -
2133                                 intel_sdvo_connector->top_margin;
2134                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2135                         goto set_value;
2136                 } else if (intel_sdvo_connector->bottom == property) {
2137                         drm_object_property_set_value(&connector->base,
2138                                                          intel_sdvo_connector->top, val);
2139                         if (intel_sdvo_connector->bottom_margin == temp_value)
2140                                 return 0;
2141
2142                         intel_sdvo_connector->top_margin = temp_value;
2143                         intel_sdvo_connector->bottom_margin = temp_value;
2144                         temp_value = intel_sdvo_connector->max_vscan -
2145                                 intel_sdvo_connector->top_margin;
2146                         cmd = SDVO_CMD_SET_OVERSCAN_V;
2147                         goto set_value;
2148                 }
2149                 CHECK_PROPERTY(hpos, HPOS)
2150                 CHECK_PROPERTY(vpos, VPOS)
2151                 CHECK_PROPERTY(saturation, SATURATION)
2152                 CHECK_PROPERTY(contrast, CONTRAST)
2153                 CHECK_PROPERTY(hue, HUE)
2154                 CHECK_PROPERTY(brightness, BRIGHTNESS)
2155                 CHECK_PROPERTY(sharpness, SHARPNESS)
2156                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2157                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2158                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2159                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2160                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2161                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2162         }
2163
2164         return -EINVAL; /* unknown property */
2165
2166 set_value:
2167         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2168                 return -EIO;
2169
2170
2171 done:
2172         if (intel_sdvo->base.base.crtc)
2173                 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2174
2175         return 0;
2176 #undef CHECK_PROPERTY
2177 }
2178
2179 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2180         .dpms = intel_sdvo_dpms,
2181         .detect = intel_sdvo_detect,
2182         .fill_modes = drm_helper_probe_single_connector_modes,
2183         .set_property = intel_sdvo_set_property,
2184         .destroy = intel_sdvo_destroy,
2185 };
2186
2187 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2188         .get_modes = intel_sdvo_get_modes,
2189         .mode_valid = intel_sdvo_mode_valid,
2190         .best_encoder = intel_best_encoder,
2191 };
2192
2193 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2194 {
2195         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2196
2197         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2198                 drm_mode_destroy(encoder->dev,
2199                                  intel_sdvo->sdvo_lvds_fixed_mode);
2200
2201         i2c_del_adapter(&intel_sdvo->ddc);
2202         intel_encoder_destroy(encoder);
2203 }
2204
2205 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2206         .destroy = intel_sdvo_enc_destroy,
2207 };
2208
2209 static void
2210 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2211 {
2212         uint16_t mask = 0;
2213         unsigned int num_bits;
2214
2215         /* Make a mask of outputs less than or equal to our own priority in the
2216          * list.
2217          */
2218         switch (sdvo->controlled_output) {
2219         case SDVO_OUTPUT_LVDS1:
2220                 mask |= SDVO_OUTPUT_LVDS1;
2221         case SDVO_OUTPUT_LVDS0:
2222                 mask |= SDVO_OUTPUT_LVDS0;
2223         case SDVO_OUTPUT_TMDS1:
2224                 mask |= SDVO_OUTPUT_TMDS1;
2225         case SDVO_OUTPUT_TMDS0:
2226                 mask |= SDVO_OUTPUT_TMDS0;
2227         case SDVO_OUTPUT_RGB1:
2228                 mask |= SDVO_OUTPUT_RGB1;
2229         case SDVO_OUTPUT_RGB0:
2230                 mask |= SDVO_OUTPUT_RGB0;
2231                 break;
2232         }
2233
2234         /* Count bits to find what number we are in the priority list. */
2235         mask &= sdvo->caps.output_flags;
2236         num_bits = hweight16(mask);
2237         /* If more than 3 outputs, default to DDC bus 3 for now. */
2238         if (num_bits > 3)
2239                 num_bits = 3;
2240
2241         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2242         sdvo->ddc_bus = 1 << num_bits;
2243 }
2244
2245 /**
2246  * Choose the appropriate DDC bus for control bus switch command for this
2247  * SDVO output based on the controlled output.
2248  *
2249  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2250  * outputs, then LVDS outputs.
2251  */
2252 static void
2253 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2254                           struct intel_sdvo *sdvo, u32 reg)
2255 {
2256         struct sdvo_device_mapping *mapping;
2257
2258         if (sdvo->is_sdvob)
2259                 mapping = &(dev_priv->sdvo_mappings[0]);
2260         else
2261                 mapping = &(dev_priv->sdvo_mappings[1]);
2262
2263         if (mapping->initialized)
2264                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2265         else
2266                 intel_sdvo_guess_ddc_bus(sdvo);
2267 }
2268
2269 static void
2270 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2271                           struct intel_sdvo *sdvo, u32 reg)
2272 {
2273         struct sdvo_device_mapping *mapping;
2274         u8 pin;
2275
2276         if (sdvo->is_sdvob)
2277                 mapping = &dev_priv->sdvo_mappings[0];
2278         else
2279                 mapping = &dev_priv->sdvo_mappings[1];
2280
2281         if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2282                 pin = mapping->i2c_pin;
2283         else
2284                 pin = GMBUS_PORT_DPB;
2285
2286         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2287
2288         /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2289          * our code totally fails once we start using gmbus. Hence fall back to
2290          * bit banging for now. */
2291         intel_gmbus_force_bit(sdvo->i2c, true);
2292 }
2293
2294 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2295 static void
2296 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2297 {
2298         intel_gmbus_force_bit(sdvo->i2c, false);
2299 }
2300
2301 static bool
2302 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2303 {
2304         return intel_sdvo_check_supp_encode(intel_sdvo);
2305 }
2306
2307 static u8
2308 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2309 {
2310         struct drm_i915_private *dev_priv = dev->dev_private;
2311         struct sdvo_device_mapping *my_mapping, *other_mapping;
2312
2313         if (sdvo->is_sdvob) {
2314                 my_mapping = &dev_priv->sdvo_mappings[0];
2315                 other_mapping = &dev_priv->sdvo_mappings[1];
2316         } else {
2317                 my_mapping = &dev_priv->sdvo_mappings[1];
2318                 other_mapping = &dev_priv->sdvo_mappings[0];
2319         }
2320
2321         /* If the BIOS described our SDVO device, take advantage of it. */
2322         if (my_mapping->slave_addr)
2323                 return my_mapping->slave_addr;
2324
2325         /* If the BIOS only described a different SDVO device, use the
2326          * address that it isn't using.
2327          */
2328         if (other_mapping->slave_addr) {
2329                 if (other_mapping->slave_addr == 0x70)
2330                         return 0x72;
2331                 else
2332                         return 0x70;
2333         }
2334
2335         /* No SDVO device info is found for another DVO port,
2336          * so use mapping assumption we had before BIOS parsing.
2337          */
2338         if (sdvo->is_sdvob)
2339                 return 0x70;
2340         else
2341                 return 0x72;
2342 }
2343
2344 static void
2345 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2346                           struct intel_sdvo *encoder)
2347 {
2348         drm_connector_init(encoder->base.base.dev,
2349                            &connector->base.base,
2350                            &intel_sdvo_connector_funcs,
2351                            connector->base.base.connector_type);
2352
2353         drm_connector_helper_add(&connector->base.base,
2354                                  &intel_sdvo_connector_helper_funcs);
2355
2356         connector->base.base.interlace_allowed = 1;
2357         connector->base.base.doublescan_allowed = 0;
2358         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2359         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2360
2361         intel_connector_attach_encoder(&connector->base, &encoder->base);
2362         drm_sysfs_connector_add(&connector->base.base);
2363 }
2364
2365 static void
2366 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2367                                struct intel_sdvo_connector *connector)
2368 {
2369         struct drm_device *dev = connector->base.base.dev;
2370
2371         intel_attach_force_audio_property(&connector->base.base);
2372         if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2373                 intel_attach_broadcast_rgb_property(&connector->base.base);
2374                 intel_sdvo->color_range_auto = true;
2375         }
2376 }
2377
2378 static bool
2379 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2380 {
2381         struct drm_encoder *encoder = &intel_sdvo->base.base;
2382         struct drm_connector *connector;
2383         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2384         struct intel_connector *intel_connector;
2385         struct intel_sdvo_connector *intel_sdvo_connector;
2386
2387         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2388         if (!intel_sdvo_connector)
2389                 return false;
2390
2391         if (device == 0) {
2392                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2393                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2394         } else if (device == 1) {
2395                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2396                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2397         }
2398
2399         intel_connector = &intel_sdvo_connector->base;
2400         connector = &intel_connector->base;
2401         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2402                 intel_sdvo_connector->output_flag) {
2403                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2404                 /* Some SDVO devices have one-shot hotplug interrupts.
2405                  * Ensure that they get re-enabled when an interrupt happens.
2406                  */
2407                 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2408                 intel_sdvo_enable_hotplug(intel_encoder);
2409         } else {
2410                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2411         }
2412         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2413         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2414
2415         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2416                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2417                 intel_sdvo->is_hdmi = true;
2418         }
2419
2420         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2421         if (intel_sdvo->is_hdmi)
2422                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2423
2424         return true;
2425 }
2426
2427 static bool
2428 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2429 {
2430         struct drm_encoder *encoder = &intel_sdvo->base.base;
2431         struct drm_connector *connector;
2432         struct intel_connector *intel_connector;
2433         struct intel_sdvo_connector *intel_sdvo_connector;
2434
2435         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2436         if (!intel_sdvo_connector)
2437                 return false;
2438
2439         intel_connector = &intel_sdvo_connector->base;
2440         connector = &intel_connector->base;
2441         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2442         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2443
2444         intel_sdvo->controlled_output |= type;
2445         intel_sdvo_connector->output_flag = type;
2446
2447         intel_sdvo->is_tv = true;
2448
2449         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2450
2451         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2452                 goto err;
2453
2454         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2455                 goto err;
2456
2457         return true;
2458
2459 err:
2460         intel_sdvo_destroy(connector);
2461         return false;
2462 }
2463
2464 static bool
2465 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2466 {
2467         struct drm_encoder *encoder = &intel_sdvo->base.base;
2468         struct drm_connector *connector;
2469         struct intel_connector *intel_connector;
2470         struct intel_sdvo_connector *intel_sdvo_connector;
2471
2472         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2473         if (!intel_sdvo_connector)
2474                 return false;
2475
2476         intel_connector = &intel_sdvo_connector->base;
2477         connector = &intel_connector->base;
2478         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2479         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2480         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2481
2482         if (device == 0) {
2483                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2484                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2485         } else if (device == 1) {
2486                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2487                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2488         }
2489
2490         intel_sdvo_connector_init(intel_sdvo_connector,
2491                                   intel_sdvo);
2492         return true;
2493 }
2494
2495 static bool
2496 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2497 {
2498         struct drm_encoder *encoder = &intel_sdvo->base.base;
2499         struct drm_connector *connector;
2500         struct intel_connector *intel_connector;
2501         struct intel_sdvo_connector *intel_sdvo_connector;
2502
2503         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2504         if (!intel_sdvo_connector)
2505                 return false;
2506
2507         intel_connector = &intel_sdvo_connector->base;
2508         connector = &intel_connector->base;
2509         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2510         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2511
2512         if (device == 0) {
2513                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2514                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2515         } else if (device == 1) {
2516                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2517                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2518         }
2519
2520         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2521         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2522                 goto err;
2523
2524         return true;
2525
2526 err:
2527         intel_sdvo_destroy(connector);
2528         return false;
2529 }
2530
2531 static bool
2532 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2533 {
2534         intel_sdvo->is_tv = false;
2535         intel_sdvo->is_lvds = false;
2536
2537         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2538
2539         if (flags & SDVO_OUTPUT_TMDS0)
2540                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2541                         return false;
2542
2543         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2544                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2545                         return false;
2546
2547         /* TV has no XXX1 function block */
2548         if (flags & SDVO_OUTPUT_SVID0)
2549                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2550                         return false;
2551
2552         if (flags & SDVO_OUTPUT_CVBS0)
2553                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2554                         return false;
2555
2556         if (flags & SDVO_OUTPUT_YPRPB0)
2557                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2558                         return false;
2559
2560         if (flags & SDVO_OUTPUT_RGB0)
2561                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2562                         return false;
2563
2564         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2565                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2566                         return false;
2567
2568         if (flags & SDVO_OUTPUT_LVDS0)
2569                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2570                         return false;
2571
2572         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2573                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2574                         return false;
2575
2576         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2577                 unsigned char bytes[2];
2578
2579                 intel_sdvo->controlled_output = 0;
2580                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2581                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2582                               SDVO_NAME(intel_sdvo),
2583                               bytes[0], bytes[1]);
2584                 return false;
2585         }
2586         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2587
2588         return true;
2589 }
2590
2591 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2592 {
2593         struct drm_device *dev = intel_sdvo->base.base.dev;
2594         struct drm_connector *connector, *tmp;
2595
2596         list_for_each_entry_safe(connector, tmp,
2597                                  &dev->mode_config.connector_list, head) {
2598                 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2599                         intel_sdvo_destroy(connector);
2600         }
2601 }
2602
2603 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2604                                           struct intel_sdvo_connector *intel_sdvo_connector,
2605                                           int type)
2606 {
2607         struct drm_device *dev = intel_sdvo->base.base.dev;
2608         struct intel_sdvo_tv_format format;
2609         uint32_t format_map, i;
2610
2611         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2612                 return false;
2613
2614         BUILD_BUG_ON(sizeof(format) != 6);
2615         if (!intel_sdvo_get_value(intel_sdvo,
2616                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2617                                   &format, sizeof(format)))
2618                 return false;
2619
2620         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2621
2622         if (format_map == 0)
2623                 return false;
2624
2625         intel_sdvo_connector->format_supported_num = 0;
2626         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2627                 if (format_map & (1 << i))
2628                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2629
2630
2631         intel_sdvo_connector->tv_format =
2632                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2633                                             "mode", intel_sdvo_connector->format_supported_num);
2634         if (!intel_sdvo_connector->tv_format)
2635                 return false;
2636
2637         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2638                 drm_property_add_enum(
2639                                 intel_sdvo_connector->tv_format, i,
2640                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2641
2642         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2643         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2644                                       intel_sdvo_connector->tv_format, 0);
2645         return true;
2646
2647 }
2648
2649 #define ENHANCEMENT(name, NAME) do { \
2650         if (enhancements.name) { \
2651                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2652                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2653                         return false; \
2654                 intel_sdvo_connector->max_##name = data_value[0]; \
2655                 intel_sdvo_connector->cur_##name = response; \
2656                 intel_sdvo_connector->name = \
2657                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2658                 if (!intel_sdvo_connector->name) return false; \
2659                 drm_object_attach_property(&connector->base, \
2660                                               intel_sdvo_connector->name, \
2661                                               intel_sdvo_connector->cur_##name); \
2662                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2663                               data_value[0], data_value[1], response); \
2664         } \
2665 } while (0)
2666
2667 static bool
2668 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2669                                       struct intel_sdvo_connector *intel_sdvo_connector,
2670                                       struct intel_sdvo_enhancements_reply enhancements)
2671 {
2672         struct drm_device *dev = intel_sdvo->base.base.dev;
2673         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2674         uint16_t response, data_value[2];
2675
2676         /* when horizontal overscan is supported, Add the left/right  property */
2677         if (enhancements.overscan_h) {
2678                 if (!intel_sdvo_get_value(intel_sdvo,
2679                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2680                                           &data_value, 4))
2681                         return false;
2682
2683                 if (!intel_sdvo_get_value(intel_sdvo,
2684                                           SDVO_CMD_GET_OVERSCAN_H,
2685                                           &response, 2))
2686                         return false;
2687
2688                 intel_sdvo_connector->max_hscan = data_value[0];
2689                 intel_sdvo_connector->left_margin = data_value[0] - response;
2690                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2691                 intel_sdvo_connector->left =
2692                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2693                 if (!intel_sdvo_connector->left)
2694                         return false;
2695
2696                 drm_object_attach_property(&connector->base,
2697                                               intel_sdvo_connector->left,
2698                                               intel_sdvo_connector->left_margin);
2699
2700                 intel_sdvo_connector->right =
2701                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2702                 if (!intel_sdvo_connector->right)
2703                         return false;
2704
2705                 drm_object_attach_property(&connector->base,
2706                                               intel_sdvo_connector->right,
2707                                               intel_sdvo_connector->right_margin);
2708                 DRM_DEBUG_KMS("h_overscan: max %d, "
2709                               "default %d, current %d\n",
2710                               data_value[0], data_value[1], response);
2711         }
2712
2713         if (enhancements.overscan_v) {
2714                 if (!intel_sdvo_get_value(intel_sdvo,
2715                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2716                                           &data_value, 4))
2717                         return false;
2718
2719                 if (!intel_sdvo_get_value(intel_sdvo,
2720                                           SDVO_CMD_GET_OVERSCAN_V,
2721                                           &response, 2))
2722                         return false;
2723
2724                 intel_sdvo_connector->max_vscan = data_value[0];
2725                 intel_sdvo_connector->top_margin = data_value[0] - response;
2726                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2727                 intel_sdvo_connector->top =
2728                         drm_property_create_range(dev, 0,
2729                                             "top_margin", 0, data_value[0]);
2730                 if (!intel_sdvo_connector->top)
2731                         return false;
2732
2733                 drm_object_attach_property(&connector->base,
2734                                               intel_sdvo_connector->top,
2735                                               intel_sdvo_connector->top_margin);
2736
2737                 intel_sdvo_connector->bottom =
2738                         drm_property_create_range(dev, 0,
2739                                             "bottom_margin", 0, data_value[0]);
2740                 if (!intel_sdvo_connector->bottom)
2741                         return false;
2742
2743                 drm_object_attach_property(&connector->base,
2744                                               intel_sdvo_connector->bottom,
2745                                               intel_sdvo_connector->bottom_margin);
2746                 DRM_DEBUG_KMS("v_overscan: max %d, "
2747                               "default %d, current %d\n",
2748                               data_value[0], data_value[1], response);
2749         }
2750
2751         ENHANCEMENT(hpos, HPOS);
2752         ENHANCEMENT(vpos, VPOS);
2753         ENHANCEMENT(saturation, SATURATION);
2754         ENHANCEMENT(contrast, CONTRAST);
2755         ENHANCEMENT(hue, HUE);
2756         ENHANCEMENT(sharpness, SHARPNESS);
2757         ENHANCEMENT(brightness, BRIGHTNESS);
2758         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2759         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2760         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2761         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2762         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2763
2764         if (enhancements.dot_crawl) {
2765                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2766                         return false;
2767
2768                 intel_sdvo_connector->max_dot_crawl = 1;
2769                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2770                 intel_sdvo_connector->dot_crawl =
2771                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2772                 if (!intel_sdvo_connector->dot_crawl)
2773                         return false;
2774
2775                 drm_object_attach_property(&connector->base,
2776                                               intel_sdvo_connector->dot_crawl,
2777                                               intel_sdvo_connector->cur_dot_crawl);
2778                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2779         }
2780
2781         return true;
2782 }
2783
2784 static bool
2785 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2786                                         struct intel_sdvo_connector *intel_sdvo_connector,
2787                                         struct intel_sdvo_enhancements_reply enhancements)
2788 {
2789         struct drm_device *dev = intel_sdvo->base.base.dev;
2790         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2791         uint16_t response, data_value[2];
2792
2793         ENHANCEMENT(brightness, BRIGHTNESS);
2794
2795         return true;
2796 }
2797 #undef ENHANCEMENT
2798
2799 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2800                                                struct intel_sdvo_connector *intel_sdvo_connector)
2801 {
2802         union {
2803                 struct intel_sdvo_enhancements_reply reply;
2804                 uint16_t response;
2805         } enhancements;
2806
2807         BUILD_BUG_ON(sizeof(enhancements) != 2);
2808
2809         enhancements.response = 0;
2810         intel_sdvo_get_value(intel_sdvo,
2811                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2812                              &enhancements, sizeof(enhancements));
2813         if (enhancements.response == 0) {
2814                 DRM_DEBUG_KMS("No enhancement is supported\n");
2815                 return true;
2816         }
2817
2818         if (IS_TV(intel_sdvo_connector))
2819                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2820         else if (IS_LVDS(intel_sdvo_connector))
2821                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2822         else
2823                 return true;
2824 }
2825
2826 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2827                                      struct i2c_msg *msgs,
2828                                      int num)
2829 {
2830         struct intel_sdvo *sdvo = adapter->algo_data;
2831
2832         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2833                 return -EIO;
2834
2835         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2836 }
2837
2838 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2839 {
2840         struct intel_sdvo *sdvo = adapter->algo_data;
2841         return sdvo->i2c->algo->functionality(sdvo->i2c);
2842 }
2843
2844 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2845         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2846         .functionality  = intel_sdvo_ddc_proxy_func
2847 };
2848
2849 static bool
2850 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2851                           struct drm_device *dev)
2852 {
2853         sdvo->ddc.owner = THIS_MODULE;
2854         sdvo->ddc.class = I2C_CLASS_DDC;
2855         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2856         sdvo->ddc.dev.parent = &dev->pdev->dev;
2857         sdvo->ddc.algo_data = sdvo;
2858         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2859
2860         return i2c_add_adapter(&sdvo->ddc) == 0;
2861 }
2862
2863 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2864 {
2865         struct drm_i915_private *dev_priv = dev->dev_private;
2866         struct intel_encoder *intel_encoder;
2867         struct intel_sdvo *intel_sdvo;
2868         int i;
2869         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2870         if (!intel_sdvo)
2871                 return false;
2872
2873         intel_sdvo->sdvo_reg = sdvo_reg;
2874         intel_sdvo->is_sdvob = is_sdvob;
2875         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2876         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2877         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2878                 goto err_i2c_bus;
2879
2880         /* encoder type will be decided later */
2881         intel_encoder = &intel_sdvo->base;
2882         intel_encoder->type = INTEL_OUTPUT_SDVO;
2883         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2884
2885         /* Read the regs to test if we can talk to the device */
2886         for (i = 0; i < 0x40; i++) {
2887                 u8 byte;
2888
2889                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2890                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
2891                                       SDVO_NAME(intel_sdvo));
2892                         goto err;
2893                 }
2894         }
2895
2896         intel_encoder->compute_config = intel_sdvo_compute_config;
2897         intel_encoder->disable = intel_disable_sdvo;
2898         intel_encoder->mode_set = intel_sdvo_mode_set;
2899         intel_encoder->enable = intel_enable_sdvo;
2900         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2901         intel_encoder->get_config = intel_sdvo_get_config;
2902
2903         /* In default case sdvo lvds is false */
2904         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2905                 goto err;
2906
2907         if (intel_sdvo_output_setup(intel_sdvo,
2908                                     intel_sdvo->caps.output_flags) != true) {
2909                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2910                               SDVO_NAME(intel_sdvo));
2911                 /* Output_setup can leave behind connectors! */
2912                 goto err_output;
2913         }
2914
2915         /* Only enable the hotplug irq if we need it, to work around noisy
2916          * hotplug lines.
2917          */
2918         if (intel_sdvo->hotplug_active) {
2919                 intel_encoder->hpd_pin =
2920                         intel_sdvo->is_sdvob ?  HPD_SDVO_B : HPD_SDVO_C;
2921         }
2922
2923         /*
2924          * Cloning SDVO with anything is often impossible, since the SDVO
2925          * encoder can request a special input timing mode. And even if that's
2926          * not the case we have evidence that cloning a plain unscaled mode with
2927          * VGA doesn't really work. Furthermore the cloning flags are way too
2928          * simplistic anyway to express such constraints, so just give up on
2929          * cloning for SDVO encoders.
2930          */
2931         intel_sdvo->base.cloneable = false;
2932
2933         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2934
2935         /* Set the input timing to the screen. Assume always input 0. */
2936         if (!intel_sdvo_set_target_input(intel_sdvo))
2937                 goto err_output;
2938
2939         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2940                                                     &intel_sdvo->pixel_clock_min,
2941                                                     &intel_sdvo->pixel_clock_max))
2942                 goto err_output;
2943
2944         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2945                         "clock range %dMHz - %dMHz, "
2946                         "input 1: %c, input 2: %c, "
2947                         "output 1: %c, output 2: %c\n",
2948                         SDVO_NAME(intel_sdvo),
2949                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2950                         intel_sdvo->caps.device_rev_id,
2951                         intel_sdvo->pixel_clock_min / 1000,
2952                         intel_sdvo->pixel_clock_max / 1000,
2953                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2954                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2955                         /* check currently supported outputs */
2956                         intel_sdvo->caps.output_flags &
2957                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2958                         intel_sdvo->caps.output_flags &
2959                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2960         return true;
2961
2962 err_output:
2963         intel_sdvo_output_cleanup(intel_sdvo);
2964
2965 err:
2966         drm_encoder_cleanup(&intel_encoder->base);
2967         i2c_del_adapter(&intel_sdvo->ddc);
2968 err_i2c_bus:
2969         intel_sdvo_unselect_i2c_bus(intel_sdvo);
2970         kfree(intel_sdvo);
2971
2972         return false;
2973 }