drm/i915/sdvo: Propagate i2c error from switching DDC control bus.
[pandora-kernel.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
3  * Copyright © 2006-2007 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice (including the next
14  * paragraph) shall be included in all copies or substantial portions of the
15  * Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23  * DEALINGS IN THE SOFTWARE.
24  *
25  * Authors:
26  *      Eric Anholt <eric@anholt.net>
27  */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46                          SDVO_TV_MASK)
47
48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
51
52
53 static const char *tv_format_names[] = {
54         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
55         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
56         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
57         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
58         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
59         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
60         "SECAM_60"
61 };
62
63 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
65 struct intel_sdvo {
66         struct intel_encoder base;
67
68         u8 slave_addr;
69
70         /* Register for the SDVO device: SDVOB or SDVOC */
71         int sdvo_reg;
72
73         /* Active outputs controlled by this SDVO output */
74         uint16_t controlled_output;
75
76         /*
77          * Capabilities of the SDVO device returned by
78          * i830_sdvo_get_capabilities()
79          */
80         struct intel_sdvo_caps caps;
81
82         /* Pixel clock limitations reported by the SDVO device, in kHz */
83         int pixel_clock_min, pixel_clock_max;
84
85         /*
86         * For multiple function SDVO device,
87         * this is for current attached outputs.
88         */
89         uint16_t attached_output;
90
91         /**
92          * This is set if we're going to treat the device as TV-out.
93          *
94          * While we have these nice friendly flags for output types that ought
95          * to decide this for us, the S-Video output on our HDMI+S-Video card
96          * shows up as RGB1 (VGA).
97          */
98         bool is_tv;
99
100         /* This is for current tv format name */
101         int tv_format_index;
102
103         /**
104          * This is set if we treat the device as HDMI, instead of DVI.
105          */
106         bool is_hdmi;
107
108         /**
109          * This is set if we detect output of sdvo device as LVDS and
110          * have a valid fixed mode to use with the panel.
111          */
112         bool is_lvds;
113
114         /**
115          * This is sdvo fixed pannel mode pointer
116          */
117         struct drm_display_mode *sdvo_lvds_fixed_mode;
118
119         /*
120          * supported encoding mode, used to determine whether HDMI is
121          * supported
122          */
123         struct intel_sdvo_encode encode;
124
125         /* DDC bus used by this SDVO encoder */
126         uint8_t ddc_bus;
127
128         /* Mac mini hack -- use the same DDC as the analog connector */
129         struct i2c_adapter *analog_ddc_bus;
130
131         /* Input timings for adjusted_mode */
132         struct intel_sdvo_dtd input_dtd;
133 };
134
135 struct intel_sdvo_connector {
136         struct intel_connector base;
137
138         /* Mark the type of connector */
139         uint16_t output_flag;
140
141         /* This contains all current supported TV format */
142         u8 tv_format_supported[TV_FORMAT_NUM];
143         int   format_supported_num;
144         struct drm_property *tv_format;
145
146         /* add the property for the SDVO-TV */
147         struct drm_property *left;
148         struct drm_property *right;
149         struct drm_property *top;
150         struct drm_property *bottom;
151         struct drm_property *hpos;
152         struct drm_property *vpos;
153         struct drm_property *contrast;
154         struct drm_property *saturation;
155         struct drm_property *hue;
156         struct drm_property *sharpness;
157         struct drm_property *flicker_filter;
158         struct drm_property *flicker_filter_adaptive;
159         struct drm_property *flicker_filter_2d;
160         struct drm_property *tv_chroma_filter;
161         struct drm_property *tv_luma_filter;
162         struct drm_property *dot_crawl;
163
164         /* add the property for the SDVO-TV/LVDS */
165         struct drm_property *brightness;
166
167         /* Add variable to record current setting for the above property */
168         u32     left_margin, right_margin, top_margin, bottom_margin;
169
170         /* this is to get the range of margin.*/
171         u32     max_hscan,  max_vscan;
172         u32     max_hpos, cur_hpos;
173         u32     max_vpos, cur_vpos;
174         u32     cur_brightness, max_brightness;
175         u32     cur_contrast,   max_contrast;
176         u32     cur_saturation, max_saturation;
177         u32     cur_hue,        max_hue;
178         u32     cur_sharpness,  max_sharpness;
179         u32     cur_flicker_filter,             max_flicker_filter;
180         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
181         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
182         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
183         u32     cur_tv_luma_filter,     max_tv_luma_filter;
184         u32     cur_dot_crawl,  max_dot_crawl;
185 };
186
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
188 {
189         return container_of(encoder, struct intel_sdvo, base.base);
190 }
191
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
193 {
194         return container_of(intel_attached_encoder(connector),
195                             struct intel_sdvo, base);
196 }
197
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
199 {
200         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
201 }
202
203 static bool
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
205 static bool
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207                               struct intel_sdvo_connector *intel_sdvo_connector,
208                               int type);
209 static bool
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211                                    struct intel_sdvo_connector *intel_sdvo_connector);
212
213 /**
214  * Writes the SDVOB or SDVOC with the given value, but always writes both
215  * SDVOB and SDVOC to work around apparent hardware issues (according to
216  * comments in the BIOS).
217  */
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
219 {
220         struct drm_device *dev = intel_sdvo->base.base.dev;
221         struct drm_i915_private *dev_priv = dev->dev_private;
222         u32 bval = val, cval = val;
223         int i;
224
225         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226                 I915_WRITE(intel_sdvo->sdvo_reg, val);
227                 I915_READ(intel_sdvo->sdvo_reg);
228                 return;
229         }
230
231         if (intel_sdvo->sdvo_reg == SDVOB) {
232                 cval = I915_READ(SDVOC);
233         } else {
234                 bval = I915_READ(SDVOB);
235         }
236         /*
237          * Write the registers twice for luck. Sometimes,
238          * writing them only once doesn't appear to 'stick'.
239          * The BIOS does this too. Yay, magic
240          */
241         for (i = 0; i < 2; i++)
242         {
243                 I915_WRITE(SDVOB, bval);
244                 I915_READ(SDVOB);
245                 I915_WRITE(SDVOC, cval);
246                 I915_READ(SDVOC);
247         }
248 }
249
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
251 {
252         u8 out_buf[2] = { addr, 0 };
253         u8 buf[2];
254         struct i2c_msg msgs[] = {
255                 {
256                         .addr = intel_sdvo->slave_addr >> 1,
257                         .flags = 0,
258                         .len = 1,
259                         .buf = out_buf,
260                 },
261                 {
262                         .addr = intel_sdvo->slave_addr >> 1,
263                         .flags = I2C_M_RD,
264                         .len = 1,
265                         .buf = buf,
266                 }
267         };
268         int ret;
269
270         if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2)
271         {
272                 *ch = buf[0];
273                 return true;
274         }
275
276         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
277         return false;
278 }
279
280 static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch)
281 {
282         u8 out_buf[2] = { addr, ch };
283         struct i2c_msg msgs[] = {
284                 {
285                         .addr = intel_sdvo->slave_addr >> 1,
286                         .flags = 0,
287                         .len = 2,
288                         .buf = out_buf,
289                 }
290         };
291
292         return i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1;
293 }
294
295 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
296 /** Mapping of command numbers to names, for debug output */
297 static const struct _sdvo_cmd_name {
298         u8 cmd;
299         const char *name;
300 } sdvo_cmd_names[] = {
301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
324     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
325     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
344
345     /* Add the op code for SDVO enhancements */
346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
370     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
371     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
390
391     /* HDMI op code */
392     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
393     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
394     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
395     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
396     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
397     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
398     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
399     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
400     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
401     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
402     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
403     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
404     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
405     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
406     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
407     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
408     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
409     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
410     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
411     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
412 };
413
414 #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
415 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
416
417 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
418                                    const void *args, int args_len)
419 {
420         int i;
421
422         DRM_DEBUG_KMS("%s: W: %02X ",
423                                 SDVO_NAME(intel_sdvo), cmd);
424         for (i = 0; i < args_len; i++)
425                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
426         for (; i < 8; i++)
427                 DRM_LOG_KMS("   ");
428         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
429                 if (cmd == sdvo_cmd_names[i].cmd) {
430                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
431                         break;
432                 }
433         }
434         if (i == ARRAY_SIZE(sdvo_cmd_names))
435                 DRM_LOG_KMS("(%02X)", cmd);
436         DRM_LOG_KMS("\n");
437 }
438
439 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440                                  const void *args, int args_len)
441 {
442         int i;
443
444         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
445
446         for (i = 0; i < args_len; i++) {
447                 if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
448                                            ((u8*)args)[i]))
449                         return false;
450         }
451
452         return intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
453 }
454
455 static const char *cmd_status_names[] = {
456         "Power on",
457         "Success",
458         "Not supported",
459         "Invalid arg",
460         "Pending",
461         "Target not specified",
462         "Scaling not supported"
463 };
464
465 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
466                                      void *response, int response_len)
467 {
468         u8 retry = 5;
469         u8 status;
470         int i;
471
472         /*
473          * The documentation states that all commands will be
474          * processed within 15µs, and that we need only poll
475          * the status byte a maximum of 3 times in order for the
476          * command to be complete.
477          *
478          * Check 5 times in case the hardware failed to read the docs.
479          */
480         do {
481                 if (!intel_sdvo_read_byte(intel_sdvo,
482                                           SDVO_I2C_CMD_STATUS,
483                                           &status))
484                         return false;
485         } while (status == SDVO_CMD_STATUS_PENDING && --retry);
486
487         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
488         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
489                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
490         else
491                 DRM_LOG_KMS("(??? %d)", status);
492
493         if (status != SDVO_CMD_STATUS_SUCCESS)
494                 goto log_fail;
495
496         /* Read the command response */
497         for (i = 0; i < response_len; i++) {
498                 if (!intel_sdvo_read_byte(intel_sdvo,
499                                           SDVO_I2C_RETURN_0 + i,
500                                           &((u8 *)response)[i]))
501                         goto log_fail;
502                 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
503         }
504
505         for (; i < 8; i++)
506                 DRM_LOG_KMS("   ");
507         DRM_LOG_KMS("\n");
508
509         return true;
510
511 log_fail:
512         DRM_LOG_KMS("\n");
513         return false;
514 }
515
516 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
517 {
518         if (mode->clock >= 100000)
519                 return 1;
520         else if (mode->clock >= 50000)
521                 return 2;
522         else
523                 return 4;
524 }
525
526 /**
527  * Try to read the response after issuie the DDC switch command. But it
528  * is noted that we must do the action of reading response and issuing DDC
529  * switch command in one I2C transaction. Otherwise when we try to start
530  * another I2C transaction after issuing the DDC bus switch, it will be
531  * switched to the internal SDVO register.
532  */
533 static int intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
534                                              u8 target)
535 {
536         u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
537         struct i2c_msg msgs[] = {
538                 {
539                         .addr = intel_sdvo->slave_addr >> 1,
540                         .flags = 0,
541                         .len = 2,
542                         .buf = out_buf,
543                 },
544                 /* the following two are to read the response */
545                 {
546                         .addr = intel_sdvo->slave_addr >> 1,
547                         .flags = 0,
548                         .len = 1,
549                         .buf = cmd_buf,
550                 },
551                 {
552                         .addr = intel_sdvo->slave_addr >> 1,
553                         .flags = I2C_M_RD,
554                         .len = 1,
555                         .buf = ret_value,
556                 },
557         };
558
559         intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
560                                &target, 1);
561         /* write the DDC switch command argument */
562         if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target))
563                 return -EIO;
564
565         out_buf[0] = SDVO_I2C_OPCODE;
566         out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
567         cmd_buf[0] = SDVO_I2C_CMD_STATUS;
568         cmd_buf[1] = 0;
569         ret_value[0] = 0;
570         ret_value[1] = 0;
571
572         ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3);
573         if (ret < 0)
574                 return ret;
575         if (ret != 3) {
576                 /* failure in I2C transfer */
577                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
578                 return -EIO;
579         }
580         if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
581                 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
582                               ret_value[0]);
583                 return -EIO;
584         }
585
586         return 0;
587 }
588
589 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
590 {
591         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
592                 return false;
593
594         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
595 }
596
597 static bool
598 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
599 {
600         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
601                 return false;
602
603         return intel_sdvo_read_response(intel_sdvo, value, len);
604 }
605
606 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
607 {
608         struct intel_sdvo_set_target_input_args targets = {0};
609         return intel_sdvo_set_value(intel_sdvo,
610                                     SDVO_CMD_SET_TARGET_INPUT,
611                                     &targets, sizeof(targets));
612 }
613
614 /**
615  * Return whether each input is trained.
616  *
617  * This function is making an assumption about the layout of the response,
618  * which should be checked against the docs.
619  */
620 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
621 {
622         struct intel_sdvo_get_trained_inputs_response response;
623
624         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
625                                   &response, sizeof(response)))
626                 return false;
627
628         *input_1 = response.input0_trained;
629         *input_2 = response.input1_trained;
630         return true;
631 }
632
633 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
634                                           u16 outputs)
635 {
636         return intel_sdvo_set_value(intel_sdvo,
637                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
638                                     &outputs, sizeof(outputs));
639 }
640
641 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
642                                                int mode)
643 {
644         u8 state = SDVO_ENCODER_STATE_ON;
645
646         switch (mode) {
647         case DRM_MODE_DPMS_ON:
648                 state = SDVO_ENCODER_STATE_ON;
649                 break;
650         case DRM_MODE_DPMS_STANDBY:
651                 state = SDVO_ENCODER_STATE_STANDBY;
652                 break;
653         case DRM_MODE_DPMS_SUSPEND:
654                 state = SDVO_ENCODER_STATE_SUSPEND;
655                 break;
656         case DRM_MODE_DPMS_OFF:
657                 state = SDVO_ENCODER_STATE_OFF;
658                 break;
659         }
660
661         return intel_sdvo_set_value(intel_sdvo,
662                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
663 }
664
665 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
666                                                    int *clock_min,
667                                                    int *clock_max)
668 {
669         struct intel_sdvo_pixel_clock_range clocks;
670
671         if (!intel_sdvo_get_value(intel_sdvo,
672                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
673                                   &clocks, sizeof(clocks)))
674                 return false;
675
676         /* Convert the values from units of 10 kHz to kHz. */
677         *clock_min = clocks.min * 10;
678         *clock_max = clocks.max * 10;
679         return true;
680 }
681
682 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
683                                          u16 outputs)
684 {
685         return intel_sdvo_set_value(intel_sdvo,
686                                     SDVO_CMD_SET_TARGET_OUTPUT,
687                                     &outputs, sizeof(outputs));
688 }
689
690 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
691                                   struct intel_sdvo_dtd *dtd)
692 {
693         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
694                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
695 }
696
697 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
698                                          struct intel_sdvo_dtd *dtd)
699 {
700         return intel_sdvo_set_timing(intel_sdvo,
701                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
702 }
703
704 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
705                                          struct intel_sdvo_dtd *dtd)
706 {
707         return intel_sdvo_set_timing(intel_sdvo,
708                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
709 }
710
711 static bool
712 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
713                                          uint16_t clock,
714                                          uint16_t width,
715                                          uint16_t height)
716 {
717         struct intel_sdvo_preferred_input_timing_args args;
718
719         memset(&args, 0, sizeof(args));
720         args.clock = clock;
721         args.width = width;
722         args.height = height;
723         args.interlace = 0;
724
725         if (intel_sdvo->is_lvds &&
726            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
727             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
728                 args.scaled = 1;
729
730         return intel_sdvo_set_value(intel_sdvo,
731                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
732                                     &args, sizeof(args));
733 }
734
735 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
736                                                   struct intel_sdvo_dtd *dtd)
737 {
738         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
739                                     &dtd->part1, sizeof(dtd->part1)) &&
740                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
741                                      &dtd->part2, sizeof(dtd->part2));
742 }
743
744 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
745 {
746         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
747 }
748
749 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
750                                          const struct drm_display_mode *mode)
751 {
752         uint16_t width, height;
753         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
754         uint16_t h_sync_offset, v_sync_offset;
755
756         width = mode->crtc_hdisplay;
757         height = mode->crtc_vdisplay;
758
759         /* do some mode translations */
760         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
761         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
762
763         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
764         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
765
766         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
767         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
768
769         dtd->part1.clock = mode->clock / 10;
770         dtd->part1.h_active = width & 0xff;
771         dtd->part1.h_blank = h_blank_len & 0xff;
772         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
773                 ((h_blank_len >> 8) & 0xf);
774         dtd->part1.v_active = height & 0xff;
775         dtd->part1.v_blank = v_blank_len & 0xff;
776         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
777                 ((v_blank_len >> 8) & 0xf);
778
779         dtd->part2.h_sync_off = h_sync_offset & 0xff;
780         dtd->part2.h_sync_width = h_sync_len & 0xff;
781         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
782                 (v_sync_len & 0xf);
783         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
784                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
785                 ((v_sync_len & 0x30) >> 4);
786
787         dtd->part2.dtd_flags = 0x18;
788         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
789                 dtd->part2.dtd_flags |= 0x2;
790         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
791                 dtd->part2.dtd_flags |= 0x4;
792
793         dtd->part2.sdvo_flags = 0;
794         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
795         dtd->part2.reserved = 0;
796 }
797
798 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
799                                          const struct intel_sdvo_dtd *dtd)
800 {
801         mode->hdisplay = dtd->part1.h_active;
802         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
803         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
804         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
805         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
806         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
807         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
808         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
809
810         mode->vdisplay = dtd->part1.v_active;
811         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
812         mode->vsync_start = mode->vdisplay;
813         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
814         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
815         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
816         mode->vsync_end = mode->vsync_start +
817                 (dtd->part2.v_sync_off_width & 0xf);
818         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
819         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
820         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
821
822         mode->clock = dtd->part1.clock * 10;
823
824         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
825         if (dtd->part2.dtd_flags & 0x2)
826                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
827         if (dtd->part2.dtd_flags & 0x4)
828                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
829 }
830
831 static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
832                                        struct intel_sdvo_encode *encode)
833 {
834         if (intel_sdvo_get_value(intel_sdvo,
835                                   SDVO_CMD_GET_SUPP_ENCODE,
836                                   encode, sizeof(*encode)))
837                 return true;
838
839         /* non-support means DVI */
840         memset(encode, 0, sizeof(*encode));
841         return false;
842 }
843
844 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
845                                   uint8_t mode)
846 {
847         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
848 }
849
850 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
851                                        uint8_t mode)
852 {
853         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
854 }
855
856 #if 0
857 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
858 {
859         int i, j;
860         uint8_t set_buf_index[2];
861         uint8_t av_split;
862         uint8_t buf_size;
863         uint8_t buf[48];
864         uint8_t *pos;
865
866         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
867
868         for (i = 0; i <= av_split; i++) {
869                 set_buf_index[0] = i; set_buf_index[1] = 0;
870                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
871                                      set_buf_index, 2);
872                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
873                 intel_sdvo_read_response(encoder, &buf_size, 1);
874
875                 pos = buf;
876                 for (j = 0; j <= buf_size; j += 8) {
877                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
878                                              NULL, 0);
879                         intel_sdvo_read_response(encoder, pos, 8);
880                         pos += 8;
881                 }
882         }
883 }
884 #endif
885
886 static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
887                                     int index,
888                                     uint8_t *data, int8_t size, uint8_t tx_rate)
889 {
890     uint8_t set_buf_index[2];
891
892     set_buf_index[0] = index;
893     set_buf_index[1] = 0;
894
895     if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
896                               set_buf_index, 2))
897             return false;
898
899     for (; size > 0; size -= 8) {
900         if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
901                 return false;
902
903         data += 8;
904     }
905
906     return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
907 }
908
909 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
910 {
911         uint8_t csum = 0;
912         int i;
913
914         for (i = 0; i < size; i++)
915                 csum += data[i];
916
917         return 0x100 - csum;
918 }
919
920 #define DIP_TYPE_AVI    0x82
921 #define DIP_VERSION_AVI 0x2
922 #define DIP_LEN_AVI     13
923
924 struct dip_infoframe {
925         uint8_t type;
926         uint8_t version;
927         uint8_t len;
928         uint8_t checksum;
929         union {
930                 struct {
931                         /* Packet Byte #1 */
932                         uint8_t S:2;
933                         uint8_t B:2;
934                         uint8_t A:1;
935                         uint8_t Y:2;
936                         uint8_t rsvd1:1;
937                         /* Packet Byte #2 */
938                         uint8_t R:4;
939                         uint8_t M:2;
940                         uint8_t C:2;
941                         /* Packet Byte #3 */
942                         uint8_t SC:2;
943                         uint8_t Q:2;
944                         uint8_t EC:3;
945                         uint8_t ITC:1;
946                         /* Packet Byte #4 */
947                         uint8_t VIC:7;
948                         uint8_t rsvd2:1;
949                         /* Packet Byte #5 */
950                         uint8_t PR:4;
951                         uint8_t rsvd3:4;
952                         /* Packet Byte #6~13 */
953                         uint16_t top_bar_end;
954                         uint16_t bottom_bar_start;
955                         uint16_t left_bar_end;
956                         uint16_t right_bar_start;
957                 } avi;
958                 struct {
959                         /* Packet Byte #1 */
960                         uint8_t channel_count:3;
961                         uint8_t rsvd1:1;
962                         uint8_t coding_type:4;
963                         /* Packet Byte #2 */
964                         uint8_t sample_size:2; /* SS0, SS1 */
965                         uint8_t sample_frequency:3;
966                         uint8_t rsvd2:3;
967                         /* Packet Byte #3 */
968                         uint8_t coding_type_private:5;
969                         uint8_t rsvd3:3;
970                         /* Packet Byte #4 */
971                         uint8_t channel_allocation;
972                         /* Packet Byte #5 */
973                         uint8_t rsvd4:3;
974                         uint8_t level_shift:4;
975                         uint8_t downmix_inhibit:1;
976                 } audio;
977                 uint8_t payload[28];
978         } __attribute__ ((packed)) u;
979 } __attribute__((packed));
980
981 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
982                                          struct drm_display_mode * mode)
983 {
984         struct dip_infoframe avi_if = {
985                 .type = DIP_TYPE_AVI,
986                 .version = DIP_VERSION_AVI,
987                 .len = DIP_LEN_AVI,
988         };
989
990         avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
991                                                     4 + avi_if.len);
992         return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
993                                        4 + avi_if.len,
994                                        SDVO_HBUF_TX_VSYNC);
995 }
996
997 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
998 {
999         struct intel_sdvo_tv_format format;
1000         uint32_t format_map;
1001
1002         format_map = 1 << intel_sdvo->tv_format_index;
1003         memset(&format, 0, sizeof(format));
1004         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1005
1006         BUILD_BUG_ON(sizeof(format) != 6);
1007         return intel_sdvo_set_value(intel_sdvo,
1008                                     SDVO_CMD_SET_TV_FORMAT,
1009                                     &format, sizeof(format));
1010 }
1011
1012 static bool
1013 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1014                                         struct drm_display_mode *mode)
1015 {
1016         struct intel_sdvo_dtd output_dtd;
1017
1018         if (!intel_sdvo_set_target_output(intel_sdvo,
1019                                           intel_sdvo->attached_output))
1020                 return false;
1021
1022         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1023         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1024                 return false;
1025
1026         return true;
1027 }
1028
1029 static bool
1030 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
1031                                         struct drm_display_mode *mode,
1032                                         struct drm_display_mode *adjusted_mode)
1033 {
1034         /* Reset the input timing to the screen. Assume always input 0. */
1035         if (!intel_sdvo_set_target_input(intel_sdvo))
1036                 return false;
1037
1038         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1039                                                       mode->clock / 10,
1040                                                       mode->hdisplay,
1041                                                       mode->vdisplay))
1042                 return false;
1043
1044         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1045                                                    &intel_sdvo->input_dtd))
1046                 return false;
1047
1048         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
1049
1050         drm_mode_set_crtcinfo(adjusted_mode, 0);
1051         return true;
1052 }
1053
1054 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1055                                   struct drm_display_mode *mode,
1056                                   struct drm_display_mode *adjusted_mode)
1057 {
1058         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1059         int multiplier;
1060
1061         /* We need to construct preferred input timings based on our
1062          * output timings.  To do that, we have to set the output
1063          * timings, even though this isn't really the right place in
1064          * the sequence to do it. Oh well.
1065          */
1066         if (intel_sdvo->is_tv) {
1067                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1068                         return false;
1069
1070                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1071                                                              mode,
1072                                                              adjusted_mode);
1073         } else if (intel_sdvo->is_lvds) {
1074                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1075                                                              intel_sdvo->sdvo_lvds_fixed_mode))
1076                         return false;
1077
1078                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1079                                                              mode,
1080                                                              adjusted_mode);
1081         }
1082
1083         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
1084          * SDVO device will factor out the multiplier during mode_set.
1085          */
1086         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1087         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1088
1089         return true;
1090 }
1091
1092 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1093                                 struct drm_display_mode *mode,
1094                                 struct drm_display_mode *adjusted_mode)
1095 {
1096         struct drm_device *dev = encoder->dev;
1097         struct drm_i915_private *dev_priv = dev->dev_private;
1098         struct drm_crtc *crtc = encoder->crtc;
1099         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1100         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1101         u32 sdvox;
1102         struct intel_sdvo_in_out_map in_out;
1103         struct intel_sdvo_dtd input_dtd;
1104         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1105         int rate;
1106
1107         if (!mode)
1108                 return;
1109
1110         /* First, set the input mapping for the first input to our controlled
1111          * output. This is only correct if we're a single-input device, in
1112          * which case the first input is the output from the appropriate SDVO
1113          * channel on the motherboard.  In a two-input device, the first input
1114          * will be SDVOB and the second SDVOC.
1115          */
1116         in_out.in0 = intel_sdvo->attached_output;
1117         in_out.in1 = 0;
1118
1119         intel_sdvo_set_value(intel_sdvo,
1120                              SDVO_CMD_SET_IN_OUT_MAP,
1121                              &in_out, sizeof(in_out));
1122
1123         /* Set the output timings to the screen */
1124         if (!intel_sdvo_set_target_output(intel_sdvo,
1125                                           intel_sdvo->attached_output))
1126                 return;
1127
1128         /* We have tried to get input timing in mode_fixup, and filled into
1129          * adjusted_mode.
1130          */
1131         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1132                 input_dtd = intel_sdvo->input_dtd;
1133         } else {
1134                 /* Set the output timing to the screen */
1135                 if (!intel_sdvo_set_target_output(intel_sdvo,
1136                                                   intel_sdvo->attached_output))
1137                         return;
1138
1139                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1140                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1141         }
1142
1143         /* Set the input timing to the screen. Assume always input 0. */
1144         if (!intel_sdvo_set_target_input(intel_sdvo))
1145                 return;
1146
1147         if (intel_sdvo->is_hdmi &&
1148             !intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1149                 return;
1150
1151         if (intel_sdvo->is_tv &&
1152             !intel_sdvo_set_tv_format(intel_sdvo))
1153                 return;
1154
1155         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1156
1157         switch (pixel_multiplier) {
1158         default:
1159         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1160         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1161         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1162         }
1163         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1164                 return;
1165
1166         /* Set the SDVO control regs. */
1167         if (IS_I965G(dev)) {
1168                 sdvox = SDVO_BORDER_ENABLE;
1169                 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1170                         sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1171                 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1172                         sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1173         } else {
1174                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1175                 switch (intel_sdvo->sdvo_reg) {
1176                 case SDVOB:
1177                         sdvox &= SDVOB_PRESERVE_MASK;
1178                         break;
1179                 case SDVOC:
1180                         sdvox &= SDVOC_PRESERVE_MASK;
1181                         break;
1182                 }
1183                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1184         }
1185         if (intel_crtc->pipe == 1)
1186                 sdvox |= SDVO_PIPE_B_SELECT;
1187         if (intel_sdvo->is_hdmi)
1188                 sdvox |= SDVO_AUDIO_ENABLE;
1189
1190         if (IS_I965G(dev)) {
1191                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1192         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1193                 /* done in crtc_mode_set as it lives inside the dpll register */
1194         } else {
1195                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1196         }
1197
1198         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1199                 sdvox |= SDVO_STALL_SELECT;
1200         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1201 }
1202
1203 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1204 {
1205         struct drm_device *dev = encoder->dev;
1206         struct drm_i915_private *dev_priv = dev->dev_private;
1207         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1208         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1209         u32 temp;
1210
1211         if (mode != DRM_MODE_DPMS_ON) {
1212                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1213                 if (0)
1214                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1215
1216                 if (mode == DRM_MODE_DPMS_OFF) {
1217                         temp = I915_READ(intel_sdvo->sdvo_reg);
1218                         if ((temp & SDVO_ENABLE) != 0) {
1219                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1220                         }
1221                 }
1222         } else {
1223                 bool input1, input2;
1224                 int i;
1225                 u8 status;
1226
1227                 temp = I915_READ(intel_sdvo->sdvo_reg);
1228                 if ((temp & SDVO_ENABLE) == 0)
1229                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1230                 for (i = 0; i < 2; i++)
1231                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1232
1233                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1234                 /* Warn if the device reported failure to sync.
1235                  * A lot of SDVO devices fail to notify of sync, but it's
1236                  * a given it the status is a success, we succeeded.
1237                  */
1238                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1239                         DRM_DEBUG_KMS("First %s output reported failure to "
1240                                         "sync\n", SDVO_NAME(intel_sdvo));
1241                 }
1242
1243                 if (0)
1244                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1245                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1246         }
1247         return;
1248 }
1249
1250 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1251                                  struct drm_display_mode *mode)
1252 {
1253         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1254
1255         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1256                 return MODE_NO_DBLESCAN;
1257
1258         if (intel_sdvo->pixel_clock_min > mode->clock)
1259                 return MODE_CLOCK_LOW;
1260
1261         if (intel_sdvo->pixel_clock_max < mode->clock)
1262                 return MODE_CLOCK_HIGH;
1263
1264         if (intel_sdvo->is_lvds) {
1265                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1266                         return MODE_PANEL;
1267
1268                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1269                         return MODE_PANEL;
1270         }
1271
1272         return MODE_OK;
1273 }
1274
1275 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1276 {
1277         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, caps, sizeof(*caps));
1278 }
1279
1280 /* No use! */
1281 #if 0
1282 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1283 {
1284         struct drm_connector *connector = NULL;
1285         struct intel_sdvo *iout = NULL;
1286         struct intel_sdvo *sdvo;
1287
1288         /* find the sdvo connector */
1289         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1290                 iout = to_intel_sdvo(connector);
1291
1292                 if (iout->type != INTEL_OUTPUT_SDVO)
1293                         continue;
1294
1295                 sdvo = iout->dev_priv;
1296
1297                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1298                         return connector;
1299
1300                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1301                         return connector;
1302
1303         }
1304
1305         return NULL;
1306 }
1307
1308 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1309 {
1310         u8 response[2];
1311         u8 status;
1312         struct intel_sdvo *intel_sdvo;
1313         DRM_DEBUG_KMS("\n");
1314
1315         if (!connector)
1316                 return 0;
1317
1318         intel_sdvo = to_intel_sdvo(connector);
1319
1320         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1321                                     &response, 2) && response[0];
1322 }
1323
1324 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1325 {
1326         u8 response[2];
1327         u8 status;
1328         struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1329
1330         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1331         intel_sdvo_read_response(intel_sdvo, &response, 2);
1332
1333         if (on) {
1334                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1335                 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1336
1337                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1338         } else {
1339                 response[0] = 0;
1340                 response[1] = 0;
1341                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1342         }
1343
1344         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1345         intel_sdvo_read_response(intel_sdvo, &response, 2);
1346 }
1347 #endif
1348
1349 static bool
1350 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1351 {
1352         int caps = 0;
1353
1354         if (intel_sdvo->caps.output_flags &
1355                 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1356                 caps++;
1357         if (intel_sdvo->caps.output_flags &
1358                 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1359                 caps++;
1360         if (intel_sdvo->caps.output_flags &
1361                 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1362                 caps++;
1363         if (intel_sdvo->caps.output_flags &
1364                 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1365                 caps++;
1366         if (intel_sdvo->caps.output_flags &
1367                 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1368                 caps++;
1369
1370         if (intel_sdvo->caps.output_flags &
1371                 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1372                 caps++;
1373
1374         if (intel_sdvo->caps.output_flags &
1375                 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1376                 caps++;
1377
1378         return (caps > 1);
1379 }
1380
1381 static struct drm_connector *
1382 intel_find_analog_connector(struct drm_device *dev)
1383 {
1384         struct drm_connector *connector;
1385         struct intel_sdvo *encoder;
1386
1387         list_for_each_entry(encoder,
1388                             &dev->mode_config.encoder_list,
1389                             base.base.head) {
1390                 if (encoder->base.type == INTEL_OUTPUT_ANALOG) {
1391                         list_for_each_entry(connector,
1392                                             &dev->mode_config.connector_list,
1393                                             head) {
1394                                 if (&encoder->base ==
1395                                     intel_attached_encoder(connector))
1396                                         return connector;
1397                         }
1398                 }
1399         }
1400
1401         return NULL;
1402 }
1403
1404 static int
1405 intel_analog_is_connected(struct drm_device *dev)
1406 {
1407         struct drm_connector *analog_connector;
1408
1409         analog_connector = intel_find_analog_connector(dev);
1410         if (!analog_connector)
1411                 return false;
1412
1413         if (analog_connector->funcs->detect(analog_connector) ==
1414                         connector_status_disconnected)
1415                 return false;
1416
1417         return true;
1418 }
1419
1420 enum drm_connector_status
1421 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1422 {
1423         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1424         enum drm_connector_status status;
1425         struct edid *edid;
1426
1427         edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
1428
1429         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1430                 u8 saved_ddc = intel_sdvo->ddc_bus, ddc;
1431
1432                 /*
1433                  * Don't use the 1 as the argument of DDC bus switch to get
1434                  * the EDID. It is used for SDVO SPD ROM.
1435                  */
1436                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1437                         intel_sdvo->ddc_bus = ddc;
1438                         edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
1439                         if (edid)
1440                                 break;
1441                 }
1442
1443                 /*
1444                  * If we found the EDID on the other bus, maybe that is the
1445                  * correct DDC bus.
1446                  */
1447                 if (edid == NULL)
1448                         intel_sdvo->ddc_bus = saved_ddc;
1449         }
1450
1451         /*
1452          * When there is no edid and no monitor is connected with VGA
1453          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1454          */
1455         if (edid == NULL &&
1456             intel_sdvo->analog_ddc_bus &&
1457             !intel_analog_is_connected(connector->dev))
1458                 edid = drm_get_edid(connector, intel_sdvo->analog_ddc_bus);
1459
1460         status = connector_status_disconnected;
1461         if (edid != NULL) {
1462                 /* DDC bus is shared, match EDID to connector type */
1463                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1464                         status = connector_status_connected;
1465                         intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
1466                 }
1467                 connector->display_info.raw_edid = NULL;
1468                 kfree(edid);
1469         }
1470         
1471         return status;
1472 }
1473
1474 static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1475 {
1476         uint16_t response;
1477         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1478         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1479         enum drm_connector_status ret;
1480
1481         if (!intel_sdvo_write_cmd(intel_sdvo,
1482                              SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1483                 return connector_status_unknown;
1484         if (intel_sdvo->is_tv) {
1485                 /* add 30ms delay when the output type is SDVO-TV */
1486                 mdelay(30);
1487         }
1488         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1489                 return connector_status_unknown;
1490
1491         DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
1492
1493         if (response == 0)
1494                 return connector_status_disconnected;
1495
1496         intel_sdvo->attached_output = response;
1497
1498         if ((intel_sdvo_connector->output_flag & response) == 0)
1499                 ret = connector_status_disconnected;
1500         else if (response & SDVO_TMDS_MASK)
1501                 ret = intel_sdvo_hdmi_sink_detect(connector);
1502         else
1503                 ret = connector_status_connected;
1504
1505         /* May update encoder flag for like clock for SDVO TV, etc.*/
1506         if (ret == connector_status_connected) {
1507                 intel_sdvo->is_tv = false;
1508                 intel_sdvo->is_lvds = false;
1509                 intel_sdvo->base.needs_tv_clock = false;
1510
1511                 if (response & SDVO_TV_MASK) {
1512                         intel_sdvo->is_tv = true;
1513                         intel_sdvo->base.needs_tv_clock = true;
1514                 }
1515                 if (response & SDVO_LVDS_MASK)
1516                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1517         }
1518
1519         return ret;
1520 }
1521
1522 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1523 {
1524         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1525         int num_modes;
1526
1527         /* set the bus switch and get the modes */
1528         num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
1529
1530         /*
1531          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1532          * link between analog and digital outputs. So, if the regular SDVO
1533          * DDC fails, check to see if the analog output is disconnected, in
1534          * which case we'll look there for the digital DDC data.
1535          */
1536         if (num_modes == 0 &&
1537             intel_sdvo->analog_ddc_bus &&
1538             !intel_analog_is_connected(connector->dev)) {
1539                 /* Switch to the analog ddc bus and try that
1540                  */
1541                 (void) intel_ddc_get_modes(connector, intel_sdvo->analog_ddc_bus);
1542         }
1543 }
1544
1545 /*
1546  * Set of SDVO TV modes.
1547  * Note!  This is in reply order (see loop in get_tv_modes).
1548  * XXX: all 60Hz refresh?
1549  */
1550 struct drm_display_mode sdvo_tv_modes[] = {
1551         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1552                    416, 0, 200, 201, 232, 233, 0,
1553                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1554         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1555                    416, 0, 240, 241, 272, 273, 0,
1556                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1557         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1558                    496, 0, 300, 301, 332, 333, 0,
1559                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1560         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1561                    736, 0, 350, 351, 382, 383, 0,
1562                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1563         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1564                    736, 0, 400, 401, 432, 433, 0,
1565                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1566         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1567                    736, 0, 480, 481, 512, 513, 0,
1568                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1569         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1570                    800, 0, 480, 481, 512, 513, 0,
1571                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1572         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1573                    800, 0, 576, 577, 608, 609, 0,
1574                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1575         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1576                    816, 0, 350, 351, 382, 383, 0,
1577                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1578         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1579                    816, 0, 400, 401, 432, 433, 0,
1580                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1581         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1582                    816, 0, 480, 481, 512, 513, 0,
1583                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1584         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1585                    816, 0, 540, 541, 572, 573, 0,
1586                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1587         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1588                    816, 0, 576, 577, 608, 609, 0,
1589                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1590         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1591                    864, 0, 576, 577, 608, 609, 0,
1592                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1593         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1594                    896, 0, 600, 601, 632, 633, 0,
1595                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1596         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1597                    928, 0, 624, 625, 656, 657, 0,
1598                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1599         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1600                    1016, 0, 766, 767, 798, 799, 0,
1601                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1602         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1603                    1120, 0, 768, 769, 800, 801, 0,
1604                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1605         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1606                    1376, 0, 1024, 1025, 1056, 1057, 0,
1607                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1608 };
1609
1610 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1611 {
1612         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1613         struct intel_sdvo_sdtv_resolution_request tv_res;
1614         uint32_t reply = 0, format_map = 0;
1615         int i;
1616
1617         /* Read the list of supported input resolutions for the selected TV
1618          * format.
1619          */
1620         format_map = 1 << intel_sdvo->tv_format_index;
1621         memcpy(&tv_res, &format_map,
1622                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1623
1624         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1625                 return;
1626
1627         BUILD_BUG_ON(sizeof(tv_res) != 3);
1628         if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1629                                   &tv_res, sizeof(tv_res)))
1630                 return;
1631         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1632                 return;
1633
1634         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1635                 if (reply & (1 << i)) {
1636                         struct drm_display_mode *nmode;
1637                         nmode = drm_mode_duplicate(connector->dev,
1638                                                    &sdvo_tv_modes[i]);
1639                         if (nmode)
1640                                 drm_mode_probed_add(connector, nmode);
1641                 }
1642 }
1643
1644 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1645 {
1646         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1647         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1648         struct drm_display_mode *newmode;
1649
1650         /*
1651          * Attempt to get the mode list from DDC.
1652          * Assume that the preferred modes are
1653          * arranged in priority order.
1654          */
1655         intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
1656         if (list_empty(&connector->probed_modes) == false)
1657                 goto end;
1658
1659         /* Fetch modes from VBT */
1660         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1661                 newmode = drm_mode_duplicate(connector->dev,
1662                                              dev_priv->sdvo_lvds_vbt_mode);
1663                 if (newmode != NULL) {
1664                         /* Guarantee the mode is preferred */
1665                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1666                                          DRM_MODE_TYPE_DRIVER);
1667                         drm_mode_probed_add(connector, newmode);
1668                 }
1669         }
1670
1671 end:
1672         list_for_each_entry(newmode, &connector->probed_modes, head) {
1673                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1674                         intel_sdvo->sdvo_lvds_fixed_mode =
1675                                 drm_mode_duplicate(connector->dev, newmode);
1676
1677                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1678                                               0);
1679
1680                         intel_sdvo->is_lvds = true;
1681                         break;
1682                 }
1683         }
1684
1685 }
1686
1687 static int intel_sdvo_get_modes(struct drm_connector *connector)
1688 {
1689         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1690
1691         if (IS_TV(intel_sdvo_connector))
1692                 intel_sdvo_get_tv_modes(connector);
1693         else if (IS_LVDS(intel_sdvo_connector))
1694                 intel_sdvo_get_lvds_modes(connector);
1695         else
1696                 intel_sdvo_get_ddc_modes(connector);
1697
1698         return !list_empty(&connector->probed_modes);
1699 }
1700
1701 static void
1702 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1703 {
1704         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1705         struct drm_device *dev = connector->dev;
1706
1707         if (intel_sdvo_connector->left)
1708                 drm_property_destroy(dev, intel_sdvo_connector->left);
1709         if (intel_sdvo_connector->right)
1710                 drm_property_destroy(dev, intel_sdvo_connector->right);
1711         if (intel_sdvo_connector->top)
1712                 drm_property_destroy(dev, intel_sdvo_connector->top);
1713         if (intel_sdvo_connector->bottom)
1714                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1715         if (intel_sdvo_connector->hpos)
1716                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1717         if (intel_sdvo_connector->vpos)
1718                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1719         if (intel_sdvo_connector->saturation)
1720                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1721         if (intel_sdvo_connector->contrast)
1722                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1723         if (intel_sdvo_connector->hue)
1724                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1725         if (intel_sdvo_connector->sharpness)
1726                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1727         if (intel_sdvo_connector->flicker_filter)
1728                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1729         if (intel_sdvo_connector->flicker_filter_2d)
1730                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1731         if (intel_sdvo_connector->flicker_filter_adaptive)
1732                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1733         if (intel_sdvo_connector->tv_luma_filter)
1734                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1735         if (intel_sdvo_connector->tv_chroma_filter)
1736                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1737         if (intel_sdvo_connector->dot_crawl)
1738                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1739         if (intel_sdvo_connector->brightness)
1740                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1741 }
1742
1743 static void intel_sdvo_destroy(struct drm_connector *connector)
1744 {
1745         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1746
1747         if (intel_sdvo_connector->tv_format)
1748                 drm_property_destroy(connector->dev,
1749                                      intel_sdvo_connector->tv_format);
1750
1751         intel_sdvo_destroy_enhance_property(connector);
1752         drm_sysfs_connector_remove(connector);
1753         drm_connector_cleanup(connector);
1754         kfree(connector);
1755 }
1756
1757 static int
1758 intel_sdvo_set_property(struct drm_connector *connector,
1759                         struct drm_property *property,
1760                         uint64_t val)
1761 {
1762         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1763         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1764         uint16_t temp_value;
1765         uint8_t cmd;
1766         int ret;
1767
1768         ret = drm_connector_property_set_value(connector, property, val);
1769         if (ret)
1770                 return ret;
1771
1772 #define CHECK_PROPERTY(name, NAME) \
1773         if (intel_sdvo_connector->name == property) { \
1774                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1775                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1776                 cmd = SDVO_CMD_SET_##NAME; \
1777                 intel_sdvo_connector->cur_##name = temp_value; \
1778                 goto set_value; \
1779         }
1780
1781         if (property == intel_sdvo_connector->tv_format) {
1782                 if (val >= TV_FORMAT_NUM)
1783                         return -EINVAL;
1784
1785                 if (intel_sdvo->tv_format_index ==
1786                     intel_sdvo_connector->tv_format_supported[val])
1787                         return 0;
1788
1789                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1790                 goto done;
1791         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1792                 temp_value = val;
1793                 if (intel_sdvo_connector->left == property) {
1794                         drm_connector_property_set_value(connector,
1795                                                          intel_sdvo_connector->right, val);
1796                         if (intel_sdvo_connector->left_margin == temp_value)
1797                                 return 0;
1798
1799                         intel_sdvo_connector->left_margin = temp_value;
1800                         intel_sdvo_connector->right_margin = temp_value;
1801                         temp_value = intel_sdvo_connector->max_hscan -
1802                                 intel_sdvo_connector->left_margin;
1803                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1804                         goto set_value;
1805                 } else if (intel_sdvo_connector->right == property) {
1806                         drm_connector_property_set_value(connector,
1807                                                          intel_sdvo_connector->left, val);
1808                         if (intel_sdvo_connector->right_margin == temp_value)
1809                                 return 0;
1810
1811                         intel_sdvo_connector->left_margin = temp_value;
1812                         intel_sdvo_connector->right_margin = temp_value;
1813                         temp_value = intel_sdvo_connector->max_hscan -
1814                                 intel_sdvo_connector->left_margin;
1815                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1816                         goto set_value;
1817                 } else if (intel_sdvo_connector->top == property) {
1818                         drm_connector_property_set_value(connector,
1819                                                          intel_sdvo_connector->bottom, val);
1820                         if (intel_sdvo_connector->top_margin == temp_value)
1821                                 return 0;
1822
1823                         intel_sdvo_connector->top_margin = temp_value;
1824                         intel_sdvo_connector->bottom_margin = temp_value;
1825                         temp_value = intel_sdvo_connector->max_vscan -
1826                                 intel_sdvo_connector->top_margin;
1827                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1828                         goto set_value;
1829                 } else if (intel_sdvo_connector->bottom == property) {
1830                         drm_connector_property_set_value(connector,
1831                                                          intel_sdvo_connector->top, val);
1832                         if (intel_sdvo_connector->bottom_margin == temp_value)
1833                                 return 0;
1834
1835                         intel_sdvo_connector->top_margin = temp_value;
1836                         intel_sdvo_connector->bottom_margin = temp_value;
1837                         temp_value = intel_sdvo_connector->max_vscan -
1838                                 intel_sdvo_connector->top_margin;
1839                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1840                         goto set_value;
1841                 }
1842                 CHECK_PROPERTY(hpos, HPOS)
1843                 CHECK_PROPERTY(vpos, VPOS)
1844                 CHECK_PROPERTY(saturation, SATURATION)
1845                 CHECK_PROPERTY(contrast, CONTRAST)
1846                 CHECK_PROPERTY(hue, HUE)
1847                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1848                 CHECK_PROPERTY(sharpness, SHARPNESS)
1849                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1850                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1851                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1852                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1853                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1854                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1855         }
1856
1857         return -EINVAL; /* unknown property */
1858
1859 set_value:
1860         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1861                 return -EIO;
1862
1863
1864 done:
1865         if (intel_sdvo->base.base.crtc) {
1866                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1867                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1868                                          crtc->y, crtc->fb);
1869         }
1870
1871         return 0;
1872 #undef CHECK_PROPERTY
1873 }
1874
1875 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1876         .dpms = intel_sdvo_dpms,
1877         .mode_fixup = intel_sdvo_mode_fixup,
1878         .prepare = intel_encoder_prepare,
1879         .mode_set = intel_sdvo_mode_set,
1880         .commit = intel_encoder_commit,
1881 };
1882
1883 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1884         .dpms = drm_helper_connector_dpms,
1885         .detect = intel_sdvo_detect,
1886         .fill_modes = drm_helper_probe_single_connector_modes,
1887         .set_property = intel_sdvo_set_property,
1888         .destroy = intel_sdvo_destroy,
1889 };
1890
1891 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1892         .get_modes = intel_sdvo_get_modes,
1893         .mode_valid = intel_sdvo_mode_valid,
1894         .best_encoder = intel_best_encoder,
1895 };
1896
1897 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1898 {
1899         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1900
1901         if (intel_sdvo->analog_ddc_bus)
1902                 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
1903
1904         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1905                 drm_mode_destroy(encoder->dev,
1906                                  intel_sdvo->sdvo_lvds_fixed_mode);
1907
1908         intel_encoder_destroy(encoder);
1909 }
1910
1911 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1912         .destroy = intel_sdvo_enc_destroy,
1913 };
1914
1915 static void
1916 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1917 {
1918         uint16_t mask = 0;
1919         unsigned int num_bits;
1920
1921         /* Make a mask of outputs less than or equal to our own priority in the
1922          * list.
1923          */
1924         switch (sdvo->controlled_output) {
1925         case SDVO_OUTPUT_LVDS1:
1926                 mask |= SDVO_OUTPUT_LVDS1;
1927         case SDVO_OUTPUT_LVDS0:
1928                 mask |= SDVO_OUTPUT_LVDS0;
1929         case SDVO_OUTPUT_TMDS1:
1930                 mask |= SDVO_OUTPUT_TMDS1;
1931         case SDVO_OUTPUT_TMDS0:
1932                 mask |= SDVO_OUTPUT_TMDS0;
1933         case SDVO_OUTPUT_RGB1:
1934                 mask |= SDVO_OUTPUT_RGB1;
1935         case SDVO_OUTPUT_RGB0:
1936                 mask |= SDVO_OUTPUT_RGB0;
1937                 break;
1938         }
1939
1940         /* Count bits to find what number we are in the priority list. */
1941         mask &= sdvo->caps.output_flags;
1942         num_bits = hweight16(mask);
1943         /* If more than 3 outputs, default to DDC bus 3 for now. */
1944         if (num_bits > 3)
1945                 num_bits = 3;
1946
1947         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1948         sdvo->ddc_bus = 1 << num_bits;
1949 }
1950
1951 /**
1952  * Choose the appropriate DDC bus for control bus switch command for this
1953  * SDVO output based on the controlled output.
1954  *
1955  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1956  * outputs, then LVDS outputs.
1957  */
1958 static void
1959 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1960                           struct intel_sdvo *sdvo, u32 reg)
1961 {
1962         struct sdvo_device_mapping *mapping;
1963
1964         if (IS_SDVOB(reg))
1965                 mapping = &(dev_priv->sdvo_mappings[0]);
1966         else
1967                 mapping = &(dev_priv->sdvo_mappings[1]);
1968
1969         if (mapping->initialized)
1970                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1971         else
1972                 intel_sdvo_guess_ddc_bus(sdvo);
1973 }
1974
1975 static bool
1976 intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
1977 {
1978         return intel_sdvo_set_target_output(intel_sdvo,
1979                                             device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1980                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1981                                      &intel_sdvo->is_hdmi, 1);
1982 }
1983
1984 static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1985                                   struct i2c_msg msgs[], int num)
1986 {
1987         struct intel_sdvo *intel_sdvo;
1988         const struct i2c_algorithm *algo;
1989         int ret;
1990
1991         intel_sdvo = container_of(i2c_adap->algo_data,
1992                                   struct intel_sdvo,
1993                                   base);
1994         algo = intel_sdvo->base.i2c_bus->algo;
1995
1996         ret = intel_sdvo_set_control_bus_switch(intel_sdvo,
1997                                                 intel_sdvo->ddc_bus);
1998         if (ret)
1999                 return ret;
2000
2001         return algo->master_xfer(i2c_adap, msgs, num);
2002 }
2003
2004 static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
2005         .master_xfer    = intel_sdvo_master_xfer,
2006 };
2007
2008 static u8
2009 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2010 {
2011         struct drm_i915_private *dev_priv = dev->dev_private;
2012         struct sdvo_device_mapping *my_mapping, *other_mapping;
2013
2014         if (IS_SDVOB(sdvo_reg)) {
2015                 my_mapping = &dev_priv->sdvo_mappings[0];
2016                 other_mapping = &dev_priv->sdvo_mappings[1];
2017         } else {
2018                 my_mapping = &dev_priv->sdvo_mappings[1];
2019                 other_mapping = &dev_priv->sdvo_mappings[0];
2020         }
2021
2022         /* If the BIOS described our SDVO device, take advantage of it. */
2023         if (my_mapping->slave_addr)
2024                 return my_mapping->slave_addr;
2025
2026         /* If the BIOS only described a different SDVO device, use the
2027          * address that it isn't using.
2028          */
2029         if (other_mapping->slave_addr) {
2030                 if (other_mapping->slave_addr == 0x70)
2031                         return 0x72;
2032                 else
2033                         return 0x70;
2034         }
2035
2036         /* No SDVO device info is found for another DVO port,
2037          * so use mapping assumption we had before BIOS parsing.
2038          */
2039         if (IS_SDVOB(sdvo_reg))
2040                 return 0x70;
2041         else
2042                 return 0x72;
2043 }
2044
2045 static void
2046 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2047                           struct intel_sdvo *encoder)
2048 {
2049         drm_connector_init(encoder->base.base.dev,
2050                            &connector->base.base,
2051                            &intel_sdvo_connector_funcs,
2052                            connector->base.base.connector_type);
2053
2054         drm_connector_helper_add(&connector->base.base,
2055                                  &intel_sdvo_connector_helper_funcs);
2056
2057         connector->base.base.interlace_allowed = 0;
2058         connector->base.base.doublescan_allowed = 0;
2059         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2060
2061         intel_connector_attach_encoder(&connector->base, &encoder->base);
2062         drm_sysfs_connector_add(&connector->base.base);
2063 }
2064
2065 static bool
2066 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2067 {
2068         struct drm_encoder *encoder = &intel_sdvo->base.base;
2069         struct drm_connector *connector;
2070         struct intel_connector *intel_connector;
2071         struct intel_sdvo_connector *intel_sdvo_connector;
2072
2073         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2074         if (!intel_sdvo_connector)
2075                 return false;
2076
2077         if (device == 0) {
2078                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2079                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2080         } else if (device == 1) {
2081                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2082                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2083         }
2084
2085         intel_connector = &intel_sdvo_connector->base;
2086         connector = &intel_connector->base;
2087         connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2088         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2089         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2090
2091         if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2092                 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2093                 && intel_sdvo->is_hdmi) {
2094                 /* enable hdmi encoding mode if supported */
2095                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2096                 intel_sdvo_set_colorimetry(intel_sdvo,
2097                                            SDVO_COLORIMETRY_RGB256);
2098                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2099         }
2100         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2101                                        (1 << INTEL_ANALOG_CLONE_BIT));
2102
2103         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2104
2105         return true;
2106 }
2107
2108 static bool
2109 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2110 {
2111         struct drm_encoder *encoder = &intel_sdvo->base.base;
2112         struct drm_connector *connector;
2113         struct intel_connector *intel_connector;
2114         struct intel_sdvo_connector *intel_sdvo_connector;
2115
2116         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2117         if (!intel_sdvo_connector)
2118                 return false;
2119
2120         intel_connector = &intel_sdvo_connector->base;
2121         connector = &intel_connector->base;
2122         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2123         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2124
2125         intel_sdvo->controlled_output |= type;
2126         intel_sdvo_connector->output_flag = type;
2127
2128         intel_sdvo->is_tv = true;
2129         intel_sdvo->base.needs_tv_clock = true;
2130         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2131
2132         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2133
2134         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2135                 goto err;
2136
2137         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2138                 goto err;
2139
2140         return true;
2141
2142 err:
2143         intel_sdvo_destroy_enhance_property(connector);
2144         kfree(intel_sdvo_connector);
2145         return false;
2146 }
2147
2148 static bool
2149 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2150 {
2151         struct drm_encoder *encoder = &intel_sdvo->base.base;
2152         struct drm_connector *connector;
2153         struct intel_connector *intel_connector;
2154         struct intel_sdvo_connector *intel_sdvo_connector;
2155
2156         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2157         if (!intel_sdvo_connector)
2158                 return false;
2159
2160         intel_connector = &intel_sdvo_connector->base;
2161         connector = &intel_connector->base;
2162         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2163         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2164         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2165
2166         if (device == 0) {
2167                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2168                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2169         } else if (device == 1) {
2170                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2171                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2172         }
2173
2174         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2175                                        (1 << INTEL_ANALOG_CLONE_BIT));
2176
2177         intel_sdvo_connector_init(intel_sdvo_connector,
2178                                   intel_sdvo);
2179         return true;
2180 }
2181
2182 static bool
2183 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2184 {
2185         struct drm_encoder *encoder = &intel_sdvo->base.base;
2186         struct drm_connector *connector;
2187         struct intel_connector *intel_connector;
2188         struct intel_sdvo_connector *intel_sdvo_connector;
2189
2190         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2191         if (!intel_sdvo_connector)
2192                 return false;
2193
2194         intel_connector = &intel_sdvo_connector->base;
2195         connector = &intel_connector->base;
2196         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2197         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2198
2199         if (device == 0) {
2200                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2201                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2202         } else if (device == 1) {
2203                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2204                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2205         }
2206
2207         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2208                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2209
2210         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2211         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2212                 goto err;
2213
2214         return true;
2215
2216 err:
2217         intel_sdvo_destroy_enhance_property(connector);
2218         kfree(intel_sdvo_connector);
2219         return false;
2220 }
2221
2222 static bool
2223 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2224 {
2225         intel_sdvo->is_tv = false;
2226         intel_sdvo->base.needs_tv_clock = false;
2227         intel_sdvo->is_lvds = false;
2228
2229         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2230
2231         if (flags & SDVO_OUTPUT_TMDS0)
2232                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2233                         return false;
2234
2235         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2236                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2237                         return false;
2238
2239         /* TV has no XXX1 function block */
2240         if (flags & SDVO_OUTPUT_SVID0)
2241                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2242                         return false;
2243
2244         if (flags & SDVO_OUTPUT_CVBS0)
2245                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2246                         return false;
2247
2248         if (flags & SDVO_OUTPUT_RGB0)
2249                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2250                         return false;
2251
2252         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2253                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2254                         return false;
2255
2256         if (flags & SDVO_OUTPUT_LVDS0)
2257                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2258                         return false;
2259
2260         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2261                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2262                         return false;
2263
2264         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2265                 unsigned char bytes[2];
2266
2267                 intel_sdvo->controlled_output = 0;
2268                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2269                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2270                               SDVO_NAME(intel_sdvo),
2271                               bytes[0], bytes[1]);
2272                 return false;
2273         }
2274         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2275
2276         return true;
2277 }
2278
2279 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2280                                           struct intel_sdvo_connector *intel_sdvo_connector,
2281                                           int type)
2282 {
2283         struct drm_device *dev = intel_sdvo->base.base.dev;
2284         struct intel_sdvo_tv_format format;
2285         uint32_t format_map, i;
2286
2287         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2288                 return false;
2289
2290         if (!intel_sdvo_get_value(intel_sdvo,
2291                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2292                                   &format, sizeof(format)))
2293                 return false;
2294
2295         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2296
2297         if (format_map == 0)
2298                 return false;
2299
2300         intel_sdvo_connector->format_supported_num = 0;
2301         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2302                 if (format_map & (1 << i))
2303                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2304
2305
2306         intel_sdvo_connector->tv_format =
2307                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2308                                             "mode", intel_sdvo_connector->format_supported_num);
2309         if (!intel_sdvo_connector->tv_format)
2310                 return false;
2311
2312         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2313                 drm_property_add_enum(
2314                                 intel_sdvo_connector->tv_format, i,
2315                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2316
2317         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2318         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2319                                       intel_sdvo_connector->tv_format, 0);
2320         return true;
2321
2322 }
2323
2324 #define ENHANCEMENT(name, NAME) do { \
2325         if (enhancements.name) { \
2326                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2327                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2328                         return false; \
2329                 intel_sdvo_connector->max_##name = data_value[0]; \
2330                 intel_sdvo_connector->cur_##name = response; \
2331                 intel_sdvo_connector->name = \
2332                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2333                 if (!intel_sdvo_connector->name) return false; \
2334                 intel_sdvo_connector->name->values[0] = 0; \
2335                 intel_sdvo_connector->name->values[1] = data_value[0]; \
2336                 drm_connector_attach_property(connector, \
2337                                               intel_sdvo_connector->name, \
2338                                               intel_sdvo_connector->cur_##name); \
2339                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2340                               data_value[0], data_value[1], response); \
2341         } \
2342 } while(0)
2343
2344 static bool
2345 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2346                                       struct intel_sdvo_connector *intel_sdvo_connector,
2347                                       struct intel_sdvo_enhancements_reply enhancements)
2348 {
2349         struct drm_device *dev = intel_sdvo->base.base.dev;
2350         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2351         uint16_t response, data_value[2];
2352
2353         /* when horizontal overscan is supported, Add the left/right  property */
2354         if (enhancements.overscan_h) {
2355                 if (!intel_sdvo_get_value(intel_sdvo,
2356                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2357                                           &data_value, 4))
2358                         return false;
2359
2360                 if (!intel_sdvo_get_value(intel_sdvo,
2361                                           SDVO_CMD_GET_OVERSCAN_H,
2362                                           &response, 2))
2363                         return false;
2364
2365                 intel_sdvo_connector->max_hscan = data_value[0];
2366                 intel_sdvo_connector->left_margin = data_value[0] - response;
2367                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2368                 intel_sdvo_connector->left =
2369                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2370                                             "left_margin", 2);
2371                 if (!intel_sdvo_connector->left)
2372                         return false;
2373
2374                 intel_sdvo_connector->left->values[0] = 0;
2375                 intel_sdvo_connector->left->values[1] = data_value[0];
2376                 drm_connector_attach_property(connector,
2377                                               intel_sdvo_connector->left,
2378                                               intel_sdvo_connector->left_margin);
2379
2380                 intel_sdvo_connector->right =
2381                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2382                                             "right_margin", 2);
2383                 if (!intel_sdvo_connector->right)
2384                         return false;
2385
2386                 intel_sdvo_connector->right->values[0] = 0;
2387                 intel_sdvo_connector->right->values[1] = data_value[0];
2388                 drm_connector_attach_property(connector,
2389                                               intel_sdvo_connector->right,
2390                                               intel_sdvo_connector->right_margin);
2391                 DRM_DEBUG_KMS("h_overscan: max %d, "
2392                               "default %d, current %d\n",
2393                               data_value[0], data_value[1], response);
2394         }
2395
2396         if (enhancements.overscan_v) {
2397                 if (!intel_sdvo_get_value(intel_sdvo,
2398                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2399                                           &data_value, 4))
2400                         return false;
2401
2402                 if (!intel_sdvo_get_value(intel_sdvo,
2403                                           SDVO_CMD_GET_OVERSCAN_V,
2404                                           &response, 2))
2405                         return false;
2406
2407                 intel_sdvo_connector->max_vscan = data_value[0];
2408                 intel_sdvo_connector->top_margin = data_value[0] - response;
2409                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2410                 intel_sdvo_connector->top =
2411                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2412                                             "top_margin", 2);
2413                 if (!intel_sdvo_connector->top)
2414                         return false;
2415
2416                 intel_sdvo_connector->top->values[0] = 0;
2417                 intel_sdvo_connector->top->values[1] = data_value[0];
2418                 drm_connector_attach_property(connector,
2419                                               intel_sdvo_connector->top,
2420                                               intel_sdvo_connector->top_margin);
2421
2422                 intel_sdvo_connector->bottom =
2423                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2424                                             "bottom_margin", 2);
2425                 if (!intel_sdvo_connector->bottom)
2426                         return false;
2427
2428                 intel_sdvo_connector->bottom->values[0] = 0;
2429                 intel_sdvo_connector->bottom->values[1] = data_value[0];
2430                 drm_connector_attach_property(connector,
2431                                               intel_sdvo_connector->bottom,
2432                                               intel_sdvo_connector->bottom_margin);
2433                 DRM_DEBUG_KMS("v_overscan: max %d, "
2434                               "default %d, current %d\n",
2435                               data_value[0], data_value[1], response);
2436         }
2437
2438         ENHANCEMENT(hpos, HPOS);
2439         ENHANCEMENT(vpos, VPOS);
2440         ENHANCEMENT(saturation, SATURATION);
2441         ENHANCEMENT(contrast, CONTRAST);
2442         ENHANCEMENT(hue, HUE);
2443         ENHANCEMENT(sharpness, SHARPNESS);
2444         ENHANCEMENT(brightness, BRIGHTNESS);
2445         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2446         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2447         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2448         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2449         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2450
2451         if (enhancements.dot_crawl) {
2452                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2453                         return false;
2454
2455                 intel_sdvo_connector->max_dot_crawl = 1;
2456                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2457                 intel_sdvo_connector->dot_crawl =
2458                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2459                 if (!intel_sdvo_connector->dot_crawl)
2460                         return false;
2461
2462                 intel_sdvo_connector->dot_crawl->values[0] = 0;
2463                 intel_sdvo_connector->dot_crawl->values[1] = 1;
2464                 drm_connector_attach_property(connector,
2465                                               intel_sdvo_connector->dot_crawl,
2466                                               intel_sdvo_connector->cur_dot_crawl);
2467                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2468         }
2469
2470         return true;
2471 }
2472
2473 static bool
2474 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2475                                         struct intel_sdvo_connector *intel_sdvo_connector,
2476                                         struct intel_sdvo_enhancements_reply enhancements)
2477 {
2478         struct drm_device *dev = intel_sdvo->base.base.dev;
2479         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2480         uint16_t response, data_value[2];
2481
2482         ENHANCEMENT(brightness, BRIGHTNESS);
2483
2484         return true;
2485 }
2486 #undef ENHANCEMENT
2487
2488 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2489                                                struct intel_sdvo_connector *intel_sdvo_connector)
2490 {
2491         union {
2492                 struct intel_sdvo_enhancements_reply reply;
2493                 uint16_t response;
2494         } enhancements;
2495
2496         if (!intel_sdvo_get_value(intel_sdvo,
2497                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2498                                   &enhancements, sizeof(enhancements)))
2499                 return false;
2500
2501         if (enhancements.response == 0) {
2502                 DRM_DEBUG_KMS("No enhancement is supported\n");
2503                 return true;
2504         }
2505
2506         if (IS_TV(intel_sdvo_connector))
2507                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2508         else if(IS_LVDS(intel_sdvo_connector))
2509                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2510         else
2511                 return true;
2512
2513 }
2514
2515 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2516 {
2517         struct drm_i915_private *dev_priv = dev->dev_private;
2518         struct intel_encoder *intel_encoder;
2519         struct intel_sdvo *intel_sdvo;
2520         u8 ch[0x40];
2521         int i;
2522         u32 i2c_reg, ddc_reg, analog_ddc_reg;
2523
2524         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2525         if (!intel_sdvo)
2526                 return false;
2527
2528         intel_sdvo->sdvo_reg = sdvo_reg;
2529
2530         intel_encoder = &intel_sdvo->base;
2531         intel_encoder->type = INTEL_OUTPUT_SDVO;
2532
2533         if (HAS_PCH_SPLIT(dev)) {
2534                 i2c_reg = PCH_GPIOE;
2535                 ddc_reg = PCH_GPIOE;
2536                 analog_ddc_reg = PCH_GPIOA;
2537         } else {
2538                 i2c_reg = GPIOE;
2539                 ddc_reg = GPIOE;
2540                 analog_ddc_reg = GPIOA;
2541         }
2542
2543         /* setup the DDC bus. */
2544         if (IS_SDVOB(sdvo_reg))
2545                 intel_encoder->i2c_bus =
2546                         intel_i2c_create(intel_encoder,
2547                                          i2c_reg, "SDVOCTRL_E for SDVOB");
2548         else
2549                 intel_encoder->i2c_bus =
2550                         intel_i2c_create(intel_encoder,
2551                                          i2c_reg, "SDVOCTRL_E for SDVOC");
2552
2553         if (!intel_encoder->i2c_bus)
2554                 goto err_inteloutput;
2555
2556         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
2557
2558         /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2559         intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
2560
2561         /* Read the regs to test if we can talk to the device */
2562         for (i = 0; i < 0x40; i++) {
2563                 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) {
2564                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2565                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2566                         goto err_i2c;
2567                 }
2568         }
2569
2570         /* setup the DDC bus. */
2571         if (IS_SDVOB(sdvo_reg)) {
2572                 intel_encoder->ddc_bus =
2573                         intel_i2c_create(intel_encoder,
2574                                          ddc_reg, "SDVOB DDC BUS");
2575                 intel_sdvo->analog_ddc_bus =
2576                         intel_i2c_create(intel_encoder,
2577                                          analog_ddc_reg, "SDVOB/VGA DDC BUS");
2578                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2579         } else {
2580                 intel_encoder->ddc_bus =
2581                         intel_i2c_create(intel_encoder,
2582                                          ddc_reg, "SDVOC DDC BUS");
2583                 intel_sdvo->analog_ddc_bus =
2584                         intel_i2c_create(intel_encoder,
2585                                          analog_ddc_reg, "SDVOC/VGA DDC BUS");
2586                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2587         }
2588         if (intel_encoder->ddc_bus == NULL || intel_sdvo->analog_ddc_bus == NULL)
2589                 goto err_i2c;
2590
2591         /* Wrap with our custom algo which switches to DDC mode */
2592         intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
2593
2594         /* encoder type will be decided later */
2595         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2596         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2597
2598         /* In default case sdvo lvds is false */
2599         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2600                 goto err_enc;
2601
2602         if (intel_sdvo_output_setup(intel_sdvo,
2603                                     intel_sdvo->caps.output_flags) != true) {
2604                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2605                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2606                 goto err_enc;
2607         }
2608
2609         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2610
2611         /* Set the input timing to the screen. Assume always input 0. */
2612         if (!intel_sdvo_set_target_input(intel_sdvo))
2613                 goto err_enc;
2614
2615         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2616                                                     &intel_sdvo->pixel_clock_min,
2617                                                     &intel_sdvo->pixel_clock_max))
2618                 goto err_enc;
2619
2620         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2621                         "clock range %dMHz - %dMHz, "
2622                         "input 1: %c, input 2: %c, "
2623                         "output 1: %c, output 2: %c\n",
2624                         SDVO_NAME(intel_sdvo),
2625                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2626                         intel_sdvo->caps.device_rev_id,
2627                         intel_sdvo->pixel_clock_min / 1000,
2628                         intel_sdvo->pixel_clock_max / 1000,
2629                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2630                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2631                         /* check currently supported outputs */
2632                         intel_sdvo->caps.output_flags &
2633                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2634                         intel_sdvo->caps.output_flags &
2635                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2636         return true;
2637
2638 err_enc:
2639         drm_encoder_cleanup(&intel_encoder->base);
2640 err_i2c:
2641         if (intel_sdvo->analog_ddc_bus != NULL)
2642                 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
2643         if (intel_encoder->ddc_bus != NULL)
2644                 intel_i2c_destroy(intel_encoder->ddc_bus);
2645         if (intel_encoder->i2c_bus != NULL)
2646                 intel_i2c_destroy(intel_encoder->i2c_bus);
2647 err_inteloutput:
2648         kfree(intel_sdvo);
2649
2650         return false;
2651 }