drivers/gpu/drm/i915/intel_hdmi.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2009 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Jesse Barnes <jesse.barnes@intel.com>
  27  */
  28
  29 #include <linux/i2c.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39
  40 struct intel_hdmi {
  41         struct intel_encoder base;
  42         u32 sdvox_reg;
  43         int ddc_bus;
  44         uint32_t color_range;
  45         bool has_hdmi_sink;
  46         bool has_audio;
  47         int force_audio;
  48         void (*write_infoframe)(struct drm_encoder *encoder,
  49                                 struct dip_infoframe *frame);
  50 };
  51
  52 static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
  53 {
  54         return container_of(encoder, struct intel_hdmi, base.base);
  55 }
  56
  57 static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
  58 {
  59         return container_of(intel_attached_encoder(connector),
  60                             struct intel_hdmi, base);
  61 }
  62
  63 void intel_dip_infoframe_csum(struct dip_infoframe *frame)
  64 {
  65         uint8_t *data = (uint8_t *)frame;
  66         uint8_t sum = 0;
  67         unsigned i;
  68
  69         frame->checksum = 0;
  70         frame->ecc = 0;
  71
  72         /* Header isn't part of the checksum */
  73         for (i = 5; i < frame->len; i++)
  74                 sum += data[i];
  75
  76         frame->checksum = 0x100 - sum;
  77 }
  78
  79 static u32 intel_infoframe_index(struct dip_infoframe *frame)
  80 {
  81         u32 flags = 0;
  82
  83         switch (frame->type) {
  84         case DIP_TYPE_AVI:
  85                 flags |= VIDEO_DIP_SELECT_AVI;
  86                 break;
  87         case DIP_TYPE_SPD:
  88                 flags |= VIDEO_DIP_SELECT_SPD;
  89                 break;
  90         default:
  91                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
  92                 break;
  93         }
  94
  95         return flags;
  96 }
  97
  98 static u32 intel_infoframe_flags(struct dip_infoframe *frame)
  99 {
 100         u32 flags = 0;
 101
 102         switch (frame->type) {
 103         case DIP_TYPE_AVI:
 104                 flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC;
 105                 break;
 106         case DIP_TYPE_SPD:
 107                 flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_2VSYNC;
 108                 break;
 109         default:
 110                 DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
 111                 break;
 112         }
 113
 114         return flags;
 115 }
 116
 117 static void i9xx_write_infoframe(struct drm_encoder *encoder,
 118                                  struct dip_infoframe *frame)
 119 {
 120         uint32_t *data = (uint32_t *)frame;
 121         struct drm_device *dev = encoder->dev;
 122         struct drm_i915_private *dev_priv = dev->dev_private;
 123         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 124         u32 port, flags, val = I915_READ(VIDEO_DIP_CTL);
 125         unsigned i, len = DIP_HEADER_SIZE + frame->len;
 126
 127
 128         /* XXX first guess at handling video port, is this corrent? */
 129         if (intel_hdmi->sdvox_reg == SDVOB)
 130                 port = VIDEO_DIP_PORT_B;
 131         else if (intel_hdmi->sdvox_reg == SDVOC)
 132                 port = VIDEO_DIP_PORT_C;
 133         else
 134                 return;
 135
 136         flags = intel_infoframe_index(frame);
 137
 138         val &= ~VIDEO_DIP_SELECT_MASK;
 139
 140         I915_WRITE(VIDEO_DIP_CTL, val | port | flags);
 141
 142         for (i = 0; i < len; i += 4) {
 143                 I915_WRITE(VIDEO_DIP_DATA, *data);
 144                 data++;
 145         }
 146
 147         flags |= intel_infoframe_flags(frame);
 148
 149         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags);
 150 }
 151
 152 static void ironlake_write_infoframe(struct drm_encoder *encoder,
 153                                      struct dip_infoframe *frame)
 154 {
 155         uint32_t *data = (uint32_t *)frame;
 156         struct drm_device *dev = encoder->dev;
 157         struct drm_i915_private *dev_priv = dev->dev_private;
 158         struct drm_crtc *crtc = encoder->crtc;
 159         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 160         int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
 161         unsigned i, len = DIP_HEADER_SIZE + frame->len;
 162         u32 flags, val = I915_READ(reg);
 163
 164         intel_wait_for_vblank(dev, intel_crtc->pipe);
 165
 166         flags = intel_infoframe_index(frame);
 167
 168         val &= ~VIDEO_DIP_SELECT_MASK;
 169
 170         I915_WRITE(reg, val | flags);
 171
 172         for (i = 0; i < len; i += 4) {
 173                 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
 174                 data++;
 175         }
 176
 177         flags |= intel_infoframe_flags(frame);
 178
 179         I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);
 180 }
 181 static void intel_set_infoframe(struct drm_encoder *encoder,
 182                                 struct dip_infoframe *frame)
 183 {
 184         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 185
 186         if (!intel_hdmi->has_hdmi_sink)
 187                 return;
 188
 189         intel_dip_infoframe_csum(frame);
 190         intel_hdmi->write_infoframe(encoder, frame);
 191 }
 192
 193 static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
 194 {
 195         struct dip_infoframe avi_if = {
 196                 .type = DIP_TYPE_AVI,
 197                 .ver = DIP_VERSION_AVI,
 198                 .len = DIP_LEN_AVI,
 199         };
 200
 201         intel_set_infoframe(encoder, &avi_if);
 202 }
 203
 204 static void intel_hdmi_mode_set(struct drm_encoder *encoder,
 205                                 struct drm_display_mode *mode,
 206                                 struct drm_display_mode *adjusted_mode)
 207 {
 208         struct drm_device *dev = encoder->dev;
 209         struct drm_i915_private *dev_priv = dev->dev_private;
 210         struct drm_crtc *crtc = encoder->crtc;
 211         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 212         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 213         u32 sdvox;
 214
 215         sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
 216         if (!HAS_PCH_SPLIT(dev))
 217                 sdvox |= intel_hdmi->color_range;
 218         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 219                 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
 220         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 221                 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
 222
 223         if (intel_crtc->bpp > 24)
 224                 sdvox |= COLOR_FORMAT_12bpc;
 225         else
 226                 sdvox |= COLOR_FORMAT_8bpc;
 227
 228         /* Required on CPT */
 229         if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
 230                 sdvox |= HDMI_MODE_SELECT;
 231
 232         if (intel_hdmi->has_audio) {
 233                 sdvox |= SDVO_AUDIO_ENABLE;
 234                 sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
 235         }
 236
 237         if (intel_crtc->pipe == 1) {
 238                 if (HAS_PCH_CPT(dev))
 239                         sdvox |= PORT_TRANS_B_SEL_CPT;
 240                 else
 241                         sdvox |= SDVO_PIPE_B_SELECT;
 242         }
 243
 244         I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
 245         POSTING_READ(intel_hdmi->sdvox_reg);
 246
 247         intel_hdmi_set_avi_infoframe(encoder);
 248 }
 249
 250 static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
 251 {
 252         struct drm_device *dev = encoder->dev;
 253         struct drm_i915_private *dev_priv = dev->dev_private;
 254         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 255         u32 temp;
 256
 257         temp = I915_READ(intel_hdmi->sdvox_reg);
 258
 259         /* HW workaround, need to toggle enable bit off and on for 12bpc, but
 260          * we do this anyway which shows more stable in testing.
 261          */
 262         if (HAS_PCH_SPLIT(dev)) {
 263                 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
 264                 POSTING_READ(intel_hdmi->sdvox_reg);
 265         }
 266
 267         if (mode != DRM_MODE_DPMS_ON) {
 268                 temp &= ~SDVO_ENABLE;
 269         } else {
 270                 temp |= SDVO_ENABLE;
 271         }
 272
 273         I915_WRITE(intel_hdmi->sdvox_reg, temp);
 274         POSTING_READ(intel_hdmi->sdvox_reg);
 275
 276         /* HW workaround, need to write this twice for issue that may result
 277          * in first write getting masked.
 278          */
 279         if (HAS_PCH_SPLIT(dev)) {
 280                 I915_WRITE(intel_hdmi->sdvox_reg, temp);
 281                 POSTING_READ(intel_hdmi->sdvox_reg);
 282         }
 283 }
 284
 285 static int intel_hdmi_mode_valid(struct drm_connector *connector,
 286                                  struct drm_display_mode *mode)
 287 {
 288         if (mode->clock > 165000)
 289                 return MODE_CLOCK_HIGH;
 290         if (mode->clock < 20000)
 291                 return MODE_CLOCK_LOW;
 292
 293         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 294                 return MODE_NO_DBLESCAN;
 295
 296         return MODE_OK;
 297 }
 298
 299 static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 300                                   struct drm_display_mode *mode,
 301                                   struct drm_display_mode *adjusted_mode)
 302 {
 303         return true;
 304 }
 305
 306 static enum drm_connector_status
 307 intel_hdmi_detect(struct drm_connector *connector, bool force)
 308 {
 309         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 310         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 311         struct edid *edid;
 312         enum drm_connector_status status = connector_status_disconnected;
 313
 314         intel_hdmi->has_hdmi_sink = false;
 315         intel_hdmi->has_audio = false;
 316         edid = drm_get_edid(connector,
 317                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 318
 319         if (edid) {
 320                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
 321                         status = connector_status_connected;
 322                         intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
 323                         intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
 324                 }
 325                 connector->display_info.raw_edid = NULL;
 326                 kfree(edid);
 327         }
 328
 329         if (status == connector_status_connected) {
 330                 if (intel_hdmi->force_audio)
 331                         intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
 332         }
 333
 334         return status;
 335 }
 336
 337 static int intel_hdmi_get_modes(struct drm_connector *connector)
 338 {
 339         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 340         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 341
 342         /* We should parse the EDID data and find out if it's an HDMI sink so
 343          * we can send audio to it.
 344          */
 345
 346         return intel_ddc_get_modes(connector,
 347                                    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 348 }
 349
 350 static bool
 351 intel_hdmi_detect_audio(struct drm_connector *connector)
 352 {
 353         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 354         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 355         struct edid *edid;
 356         bool has_audio = false;
 357
 358         edid = drm_get_edid(connector,
 359                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 360         if (edid) {
 361                 if (edid->input & DRM_EDID_INPUT_DIGITAL)
 362                         has_audio = drm_detect_monitor_audio(edid);
 363
 364                 connector->display_info.raw_edid = NULL;
 365                 kfree(edid);
 366         }
 367
 368         return has_audio;
 369 }
 370
 371 static int
 372 intel_hdmi_set_property(struct drm_connector *connector,
 373                       struct drm_property *property,
 374                       uint64_t val)
 375 {
 376         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 377         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 378         int ret;
 379
 380         ret = drm_connector_property_set_value(connector, property, val);
 381         if (ret)
 382                 return ret;
 383
 384         if (property == dev_priv->force_audio_property) {
 385                 int i = val;
 386                 bool has_audio;
 387
 388                 if (i == intel_hdmi->force_audio)
 389                         return 0;
 390
 391                 intel_hdmi->force_audio = i;
 392
 393                 if (i == 0)
 394                         has_audio = intel_hdmi_detect_audio(connector);
 395                 else
 396                         has_audio = i > 0;
 397
 398                 if (has_audio == intel_hdmi->has_audio)
 399                         return 0;
 400
 401                 intel_hdmi->has_audio = has_audio;
 402                 goto done;
 403         }
 404
 405         if (property == dev_priv->broadcast_rgb_property) {
 406                 if (val == !!intel_hdmi->color_range)
 407                         return 0;
 408
 409                 intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
 410                 goto done;
 411         }
 412
 413         return -EINVAL;
 414
 415 done:
 416         if (intel_hdmi->base.base.crtc) {
 417                 struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
 418                 drm_crtc_helper_set_mode(crtc, &crtc->mode,
 419                                          crtc->x, crtc->y,
 420                                          crtc->fb);
 421         }
 422
 423         return 0;
 424 }
 425
 426 static void intel_hdmi_destroy(struct drm_connector *connector)
 427 {
 428         drm_sysfs_connector_remove(connector);
 429         drm_connector_cleanup(connector);
 430         kfree(connector);
 431 }
 432
 433 static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
 434         .dpms = intel_hdmi_dpms,
 435         .mode_fixup = intel_hdmi_mode_fixup,
 436         .prepare = intel_encoder_prepare,
 437         .mode_set = intel_hdmi_mode_set,
 438         .commit = intel_encoder_commit,
 439 };
 440
 441 static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
 442         .dpms = drm_helper_connector_dpms,
 443         .detect = intel_hdmi_detect,
 444         .fill_modes = drm_helper_probe_single_connector_modes,
 445         .set_property = intel_hdmi_set_property,
 446         .destroy = intel_hdmi_destroy,
 447 };
 448
 449 static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
 450         .get_modes = intel_hdmi_get_modes,
 451         .mode_valid = intel_hdmi_mode_valid,
 452         .best_encoder = intel_best_encoder,
 453 };
 454
 455 static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
 456         .destroy = intel_encoder_destroy,
 457 };
 458
 459 static void
 460 intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
 461 {
 462         intel_attach_force_audio_property(connector);
 463         intel_attach_broadcast_rgb_property(connector);
 464 }
 465
 466 void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 467 {
 468         struct drm_i915_private *dev_priv = dev->dev_private;
 469         struct drm_connector *connector;
 470         struct intel_encoder *intel_encoder;
 471         struct intel_connector *intel_connector;
 472         struct intel_hdmi *intel_hdmi;
 473
 474         intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
 475         if (!intel_hdmi)
 476                 return;
 477
 478         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 479         if (!intel_connector) {
 480                 kfree(intel_hdmi);
 481                 return;
 482         }
 483
 484         intel_encoder = &intel_hdmi->base;
 485         drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
 486                          DRM_MODE_ENCODER_TMDS);
 487
 488         connector = &intel_connector->base;
 489         drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
 490                            DRM_MODE_CONNECTOR_HDMIA);
 491         drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
 492
 493         intel_encoder->type = INTEL_OUTPUT_HDMI;
 494
 495         connector->polled = DRM_CONNECTOR_POLL_HPD;
 496         connector->interlace_allowed = 0;
 497         connector->doublescan_allowed = 0;
 498         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 499
 500         /* Set up the DDC bus. */
 501         if (sdvox_reg == SDVOB) {
 502                 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
 503                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 504                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 505         } else if (sdvox_reg == SDVOC) {
 506                 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
 507                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 508                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 509         } else if (sdvox_reg == HDMIB) {
 510                 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
 511                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 512                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 513         } else if (sdvox_reg == HDMIC) {
 514                 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
 515                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 516                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 517         } else if (sdvox_reg == HDMID) {
 518                 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
 519                 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
 520                 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
 521         }
 522
 523         intel_hdmi->sdvox_reg = sdvox_reg;
 524
 525         if (!HAS_PCH_SPLIT(dev))
 526                 intel_hdmi->write_infoframe = i9xx_write_infoframe;
 527         else
 528                 intel_hdmi->write_infoframe = ironlake_write_infoframe;
 529
 530         drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
 531
 532         intel_hdmi_add_properties(intel_hdmi, connector);
 533
 534         intel_connector_attach_encoder(intel_connector, intel_encoder);
 535         drm_sysfs_connector_add(connector);
 536
 537         /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
 538          * 0xd.  Failure to do so will result in spurious interrupts being
 539          * generated on the port when a cable is not attached.
 540          */
 541         if (IS_G4X(dev) && !IS_GM45(dev)) {
 542                 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
 543                 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
 544         }
 545 }