drivers/gpu/drm/i915/intel_hdmi.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2009 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Jesse Barnes <jesse.barnes@intel.com>
  27  */
  28
  29 #include <linux/i2c.h>
  30 #include <linux/slab.h>
  31 #include <linux/delay.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39
  40 struct intel_hdmi {
  41         struct intel_encoder base;
  42         u32 sdvox_reg;
  43         int ddc_bus;
  44         uint32_t color_range;
  45         bool has_hdmi_sink;
  46         bool has_audio;
  47         int force_audio;
  48 };
  49
  50 static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
  51 {
  52         return container_of(encoder, struct intel_hdmi, base.base);
  53 }
  54
  55 static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
  56 {
  57         return container_of(intel_attached_encoder(connector),
  58                             struct intel_hdmi, base);
  59 }
  60
  61 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
  62 {
  63         uint8_t *data = (uint8_t *)avi_if;
  64         uint8_t sum = 0;
  65         unsigned i;
  66
  67         avi_if->checksum = 0;
  68         avi_if->ecc = 0;
  69
  70         for (i = 0; i < sizeof(*avi_if); i++)
  71                 sum += data[i];
  72
  73         avi_if->checksum = 0x100 - sum;
  74 }
  75
  76 static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
  77 {
  78         struct dip_infoframe avi_if = {
  79                 .type = DIP_TYPE_AVI,
  80                 .ver = DIP_VERSION_AVI,
  81                 .len = DIP_LEN_AVI,
  82         };
  83         uint32_t *data = (uint32_t *)&avi_if;
  84         struct drm_device *dev = encoder->dev;
  85         struct drm_i915_private *dev_priv = dev->dev_private;
  86         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
  87         u32 port;
  88         unsigned i;
  89
  90         if (!intel_hdmi->has_hdmi_sink)
  91                 return;
  92
  93         /* XXX first guess at handling video port, is this corrent? */
  94         if (intel_hdmi->sdvox_reg == SDVOB)
  95                 port = VIDEO_DIP_PORT_B;
  96         else if (intel_hdmi->sdvox_reg == SDVOC)
  97                 port = VIDEO_DIP_PORT_C;
  98         else
  99                 return;
 100
 101         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
 102                    VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC);
 103
 104         intel_dip_infoframe_csum(&avi_if);
 105         for (i = 0; i < sizeof(avi_if); i += 4) {
 106                 I915_WRITE(VIDEO_DIP_DATA, *data);
 107                 data++;
 108         }
 109
 110         I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
 111                    VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC |
 112                    VIDEO_DIP_ENABLE_AVI);
 113 }
 114
 115 static void intel_hdmi_mode_set(struct drm_encoder *encoder,
 116                                 struct drm_display_mode *mode,
 117                                 struct drm_display_mode *adjusted_mode)
 118 {
 119         struct drm_device *dev = encoder->dev;
 120         struct drm_i915_private *dev_priv = dev->dev_private;
 121         struct drm_crtc *crtc = encoder->crtc;
 122         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 123         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 124         u32 sdvox;
 125
 126         sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
 127         if (!HAS_PCH_SPLIT(dev))
 128                 sdvox |= intel_hdmi->color_range;
 129         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 130                 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
 131         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 132                 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
 133
 134         if (intel_crtc->bpp > 24)
 135                 sdvox |= COLOR_FORMAT_12bpc;
 136         else
 137                 sdvox |= COLOR_FORMAT_8bpc;
 138
 139         /* Required on CPT */
 140         if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
 141                 sdvox |= HDMI_MODE_SELECT;
 142
 143         if (intel_hdmi->has_audio) {
 144                 sdvox |= SDVO_AUDIO_ENABLE;
 145                 sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
 146         }
 147
 148         if (intel_crtc->pipe == 1) {
 149                 if (HAS_PCH_CPT(dev))
 150                         sdvox |= PORT_TRANS_B_SEL_CPT;
 151                 else
 152                         sdvox |= SDVO_PIPE_B_SELECT;
 153         }
 154
 155         I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
 156         POSTING_READ(intel_hdmi->sdvox_reg);
 157
 158         intel_hdmi_set_avi_infoframe(encoder);
 159 }
 160
 161 static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
 162 {
 163         struct drm_device *dev = encoder->dev;
 164         struct drm_i915_private *dev_priv = dev->dev_private;
 165         struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
 166         u32 temp;
 167
 168         temp = I915_READ(intel_hdmi->sdvox_reg);
 169
 170         /* HW workaround, need to toggle enable bit off and on for 12bpc, but
 171          * we do this anyway which shows more stable in testing.
 172          */
 173         if (HAS_PCH_SPLIT(dev)) {
 174                 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
 175                 POSTING_READ(intel_hdmi->sdvox_reg);
 176         }
 177
 178         if (mode != DRM_MODE_DPMS_ON) {
 179                 temp &= ~SDVO_ENABLE;
 180         } else {
 181                 temp |= SDVO_ENABLE;
 182         }
 183
 184         I915_WRITE(intel_hdmi->sdvox_reg, temp);
 185         POSTING_READ(intel_hdmi->sdvox_reg);
 186
 187         /* HW workaround, need to write this twice for issue that may result
 188          * in first write getting masked.
 189          */
 190         if (HAS_PCH_SPLIT(dev)) {
 191                 I915_WRITE(intel_hdmi->sdvox_reg, temp);
 192                 POSTING_READ(intel_hdmi->sdvox_reg);
 193         }
 194 }
 195
 196 static int intel_hdmi_mode_valid(struct drm_connector *connector,
 197                                  struct drm_display_mode *mode)
 198 {
 199         if (mode->clock > 165000)
 200                 return MODE_CLOCK_HIGH;
 201         if (mode->clock < 20000)
 202                 return MODE_CLOCK_LOW;
 203
 204         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 205                 return MODE_NO_DBLESCAN;
 206
 207         return MODE_OK;
 208 }
 209
 210 static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 211                                   struct drm_display_mode *mode,
 212                                   struct drm_display_mode *adjusted_mode)
 213 {
 214         return true;
 215 }
 216
 217 static enum drm_connector_status
 218 intel_hdmi_detect(struct drm_connector *connector, bool force)
 219 {
 220         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 221         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 222         struct edid *edid;
 223         enum drm_connector_status status = connector_status_disconnected;
 224
 225         intel_hdmi->has_hdmi_sink = false;
 226         intel_hdmi->has_audio = false;
 227         edid = drm_get_edid(connector,
 228                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 229
 230         if (edid) {
 231                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
 232                         status = connector_status_connected;
 233                         intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
 234                         intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
 235                 }
 236                 connector->display_info.raw_edid = NULL;
 237                 kfree(edid);
 238         }
 239
 240         if (status == connector_status_connected) {
 241                 if (intel_hdmi->force_audio)
 242                         intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
 243         }
 244
 245         return status;
 246 }
 247
 248 static int intel_hdmi_get_modes(struct drm_connector *connector)
 249 {
 250         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 251         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 252
 253         /* We should parse the EDID data and find out if it's an HDMI sink so
 254          * we can send audio to it.
 255          */
 256
 257         return intel_ddc_get_modes(connector,
 258                                    &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 259 }
 260
 261 static bool
 262 intel_hdmi_detect_audio(struct drm_connector *connector)
 263 {
 264         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 265         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 266         struct edid *edid;
 267         bool has_audio = false;
 268
 269         edid = drm_get_edid(connector,
 270                             &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
 271         if (edid) {
 272                 if (edid->input & DRM_EDID_INPUT_DIGITAL)
 273                         has_audio = drm_detect_monitor_audio(edid);
 274
 275                 connector->display_info.raw_edid = NULL;
 276                 kfree(edid);
 277         }
 278
 279         return has_audio;
 280 }
 281
 282 static int
 283 intel_hdmi_set_property(struct drm_connector *connector,
 284                       struct drm_property *property,
 285                       uint64_t val)
 286 {
 287         struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
 288         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 289         int ret;
 290
 291         ret = drm_connector_property_set_value(connector, property, val);
 292         if (ret)
 293                 return ret;
 294
 295         if (property == dev_priv->force_audio_property) {
 296                 int i = val;
 297                 bool has_audio;
 298
 299                 if (i == intel_hdmi->force_audio)
 300                         return 0;
 301
 302                 intel_hdmi->force_audio = i;
 303
 304                 if (i == 0)
 305                         has_audio = intel_hdmi_detect_audio(connector);
 306                 else
 307                         has_audio = i > 0;
 308
 309                 if (has_audio == intel_hdmi->has_audio)
 310                         return 0;
 311
 312                 intel_hdmi->has_audio = has_audio;
 313                 goto done;
 314         }
 315
 316         if (property == dev_priv->broadcast_rgb_property) {
 317                 if (val == !!intel_hdmi->color_range)
 318                         return 0;
 319
 320                 intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
 321                 goto done;
 322         }
 323
 324         return -EINVAL;
 325
 326 done:
 327         if (intel_hdmi->base.base.crtc) {
 328                 struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
 329                 drm_crtc_helper_set_mode(crtc, &crtc->mode,
 330                                          crtc->x, crtc->y,
 331                                          crtc->fb);
 332         }
 333
 334         return 0;
 335 }
 336
 337 static void intel_hdmi_destroy(struct drm_connector *connector)
 338 {
 339         drm_sysfs_connector_remove(connector);
 340         drm_connector_cleanup(connector);
 341         kfree(connector);
 342 }
 343
 344 static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
 345         .dpms = intel_hdmi_dpms,
 346         .mode_fixup = intel_hdmi_mode_fixup,
 347         .prepare = intel_encoder_prepare,
 348         .mode_set = intel_hdmi_mode_set,
 349         .commit = intel_encoder_commit,
 350 };
 351
 352 static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
 353         .dpms = drm_helper_connector_dpms,
 354         .detect = intel_hdmi_detect,
 355         .fill_modes = drm_helper_probe_single_connector_modes,
 356         .set_property = intel_hdmi_set_property,
 357         .destroy = intel_hdmi_destroy,
 358 };
 359
 360 static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
 361         .get_modes = intel_hdmi_get_modes,
 362         .mode_valid = intel_hdmi_mode_valid,
 363         .best_encoder = intel_best_encoder,
 364 };
 365
 366 static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
 367         .destroy = intel_encoder_destroy,
 368 };
 369
 370 static void
 371 intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
 372 {
 373         intel_attach_force_audio_property(connector);
 374         intel_attach_broadcast_rgb_property(connector);
 375 }
 376
 377 void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 378 {
 379         struct drm_i915_private *dev_priv = dev->dev_private;
 380         struct drm_connector *connector;
 381         struct intel_encoder *intel_encoder;
 382         struct intel_connector *intel_connector;
 383         struct intel_hdmi *intel_hdmi;
 384
 385         intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
 386         if (!intel_hdmi)
 387                 return;
 388
 389         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 390         if (!intel_connector) {
 391                 kfree(intel_hdmi);
 392                 return;
 393         }
 394
 395         intel_encoder = &intel_hdmi->base;
 396         drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
 397                          DRM_MODE_ENCODER_TMDS);
 398
 399         connector = &intel_connector->base;
 400         drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
 401                            DRM_MODE_CONNECTOR_HDMIA);
 402         drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
 403
 404         intel_encoder->type = INTEL_OUTPUT_HDMI;
 405
 406         connector->polled = DRM_CONNECTOR_POLL_HPD;
 407         connector->interlace_allowed = 0;
 408         connector->doublescan_allowed = 0;
 409         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 410
 411         /* Set up the DDC bus. */
 412         if (sdvox_reg == SDVOB) {
 413                 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
 414                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 415                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 416         } else if (sdvox_reg == SDVOC) {
 417                 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
 418                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 419                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 420         } else if (sdvox_reg == HDMIB) {
 421                 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
 422                 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
 423                 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
 424         } else if (sdvox_reg == HDMIC) {
 425                 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
 426                 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
 427                 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
 428         } else if (sdvox_reg == HDMID) {
 429                 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
 430                 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
 431                 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
 432         }
 433
 434         intel_hdmi->sdvox_reg = sdvox_reg;
 435
 436         drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
 437
 438         intel_hdmi_add_properties(intel_hdmi, connector);
 439
 440         intel_connector_attach_encoder(intel_connector, intel_encoder);
 441         drm_sysfs_connector_add(connector);
 442
 443         /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
 444          * 0xd.  Failure to do so will result in spurious interrupts being
 445          * generated on the port when a cable is not attached.
 446          */
 447         if (IS_G4X(dev) && !IS_GM45(dev)) {
 448                 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
 449                 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
 450         }
 451 }