drivers/gpu/drm/i915/i915_gem_execbuffer.c

   1 /*
   2  * Copyright © 2008,2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include <drm/i915_drm.h>
  31 #include "i915_drv.h"
  32 #include "i915_trace.h"
  33 #include "intel_drv.h"
  34 #include <linux/dma_remapping.h>
  35
  36 struct eb_objects {
  37         int and;
  38         struct hlist_head buckets[0];
  39 };
  40
  41 static struct eb_objects *
  42 eb_create(int size)
  43 {
  44         struct eb_objects *eb;
  45         int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
  46         BUILD_BUG_ON(!is_power_of_2(PAGE_SIZE / sizeof(struct hlist_head)));
  47         while (count > size)
  48                 count >>= 1;
  49         eb = kzalloc(count*sizeof(struct hlist_head) +
  50                      sizeof(struct eb_objects),
  51                      GFP_KERNEL);
  52         if (eb == NULL)
  53                 return eb;
  54
  55         eb->and = count - 1;
  56         return eb;
  57 }
  58
  59 static void
  60 eb_reset(struct eb_objects *eb)
  61 {
  62         memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
  63 }
  64
  65 static void
  66 eb_add_object(struct eb_objects *eb, struct drm_i915_gem_object *obj)
  67 {
  68         hlist_add_head(&obj->exec_node,
  69                        &eb->buckets[obj->exec_handle & eb->and]);
  70 }
  71
  72 static struct drm_i915_gem_object *
  73 eb_get_object(struct eb_objects *eb, unsigned long handle)
  74 {
  75         struct hlist_head *head;
  76         struct hlist_node *node;
  77         struct drm_i915_gem_object *obj;
  78
  79         head = &eb->buckets[handle & eb->and];
  80         hlist_for_each(node, head) {
  81                 obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
  82                 if (obj->exec_handle == handle)
  83                         return obj;
  84         }
  85
  86         return NULL;
  87 }
  88
  89 static void
  90 eb_destroy(struct eb_objects *eb)
  91 {
  92         kfree(eb);
  93 }
  94
  95 static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
  96 {
  97         return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
  98                 !obj->map_and_fenceable ||
  99                 obj->cache_level != I915_CACHE_NONE);
 100 }
 101
 102 static int
 103 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
 104                                    struct eb_objects *eb,
 105                                    struct drm_i915_gem_relocation_entry *reloc)
 106 {
 107         struct drm_device *dev = obj->base.dev;
 108         struct drm_gem_object *target_obj;
 109         struct drm_i915_gem_object *target_i915_obj;
 110         uint32_t target_offset;
 111         int ret = -EINVAL;
 112
 113         /* we've already hold a reference to all valid objects */
 114         target_obj = &eb_get_object(eb, reloc->target_handle)->base;
 115         if (unlikely(target_obj == NULL))
 116                 return -ENOENT;
 117
 118         target_i915_obj = to_intel_bo(target_obj);
 119         target_offset = target_i915_obj->gtt_offset;
 120
 121         /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
 122          * pipe_control writes because the gpu doesn't properly redirect them
 123          * through the ppgtt for non_secure batchbuffers. */
 124         if (unlikely(IS_GEN6(dev) &&
 125             reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
 126             !target_i915_obj->has_global_gtt_mapping)) {
 127                 i915_gem_gtt_bind_object(target_i915_obj,
 128                                          target_i915_obj->cache_level);
 129         }
 130
 131         /* Validate that the target is in a valid r/w GPU domain */
 132         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
 133                 DRM_DEBUG("reloc with multiple write domains: "
 134                           "obj %p target %d offset %d "
 135                           "read %08x write %08x",
 136                           obj, reloc->target_handle,
 137                           (int) reloc->offset,
 138                           reloc->read_domains,
 139                           reloc->write_domain);
 140                 return ret;
 141         }
 142         if (unlikely((reloc->write_domain | reloc->read_domains)
 143                      & ~I915_GEM_GPU_DOMAINS)) {
 144                 DRM_DEBUG("reloc with read/write non-GPU domains: "
 145                           "obj %p target %d offset %d "
 146                           "read %08x write %08x",
 147                           obj, reloc->target_handle,
 148                           (int) reloc->offset,
 149                           reloc->read_domains,
 150                           reloc->write_domain);
 151                 return ret;
 152         }
 153         if (unlikely(reloc->write_domain && target_obj->pending_write_domain &&
 154                      reloc->write_domain != target_obj->pending_write_domain)) {
 155                 DRM_DEBUG("Write domain conflict: "
 156                           "obj %p target %d offset %d "
 157                           "new %08x old %08x\n",
 158                           obj, reloc->target_handle,
 159                           (int) reloc->offset,
 160                           reloc->write_domain,
 161                           target_obj->pending_write_domain);
 162                 return ret;
 163         }
 164
 165         target_obj->pending_read_domains |= reloc->read_domains;
 166         target_obj->pending_write_domain |= reloc->write_domain;
 167
 168         /* If the relocation already has the right value in it, no
 169          * more work needs to be done.
 170          */
 171         if (target_offset == reloc->presumed_offset)
 172                 return 0;
 173
 174         /* Check that the relocation address is valid... */
 175         if (unlikely(reloc->offset > obj->base.size - 4)) {
 176                 DRM_DEBUG("Relocation beyond object bounds: "
 177                           "obj %p target %d offset %d size %d.\n",
 178                           obj, reloc->target_handle,
 179                           (int) reloc->offset,
 180                           (int) obj->base.size);
 181                 return ret;
 182         }
 183         if (unlikely(reloc->offset & 3)) {
 184                 DRM_DEBUG("Relocation not 4-byte aligned: "
 185                           "obj %p target %d offset %d.\n",
 186                           obj, reloc->target_handle,
 187                           (int) reloc->offset);
 188                 return ret;
 189         }
 190
 191         /* We can't wait for rendering with pagefaults disabled */
 192         if (obj->active && in_atomic())
 193                 return -EFAULT;
 194
 195         reloc->delta += target_offset;
 196         if (use_cpu_reloc(obj)) {
 197                 uint32_t page_offset = reloc->offset & ~PAGE_MASK;
 198                 char *vaddr;
 199
 200                 ret = i915_gem_object_set_to_cpu_domain(obj, 1);
 201                 if (ret)
 202                         return ret;
 203
 204                 vaddr = kmap_atomic(i915_gem_object_get_page(obj,
 205                                                              reloc->offset >> PAGE_SHIFT));
 206                 *(uint32_t *)(vaddr + page_offset) = reloc->delta;
 207                 kunmap_atomic(vaddr);
 208         } else {
 209                 struct drm_i915_private *dev_priv = dev->dev_private;
 210                 uint32_t __iomem *reloc_entry;
 211                 void __iomem *reloc_page;
 212
 213                 ret = i915_gem_object_set_to_gtt_domain(obj, true);
 214                 if (ret)
 215                         return ret;
 216
 217                 ret = i915_gem_object_put_fence(obj);
 218                 if (ret)
 219                         return ret;
 220
 221                 /* Map the page containing the relocation we're going to perform.  */
 222                 reloc->offset += obj->gtt_offset;
 223                 reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
 224                                                       reloc->offset & PAGE_MASK);
 225                 reloc_entry = (uint32_t __iomem *)
 226                         (reloc_page + (reloc->offset & ~PAGE_MASK));
 227                 iowrite32(reloc->delta, reloc_entry);
 228                 io_mapping_unmap_atomic(reloc_page);
 229         }
 230
 231         /* and update the user's relocation entry */
 232         reloc->presumed_offset = target_offset;
 233
 234         return 0;
 235 }
 236
 237 static int
 238 i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
 239                                     struct eb_objects *eb)
 240 {
 241 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
 242         struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
 243         struct drm_i915_gem_relocation_entry __user *user_relocs;
 244         struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
 245         int remain, ret;
 246
 247         user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr;
 248
 249         remain = entry->relocation_count;
 250         while (remain) {
 251                 struct drm_i915_gem_relocation_entry *r = stack_reloc;
 252                 int count = remain;
 253                 if (count > ARRAY_SIZE(stack_reloc))
 254                         count = ARRAY_SIZE(stack_reloc);
 255                 remain -= count;
 256
 257                 if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0])))
 258                         return -EFAULT;
 259
 260                 do {
 261                         u64 offset = r->presumed_offset;
 262
 263                         ret = i915_gem_execbuffer_relocate_entry(obj, eb, r);
 264                         if (ret)
 265                                 return ret;
 266
 267                         if (r->presumed_offset != offset &&
 268                             __copy_to_user_inatomic(&user_relocs->presumed_offset,
 269                                                     &r->presumed_offset,
 270                                                     sizeof(r->presumed_offset))) {
 271                                 return -EFAULT;
 272                         }
 273
 274                         user_relocs++;
 275                         r++;
 276                 } while (--count);
 277         }
 278
 279         return 0;
 280 #undef N_RELOC
 281 }
 282
 283 static int
 284 i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
 285                                          struct eb_objects *eb,
 286                                          struct drm_i915_gem_relocation_entry *relocs)
 287 {
 288         const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
 289         int i, ret;
 290
 291         for (i = 0; i < entry->relocation_count; i++) {
 292                 ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i]);
 293                 if (ret)
 294                         return ret;
 295         }
 296
 297         return 0;
 298 }
 299
 300 static int
 301 i915_gem_execbuffer_relocate(struct drm_device *dev,
 302                              struct eb_objects *eb,
 303                              struct list_head *objects)
 304 {
 305         struct drm_i915_gem_object *obj;
 306         int ret = 0;
 307
 308         /* This is the fast path and we cannot handle a pagefault whilst
 309          * holding the struct mutex lest the user pass in the relocations
 310          * contained within a mmaped bo. For in such a case we, the page
 311          * fault handler would call i915_gem_fault() and we would try to
 312          * acquire the struct mutex again. Obviously this is bad and so
 313          * lockdep complains vehemently.
 314          */
 315         pagefault_disable();
 316         list_for_each_entry(obj, objects, exec_list) {
 317                 ret = i915_gem_execbuffer_relocate_object(obj, eb);
 318                 if (ret)
 319                         break;
 320         }
 321         pagefault_enable();
 322
 323         return ret;
 324 }
 325
 326 #define  __EXEC_OBJECT_HAS_PIN (1<<31)
 327 #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
 328
 329 static int
 330 need_reloc_mappable(struct drm_i915_gem_object *obj)
 331 {
 332         struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
 333         return entry->relocation_count && !use_cpu_reloc(obj);
 334 }
 335
 336 static int
 337 i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
 338                                    struct intel_ring_buffer *ring)
 339 {
 340         struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
 341         struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
 342         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 343         bool need_fence, need_mappable;
 344         int ret;
 345
 346         need_fence =
 347                 has_fenced_gpu_access &&
 348                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 349                 obj->tiling_mode != I915_TILING_NONE;
 350         need_mappable = need_fence || need_reloc_mappable(obj);
 351
 352         ret = i915_gem_object_pin(obj, entry->alignment, need_mappable, false);
 353         if (ret)
 354                 return ret;
 355
 356         entry->flags |= __EXEC_OBJECT_HAS_PIN;
 357
 358         if (has_fenced_gpu_access) {
 359                 if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) {
 360                         ret = i915_gem_object_get_fence(obj);
 361                         if (ret)
 362                                 return ret;
 363
 364                         if (i915_gem_object_pin_fence(obj))
 365                                 entry->flags |= __EXEC_OBJECT_HAS_FENCE;
 366
 367                         obj->pending_fenced_gpu_access = true;
 368                 }
 369         }
 370
 371         /* Ensure ppgtt mapping exists if needed */
 372         if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) {
 373                 i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
 374                                        obj, obj->cache_level);
 375
 376                 obj->has_aliasing_ppgtt_mapping = 1;
 377         }
 378
 379         entry->offset = obj->gtt_offset;
 380         return 0;
 381 }
 382
 383 static void
 384 i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
 385 {
 386         struct drm_i915_gem_exec_object2 *entry;
 387
 388         if (!obj->gtt_space)
 389                 return;
 390
 391         entry = obj->exec_entry;
 392
 393         if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
 394                 i915_gem_object_unpin_fence(obj);
 395
 396         if (entry->flags & __EXEC_OBJECT_HAS_PIN)
 397                 i915_gem_object_unpin(obj);
 398
 399         entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN);
 400 }
 401
 402 static int
 403 i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
 404                             struct drm_file *file,
 405                             struct list_head *objects)
 406 {
 407         struct drm_i915_gem_object *obj;
 408         struct list_head ordered_objects;
 409         bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
 410         int retry;
 411
 412         INIT_LIST_HEAD(&ordered_objects);
 413         while (!list_empty(objects)) {
 414                 struct drm_i915_gem_exec_object2 *entry;
 415                 bool need_fence, need_mappable;
 416
 417                 obj = list_first_entry(objects,
 418                                        struct drm_i915_gem_object,
 419                                        exec_list);
 420                 entry = obj->exec_entry;
 421
 422                 need_fence =
 423                         has_fenced_gpu_access &&
 424                         entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 425                         obj->tiling_mode != I915_TILING_NONE;
 426                 need_mappable = need_fence || need_reloc_mappable(obj);
 427
 428                 if (need_mappable)
 429                         list_move(&obj->exec_list, &ordered_objects);
 430                 else
 431                         list_move_tail(&obj->exec_list, &ordered_objects);
 432
 433                 obj->base.pending_read_domains = 0;
 434                 obj->base.pending_write_domain = 0;
 435                 obj->pending_fenced_gpu_access = false;
 436         }
 437         list_splice(&ordered_objects, objects);
 438
 439         /* Attempt to pin all of the buffers into the GTT.
 440          * This is done in 3 phases:
 441          *
 442          * 1a. Unbind all objects that do not match the GTT constraints for
 443          *     the execbuffer (fenceable, mappable, alignment etc).
 444          * 1b. Increment pin count for already bound objects.
 445          * 2.  Bind new objects.
 446          * 3.  Decrement pin count.
 447          *
 448          * This avoid unnecessary unbinding of later objects in order to make
 449          * room for the earlier objects *unless* we need to defragment.
 450          */
 451         retry = 0;
 452         do {
 453                 int ret = 0;
 454
 455                 /* Unbind any ill-fitting objects or pin. */
 456                 list_for_each_entry(obj, objects, exec_list) {
 457                         struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
 458                         bool need_fence, need_mappable;
 459
 460                         if (!obj->gtt_space)
 461                                 continue;
 462
 463                         need_fence =
 464                                 has_fenced_gpu_access &&
 465                                 entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
 466                                 obj->tiling_mode != I915_TILING_NONE;
 467                         need_mappable = need_fence || need_reloc_mappable(obj);
 468
 469                         if ((entry->alignment && obj->gtt_offset & (entry->alignment - 1)) ||
 470                             (need_mappable && !obj->map_and_fenceable))
 471                                 ret = i915_gem_object_unbind(obj);
 472                         else
 473                                 ret = i915_gem_execbuffer_reserve_object(obj, ring);
 474                         if (ret)
 475                                 goto err;
 476                 }
 477
 478                 /* Bind fresh objects */
 479                 list_for_each_entry(obj, objects, exec_list) {
 480                         if (obj->gtt_space)
 481                                 continue;
 482
 483                         ret = i915_gem_execbuffer_reserve_object(obj, ring);
 484                         if (ret)
 485                                 goto err;
 486                 }
 487
 488 err:            /* Decrement pin count for bound objects */
 489                 list_for_each_entry(obj, objects, exec_list)
 490                         i915_gem_execbuffer_unreserve_object(obj);
 491
 492                 if (ret != -ENOSPC || retry++)
 493                         return ret;
 494
 495                 ret = i915_gem_evict_everything(ring->dev);
 496                 if (ret)
 497                         return ret;
 498         } while (1);
 499 }
 500
 501 static int
 502 i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
 503                                   struct drm_file *file,
 504                                   struct intel_ring_buffer *ring,
 505                                   struct list_head *objects,
 506                                   struct eb_objects *eb,
 507                                   struct drm_i915_gem_exec_object2 *exec,
 508                                   int count)
 509 {
 510         struct drm_i915_gem_relocation_entry *reloc;
 511         struct drm_i915_gem_object *obj;
 512         int *reloc_offset;
 513         int i, total, ret;
 514
 515         /* We may process another execbuffer during the unlock... */
 516         while (!list_empty(objects)) {
 517                 obj = list_first_entry(objects,
 518                                        struct drm_i915_gem_object,
 519                                        exec_list);
 520                 list_del_init(&obj->exec_list);
 521                 drm_gem_object_unreference(&obj->base);
 522         }
 523
 524         mutex_unlock(&dev->struct_mutex);
 525
 526         total = 0;
 527         for (i = 0; i < count; i++)
 528                 total += exec[i].relocation_count;
 529
 530         reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset));
 531         reloc = drm_malloc_ab(total, sizeof(*reloc));
 532         if (reloc == NULL || reloc_offset == NULL) {
 533                 drm_free_large(reloc);
 534                 drm_free_large(reloc_offset);
 535                 mutex_lock(&dev->struct_mutex);
 536                 return -ENOMEM;
 537         }
 538
 539         total = 0;
 540         for (i = 0; i < count; i++) {
 541                 struct drm_i915_gem_relocation_entry __user *user_relocs;
 542                 u64 invalid_offset = (u64)-1;
 543                 int j;
 544
 545                 user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr;
 546
 547                 if (copy_from_user(reloc+total, user_relocs,
 548                                    exec[i].relocation_count * sizeof(*reloc))) {
 549                         ret = -EFAULT;
 550                         mutex_lock(&dev->struct_mutex);
 551                         goto err;
 552                 }
 553
 554                 /* As we do not update the known relocation offsets after
 555                  * relocating (due to the complexities in lock handling),
 556                  * we need to mark them as invalid now so that we force the
 557                  * relocation processing next time. Just in case the target
 558                  * object is evicted and then rebound into its old
 559                  * presumed_offset before the next execbuffer - if that
 560                  * happened we would make the mistake of assuming that the
 561                  * relocations were valid.
 562                  */
 563                 for (j = 0; j < exec[i].relocation_count; j++) {
 564                         if (copy_to_user(&user_relocs[j].presumed_offset,
 565                                          &invalid_offset,
 566                                          sizeof(invalid_offset))) {
 567                                 ret = -EFAULT;
 568                                 mutex_lock(&dev->struct_mutex);
 569                                 goto err;
 570                         }
 571                 }
 572
 573                 reloc_offset[i] = total;
 574                 total += exec[i].relocation_count;
 575         }
 576
 577         ret = i915_mutex_lock_interruptible(dev);
 578         if (ret) {
 579                 mutex_lock(&dev->struct_mutex);
 580                 goto err;
 581         }
 582
 583         /* reacquire the objects */
 584         eb_reset(eb);
 585         for (i = 0; i < count; i++) {
 586                 obj = to_intel_bo(drm_gem_object_lookup(dev, file,
 587                                                         exec[i].handle));
 588                 if (&obj->base == NULL) {
 589                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 590                                    exec[i].handle, i);
 591                         ret = -ENOENT;
 592                         goto err;
 593                 }
 594
 595                 list_add_tail(&obj->exec_list, objects);
 596                 obj->exec_handle = exec[i].handle;
 597                 obj->exec_entry = &exec[i];
 598                 eb_add_object(eb, obj);
 599         }
 600
 601         ret = i915_gem_execbuffer_reserve(ring, file, objects);
 602         if (ret)
 603                 goto err;
 604
 605         list_for_each_entry(obj, objects, exec_list) {
 606                 int offset = obj->exec_entry - exec;
 607                 ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
 608                                                                reloc + reloc_offset[offset]);
 609                 if (ret)
 610                         goto err;
 611         }
 612
 613         /* Leave the user relocations as are, this is the painfully slow path,
 614          * and we want to avoid the complication of dropping the lock whilst
 615          * having buffers reserved in the aperture and so causing spurious
 616          * ENOSPC for random operations.
 617          */
 618
 619 err:
 620         drm_free_large(reloc);
 621         drm_free_large(reloc_offset);
 622         return ret;
 623 }
 624
 625 static int
 626 i915_gem_execbuffer_wait_for_flips(struct intel_ring_buffer *ring, u32 flips)
 627 {
 628         u32 plane, flip_mask;
 629         int ret;
 630
 631         /* Check for any pending flips. As we only maintain a flip queue depth
 632          * of 1, we can simply insert a WAIT for the next display flip prior
 633          * to executing the batch and avoid stalling the CPU.
 634          */
 635
 636         for (plane = 0; flips >> plane; plane++) {
 637                 if (((flips >> plane) & 1) == 0)
 638                         continue;
 639
 640                 if (plane)
 641                         flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
 642                 else
 643                         flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
 644
 645                 ret = intel_ring_begin(ring, 2);
 646                 if (ret)
 647                         return ret;
 648
 649                 intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);
 650                 intel_ring_emit(ring, MI_NOOP);
 651                 intel_ring_advance(ring);
 652         }
 653
 654         return 0;
 655 }
 656
 657 static int
 658 i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
 659                                 struct list_head *objects)
 660 {
 661         struct drm_i915_gem_object *obj;
 662         uint32_t flush_domains = 0;
 663         uint32_t flips = 0;
 664         int ret;
 665
 666         list_for_each_entry(obj, objects, exec_list) {
 667                 ret = i915_gem_object_sync(obj, ring);
 668                 if (ret)
 669                         return ret;
 670
 671                 if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
 672                         i915_gem_clflush_object(obj);
 673
 674                 if (obj->base.pending_write_domain)
 675                         flips |= atomic_read(&obj->pending_flip);
 676
 677                 flush_domains |= obj->base.write_domain;
 678         }
 679
 680         if (flips) {
 681                 ret = i915_gem_execbuffer_wait_for_flips(ring, flips);
 682                 if (ret)
 683                         return ret;
 684         }
 685
 686         if (flush_domains & I915_GEM_DOMAIN_CPU)
 687                 i915_gem_chipset_flush(ring->dev);
 688
 689         if (flush_domains & I915_GEM_DOMAIN_GTT)
 690                 wmb();
 691
 692         /* Unconditionally invalidate gpu caches and ensure that we do flush
 693          * any residual writes from the previous batch.
 694          */
 695         return intel_ring_invalidate_all_caches(ring);
 696 }
 697
 698 static bool
 699 i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
 700 {
 701         return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0;
 702 }
 703
 704 static int
 705 validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
 706                    int count)
 707 {
 708         int i;
 709
 710         for (i = 0; i < count; i++) {
 711                 char __user *ptr = (char __user *)(uintptr_t)exec[i].relocs_ptr;
 712                 int length; /* limited by fault_in_pages_readable() */
 713
 714                 /* First check for malicious input causing overflow */
 715                 if (exec[i].relocation_count >
 716                     INT_MAX / sizeof(struct drm_i915_gem_relocation_entry))
 717                         return -EINVAL;
 718
 719                 length = exec[i].relocation_count *
 720                         sizeof(struct drm_i915_gem_relocation_entry);
 721                 if (!access_ok(VERIFY_READ, ptr, length))
 722                         return -EFAULT;
 723
 724                 /* we may also need to update the presumed offsets */
 725                 if (!access_ok(VERIFY_WRITE, ptr, length))
 726                         return -EFAULT;
 727
 728                 if (fault_in_multipages_readable(ptr, length))
 729                         return -EFAULT;
 730         }
 731
 732         return 0;
 733 }
 734
 735 static void
 736 i915_gem_execbuffer_move_to_active(struct list_head *objects,
 737                                    struct intel_ring_buffer *ring)
 738 {
 739         struct drm_i915_gem_object *obj;
 740
 741         list_for_each_entry(obj, objects, exec_list) {
 742                 u32 old_read = obj->base.read_domains;
 743                 u32 old_write = obj->base.write_domain;
 744
 745                 obj->base.read_domains = obj->base.pending_read_domains;
 746                 obj->base.write_domain = obj->base.pending_write_domain;
 747                 obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
 748
 749                 i915_gem_object_move_to_active(obj, ring);
 750                 if (obj->base.write_domain) {
 751                         obj->dirty = 1;
 752                         obj->last_write_seqno = intel_ring_get_seqno(ring);
 753                         if (obj->pin_count) /* check for potential scanout */
 754                                 intel_mark_fb_busy(obj);
 755                 }
 756
 757                 trace_i915_gem_object_change_domain(obj, old_read, old_write);
 758         }
 759 }
 760
 761 static void
 762 i915_gem_execbuffer_retire_commands(struct drm_device *dev,
 763                                     struct drm_file *file,
 764                                     struct intel_ring_buffer *ring)
 765 {
 766         /* Unconditionally force add_request to emit a full flush. */
 767         ring->gpu_caches_dirty = true;
 768
 769         /* Add a breadcrumb for the completion of the batch buffer */
 770         (void)i915_add_request(ring, file, NULL);
 771 }
 772
 773 static int
 774 i915_reset_gen7_sol_offsets(struct drm_device *dev,
 775                             struct intel_ring_buffer *ring)
 776 {
 777         drm_i915_private_t *dev_priv = dev->dev_private;
 778         int ret, i;
 779
 780         if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS])
 781                 return 0;
 782
 783         ret = intel_ring_begin(ring, 4 * 3);
 784         if (ret)
 785                 return ret;
 786
 787         for (i = 0; i < 4; i++) {
 788                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
 789                 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i));
 790                 intel_ring_emit(ring, 0);
 791         }
 792
 793         intel_ring_advance(ring);
 794
 795         return 0;
 796 }
 797
 798 static int
 799 i915_gem_do_execbuffer(struct drm_device *dev, void *data,
 800                        struct drm_file *file,
 801                        struct drm_i915_gem_execbuffer2 *args,
 802                        struct drm_i915_gem_exec_object2 *exec)
 803 {
 804         drm_i915_private_t *dev_priv = dev->dev_private;
 805         struct list_head objects;
 806         struct eb_objects *eb;
 807         struct drm_i915_gem_object *batch_obj;
 808         struct drm_clip_rect *cliprects = NULL;
 809         struct intel_ring_buffer *ring;
 810         u32 ctx_id = i915_execbuffer2_get_context_id(*args);
 811         u32 exec_start, exec_len;
 812         u32 mask;
 813         u32 flags;
 814         int ret, mode, i;
 815
 816         if (!i915_gem_check_execbuffer(args)) {
 817                 DRM_DEBUG("execbuf with invalid offset/length\n");
 818                 return -EINVAL;
 819         }
 820
 821         ret = validate_exec_list(exec, args->buffer_count);
 822         if (ret)
 823                 return ret;
 824
 825         flags = 0;
 826         if (args->flags & I915_EXEC_SECURE) {
 827                 if (!file->is_master || !capable(CAP_SYS_ADMIN))
 828                     return -EPERM;
 829
 830                 flags |= I915_DISPATCH_SECURE;
 831         }
 832         if (args->flags & I915_EXEC_IS_PINNED)
 833                 flags |= I915_DISPATCH_PINNED;
 834
 835         switch (args->flags & I915_EXEC_RING_MASK) {
 836         case I915_EXEC_DEFAULT:
 837         case I915_EXEC_RENDER:
 838                 ring = &dev_priv->ring[RCS];
 839                 break;
 840         case I915_EXEC_BSD:
 841                 ring = &dev_priv->ring[VCS];
 842                 if (ctx_id != 0) {
 843                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 844                                   ring->name);
 845                         return -EPERM;
 846                 }
 847                 break;
 848         case I915_EXEC_BLT:
 849                 ring = &dev_priv->ring[BCS];
 850                 if (ctx_id != 0) {
 851                         DRM_DEBUG("Ring %s doesn't support contexts\n",
 852                                   ring->name);
 853                         return -EPERM;
 854                 }
 855                 break;
 856         default:
 857                 DRM_DEBUG("execbuf with unknown ring: %d\n",
 858                           (int)(args->flags & I915_EXEC_RING_MASK));
 859                 return -EINVAL;
 860         }
 861         if (!intel_ring_initialized(ring)) {
 862                 DRM_DEBUG("execbuf with invalid ring: %d\n",
 863                           (int)(args->flags & I915_EXEC_RING_MASK));
 864                 return -EINVAL;
 865         }
 866
 867         mode = args->flags & I915_EXEC_CONSTANTS_MASK;
 868         mask = I915_EXEC_CONSTANTS_MASK;
 869         switch (mode) {
 870         case I915_EXEC_CONSTANTS_REL_GENERAL:
 871         case I915_EXEC_CONSTANTS_ABSOLUTE:
 872         case I915_EXEC_CONSTANTS_REL_SURFACE:
 873                 if (ring == &dev_priv->ring[RCS] &&
 874                     mode != dev_priv->relative_constants_mode) {
 875                         if (INTEL_INFO(dev)->gen < 4)
 876                                 return -EINVAL;
 877
 878                         if (INTEL_INFO(dev)->gen > 5 &&
 879                             mode == I915_EXEC_CONSTANTS_REL_SURFACE)
 880                                 return -EINVAL;
 881
 882                         /* The HW changed the meaning on this bit on gen6 */
 883                         if (INTEL_INFO(dev)->gen >= 6)
 884                                 mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE;
 885                 }
 886                 break;
 887         default:
 888                 DRM_DEBUG("execbuf with unknown constants: %d\n", mode);
 889                 return -EINVAL;
 890         }
 891
 892         if (args->buffer_count < 1) {
 893                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
 894                 return -EINVAL;
 895         }
 896
 897         if (args->num_cliprects != 0) {
 898                 if (ring != &dev_priv->ring[RCS]) {
 899                         DRM_DEBUG("clip rectangles are only valid with the render ring\n");
 900                         return -EINVAL;
 901                 }
 902
 903                 if (INTEL_INFO(dev)->gen >= 5) {
 904                         DRM_DEBUG("clip rectangles are only valid on pre-gen5\n");
 905                         return -EINVAL;
 906                 }
 907
 908                 if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) {
 909                         DRM_DEBUG("execbuf with %u cliprects\n",
 910                                   args->num_cliprects);
 911                         return -EINVAL;
 912                 }
 913
 914                 cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
 915                                     GFP_KERNEL);
 916                 if (cliprects == NULL) {
 917                         ret = -ENOMEM;
 918                         goto pre_mutex_err;
 919                 }
 920
 921                 if (copy_from_user(cliprects,
 922                                      (struct drm_clip_rect __user *)(uintptr_t)
 923                                      args->cliprects_ptr,
 924                                      sizeof(*cliprects)*args->num_cliprects)) {
 925                         ret = -EFAULT;
 926                         goto pre_mutex_err;
 927                 }
 928         }
 929
 930         ret = i915_mutex_lock_interruptible(dev);
 931         if (ret)
 932                 goto pre_mutex_err;
 933
 934         if (dev_priv->mm.suspended) {
 935                 mutex_unlock(&dev->struct_mutex);
 936                 ret = -EBUSY;
 937                 goto pre_mutex_err;
 938         }
 939
 940         eb = eb_create(args->buffer_count);
 941         if (eb == NULL) {
 942                 mutex_unlock(&dev->struct_mutex);
 943                 ret = -ENOMEM;
 944                 goto pre_mutex_err;
 945         }
 946
 947         /* Look up object handles */
 948         INIT_LIST_HEAD(&objects);
 949         for (i = 0; i < args->buffer_count; i++) {
 950                 struct drm_i915_gem_object *obj;
 951
 952                 obj = to_intel_bo(drm_gem_object_lookup(dev, file,
 953                                                         exec[i].handle));
 954                 if (&obj->base == NULL) {
 955                         DRM_DEBUG("Invalid object handle %d at index %d\n",
 956                                    exec[i].handle, i);
 957                         /* prevent error path from reading uninitialized data */
 958                         ret = -ENOENT;
 959                         goto err;
 960                 }
 961
 962                 if (!list_empty(&obj->exec_list)) {
 963                         DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
 964                                    obj, exec[i].handle, i);
 965                         ret = -EINVAL;
 966                         goto err;
 967                 }
 968
 969                 list_add_tail(&obj->exec_list, &objects);
 970                 obj->exec_handle = exec[i].handle;
 971                 obj->exec_entry = &exec[i];
 972                 eb_add_object(eb, obj);
 973         }
 974
 975         /* take note of the batch buffer before we might reorder the lists */
 976         batch_obj = list_entry(objects.prev,
 977                                struct drm_i915_gem_object,
 978                                exec_list);
 979
 980         /* Move the objects en-masse into the GTT, evicting if necessary. */
 981         ret = i915_gem_execbuffer_reserve(ring, file, &objects);
 982         if (ret)
 983                 goto err;
 984
 985         /* The objects are in their final locations, apply the relocations. */
 986         ret = i915_gem_execbuffer_relocate(dev, eb, &objects);
 987         if (ret) {
 988                 if (ret == -EFAULT) {
 989                         ret = i915_gem_execbuffer_relocate_slow(dev, file, ring,
 990                                                                 &objects, eb,
 991                                                                 exec,
 992                                                                 args->buffer_count);
 993                         BUG_ON(!mutex_is_locked(&dev->struct_mutex));
 994                 }
 995                 if (ret)
 996                         goto err;
 997         }
 998
 999         /* Set the pending read domains for the batch buffer to COMMAND */
1000         if (batch_obj->base.pending_write_domain) {
1001                 DRM_DEBUG("Attempting to use self-modifying batch buffer\n");
1002                 ret = -EINVAL;
1003                 goto err;
1004         }
1005         batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND;
1006
1007         /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
1008          * batch" bit. Hence we need to pin secure batches into the global gtt.
1009          * hsw should have this fixed, but let's be paranoid and do it
1010          * unconditionally for now. */
1011         if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
1012                 i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
1013
1014         ret = i915_gem_execbuffer_move_to_gpu(ring, &objects);
1015         if (ret)
1016                 goto err;
1017
1018         ret = i915_switch_context(ring, file, ctx_id);
1019         if (ret)
1020                 goto err;
1021
1022         if (ring == &dev_priv->ring[RCS] &&
1023             mode != dev_priv->relative_constants_mode) {
1024                 ret = intel_ring_begin(ring, 4);
1025                 if (ret)
1026                                 goto err;
1027
1028                 intel_ring_emit(ring, MI_NOOP);
1029                 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
1030                 intel_ring_emit(ring, INSTPM);
1031                 intel_ring_emit(ring, mask << 16 | mode);
1032                 intel_ring_advance(ring);
1033
1034                 dev_priv->relative_constants_mode = mode;
1035         }
1036
1037         if (args->flags & I915_EXEC_GEN7_SOL_RESET) {
1038                 ret = i915_reset_gen7_sol_offsets(dev, ring);
1039                 if (ret)
1040                         goto err;
1041         }
1042
1043         exec_start = batch_obj->gtt_offset + args->batch_start_offset;
1044         exec_len = args->batch_len;
1045         if (cliprects) {
1046                 for (i = 0; i < args->num_cliprects; i++) {
1047                         ret = i915_emit_box(dev, &cliprects[i],
1048                                             args->DR1, args->DR4);
1049                         if (ret)
1050                                 goto err;
1051
1052                         ret = ring->dispatch_execbuffer(ring,
1053                                                         exec_start, exec_len,
1054                                                         flags);
1055                         if (ret)
1056                                 goto err;
1057                 }
1058         } else {
1059                 ret = ring->dispatch_execbuffer(ring,
1060                                                 exec_start, exec_len,
1061                                                 flags);
1062                 if (ret)
1063                         goto err;
1064         }
1065
1066         trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
1067
1068         i915_gem_execbuffer_move_to_active(&objects, ring);
1069         i915_gem_execbuffer_retire_commands(dev, file, ring);
1070
1071 err:
1072         eb_destroy(eb);
1073         while (!list_empty(&objects)) {
1074                 struct drm_i915_gem_object *obj;
1075
1076                 obj = list_first_entry(&objects,
1077                                        struct drm_i915_gem_object,
1078                                        exec_list);
1079                 list_del_init(&obj->exec_list);
1080                 drm_gem_object_unreference(&obj->base);
1081         }
1082
1083         mutex_unlock(&dev->struct_mutex);
1084
1085 pre_mutex_err:
1086         kfree(cliprects);
1087         return ret;
1088 }
1089
1090 /*
1091  * Legacy execbuffer just creates an exec2 list from the original exec object
1092  * list array and passes it to the real function.
1093  */
1094 int
1095 i915_gem_execbuffer(struct drm_device *dev, void *data,
1096                     struct drm_file *file)
1097 {
1098         struct drm_i915_gem_execbuffer *args = data;
1099         struct drm_i915_gem_execbuffer2 exec2;
1100         struct drm_i915_gem_exec_object *exec_list = NULL;
1101         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1102         int ret, i;
1103
1104         if (args->buffer_count < 1) {
1105                 DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count);
1106                 return -EINVAL;
1107         }
1108
1109         /* Copy in the exec list from userland */
1110         exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
1111         exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
1112         if (exec_list == NULL || exec2_list == NULL) {
1113                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1114                           args->buffer_count);
1115                 drm_free_large(exec_list);
1116                 drm_free_large(exec2_list);
1117                 return -ENOMEM;
1118         }
1119         ret = copy_from_user(exec_list,
1120                              (void __user *)(uintptr_t)args->buffers_ptr,
1121                              sizeof(*exec_list) * args->buffer_count);
1122         if (ret != 0) {
1123                 DRM_DEBUG("copy %d exec entries failed %d\n",
1124                           args->buffer_count, ret);
1125                 drm_free_large(exec_list);
1126                 drm_free_large(exec2_list);
1127                 return -EFAULT;
1128         }
1129
1130         for (i = 0; i < args->buffer_count; i++) {
1131                 exec2_list[i].handle = exec_list[i].handle;
1132                 exec2_list[i].relocation_count = exec_list[i].relocation_count;
1133                 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
1134                 exec2_list[i].alignment = exec_list[i].alignment;
1135                 exec2_list[i].offset = exec_list[i].offset;
1136                 if (INTEL_INFO(dev)->gen < 4)
1137                         exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
1138                 else
1139                         exec2_list[i].flags = 0;
1140         }
1141
1142         exec2.buffers_ptr = args->buffers_ptr;
1143         exec2.buffer_count = args->buffer_count;
1144         exec2.batch_start_offset = args->batch_start_offset;
1145         exec2.batch_len = args->batch_len;
1146         exec2.DR1 = args->DR1;
1147         exec2.DR4 = args->DR4;
1148         exec2.num_cliprects = args->num_cliprects;
1149         exec2.cliprects_ptr = args->cliprects_ptr;
1150         exec2.flags = I915_EXEC_RENDER;
1151         i915_execbuffer2_set_context_id(exec2, 0);
1152
1153         ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
1154         if (!ret) {
1155                 /* Copy the new buffer offsets back to the user's exec list. */
1156                 for (i = 0; i < args->buffer_count; i++)
1157                         exec_list[i].offset = exec2_list[i].offset;
1158                 /* ... and back out to userspace */
1159                 ret = copy_to_user((void __user *)(uintptr_t)args->buffers_ptr,
1160                                    exec_list,
1161                                    sizeof(*exec_list) * args->buffer_count);
1162                 if (ret) {
1163                         ret = -EFAULT;
1164                         DRM_DEBUG("failed to copy %d exec entries "
1165                                   "back to user (%d)\n",
1166                                   args->buffer_count, ret);
1167                 }
1168         }
1169
1170         drm_free_large(exec_list);
1171         drm_free_large(exec2_list);
1172         return ret;
1173 }
1174
1175 int
1176 i915_gem_execbuffer2(struct drm_device *dev, void *data,
1177                      struct drm_file *file)
1178 {
1179         struct drm_i915_gem_execbuffer2 *args = data;
1180         struct drm_i915_gem_exec_object2 *exec2_list = NULL;
1181         int ret;
1182
1183         if (args->buffer_count < 1 ||
1184             args->buffer_count > UINT_MAX / sizeof(*exec2_list)) {
1185                 DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count);
1186                 return -EINVAL;
1187         }
1188
1189         exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count,
1190                              GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY);
1191         if (exec2_list == NULL)
1192                 exec2_list = drm_malloc_ab(sizeof(*exec2_list),
1193                                            args->buffer_count);
1194         if (exec2_list == NULL) {
1195                 DRM_DEBUG("Failed to allocate exec list for %d buffers\n",
1196                           args->buffer_count);
1197                 return -ENOMEM;
1198         }
1199         ret = copy_from_user(exec2_list,
1200                              (struct drm_i915_relocation_entry __user *)
1201                              (uintptr_t) args->buffers_ptr,
1202                              sizeof(*exec2_list) * args->buffer_count);
1203         if (ret != 0) {
1204                 DRM_DEBUG("copy %d exec entries failed %d\n",
1205                           args->buffer_count, ret);
1206                 drm_free_large(exec2_list);
1207                 return -EFAULT;
1208         }
1209
1210         ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list);
1211         if (!ret) {
1212                 /* Copy the new buffer offsets back to the user's exec list. */
1213                 ret = copy_to_user((void __user *)(uintptr_t)args->buffers_ptr,
1214                                    exec2_list,
1215                                    sizeof(*exec2_list) * args->buffer_count);
1216                 if (ret) {
1217                         ret = -EFAULT;
1218                         DRM_DEBUG("failed to copy %d exec entries "
1219                                   "back to user (%d)\n",
1220                                   args->buffer_count, ret);
1221                 }
1222         }
1223
1224         drm_free_large(exec2_list);
1225         return ret;
1226 }