drivers/gpu/drm/i915/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include <linux/device.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35 #include "intel_drv.h"
  36
  37 #include <linux/console.h>
  38 #include "drm_crtc_helper.h"
  39
  40 static int i915_modeset = -1;
  41 module_param_named(modeset, i915_modeset, int, 0400);
  42
  43 unsigned int i915_fbpercrtc = 0;
  44 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  45
  46 unsigned int i915_powersave = 1;
  47 module_param_named(powersave, i915_powersave, int, 0600);
  48
  49 unsigned int i915_lvds_downclock = 0;
  50 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  51
  52 unsigned int i915_panel_use_ssc = 1;
  53 module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
  54
  55 bool i915_try_reset = true;
  56 module_param_named(reset, i915_try_reset, bool, 0600);
  57
  58 static struct drm_driver driver;
  59 extern int intel_agp_enabled;
  60
  61 #define INTEL_VGA_DEVICE(id, info) {            \
  62         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
  63         .class_mask = 0xff0000,                 \
  64         .vendor = 0x8086,                       \
  65         .device = id,                           \
  66         .subvendor = PCI_ANY_ID,                \
  67         .subdevice = PCI_ANY_ID,                \
  68         .driver_data = (unsigned long) info }
  69
  70 static const struct intel_device_info intel_i830_info = {
  71         .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
  72         .has_overlay = 1, .overlay_needs_physical = 1,
  73 };
  74
  75 static const struct intel_device_info intel_845g_info = {
  76         .gen = 2,
  77         .has_overlay = 1, .overlay_needs_physical = 1,
  78 };
  79
  80 static const struct intel_device_info intel_i85x_info = {
  81         .gen = 2, .is_i85x = 1, .is_mobile = 1,
  82         .cursor_needs_physical = 1,
  83         .has_overlay = 1, .overlay_needs_physical = 1,
  84 };
  85
  86 static const struct intel_device_info intel_i865g_info = {
  87         .gen = 2,
  88         .has_overlay = 1, .overlay_needs_physical = 1,
  89 };
  90
  91 static const struct intel_device_info intel_i915g_info = {
  92         .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
  93         .has_overlay = 1, .overlay_needs_physical = 1,
  94 };
  95 static const struct intel_device_info intel_i915gm_info = {
  96         .gen = 3, .is_mobile = 1,
  97         .cursor_needs_physical = 1,
  98         .has_overlay = 1, .overlay_needs_physical = 1,
  99         .supports_tv = 1,
 100 };
 101 static const struct intel_device_info intel_i945g_info = {
 102         .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
 103         .has_overlay = 1, .overlay_needs_physical = 1,
 104 };
 105 static const struct intel_device_info intel_i945gm_info = {
 106         .gen = 3, .is_i945gm = 1, .is_mobile = 1,
 107         .has_hotplug = 1, .cursor_needs_physical = 1,
 108         .has_overlay = 1, .overlay_needs_physical = 1,
 109         .supports_tv = 1,
 110 };
 111
 112 static const struct intel_device_info intel_i965g_info = {
 113         .gen = 4, .is_broadwater = 1,
 114         .has_hotplug = 1,
 115         .has_overlay = 1,
 116 };
 117
 118 static const struct intel_device_info intel_i965gm_info = {
 119         .gen = 4, .is_crestline = 1,
 120         .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
 121         .has_overlay = 1,
 122         .supports_tv = 1,
 123 };
 124
 125 static const struct intel_device_info intel_g33_info = {
 126         .gen = 3, .is_g33 = 1,
 127         .need_gfx_hws = 1, .has_hotplug = 1,
 128         .has_overlay = 1,
 129 };
 130
 131 static const struct intel_device_info intel_g45_info = {
 132         .gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
 133         .has_pipe_cxsr = 1, .has_hotplug = 1,
 134         .has_bsd_ring = 1,
 135 };
 136
 137 static const struct intel_device_info intel_gm45_info = {
 138         .gen = 4, .is_g4x = 1,
 139         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
 140         .has_pipe_cxsr = 1, .has_hotplug = 1,
 141         .supports_tv = 1,
 142         .has_bsd_ring = 1,
 143 };
 144
 145 static const struct intel_device_info intel_pineview_info = {
 146         .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
 147         .need_gfx_hws = 1, .has_hotplug = 1,
 148         .has_overlay = 1,
 149 };
 150
 151 static const struct intel_device_info intel_ironlake_d_info = {
 152         .gen = 5,
 153         .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
 154         .has_bsd_ring = 1,
 155 };
 156
 157 static const struct intel_device_info intel_ironlake_m_info = {
 158         .gen = 5, .is_mobile = 1,
 159         .need_gfx_hws = 1, .has_hotplug = 1,
 160         .has_fbc = 0, /* disabled due to buggy hardware */
 161         .has_bsd_ring = 1,
 162 };
 163
 164 static const struct intel_device_info intel_sandybridge_d_info = {
 165         .gen = 6,
 166         .need_gfx_hws = 1, .has_hotplug = 1,
 167         .has_bsd_ring = 1,
 168         .has_blt_ring = 1,
 169 };
 170
 171 static const struct intel_device_info intel_sandybridge_m_info = {
 172         .gen = 6, .is_mobile = 1,
 173         .need_gfx_hws = 1, .has_hotplug = 1,
 174         .has_fbc = 1,
 175         .has_bsd_ring = 1,
 176         .has_blt_ring = 1,
 177 };
 178
 179 static const struct pci_device_id pciidlist[] = {               /* aka */
 180         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),             /* I830_M */
 181         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),             /* 845_G */
 182         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),             /* I855_GM */
 183         INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
 184         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),            /* I865_G */
 185         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),            /* I915_G */
 186         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),            /* E7221_G */
 187         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),           /* I915_GM */
 188         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),            /* I945_G */
 189         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),           /* I945_GM */
 190         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),           /* I945_GME */
 191         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),            /* I946_GZ */
 192         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),            /* G35_G */
 193         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),            /* I965_Q */
 194         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),            /* I965_G */
 195         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),              /* Q35_G */
 196         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),              /* G33_G */
 197         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),              /* Q33_G */
 198         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),           /* I965_GM */
 199         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),           /* I965_GME */
 200         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),             /* GM45_G */
 201         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),              /* IGD_E_G */
 202         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),              /* Q45_G */
 203         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),              /* G45_G */
 204         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),              /* G41_G */
 205         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),              /* B43_G */
 206         INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),              /* B43_G.1 */
 207         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
 208         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
 209         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
 210         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
 211         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
 212         INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
 213         INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
 214         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
 215         INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
 216         INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
 217         INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
 218         {0, 0, 0}
 219 };
 220
 221 #if defined(CONFIG_DRM_I915_KMS)
 222 MODULE_DEVICE_TABLE(pci, pciidlist);
 223 #endif
 224
 225 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
 226 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 227
 228 void intel_detect_pch (struct drm_device *dev)
 229 {
 230         struct drm_i915_private *dev_priv = dev->dev_private;
 231         struct pci_dev *pch;
 232
 233         /*
 234          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 235          * make graphics device passthrough work easy for VMM, that only
 236          * need to expose ISA bridge to let driver know the real hardware
 237          * underneath. This is a requirement from virtualization team.
 238          */
 239         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
 240         if (pch) {
 241                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
 242                         int id;
 243                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 244
 245                         if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 246                                 dev_priv->pch_type = PCH_CPT;
 247                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 248                         }
 249                 }
 250                 pci_dev_put(pch);
 251         }
 252 }
 253
 254 void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
 255 {
 256         int count;
 257
 258         count = 0;
 259         while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
 260                 udelay(10);
 261
 262         I915_WRITE_NOTRACE(FORCEWAKE, 1);
 263         POSTING_READ(FORCEWAKE);
 264
 265         count = 0;
 266         while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
 267                 udelay(10);
 268 }
 269
 270 void __gen6_force_wake_put(struct drm_i915_private *dev_priv)
 271 {
 272         I915_WRITE_NOTRACE(FORCEWAKE, 0);
 273         POSTING_READ(FORCEWAKE);
 274 }
 275
 276 static int i915_drm_freeze(struct drm_device *dev)
 277 {
 278         struct drm_i915_private *dev_priv = dev->dev_private;
 279
 280         drm_kms_helper_poll_disable(dev);
 281
 282         pci_save_state(dev->pdev);
 283
 284         /* If KMS is active, we do the leavevt stuff here */
 285         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 286                 int error = i915_gem_idle(dev);
 287                 if (error) {
 288                         dev_err(&dev->pdev->dev,
 289                                 "GEM idle failed, resume might fail\n");
 290                         return error;
 291                 }
 292                 drm_irq_uninstall(dev);
 293         }
 294
 295         i915_save_state(dev);
 296
 297         intel_opregion_fini(dev);
 298
 299         /* Modeset on resume, not lid events */
 300         dev_priv->modeset_on_lid = 0;
 301
 302         return 0;
 303 }
 304
 305 int i915_suspend(struct drm_device *dev, pm_message_t state)
 306 {
 307         int error;
 308
 309         if (!dev || !dev->dev_private) {
 310                 DRM_ERROR("dev: %p\n", dev);
 311                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
 312                 return -ENODEV;
 313         }
 314
 315         if (state.event == PM_EVENT_PRETHAW)
 316                 return 0;
 317
 318
 319         if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 320                 return 0;
 321
 322         error = i915_drm_freeze(dev);
 323         if (error)
 324                 return error;
 325
 326         if (state.event == PM_EVENT_SUSPEND) {
 327                 /* Shut down the device */
 328                 pci_disable_device(dev->pdev);
 329                 pci_set_power_state(dev->pdev, PCI_D3hot);
 330         }
 331
 332         return 0;
 333 }
 334
 335 static int i915_drm_thaw(struct drm_device *dev)
 336 {
 337         struct drm_i915_private *dev_priv = dev->dev_private;
 338         int error = 0;
 339
 340         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 341                 mutex_lock(&dev->struct_mutex);
 342                 i915_gem_restore_gtt_mappings(dev);
 343                 mutex_unlock(&dev->struct_mutex);
 344         }
 345
 346         i915_restore_state(dev);
 347         intel_opregion_setup(dev);
 348
 349         /* KMS EnterVT equivalent */
 350         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 351                 mutex_lock(&dev->struct_mutex);
 352                 dev_priv->mm.suspended = 0;
 353
 354                 error = i915_gem_init_ringbuffer(dev);
 355                 mutex_unlock(&dev->struct_mutex);
 356
 357                 drm_mode_config_reset(dev);
 358                 drm_irq_install(dev);
 359
 360                 /* Resume the modeset for every activated CRTC */
 361                 drm_helper_resume_force_mode(dev);
 362
 363                 if (dev_priv->renderctx && dev_priv->pwrctx)
 364                         ironlake_enable_rc6(dev);
 365         }
 366
 367         intel_opregion_init(dev);
 368
 369         dev_priv->modeset_on_lid = 0;
 370
 371         return error;
 372 }
 373
 374 int i915_resume(struct drm_device *dev)
 375 {
 376         int ret;
 377
 378         if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 379                 return 0;
 380
 381         if (pci_enable_device(dev->pdev))
 382                 return -EIO;
 383
 384         pci_set_master(dev->pdev);
 385
 386         ret = i915_drm_thaw(dev);
 387         if (ret)
 388                 return ret;
 389
 390         drm_kms_helper_poll_enable(dev);
 391         return 0;
 392 }
 393
 394 static int i8xx_do_reset(struct drm_device *dev, u8 flags)
 395 {
 396         struct drm_i915_private *dev_priv = dev->dev_private;
 397
 398         if (IS_I85X(dev))
 399                 return -ENODEV;
 400
 401         I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
 402         POSTING_READ(D_STATE);
 403
 404         if (IS_I830(dev) || IS_845G(dev)) {
 405                 I915_WRITE(DEBUG_RESET_I830,
 406                            DEBUG_RESET_DISPLAY |
 407                            DEBUG_RESET_RENDER |
 408                            DEBUG_RESET_FULL);
 409                 POSTING_READ(DEBUG_RESET_I830);
 410                 msleep(1);
 411
 412                 I915_WRITE(DEBUG_RESET_I830, 0);
 413                 POSTING_READ(DEBUG_RESET_I830);
 414         }
 415
 416         msleep(1);
 417
 418         I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
 419         POSTING_READ(D_STATE);
 420
 421         return 0;
 422 }
 423
 424 static int i965_reset_complete(struct drm_device *dev)
 425 {
 426         u8 gdrst;
 427         pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
 428         return gdrst & 0x1;
 429 }
 430
 431 static int i965_do_reset(struct drm_device *dev, u8 flags)
 432 {
 433         u8 gdrst;
 434
 435         /*
 436          * Set the domains we want to reset (GRDOM/bits 2 and 3) as
 437          * well as the reset bit (GR/bit 0).  Setting the GR bit
 438          * triggers the reset; when done, the hardware will clear it.
 439          */
 440         pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
 441         pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
 442
 443         return wait_for(i965_reset_complete(dev), 500);
 444 }
 445
 446 static int ironlake_do_reset(struct drm_device *dev, u8 flags)
 447 {
 448         struct drm_i915_private *dev_priv = dev->dev_private;
 449         u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
 450         I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1);
 451         return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
 452 }
 453
 454 static int gen6_do_reset(struct drm_device *dev, u8 flags)
 455 {
 456         struct drm_i915_private *dev_priv = dev->dev_private;
 457
 458         I915_WRITE(GEN6_GDRST, GEN6_GRDOM_FULL);
 459         return wait_for((I915_READ(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
 460 }
 461
 462 /**
 463  * i965_reset - reset chip after a hang
 464  * @dev: drm device to reset
 465  * @flags: reset domains
 466  *
 467  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 468  * reset or otherwise an error code.
 469  *
 470  * Procedure is fairly simple:
 471  *   - reset the chip using the reset reg
 472  *   - re-init context state
 473  *   - re-init hardware status page
 474  *   - re-init ring buffer
 475  *   - re-init interrupt state
 476  *   - re-init display
 477  */
 478 int i915_reset(struct drm_device *dev, u8 flags)
 479 {
 480         drm_i915_private_t *dev_priv = dev->dev_private;
 481         /*
 482          * We really should only reset the display subsystem if we actually
 483          * need to
 484          */
 485         bool need_display = true;
 486         int ret;
 487
 488         if (!i915_try_reset)
 489                 return 0;
 490
 491         if (!mutex_trylock(&dev->struct_mutex))
 492                 return -EBUSY;
 493
 494         i915_gem_reset(dev);
 495
 496         ret = -ENODEV;
 497         if (get_seconds() - dev_priv->last_gpu_reset < 5) {
 498                 DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
 499         } else switch (INTEL_INFO(dev)->gen) {
 500         case 6:
 501                 ret = gen6_do_reset(dev, flags);
 502                 break;
 503         case 5:
 504                 ret = ironlake_do_reset(dev, flags);
 505                 break;
 506         case 4:
 507                 ret = i965_do_reset(dev, flags);
 508                 break;
 509         case 2:
 510                 ret = i8xx_do_reset(dev, flags);
 511                 break;
 512         }
 513         dev_priv->last_gpu_reset = get_seconds();
 514         if (ret) {
 515                 DRM_ERROR("Failed to reset chip.\n");
 516                 mutex_unlock(&dev->struct_mutex);
 517                 return ret;
 518         }
 519
 520         /* Ok, now get things going again... */
 521
 522         /*
 523          * Everything depends on having the GTT running, so we need to start
 524          * there.  Fortunately we don't need to do this unless we reset the
 525          * chip at a PCI level.
 526          *
 527          * Next we need to restore the context, but we don't use those
 528          * yet either...
 529          *
 530          * Ring buffer needs to be re-initialized in the KMS case, or if X
 531          * was running at the time of the reset (i.e. we weren't VT
 532          * switched away).
 533          */
 534         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
 535                         !dev_priv->mm.suspended) {
 536                 dev_priv->mm.suspended = 0;
 537
 538                 dev_priv->ring[RCS].init(&dev_priv->ring[RCS]);
 539                 if (HAS_BSD(dev))
 540                     dev_priv->ring[VCS].init(&dev_priv->ring[VCS]);
 541                 if (HAS_BLT(dev))
 542                     dev_priv->ring[BCS].init(&dev_priv->ring[BCS]);
 543
 544                 mutex_unlock(&dev->struct_mutex);
 545                 drm_irq_uninstall(dev);
 546                 drm_mode_config_reset(dev);
 547                 drm_irq_install(dev);
 548                 mutex_lock(&dev->struct_mutex);
 549         }
 550
 551         mutex_unlock(&dev->struct_mutex);
 552
 553         /*
 554          * Perform a full modeset as on later generations, e.g. Ironlake, we may
 555          * need to retrain the display link and cannot just restore the register
 556          * values.
 557          */
 558         if (need_display) {
 559                 mutex_lock(&dev->mode_config.mutex);
 560                 drm_helper_resume_force_mode(dev);
 561                 mutex_unlock(&dev->mode_config.mutex);
 562         }
 563
 564         return 0;
 565 }
 566
 567
 568 static int __devinit
 569 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 570 {
 571         /* Only bind to function 0 of the device. Early generations
 572          * used function 1 as a placeholder for multi-head. This causes
 573          * us confusion instead, especially on the systems where both
 574          * functions have the same PCI-ID!
 575          */
 576         if (PCI_FUNC(pdev->devfn))
 577                 return -ENODEV;
 578
 579         return drm_get_pci_dev(pdev, ent, &driver);
 580 }
 581
 582 static void
 583 i915_pci_remove(struct pci_dev *pdev)
 584 {
 585         struct drm_device *dev = pci_get_drvdata(pdev);
 586
 587         drm_put_dev(dev);
 588 }
 589
 590 static int i915_pm_suspend(struct device *dev)
 591 {
 592         struct pci_dev *pdev = to_pci_dev(dev);
 593         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 594         int error;
 595
 596         if (!drm_dev || !drm_dev->dev_private) {
 597                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 598                 return -ENODEV;
 599         }
 600
 601         if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
 602                 return 0;
 603
 604         error = i915_drm_freeze(drm_dev);
 605         if (error)
 606                 return error;
 607
 608         pci_disable_device(pdev);
 609         pci_set_power_state(pdev, PCI_D3hot);
 610
 611         return 0;
 612 }
 613
 614 static int i915_pm_resume(struct device *dev)
 615 {
 616         struct pci_dev *pdev = to_pci_dev(dev);
 617         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 618
 619         return i915_resume(drm_dev);
 620 }
 621
 622 static int i915_pm_freeze(struct device *dev)
 623 {
 624         struct pci_dev *pdev = to_pci_dev(dev);
 625         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 626
 627         if (!drm_dev || !drm_dev->dev_private) {
 628                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 629                 return -ENODEV;
 630         }
 631
 632         return i915_drm_freeze(drm_dev);
 633 }
 634
 635 static int i915_pm_thaw(struct device *dev)
 636 {
 637         struct pci_dev *pdev = to_pci_dev(dev);
 638         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 639
 640         return i915_drm_thaw(drm_dev);
 641 }
 642
 643 static int i915_pm_poweroff(struct device *dev)
 644 {
 645         struct pci_dev *pdev = to_pci_dev(dev);
 646         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 647
 648         return i915_drm_freeze(drm_dev);
 649 }
 650
 651 static const struct dev_pm_ops i915_pm_ops = {
 652      .suspend = i915_pm_suspend,
 653      .resume = i915_pm_resume,
 654      .freeze = i915_pm_freeze,
 655      .thaw = i915_pm_thaw,
 656      .poweroff = i915_pm_poweroff,
 657      .restore = i915_pm_resume,
 658 };
 659
 660 static struct vm_operations_struct i915_gem_vm_ops = {
 661         .fault = i915_gem_fault,
 662         .open = drm_gem_vm_open,
 663         .close = drm_gem_vm_close,
 664 };
 665
 666 static struct drm_driver driver = {
 667         /* don't use mtrr's here, the Xserver or user space app should
 668          * deal with them for intel hardware.
 669          */
 670         .driver_features =
 671             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
 672             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 673         .load = i915_driver_load,
 674         .unload = i915_driver_unload,
 675         .open = i915_driver_open,
 676         .lastclose = i915_driver_lastclose,
 677         .preclose = i915_driver_preclose,
 678         .postclose = i915_driver_postclose,
 679
 680         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 681         .suspend = i915_suspend,
 682         .resume = i915_resume,
 683
 684         .device_is_agp = i915_driver_device_is_agp,
 685         .enable_vblank = i915_enable_vblank,
 686         .disable_vblank = i915_disable_vblank,
 687         .get_vblank_timestamp = i915_get_vblank_timestamp,
 688         .get_scanout_position = i915_get_crtc_scanoutpos,
 689         .irq_preinstall = i915_driver_irq_preinstall,
 690         .irq_postinstall = i915_driver_irq_postinstall,
 691         .irq_uninstall = i915_driver_irq_uninstall,
 692         .irq_handler = i915_driver_irq_handler,
 693         .reclaim_buffers = drm_core_reclaim_buffers,
 694         .master_create = i915_master_create,
 695         .master_destroy = i915_master_destroy,
 696 #if defined(CONFIG_DEBUG_FS)
 697         .debugfs_init = i915_debugfs_init,
 698         .debugfs_cleanup = i915_debugfs_cleanup,
 699 #endif
 700         .gem_init_object = i915_gem_init_object,
 701         .gem_free_object = i915_gem_free_object,
 702         .gem_vm_ops = &i915_gem_vm_ops,
 703         .ioctls = i915_ioctls,
 704         .fops = {
 705                  .owner = THIS_MODULE,
 706                  .open = drm_open,
 707                  .release = drm_release,
 708                  .unlocked_ioctl = drm_ioctl,
 709                  .mmap = drm_gem_mmap,
 710                  .poll = drm_poll,
 711                  .fasync = drm_fasync,
 712                  .read = drm_read,
 713 #ifdef CONFIG_COMPAT
 714                  .compat_ioctl = i915_compat_ioctl,
 715 #endif
 716                  .llseek = noop_llseek,
 717         },
 718
 719         .pci_driver = {
 720                  .name = DRIVER_NAME,
 721                  .id_table = pciidlist,
 722                  .probe = i915_pci_probe,
 723                  .remove = i915_pci_remove,
 724                  .driver.pm = &i915_pm_ops,
 725         },
 726
 727         .name = DRIVER_NAME,
 728         .desc = DRIVER_DESC,
 729         .date = DRIVER_DATE,
 730         .major = DRIVER_MAJOR,
 731         .minor = DRIVER_MINOR,
 732         .patchlevel = DRIVER_PATCHLEVEL,
 733 };
 734
 735 static int __init i915_init(void)
 736 {
 737         if (!intel_agp_enabled) {
 738                 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 739                 return -ENODEV;
 740         }
 741
 742         driver.num_ioctls = i915_max_ioctl;
 743
 744         /*
 745          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
 746          * explicitly disabled with the module pararmeter.
 747          *
 748          * Otherwise, just follow the parameter (defaulting to off).
 749          *
 750          * Allow optional vga_text_mode_force boot option to override
 751          * the default behavior.
 752          */
 753 #if defined(CONFIG_DRM_I915_KMS)
 754         if (i915_modeset != 0)
 755                 driver.driver_features |= DRIVER_MODESET;
 756 #endif
 757         if (i915_modeset == 1)
 758                 driver.driver_features |= DRIVER_MODESET;
 759
 760 #ifdef CONFIG_VGA_CONSOLE
 761         if (vgacon_text_force() && i915_modeset == -1)
 762                 driver.driver_features &= ~DRIVER_MODESET;
 763 #endif
 764
 765         if (!(driver.driver_features & DRIVER_MODESET))
 766                 driver.get_vblank_timestamp = NULL;
 767
 768         return drm_init(&driver);
 769 }
 770
 771 static void __exit i915_exit(void)
 772 {
 773         drm_exit(&driver);
 774 }
 775
 776 module_init(i915_init);
 777 module_exit(i915_exit);
 778
 779 MODULE_AUTHOR(DRIVER_AUTHOR);
 780 MODULE_DESCRIPTION(DRIVER_DESC);
 781 MODULE_LICENSE("GPL and additional rights");