drivers/gpu/drm/i915/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include <linux/device.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 #include <linux/console.h>
  37 #include "drm_crtc_helper.h"
  38
  39 static int i915_modeset = -1;
  40 module_param_named(modeset, i915_modeset, int, 0400);
  41
  42 unsigned int i915_fbpercrtc = 0;
  43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  44
  45 unsigned int i915_powersave = 1;
  46 module_param_named(powersave, i915_powersave, int, 0400);
  47
  48 unsigned int i915_lvds_downclock = 0;
  49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  50
  51 static struct drm_driver driver;
  52 extern int intel_agp_enabled;
  53
  54 #define INTEL_VGA_DEVICE(id, info) {            \
  55         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
  56         .class_mask = 0xffff00,                 \
  57         .vendor = 0x8086,                       \
  58         .device = id,                           \
  59         .subvendor = PCI_ANY_ID,                \
  60         .subdevice = PCI_ANY_ID,                \
  61         .driver_data = (unsigned long) info }
  62
  63 static const struct intel_device_info intel_i830_info = {
  64         .gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  65         .has_overlay = 1, .overlay_needs_physical = 1,
  66 };
  67
  68 static const struct intel_device_info intel_845g_info = {
  69         .gen = 2, .is_i8xx = 1,
  70         .has_overlay = 1, .overlay_needs_physical = 1,
  71 };
  72
  73 static const struct intel_device_info intel_i85x_info = {
  74         .gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
  75         .cursor_needs_physical = 1,
  76         .has_overlay = 1, .overlay_needs_physical = 1,
  77 };
  78
  79 static const struct intel_device_info intel_i865g_info = {
  80         .gen = 2, .is_i8xx = 1,
  81         .has_overlay = 1, .overlay_needs_physical = 1,
  82 };
  83
  84 static const struct intel_device_info intel_i915g_info = {
  85         .gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  86         .has_overlay = 1, .overlay_needs_physical = 1,
  87 };
  88 static const struct intel_device_info intel_i915gm_info = {
  89         .gen = 3, .is_i9xx = 1,  .is_mobile = 1,
  90         .cursor_needs_physical = 1,
  91         .has_overlay = 1, .overlay_needs_physical = 1,
  92 };
  93 static const struct intel_device_info intel_i945g_info = {
  94         .gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  95         .has_overlay = 1, .overlay_needs_physical = 1,
  96 };
  97 static const struct intel_device_info intel_i945gm_info = {
  98         .gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
  99         .has_hotplug = 1, .cursor_needs_physical = 1,
 100         .has_overlay = 1, .overlay_needs_physical = 1,
 101 };
 102
 103 static const struct intel_device_info intel_i965g_info = {
 104         .gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1,
 105         .has_hotplug = 1,
 106         .has_overlay = 1,
 107 };
 108
 109 static const struct intel_device_info intel_i965gm_info = {
 110         .gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
 111         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 112         .has_overlay = 1,
 113 };
 114
 115 static const struct intel_device_info intel_g33_info = {
 116         .gen = 3, .is_g33 = 1, .is_i9xx = 1,
 117         .need_gfx_hws = 1, .has_hotplug = 1,
 118         .has_overlay = 1,
 119 };
 120
 121 static const struct intel_device_info intel_g45_info = {
 122         .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 123         .has_pipe_cxsr = 1, .has_hotplug = 1,
 124 };
 125
 126 static const struct intel_device_info intel_gm45_info = {
 127         .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1,
 128         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
 129         .has_pipe_cxsr = 1, .has_hotplug = 1,
 130 };
 131
 132 static const struct intel_device_info intel_pineview_info = {
 133         .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
 134         .need_gfx_hws = 1, .has_hotplug = 1,
 135         .has_overlay = 1,
 136 };
 137
 138 static const struct intel_device_info intel_ironlake_d_info = {
 139         .gen = 5, .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1,
 140         .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
 141 };
 142
 143 static const struct intel_device_info intel_ironlake_m_info = {
 144         .gen = 5, .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
 145         .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 146 };
 147
 148 static const struct intel_device_info intel_sandybridge_d_info = {
 149         .gen = 6, .is_i965g = 1, .is_i9xx = 1,
 150         .need_gfx_hws = 1, .has_hotplug = 1,
 151 };
 152
 153 static const struct intel_device_info intel_sandybridge_m_info = {
 154         .gen = 6, .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1,
 155         .need_gfx_hws = 1, .has_hotplug = 1,
 156 };
 157
 158 static const struct pci_device_id pciidlist[] = {               /* aka */
 159         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),             /* I830_M */
 160         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),             /* 845_G */
 161         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),             /* I855_GM */
 162         INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
 163         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),            /* I865_G */
 164         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),            /* I915_G */
 165         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),            /* E7221_G */
 166         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),           /* I915_GM */
 167         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),            /* I945_G */
 168         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),           /* I945_GM */
 169         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),           /* I945_GME */
 170         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),            /* I946_GZ */
 171         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),            /* G35_G */
 172         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),            /* I965_Q */
 173         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),            /* I965_G */
 174         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),              /* Q35_G */
 175         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),              /* G33_G */
 176         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),              /* Q33_G */
 177         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),           /* I965_GM */
 178         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),           /* I965_GME */
 179         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),             /* GM45_G */
 180         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),              /* IGD_E_G */
 181         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),              /* Q45_G */
 182         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),              /* G45_G */
 183         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),              /* G41_G */
 184         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),              /* B43_G */
 185         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
 186         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
 187         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
 188         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
 189         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
 190         INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
 191         INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
 192         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
 193         INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
 194         INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
 195         INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
 196         {0, 0, 0}
 197 };
 198
 199 #if defined(CONFIG_DRM_I915_KMS)
 200 MODULE_DEVICE_TABLE(pci, pciidlist);
 201 #endif
 202
 203 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
 204 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 205
 206 void intel_detect_pch (struct drm_device *dev)
 207 {
 208         struct drm_i915_private *dev_priv = dev->dev_private;
 209         struct pci_dev *pch;
 210
 211         /*
 212          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 213          * make graphics device passthrough work easy for VMM, that only
 214          * need to expose ISA bridge to let driver know the real hardware
 215          * underneath. This is a requirement from virtualization team.
 216          */
 217         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
 218         if (pch) {
 219                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
 220                         int id;
 221                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 222
 223                         if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 224                                 dev_priv->pch_type = PCH_CPT;
 225                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 226                         }
 227                 }
 228                 pci_dev_put(pch);
 229         }
 230 }
 231
 232 static int i915_drm_freeze(struct drm_device *dev)
 233 {
 234         struct drm_i915_private *dev_priv = dev->dev_private;
 235
 236         pci_save_state(dev->pdev);
 237
 238         /* If KMS is active, we do the leavevt stuff here */
 239         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 240                 int error = i915_gem_idle(dev);
 241                 if (error) {
 242                         dev_err(&dev->pdev->dev,
 243                                 "GEM idle failed, resume might fail\n");
 244                         return error;
 245                 }
 246                 drm_irq_uninstall(dev);
 247         }
 248
 249         i915_save_state(dev);
 250
 251         intel_opregion_fini(dev);
 252
 253         /* Modeset on resume, not lid events */
 254         dev_priv->modeset_on_lid = 0;
 255
 256         return 0;
 257 }
 258
 259 int i915_suspend(struct drm_device *dev, pm_message_t state)
 260 {
 261         int error;
 262
 263         if (!dev || !dev->dev_private) {
 264                 DRM_ERROR("dev: %p\n", dev);
 265                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
 266                 return -ENODEV;
 267         }
 268
 269         if (state.event == PM_EVENT_PRETHAW)
 270                 return 0;
 271
 272         error = i915_drm_freeze(dev);
 273         if (error)
 274                 return error;
 275
 276         if (state.event == PM_EVENT_SUSPEND) {
 277                 /* Shut down the device */
 278                 pci_disable_device(dev->pdev);
 279                 pci_set_power_state(dev->pdev, PCI_D3hot);
 280         }
 281
 282         return 0;
 283 }
 284
 285 static int i915_drm_thaw(struct drm_device *dev)
 286 {
 287         struct drm_i915_private *dev_priv = dev->dev_private;
 288         int error = 0;
 289
 290         i915_restore_state(dev);
 291         intel_opregion_setup(dev);
 292
 293         /* KMS EnterVT equivalent */
 294         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 295                 mutex_lock(&dev->struct_mutex);
 296                 dev_priv->mm.suspended = 0;
 297
 298                 error = i915_gem_init_ringbuffer(dev);
 299                 mutex_unlock(&dev->struct_mutex);
 300
 301                 drm_irq_install(dev);
 302
 303                 /* Resume the modeset for every activated CRTC */
 304                 drm_helper_resume_force_mode(dev);
 305         }
 306
 307         intel_opregion_init(dev);
 308
 309         dev_priv->modeset_on_lid = 0;
 310
 311         return error;
 312 }
 313
 314 int i915_resume(struct drm_device *dev)
 315 {
 316         if (pci_enable_device(dev->pdev))
 317                 return -EIO;
 318
 319         pci_set_master(dev->pdev);
 320
 321         return i915_drm_thaw(dev);
 322 }
 323
 324 /**
 325  * i965_reset - reset chip after a hang
 326  * @dev: drm device to reset
 327  * @flags: reset domains
 328  *
 329  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 330  * reset or otherwise an error code.
 331  *
 332  * Procedure is fairly simple:
 333  *   - reset the chip using the reset reg
 334  *   - re-init context state
 335  *   - re-init hardware status page
 336  *   - re-init ring buffer
 337  *   - re-init interrupt state
 338  *   - re-init display
 339  */
 340 int i965_reset(struct drm_device *dev, u8 flags)
 341 {
 342         drm_i915_private_t *dev_priv = dev->dev_private;
 343         unsigned long timeout;
 344         u8 gdrst;
 345         /*
 346          * We really should only reset the display subsystem if we actually
 347          * need to
 348          */
 349         bool need_display = true;
 350
 351         mutex_lock(&dev->struct_mutex);
 352
 353         /*
 354          * Clear request list
 355          */
 356         i915_gem_retire_requests(dev);
 357
 358         if (need_display)
 359                 i915_save_display(dev);
 360
 361         if (IS_I965G(dev) || IS_G4X(dev)) {
 362                 /*
 363                  * Set the domains we want to reset, then the reset bit (bit 0).
 364                  * Clear the reset bit after a while and wait for hardware status
 365                  * bit (bit 1) to be set
 366                  */
 367                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 368                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
 369                 udelay(50);
 370                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
 371
 372                 /* ...we don't want to loop forever though, 500ms should be plenty */
 373                timeout = jiffies + msecs_to_jiffies(500);
 374                 do {
 375                         udelay(100);
 376                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 377                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
 378
 379                 if (gdrst & 0x1) {
 380                         WARN(true, "i915: Failed to reset chip\n");
 381                         mutex_unlock(&dev->struct_mutex);
 382                         return -EIO;
 383                 }
 384         } else {
 385                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
 386                 mutex_unlock(&dev->struct_mutex);
 387                 return -ENODEV;
 388         }
 389
 390         /* Ok, now get things going again... */
 391
 392         /*
 393          * Everything depends on having the GTT running, so we need to start
 394          * there.  Fortunately we don't need to do this unless we reset the
 395          * chip at a PCI level.
 396          *
 397          * Next we need to restore the context, but we don't use those
 398          * yet either...
 399          *
 400          * Ring buffer needs to be re-initialized in the KMS case, or if X
 401          * was running at the time of the reset (i.e. we weren't VT
 402          * switched away).
 403          */
 404         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
 405                         !dev_priv->mm.suspended) {
 406                 struct intel_ring_buffer *ring = &dev_priv->render_ring;
 407                 dev_priv->mm.suspended = 0;
 408                 ring->init(dev, ring);
 409                 mutex_unlock(&dev->struct_mutex);
 410                 drm_irq_uninstall(dev);
 411                 drm_irq_install(dev);
 412                 mutex_lock(&dev->struct_mutex);
 413         }
 414
 415         /*
 416          * Display needs restore too...
 417          */
 418         if (need_display)
 419                 i915_restore_display(dev);
 420
 421         mutex_unlock(&dev->struct_mutex);
 422         return 0;
 423 }
 424
 425
 426 static int __devinit
 427 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 428 {
 429         return drm_get_pci_dev(pdev, ent, &driver);
 430 }
 431
 432 static void
 433 i915_pci_remove(struct pci_dev *pdev)
 434 {
 435         struct drm_device *dev = pci_get_drvdata(pdev);
 436
 437         drm_put_dev(dev);
 438 }
 439
 440 static int i915_pm_suspend(struct device *dev)
 441 {
 442         struct pci_dev *pdev = to_pci_dev(dev);
 443         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 444         int error;
 445
 446         if (!drm_dev || !drm_dev->dev_private) {
 447                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 448                 return -ENODEV;
 449         }
 450
 451         error = i915_drm_freeze(drm_dev);
 452         if (error)
 453                 return error;
 454
 455         pci_disable_device(pdev);
 456         pci_set_power_state(pdev, PCI_D3hot);
 457
 458         return 0;
 459 }
 460
 461 static int i915_pm_resume(struct device *dev)
 462 {
 463         struct pci_dev *pdev = to_pci_dev(dev);
 464         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 465
 466         return i915_resume(drm_dev);
 467 }
 468
 469 static int i915_pm_freeze(struct device *dev)
 470 {
 471         struct pci_dev *pdev = to_pci_dev(dev);
 472         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 473
 474         if (!drm_dev || !drm_dev->dev_private) {
 475                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 476                 return -ENODEV;
 477         }
 478
 479         return i915_drm_freeze(drm_dev);
 480 }
 481
 482 static int i915_pm_thaw(struct device *dev)
 483 {
 484         struct pci_dev *pdev = to_pci_dev(dev);
 485         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 486
 487         return i915_drm_thaw(drm_dev);
 488 }
 489
 490 static int i915_pm_poweroff(struct device *dev)
 491 {
 492         struct pci_dev *pdev = to_pci_dev(dev);
 493         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 494
 495         return i915_drm_freeze(drm_dev);
 496 }
 497
 498 static const struct dev_pm_ops i915_pm_ops = {
 499      .suspend = i915_pm_suspend,
 500      .resume = i915_pm_resume,
 501      .freeze = i915_pm_freeze,
 502      .thaw = i915_pm_thaw,
 503      .poweroff = i915_pm_poweroff,
 504      .restore = i915_pm_resume,
 505 };
 506
 507 static struct vm_operations_struct i915_gem_vm_ops = {
 508         .fault = i915_gem_fault,
 509         .open = drm_gem_vm_open,
 510         .close = drm_gem_vm_close,
 511 };
 512
 513 static struct drm_driver driver = {
 514         /* don't use mtrr's here, the Xserver or user space app should
 515          * deal with them for intel hardware.
 516          */
 517         .driver_features =
 518             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
 519             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 520         .load = i915_driver_load,
 521         .unload = i915_driver_unload,
 522         .open = i915_driver_open,
 523         .lastclose = i915_driver_lastclose,
 524         .preclose = i915_driver_preclose,
 525         .postclose = i915_driver_postclose,
 526
 527         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 528         .suspend = i915_suspend,
 529         .resume = i915_resume,
 530
 531         .device_is_agp = i915_driver_device_is_agp,
 532         .enable_vblank = i915_enable_vblank,
 533         .disable_vblank = i915_disable_vblank,
 534         .irq_preinstall = i915_driver_irq_preinstall,
 535         .irq_postinstall = i915_driver_irq_postinstall,
 536         .irq_uninstall = i915_driver_irq_uninstall,
 537         .irq_handler = i915_driver_irq_handler,
 538         .reclaim_buffers = drm_core_reclaim_buffers,
 539         .master_create = i915_master_create,
 540         .master_destroy = i915_master_destroy,
 541 #if defined(CONFIG_DEBUG_FS)
 542         .debugfs_init = i915_debugfs_init,
 543         .debugfs_cleanup = i915_debugfs_cleanup,
 544 #endif
 545         .gem_init_object = i915_gem_init_object,
 546         .gem_free_object = i915_gem_free_object,
 547         .gem_vm_ops = &i915_gem_vm_ops,
 548         .ioctls = i915_ioctls,
 549         .fops = {
 550                  .owner = THIS_MODULE,
 551                  .open = drm_open,
 552                  .release = drm_release,
 553                  .unlocked_ioctl = drm_ioctl,
 554                  .mmap = drm_gem_mmap,
 555                  .poll = drm_poll,
 556                  .fasync = drm_fasync,
 557                  .read = drm_read,
 558 #ifdef CONFIG_COMPAT
 559                  .compat_ioctl = i915_compat_ioctl,
 560 #endif
 561         },
 562
 563         .pci_driver = {
 564                  .name = DRIVER_NAME,
 565                  .id_table = pciidlist,
 566                  .probe = i915_pci_probe,
 567                  .remove = i915_pci_remove,
 568                  .driver.pm = &i915_pm_ops,
 569         },
 570
 571         .name = DRIVER_NAME,
 572         .desc = DRIVER_DESC,
 573         .date = DRIVER_DATE,
 574         .major = DRIVER_MAJOR,
 575         .minor = DRIVER_MINOR,
 576         .patchlevel = DRIVER_PATCHLEVEL,
 577 };
 578
 579 static int __init i915_init(void)
 580 {
 581         if (!intel_agp_enabled) {
 582                 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 583                 return -ENODEV;
 584         }
 585
 586         driver.num_ioctls = i915_max_ioctl;
 587
 588         i915_gem_shrinker_init();
 589
 590         /*
 591          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
 592          * explicitly disabled with the module pararmeter.
 593          *
 594          * Otherwise, just follow the parameter (defaulting to off).
 595          *
 596          * Allow optional vga_text_mode_force boot option to override
 597          * the default behavior.
 598          */
 599 #if defined(CONFIG_DRM_I915_KMS)
 600         if (i915_modeset != 0)
 601                 driver.driver_features |= DRIVER_MODESET;
 602 #endif
 603         if (i915_modeset == 1)
 604                 driver.driver_features |= DRIVER_MODESET;
 605
 606 #ifdef CONFIG_VGA_CONSOLE
 607         if (vgacon_text_force() && i915_modeset == -1)
 608                 driver.driver_features &= ~DRIVER_MODESET;
 609 #endif
 610
 611         if (!(driver.driver_features & DRIVER_MODESET)) {
 612                 driver.suspend = i915_suspend;
 613                 driver.resume = i915_resume;
 614         }
 615
 616         return drm_init(&driver);
 617 }
 618
 619 static void __exit i915_exit(void)
 620 {
 621         i915_gem_shrinker_exit();
 622         drm_exit(&driver);
 623 }
 624
 625 module_init(i915_init);
 626 module_exit(i915_exit);
 627
 628 MODULE_AUTHOR(DRIVER_AUTHOR);
 629 MODULE_DESCRIPTION(DRIVER_DESC);
 630 MODULE_LICENSE("GPL and additional rights");