drivers/char/drm/i830_dma.c

   1 /* i830_dma.c -- DMA support for the I830 -*- linux-c -*-
   2  * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
   3  *
   4  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
  28  *          Jeff Hartmann <jhartmann@valinux.com>
  29  *          Keith Whitwell <keith@tungstengraphics.com>
  30  *          Abraham vd Merwe <abraham@2d3d.co.za>
  31  *
  32  */
  33
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "i830_drm.h"
  37 #include "i830_drv.h"
  38 #include <linux/interrupt.h>    /* For task queue support */
  39 #include <linux/pagemap.h>      /* For FASTCALL on unlock_page() */
  40 #include <linux/delay.h>
  41 #include <asm/uaccess.h>
  42
  43 #define I830_BUF_FREE           2
  44 #define I830_BUF_CLIENT         1
  45 #define I830_BUF_HARDWARE       0
  46
  47 #define I830_BUF_UNMAPPED 0
  48 #define I830_BUF_MAPPED   1
  49
  50 static drm_buf_t *i830_freelist_get(drm_device_t *dev)
  51 {
  52         drm_device_dma_t *dma = dev->dma;
  53         int              i;
  54         int              used;
  55
  56         /* Linear search might not be the best solution */
  57
  58         for (i = 0; i < dma->buf_count; i++) {
  59                 drm_buf_t *buf = dma->buflist[ i ];
  60                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  61                 /* In use is already a pointer */
  62                 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
  63                                I830_BUF_CLIENT);
  64                 if(used == I830_BUF_FREE) {
  65                         return buf;
  66                 }
  67         }
  68         return NULL;
  69 }
  70
  71 /* This should only be called if the buffer is not sent to the hardware
  72  * yet, the hardware updates in use for us once its on the ring buffer.
  73  */
  74
  75 static int i830_freelist_put(drm_device_t *dev, drm_buf_t *buf)
  76 {
  77         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
  78         int used;
  79
  80         /* In use is already a pointer */
  81         used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, I830_BUF_FREE);
  82         if(used != I830_BUF_CLIENT) {
  83                 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
  84                 return -EINVAL;
  85         }
  86
  87         return 0;
  88 }
  89
  90 static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
  91 {
  92         drm_file_t          *priv         = filp->private_data;
  93         drm_device_t        *dev;
  94         drm_i830_private_t  *dev_priv;
  95         drm_buf_t           *buf;
  96         drm_i830_buf_priv_t *buf_priv;
  97
  98         lock_kernel();
  99         dev      = priv->head->dev;
 100         dev_priv = dev->dev_private;
 101         buf      = dev_priv->mmap_buffer;
 102         buf_priv = buf->dev_private;
 103
 104         vma->vm_flags |= (VM_IO | VM_DONTCOPY);
 105         vma->vm_file = filp;
 106
 107         buf_priv->currently_mapped = I830_BUF_MAPPED;
 108         unlock_kernel();
 109
 110         if (io_remap_pfn_range(vma, vma->vm_start,
 111                              VM_OFFSET(vma) >> PAGE_SHIFT,
 112                              vma->vm_end - vma->vm_start,
 113                              vma->vm_page_prot)) return -EAGAIN;
 114         return 0;
 115 }
 116
 117 static struct file_operations i830_buffer_fops = {
 118         .open    = drm_open,
 119         .flush   = drm_flush,
 120         .release = drm_release,
 121         .ioctl   = drm_ioctl,
 122         .mmap    = i830_mmap_buffers,
 123         .fasync  = drm_fasync,
 124 };
 125
 126 static int i830_map_buffer(drm_buf_t *buf, struct file *filp)
 127 {
 128         drm_file_t        *priv   = filp->private_data;
 129         drm_device_t      *dev    = priv->head->dev;
 130         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 131         drm_i830_private_t *dev_priv = dev->dev_private;
 132         struct file_operations *old_fops;
 133         unsigned long virtual;
 134         int retcode = 0;
 135
 136         if(buf_priv->currently_mapped == I830_BUF_MAPPED) return -EINVAL;
 137
 138         down_write( &current->mm->mmap_sem );
 139         old_fops = filp->f_op;
 140         filp->f_op = &i830_buffer_fops;
 141         dev_priv->mmap_buffer = buf;
 142         virtual = do_mmap(filp, 0, buf->total, PROT_READ|PROT_WRITE,
 143                             MAP_SHARED, buf->bus_address);
 144         dev_priv->mmap_buffer = NULL;
 145         filp->f_op = old_fops;
 146         if (IS_ERR((void *)virtual)) {          /* ugh */
 147                 /* Real error */
 148                 DRM_ERROR("mmap error\n");
 149                 retcode = virtual;
 150                 buf_priv->virtual = NULL;
 151         } else {
 152                 buf_priv->virtual = (void __user *)virtual;
 153         }
 154         up_write( &current->mm->mmap_sem );
 155
 156         return retcode;
 157 }
 158
 159 static int i830_unmap_buffer(drm_buf_t *buf)
 160 {
 161         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 162         int retcode = 0;
 163
 164         if(buf_priv->currently_mapped != I830_BUF_MAPPED)
 165                 return -EINVAL;
 166
 167         down_write(&current->mm->mmap_sem);
 168         retcode = do_munmap(current->mm,
 169                             (unsigned long)buf_priv->virtual,
 170                             (size_t) buf->total);
 171         up_write(&current->mm->mmap_sem);
 172
 173         buf_priv->currently_mapped = I830_BUF_UNMAPPED;
 174         buf_priv->virtual = NULL;
 175
 176         return retcode;
 177 }
 178
 179 static int i830_dma_get_buffer(drm_device_t *dev, drm_i830_dma_t *d,
 180                                struct file *filp)
 181 {
 182         drm_buf_t         *buf;
 183         drm_i830_buf_priv_t *buf_priv;
 184         int retcode = 0;
 185
 186         buf = i830_freelist_get(dev);
 187         if (!buf) {
 188                 retcode = -ENOMEM;
 189                 DRM_DEBUG("retcode=%d\n", retcode);
 190                 return retcode;
 191         }
 192
 193         retcode = i830_map_buffer(buf, filp);
 194         if(retcode) {
 195                 i830_freelist_put(dev, buf);
 196                 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
 197                 return retcode;
 198         }
 199         buf->filp = filp;
 200         buf_priv = buf->dev_private;
 201         d->granted = 1;
 202         d->request_idx = buf->idx;
 203         d->request_size = buf->total;
 204         d->virtual = buf_priv->virtual;
 205
 206         return retcode;
 207 }
 208
 209 static int i830_dma_cleanup(drm_device_t *dev)
 210 {
 211         drm_device_dma_t *dma = dev->dma;
 212
 213         /* Make sure interrupts are disabled here because the uninstall ioctl
 214          * may not have been called from userspace and after dev_private
 215          * is freed, it's too late.
 216          */
 217         if ( dev->irq_enabled ) drm_irq_uninstall(dev);
 218
 219         if (dev->dev_private) {
 220                 int i;
 221                 drm_i830_private_t *dev_priv =
 222                         (drm_i830_private_t *) dev->dev_private;
 223
 224                 if (dev_priv->ring.virtual_start) {
 225                         drm_ioremapfree((void *) dev_priv->ring.virtual_start,
 226                                          dev_priv->ring.Size, dev);
 227                 }
 228                 if (dev_priv->hw_status_page) {
 229                         pci_free_consistent(dev->pdev, PAGE_SIZE,
 230                                             dev_priv->hw_status_page,
 231                                             dev_priv->dma_status_page);
 232                         /* Need to rewrite hardware status page */
 233                         I830_WRITE(0x02080, 0x1ffff000);
 234                 }
 235
 236                 drm_free(dev->dev_private, sizeof(drm_i830_private_t),
 237                          DRM_MEM_DRIVER);
 238                 dev->dev_private = NULL;
 239
 240                 for (i = 0; i < dma->buf_count; i++) {
 241                         drm_buf_t *buf = dma->buflist[ i ];
 242                         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 243                         if ( buf_priv->kernel_virtual && buf->total )
 244                                 drm_ioremapfree(buf_priv->kernel_virtual, buf->total, dev);
 245                 }
 246         }
 247         return 0;
 248 }
 249
 250 int i830_wait_ring(drm_device_t *dev, int n, const char *caller)
 251 {
 252         drm_i830_private_t *dev_priv = dev->dev_private;
 253         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 254         int iters = 0;
 255         unsigned long end;
 256         unsigned int last_head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 257
 258         end = jiffies + (HZ*3);
 259         while (ring->space < n) {
 260                 ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 261                 ring->space = ring->head - (ring->tail+8);
 262                 if (ring->space < 0) ring->space += ring->Size;
 263
 264                 if (ring->head != last_head) {
 265                         end = jiffies + (HZ*3);
 266                         last_head = ring->head;
 267                 }
 268
 269                 iters++;
 270                 if(time_before(end, jiffies)) {
 271                         DRM_ERROR("space: %d wanted %d\n", ring->space, n);
 272                         DRM_ERROR("lockup\n");
 273                         goto out_wait_ring;
 274                 }
 275                 udelay(1);
 276                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
 277         }
 278
 279 out_wait_ring:
 280         return iters;
 281 }
 282
 283 static void i830_kernel_lost_context(drm_device_t *dev)
 284 {
 285         drm_i830_private_t *dev_priv = dev->dev_private;
 286         drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
 287
 288         ring->head = I830_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
 289         ring->tail = I830_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
 290         ring->space = ring->head - (ring->tail+8);
 291         if (ring->space < 0) ring->space += ring->Size;
 292
 293         if (ring->head == ring->tail)
 294                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
 295 }
 296
 297 static int i830_freelist_init(drm_device_t *dev, drm_i830_private_t *dev_priv)
 298 {
 299         drm_device_dma_t *dma = dev->dma;
 300         int my_idx = 36;
 301         u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx);
 302         int i;
 303
 304         if(dma->buf_count > 1019) {
 305                 /* Not enough space in the status page for the freelist */
 306                 return -EINVAL;
 307         }
 308
 309         for (i = 0; i < dma->buf_count; i++) {
 310                 drm_buf_t *buf = dma->buflist[ i ];
 311                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
 312
 313                 buf_priv->in_use = hw_status++;
 314                 buf_priv->my_use_idx = my_idx;
 315                 my_idx += 4;
 316
 317                 *buf_priv->in_use = I830_BUF_FREE;
 318
 319                 buf_priv->kernel_virtual = drm_ioremap(buf->bus_address,
 320                                                         buf->total, dev);
 321         }
 322         return 0;
 323 }
 324
 325 static int i830_dma_initialize(drm_device_t *dev,
 326                                drm_i830_private_t *dev_priv,
 327                                drm_i830_init_t *init)
 328 {
 329         struct list_head *list;
 330
 331         memset(dev_priv, 0, sizeof(drm_i830_private_t));
 332
 333         list_for_each(list, &dev->maplist->head) {
 334                 drm_map_list_t *r_list = list_entry(list, drm_map_list_t, head);
 335                 if( r_list->map &&
 336                     r_list->map->type == _DRM_SHM &&
 337                     r_list->map->flags & _DRM_CONTAINS_LOCK ) {
 338                         dev_priv->sarea_map = r_list->map;
 339                         break;
 340                 }
 341         }
 342
 343         if(!dev_priv->sarea_map) {
 344                 dev->dev_private = (void *)dev_priv;
 345                 i830_dma_cleanup(dev);
 346                 DRM_ERROR("can not find sarea!\n");
 347                 return -EINVAL;
 348         }
 349         dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
 350         if(!dev_priv->mmio_map) {
 351                 dev->dev_private = (void *)dev_priv;
 352                 i830_dma_cleanup(dev);
 353                 DRM_ERROR("can not find mmio map!\n");
 354                 return -EINVAL;
 355         }
 356         dev->agp_buffer_token = init->buffers_offset;
 357         dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
 358         if(!dev->agp_buffer_map) {
 359                 dev->dev_private = (void *)dev_priv;
 360                 i830_dma_cleanup(dev);
 361                 DRM_ERROR("can not find dma buffer map!\n");
 362                 return -EINVAL;
 363         }
 364
 365         dev_priv->sarea_priv = (drm_i830_sarea_t *)
 366                 ((u8 *)dev_priv->sarea_map->handle +
 367                  init->sarea_priv_offset);
 368
 369         dev_priv->ring.Start = init->ring_start;
 370         dev_priv->ring.End = init->ring_end;
 371         dev_priv->ring.Size = init->ring_size;
 372
 373         dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base +
 374                                                     init->ring_start,
 375                                                     init->ring_size, dev);
 376
 377         if (dev_priv->ring.virtual_start == NULL) {
 378                 dev->dev_private = (void *) dev_priv;
 379                 i830_dma_cleanup(dev);
 380                 DRM_ERROR("can not ioremap virtual address for"
 381                           " ring buffer\n");
 382                 return -ENOMEM;
 383         }
 384
 385         dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
 386
 387         dev_priv->w = init->w;
 388         dev_priv->h = init->h;
 389         dev_priv->pitch = init->pitch;
 390         dev_priv->back_offset = init->back_offset;
 391         dev_priv->depth_offset = init->depth_offset;
 392         dev_priv->front_offset = init->front_offset;
 393
 394         dev_priv->front_di1 = init->front_offset | init->pitch_bits;
 395         dev_priv->back_di1 = init->back_offset | init->pitch_bits;
 396         dev_priv->zi1 = init->depth_offset | init->pitch_bits;
 397
 398         DRM_DEBUG("front_di1 %x\n",    dev_priv->front_di1);
 399         DRM_DEBUG("back_offset %x\n", dev_priv->back_offset);
 400         DRM_DEBUG("back_di1 %x\n",    dev_priv->back_di1);
 401         DRM_DEBUG("pitch_bits %x\n",    init->pitch_bits);
 402
 403         dev_priv->cpp = init->cpp;
 404         /* We are using separate values as placeholders for mechanisms for
 405          * private backbuffer/depthbuffer usage.
 406          */
 407
 408         dev_priv->back_pitch = init->back_pitch;
 409         dev_priv->depth_pitch = init->depth_pitch;
 410         dev_priv->do_boxes = 0;
 411         dev_priv->use_mi_batchbuffer_start = 0;
 412
 413         /* Program Hardware Status Page */
 414         dev_priv->hw_status_page =
 415                 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
 416                                                 &dev_priv->dma_status_page);
 417         if (!dev_priv->hw_status_page) {
 418                 dev->dev_private = (void *)dev_priv;
 419                 i830_dma_cleanup(dev);
 420                 DRM_ERROR("Can not allocate hardware status page\n");
 421                 return -ENOMEM;
 422         }
 423         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 424         DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
 425
 426         I830_WRITE(0x02080, dev_priv->dma_status_page);
 427         DRM_DEBUG("Enabled hardware status page\n");
 428
 429         /* Now we need to init our freelist */
 430         if(i830_freelist_init(dev, dev_priv) != 0) {
 431                 dev->dev_private = (void *)dev_priv;
 432                 i830_dma_cleanup(dev);
 433                 DRM_ERROR("Not enough space in the status page for"
 434                           " the freelist\n");
 435                 return -ENOMEM;
 436         }
 437         dev->dev_private = (void *)dev_priv;
 438
 439         return 0;
 440 }
 441
 442 static int i830_dma_init(struct inode *inode, struct file *filp,
 443                   unsigned int cmd, unsigned long arg)
 444 {
 445         drm_file_t *priv = filp->private_data;
 446         drm_device_t *dev = priv->head->dev;
 447         drm_i830_private_t *dev_priv;
 448         drm_i830_init_t init;
 449         int retcode = 0;
 450
 451         if (copy_from_user(&init, (void * __user) arg, sizeof(init)))
 452                 return -EFAULT;
 453
 454         switch(init.func) {
 455                 case I830_INIT_DMA:
 456                         dev_priv = drm_alloc(sizeof(drm_i830_private_t),
 457                                               DRM_MEM_DRIVER);
 458                         if(dev_priv == NULL) return -ENOMEM;
 459                         retcode = i830_dma_initialize(dev, dev_priv, &init);
 460                 break;
 461                 case I830_CLEANUP_DMA:
 462                         retcode = i830_dma_cleanup(dev);
 463                 break;
 464                 default:
 465                         retcode = -EINVAL;
 466                 break;
 467         }
 468
 469         return retcode;
 470 }
 471
 472 #define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
 473 #define ST1_ENABLE               (1<<16)
 474 #define ST1_MASK                 (0xffff)
 475
 476 /* Most efficient way to verify state for the i830 is as it is
 477  * emitted.  Non-conformant state is silently dropped.
 478  */
 479 static void i830EmitContextVerified( drm_device_t *dev,
 480                                      unsigned int *code )
 481 {
 482         drm_i830_private_t *dev_priv = dev->dev_private;
 483         int i, j = 0;
 484         unsigned int tmp;
 485         RING_LOCALS;
 486
 487         BEGIN_LP_RING( I830_CTX_SETUP_SIZE + 4 );
 488
 489         for ( i = 0 ; i < I830_CTXREG_BLENDCOLR0 ; i++ ) {
 490                 tmp = code[i];
 491                 if ((tmp & (7<<29)) == CMD_3D &&
 492                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 493                         OUT_RING( tmp );
 494                         j++;
 495                 } else {
 496                         DRM_ERROR("Skipping %d\n", i);
 497                 }
 498         }
 499
 500         OUT_RING( STATE3D_CONST_BLEND_COLOR_CMD );
 501         OUT_RING( code[I830_CTXREG_BLENDCOLR] );
 502         j += 2;
 503
 504         for ( i = I830_CTXREG_VF ; i < I830_CTXREG_MCSB0 ; i++ ) {
 505                 tmp = code[i];
 506                 if ((tmp & (7<<29)) == CMD_3D &&
 507                     (tmp & (0x1f<<24)) < (0x1d<<24)) {
 508                         OUT_RING( tmp );
 509                         j++;
 510                 } else {
 511                         DRM_ERROR("Skipping %d\n", i);
 512                 }
 513         }
 514
 515         OUT_RING( STATE3D_MAP_COORD_SETBIND_CMD );
 516         OUT_RING( code[I830_CTXREG_MCSB1] );
 517         j += 2;
 518
 519         if (j & 1)
 520                 OUT_RING( 0 );
 521
 522         ADVANCE_LP_RING();
 523 }
 524
 525 static void i830EmitTexVerified( drm_device_t *dev, unsigned int *code )
 526 {
 527         drm_i830_private_t *dev_priv = dev->dev_private;
 528         int i, j = 0;
 529         unsigned int tmp;
 530         RING_LOCALS;
 531
 532         if (code[I830_TEXREG_MI0] == GFX_OP_MAP_INFO ||
 533             (code[I830_TEXREG_MI0] & ~(0xf*LOAD_TEXTURE_MAP0)) ==
 534             (STATE3D_LOAD_STATE_IMMEDIATE_2|4)) {
 535
 536                 BEGIN_LP_RING( I830_TEX_SETUP_SIZE );
 537
 538                 OUT_RING( code[I830_TEXREG_MI0] ); /* TM0LI */
 539                 OUT_RING( code[I830_TEXREG_MI1] ); /* TM0S0 */
 540                 OUT_RING( code[I830_TEXREG_MI2] ); /* TM0S1 */
 541                 OUT_RING( code[I830_TEXREG_MI3] ); /* TM0S2 */
 542                 OUT_RING( code[I830_TEXREG_MI4] ); /* TM0S3 */
 543                 OUT_RING( code[I830_TEXREG_MI5] ); /* TM0S4 */
 544
 545                 for ( i = 6 ; i < I830_TEX_SETUP_SIZE ; i++ ) {
 546                         tmp = code[i];
 547                         OUT_RING( tmp );
 548                         j++;
 549                 }
 550
 551                 if (j & 1)
 552                         OUT_RING( 0 );
 553
 554                 ADVANCE_LP_RING();
 555         }
 556         else
 557                 printk("rejected packet %x\n", code[0]);
 558 }
 559
 560 static void i830EmitTexBlendVerified( drm_device_t *dev,
 561                                       unsigned int *code,
 562                                       unsigned int num)
 563 {
 564         drm_i830_private_t *dev_priv = dev->dev_private;
 565         int i, j = 0;
 566         unsigned int tmp;
 567         RING_LOCALS;
 568
 569         if (!num)
 570                 return;
 571
 572         BEGIN_LP_RING( num + 1 );
 573
 574         for ( i = 0 ; i < num ; i++ ) {
 575                 tmp = code[i];
 576                 OUT_RING( tmp );
 577                 j++;
 578         }
 579
 580         if (j & 1)
 581                 OUT_RING( 0 );
 582
 583         ADVANCE_LP_RING();
 584 }
 585
 586 static void i830EmitTexPalette( drm_device_t *dev,
 587                                 unsigned int *palette,
 588                                 int number,
 589                                 int is_shared )
 590 {
 591         drm_i830_private_t *dev_priv = dev->dev_private;
 592         int i;
 593         RING_LOCALS;
 594
 595         return;
 596
 597         BEGIN_LP_RING( 258 );
 598
 599         if(is_shared == 1) {
 600                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD |
 601                          MAP_PALETTE_NUM(0) |
 602                          MAP_PALETTE_BOTH);
 603         } else {
 604                 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
 605         }
 606         for(i = 0; i < 256; i++) {
 607                 OUT_RING(palette[i]);
 608         }
 609         OUT_RING(0);
 610         /* KW:  WHERE IS THE ADVANCE_LP_RING?  This is effectively a noop!
 611          */
 612 }
 613
 614 /* Need to do some additional checking when setting the dest buffer.
 615  */
 616 static void i830EmitDestVerified( drm_device_t *dev,
 617                                   unsigned int *code )
 618 {
 619         drm_i830_private_t *dev_priv = dev->dev_private;
 620         unsigned int tmp;
 621         RING_LOCALS;
 622
 623         BEGIN_LP_RING( I830_DEST_SETUP_SIZE + 10 );
 624
 625
 626         tmp = code[I830_DESTREG_CBUFADDR];
 627         if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
 628                 if (((int)outring) & 8) {
 629                         OUT_RING(0);
 630                         OUT_RING(0);
 631                 }
 632
 633                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 634                 OUT_RING( BUF_3D_ID_COLOR_BACK |
 635                           BUF_3D_PITCH(dev_priv->back_pitch * dev_priv->cpp) |
 636                           BUF_3D_USE_FENCE);
 637                 OUT_RING( tmp );
 638                 OUT_RING( 0 );
 639
 640                 OUT_RING( CMD_OP_DESTBUFFER_INFO );
 641                 OUT_RING( BUF_3D_ID_DEPTH | BUF_3D_USE_FENCE |
 642                           BUF_3D_PITCH(dev_priv->depth_pitch * dev_priv->cpp));
 643                 OUT_RING( dev_priv->zi1 );
 644                 OUT_RING( 0 );
 645         } else {
 646                 DRM_ERROR("bad di1 %x (allow %x or %x)\n",
 647                           tmp, dev_priv->front_di1, dev_priv->back_di1);
 648         }
 649
 650         /* invarient:
 651          */
 652
 653
 654         OUT_RING( GFX_OP_DESTBUFFER_VARS );
 655         OUT_RING( code[I830_DESTREG_DV1] );
 656
 657         OUT_RING( GFX_OP_DRAWRECT_INFO );
 658         OUT_RING( code[I830_DESTREG_DR1] );
 659         OUT_RING( code[I830_DESTREG_DR2] );
 660         OUT_RING( code[I830_DESTREG_DR3] );
 661         OUT_RING( code[I830_DESTREG_DR4] );
 662
 663         /* Need to verify this */
 664         tmp = code[I830_DESTREG_SENABLE];
 665         if((tmp & ~0x3) == GFX_OP_SCISSOR_ENABLE) {
 666                 OUT_RING( tmp );
 667         } else {
 668                 DRM_ERROR("bad scissor enable\n");
 669                 OUT_RING( 0 );
 670         }
 671
 672         OUT_RING( GFX_OP_SCISSOR_RECT );
 673         OUT_RING( code[I830_DESTREG_SR1] );
 674         OUT_RING( code[I830_DESTREG_SR2] );
 675         OUT_RING( 0 );
 676
 677         ADVANCE_LP_RING();
 678 }
 679
 680 static void i830EmitStippleVerified( drm_device_t *dev,
 681                                      unsigned int *code )
 682 {
 683         drm_i830_private_t *dev_priv = dev->dev_private;
 684         RING_LOCALS;
 685
 686         BEGIN_LP_RING( 2 );
 687         OUT_RING( GFX_OP_STIPPLE );
 688         OUT_RING( code[1] );
 689         ADVANCE_LP_RING();
 690 }
 691
 692
 693 static void i830EmitState( drm_device_t *dev )
 694 {
 695         drm_i830_private_t *dev_priv = dev->dev_private;
 696         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 697         unsigned int dirty = sarea_priv->dirty;
 698
 699         DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
 700
 701         if (dirty & I830_UPLOAD_BUFFERS) {
 702                 i830EmitDestVerified( dev, sarea_priv->BufferState );
 703                 sarea_priv->dirty &= ~I830_UPLOAD_BUFFERS;
 704         }
 705
 706         if (dirty & I830_UPLOAD_CTX) {
 707                 i830EmitContextVerified( dev, sarea_priv->ContextState );
 708                 sarea_priv->dirty &= ~I830_UPLOAD_CTX;
 709         }
 710
 711         if (dirty & I830_UPLOAD_TEX0) {
 712                 i830EmitTexVerified( dev, sarea_priv->TexState[0] );
 713                 sarea_priv->dirty &= ~I830_UPLOAD_TEX0;
 714         }
 715
 716         if (dirty & I830_UPLOAD_TEX1) {
 717                 i830EmitTexVerified( dev, sarea_priv->TexState[1] );
 718                 sarea_priv->dirty &= ~I830_UPLOAD_TEX1;
 719         }
 720
 721         if (dirty & I830_UPLOAD_TEXBLEND0) {
 722                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[0],
 723                                 sarea_priv->TexBlendStateWordsUsed[0]);
 724                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND0;
 725         }
 726
 727         if (dirty & I830_UPLOAD_TEXBLEND1) {
 728                 i830EmitTexBlendVerified( dev, sarea_priv->TexBlendState[1],
 729                                 sarea_priv->TexBlendStateWordsUsed[1]);
 730                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND1;
 731         }
 732
 733         if (dirty & I830_UPLOAD_TEX_PALETTE_SHARED) {
 734                 i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 1);
 735         } else {
 736                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(0)) {
 737                         i830EmitTexPalette(dev, sarea_priv->Palette[0], 0, 0);
 738                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(0);
 739                 }
 740                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(1)) {
 741                         i830EmitTexPalette(dev, sarea_priv->Palette[1], 1, 0);
 742                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(1);
 743                 }
 744
 745                 /* 1.3:
 746                  */
 747 #if 0
 748                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(2)) {
 749                         i830EmitTexPalette(dev, sarea_priv->Palette2[0], 0, 0);
 750                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 751                 }
 752                 if (dirty & I830_UPLOAD_TEX_PALETTE_N(3)) {
 753                         i830EmitTexPalette(dev, sarea_priv->Palette2[1], 1, 0);
 754                         sarea_priv->dirty &= ~I830_UPLOAD_TEX_PALETTE_N(2);
 755                 }
 756 #endif
 757         }
 758
 759         /* 1.3:
 760          */
 761         if (dirty & I830_UPLOAD_STIPPLE) {
 762                 i830EmitStippleVerified( dev,
 763                                          sarea_priv->StippleState);
 764                 sarea_priv->dirty &= ~I830_UPLOAD_STIPPLE;
 765         }
 766
 767         if (dirty & I830_UPLOAD_TEX2) {
 768                 i830EmitTexVerified( dev, sarea_priv->TexState2 );
 769                 sarea_priv->dirty &= ~I830_UPLOAD_TEX2;
 770         }
 771
 772         if (dirty & I830_UPLOAD_TEX3) {
 773                 i830EmitTexVerified( dev, sarea_priv->TexState3 );
 774                 sarea_priv->dirty &= ~I830_UPLOAD_TEX3;
 775         }
 776
 777
 778         if (dirty & I830_UPLOAD_TEXBLEND2) {
 779                 i830EmitTexBlendVerified(
 780                         dev,
 781                         sarea_priv->TexBlendState2,
 782                         sarea_priv->TexBlendStateWordsUsed2);
 783
 784                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND2;
 785         }
 786
 787         if (dirty & I830_UPLOAD_TEXBLEND3) {
 788                 i830EmitTexBlendVerified(
 789                         dev,
 790                         sarea_priv->TexBlendState3,
 791                         sarea_priv->TexBlendStateWordsUsed3);
 792                 sarea_priv->dirty &= ~I830_UPLOAD_TEXBLEND3;
 793         }
 794 }
 795
 796 /* ================================================================
 797  * Performance monitoring functions
 798  */
 799
 800 static void i830_fill_box( drm_device_t *dev,
 801                            int x, int y, int w, int h,
 802                            int r, int g, int b )
 803 {
 804         drm_i830_private_t *dev_priv = dev->dev_private;
 805         u32 color;
 806         unsigned int BR13, CMD;
 807         RING_LOCALS;
 808
 809         BR13 = (0xF0 << 16) | (dev_priv->pitch * dev_priv->cpp) | (1<<24);
 810         CMD = XY_COLOR_BLT_CMD;
 811         x += dev_priv->sarea_priv->boxes[0].x1;
 812         y += dev_priv->sarea_priv->boxes[0].y1;
 813
 814         if (dev_priv->cpp == 4) {
 815                 BR13 |= (1<<25);
 816                 CMD |= (XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB);
 817                 color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
 818         } else {
 819                 color = (((r & 0xf8) << 8) |
 820                          ((g & 0xfc) << 3) |
 821                          ((b & 0xf8) >> 3));
 822         }
 823
 824         BEGIN_LP_RING( 6 );
 825         OUT_RING( CMD );
 826         OUT_RING( BR13 );
 827         OUT_RING( (y << 16) | x );
 828         OUT_RING( ((y+h) << 16) | (x+w) );
 829
 830         if ( dev_priv->current_page == 1 ) {
 831                 OUT_RING( dev_priv->front_offset );
 832         } else {
 833                 OUT_RING( dev_priv->back_offset );
 834         }
 835
 836         OUT_RING( color );
 837         ADVANCE_LP_RING();
 838 }
 839
 840 static void i830_cp_performance_boxes( drm_device_t *dev )
 841 {
 842         drm_i830_private_t *dev_priv = dev->dev_private;
 843
 844         /* Purple box for page flipping
 845          */
 846         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_FLIP )
 847                 i830_fill_box( dev, 4, 4, 8, 8, 255, 0, 255 );
 848
 849         /* Red box if we have to wait for idle at any point
 850          */
 851         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_WAIT )
 852                 i830_fill_box( dev, 16, 4, 8, 8, 255, 0, 0 );
 853
 854         /* Blue box: lost context?
 855          */
 856         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_LOST_CONTEXT )
 857                 i830_fill_box( dev, 28, 4, 8, 8, 0, 0, 255 );
 858
 859         /* Yellow box for texture swaps
 860          */
 861         if ( dev_priv->sarea_priv->perf_boxes & I830_BOX_TEXTURE_LOAD )
 862                 i830_fill_box( dev, 40, 4, 8, 8, 255, 255, 0 );
 863
 864         /* Green box if hardware never idles (as far as we can tell)
 865          */
 866         if ( !(dev_priv->sarea_priv->perf_boxes & I830_BOX_RING_EMPTY) )
 867                 i830_fill_box( dev, 64, 4, 8, 8, 0, 255, 0 );
 868
 869
 870         /* Draw bars indicating number of buffers allocated
 871          * (not a great measure, easily confused)
 872          */
 873         if (dev_priv->dma_used) {
 874                 int bar = dev_priv->dma_used / 10240;
 875                 if (bar > 100) bar = 100;
 876                 if (bar < 1) bar = 1;
 877                 i830_fill_box( dev, 4, 16, bar, 4, 196, 128, 128 );
 878                 dev_priv->dma_used = 0;
 879         }
 880
 881         dev_priv->sarea_priv->perf_boxes = 0;
 882 }
 883
 884 static void i830_dma_dispatch_clear( drm_device_t *dev, int flags,
 885                                     unsigned int clear_color,
 886                                     unsigned int clear_zval,
 887                                     unsigned int clear_depthmask)
 888 {
 889         drm_i830_private_t *dev_priv = dev->dev_private;
 890         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 891         int nbox = sarea_priv->nbox;
 892         drm_clip_rect_t *pbox = sarea_priv->boxes;
 893         int pitch = dev_priv->pitch;
 894         int cpp = dev_priv->cpp;
 895         int i;
 896         unsigned int BR13, CMD, D_CMD;
 897         RING_LOCALS;
 898
 899
 900         if ( dev_priv->current_page == 1 ) {
 901                 unsigned int tmp = flags;
 902
 903                 flags &= ~(I830_FRONT | I830_BACK);
 904                 if ( tmp & I830_FRONT ) flags |= I830_BACK;
 905                 if ( tmp & I830_BACK )  flags |= I830_FRONT;
 906         }
 907
 908         i830_kernel_lost_context(dev);
 909
 910         switch(cpp) {
 911         case 2:
 912                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 913                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 914                 break;
 915         case 4:
 916                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24) | (1<<25);
 917                 CMD = (XY_COLOR_BLT_CMD | XY_COLOR_BLT_WRITE_ALPHA |
 918                        XY_COLOR_BLT_WRITE_RGB);
 919                 D_CMD = XY_COLOR_BLT_CMD;
 920                 if(clear_depthmask & 0x00ffffff)
 921                         D_CMD |= XY_COLOR_BLT_WRITE_RGB;
 922                 if(clear_depthmask & 0xff000000)
 923                         D_CMD |= XY_COLOR_BLT_WRITE_ALPHA;
 924                 break;
 925         default:
 926                 BR13 = (0xF0 << 16) | (pitch * cpp) | (1<<24);
 927                 D_CMD = CMD = XY_COLOR_BLT_CMD;
 928                 break;
 929         }
 930
 931         if (nbox > I830_NR_SAREA_CLIPRECTS)
 932                 nbox = I830_NR_SAREA_CLIPRECTS;
 933
 934         for (i = 0 ; i < nbox ; i++, pbox++) {
 935                 if (pbox->x1 > pbox->x2 ||
 936                     pbox->y1 > pbox->y2 ||
 937                     pbox->x2 > dev_priv->w ||
 938                     pbox->y2 > dev_priv->h)
 939                         continue;
 940
 941                 if ( flags & I830_FRONT ) {
 942                         DRM_DEBUG("clear front\n");
 943                         BEGIN_LP_RING( 6 );
 944                         OUT_RING( CMD );
 945                         OUT_RING( BR13 );
 946                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 947                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 948                         OUT_RING( dev_priv->front_offset );
 949                         OUT_RING( clear_color );
 950                         ADVANCE_LP_RING();
 951                 }
 952
 953                 if ( flags & I830_BACK ) {
 954                         DRM_DEBUG("clear back\n");
 955                         BEGIN_LP_RING( 6 );
 956                         OUT_RING( CMD );
 957                         OUT_RING( BR13 );
 958                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 959                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 960                         OUT_RING( dev_priv->back_offset );
 961                         OUT_RING( clear_color );
 962                         ADVANCE_LP_RING();
 963                 }
 964
 965                 if ( flags & I830_DEPTH ) {
 966                         DRM_DEBUG("clear depth\n");
 967                         BEGIN_LP_RING( 6 );
 968                         OUT_RING( D_CMD );
 969                         OUT_RING( BR13 );
 970                         OUT_RING( (pbox->y1 << 16) | pbox->x1 );
 971                         OUT_RING( (pbox->y2 << 16) | pbox->x2 );
 972                         OUT_RING( dev_priv->depth_offset );
 973                         OUT_RING( clear_zval );
 974                         ADVANCE_LP_RING();
 975                 }
 976         }
 977 }
 978
 979 static void i830_dma_dispatch_swap( drm_device_t *dev )
 980 {
 981         drm_i830_private_t *dev_priv = dev->dev_private;
 982         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
 983         int nbox = sarea_priv->nbox;
 984         drm_clip_rect_t *pbox = sarea_priv->boxes;
 985         int pitch = dev_priv->pitch;
 986         int cpp = dev_priv->cpp;
 987         int i;
 988         unsigned int CMD, BR13;
 989         RING_LOCALS;
 990
 991         DRM_DEBUG("swapbuffers\n");
 992
 993         i830_kernel_lost_context(dev);
 994
 995         if (dev_priv->do_boxes)
 996                 i830_cp_performance_boxes( dev );
 997
 998         switch(cpp) {
 999         case 2:
1000                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1001                 CMD = XY_SRC_COPY_BLT_CMD;
1002                 break;
1003         case 4:
1004                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24) | (1<<25);
1005                 CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
1006                        XY_SRC_COPY_BLT_WRITE_RGB);
1007                 break;
1008         default:
1009                 BR13 = (pitch * cpp) | (0xCC << 16) | (1<<24);
1010                 CMD = XY_SRC_COPY_BLT_CMD;
1011                 break;
1012         }
1013
1014
1015         if (nbox > I830_NR_SAREA_CLIPRECTS)
1016                 nbox = I830_NR_SAREA_CLIPRECTS;
1017
1018         for (i = 0 ; i < nbox; i++, pbox++)
1019         {
1020                 if (pbox->x1 > pbox->x2 ||
1021                     pbox->y1 > pbox->y2 ||
1022                     pbox->x2 > dev_priv->w ||
1023                     pbox->y2 > dev_priv->h)
1024                         continue;
1025
1026                 DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
1027                           pbox->x1, pbox->y1,
1028                           pbox->x2, pbox->y2);
1029
1030                 BEGIN_LP_RING( 8 );
1031                 OUT_RING( CMD );
1032                 OUT_RING( BR13 );
1033                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1034                 OUT_RING( (pbox->y2 << 16) | pbox->x2 );
1035
1036                 if (dev_priv->current_page == 0)
1037                         OUT_RING( dev_priv->front_offset );
1038                 else
1039                         OUT_RING( dev_priv->back_offset );
1040
1041                 OUT_RING( (pbox->y1 << 16) | pbox->x1 );
1042                 OUT_RING( BR13 & 0xffff );
1043
1044                 if (dev_priv->current_page == 0)
1045                         OUT_RING( dev_priv->back_offset );
1046                 else
1047                         OUT_RING( dev_priv->front_offset );
1048
1049                 ADVANCE_LP_RING();
1050         }
1051 }
1052
1053 static void i830_dma_dispatch_flip( drm_device_t *dev )
1054 {
1055         drm_i830_private_t *dev_priv = dev->dev_private;
1056         RING_LOCALS;
1057
1058         DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n",
1059                    __FUNCTION__,
1060                    dev_priv->current_page,
1061                    dev_priv->sarea_priv->pf_current_page);
1062
1063         i830_kernel_lost_context(dev);
1064
1065         if (dev_priv->do_boxes) {
1066                 dev_priv->sarea_priv->perf_boxes |= I830_BOX_FLIP;
1067                 i830_cp_performance_boxes( dev );
1068         }
1069
1070
1071         BEGIN_LP_RING( 2 );
1072         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1073         OUT_RING( 0 );
1074         ADVANCE_LP_RING();
1075
1076         BEGIN_LP_RING( 6 );
1077         OUT_RING( CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP );
1078         OUT_RING( 0 );
1079         if ( dev_priv->current_page == 0 ) {
1080                 OUT_RING( dev_priv->back_offset );
1081                 dev_priv->current_page = 1;
1082         } else {
1083                 OUT_RING( dev_priv->front_offset );
1084                 dev_priv->current_page = 0;
1085         }
1086         OUT_RING(0);
1087         ADVANCE_LP_RING();
1088
1089
1090         BEGIN_LP_RING( 2 );
1091         OUT_RING( MI_WAIT_FOR_EVENT |
1092                   MI_WAIT_FOR_PLANE_A_FLIP );
1093         OUT_RING( 0 );
1094         ADVANCE_LP_RING();
1095
1096
1097         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1098 }
1099
1100 static void i830_dma_dispatch_vertex(drm_device_t *dev,
1101                                      drm_buf_t *buf,
1102                                      int discard,
1103                                      int used)
1104 {
1105         drm_i830_private_t *dev_priv = dev->dev_private;
1106         drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1107         drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
1108         drm_clip_rect_t *box = sarea_priv->boxes;
1109         int nbox = sarea_priv->nbox;
1110         unsigned long address = (unsigned long)buf->bus_address;
1111         unsigned long start = address - dev->agp->base;
1112         int i = 0, u;
1113         RING_LOCALS;
1114
1115         i830_kernel_lost_context(dev);
1116
1117         if (nbox > I830_NR_SAREA_CLIPRECTS)
1118                 nbox = I830_NR_SAREA_CLIPRECTS;
1119
1120         if (discard) {
1121                 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1122                             I830_BUF_HARDWARE);
1123                 if(u != I830_BUF_CLIENT) {
1124                         DRM_DEBUG("xxxx 2\n");
1125                 }
1126         }
1127
1128         if (used > 4*1023)
1129                 used = 0;
1130
1131         if (sarea_priv->dirty)
1132            i830EmitState( dev );
1133
1134         DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n",
1135                   address, used, nbox);
1136
1137         dev_priv->counter++;
1138         DRM_DEBUG(  "dispatch counter : %ld\n", dev_priv->counter);
1139         DRM_DEBUG(  "i830_dma_dispatch\n");
1140         DRM_DEBUG(  "start : %lx\n", start);
1141         DRM_DEBUG(  "used : %d\n", used);
1142         DRM_DEBUG(  "start + used - 4 : %ld\n", start + used - 4);
1143
1144         if (buf_priv->currently_mapped == I830_BUF_MAPPED) {
1145                 u32 *vp = buf_priv->kernel_virtual;
1146
1147                 vp[0] = (GFX_OP_PRIMITIVE |
1148                         sarea_priv->vertex_prim |
1149                         ((used/4)-2));
1150
1151                 if (dev_priv->use_mi_batchbuffer_start) {
1152                         vp[used/4] = MI_BATCH_BUFFER_END;
1153                         used += 4;
1154                 }
1155
1156                 if (used & 4) {
1157                         vp[used/4] = 0;
1158                         used += 4;
1159                 }
1160
1161                 i830_unmap_buffer(buf);
1162         }
1163
1164         if (used) {
1165                 do {
1166                         if (i < nbox) {
1167                                 BEGIN_LP_RING(6);
1168                                 OUT_RING( GFX_OP_DRAWRECT_INFO );
1169                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR1] );
1170                                 OUT_RING( box[i].x1 | (box[i].y1<<16) );
1171                                 OUT_RING( box[i].x2 | (box[i].y2<<16) );
1172                                 OUT_RING( sarea_priv->BufferState[I830_DESTREG_DR4] );
1173                                 OUT_RING( 0 );
1174                                 ADVANCE_LP_RING();
1175                         }
1176
1177                         if (dev_priv->use_mi_batchbuffer_start) {
1178                                 BEGIN_LP_RING(2);
1179                                 OUT_RING( MI_BATCH_BUFFER_START | (2<<6) );
1180                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1181                                 ADVANCE_LP_RING();
1182                         }
1183                         else {
1184                                 BEGIN_LP_RING(4);
1185                                 OUT_RING( MI_BATCH_BUFFER );
1186                                 OUT_RING( start | MI_BATCH_NON_SECURE );
1187                                 OUT_RING( start + used - 4 );
1188                                 OUT_RING( 0 );
1189                                 ADVANCE_LP_RING();
1190                         }
1191
1192                 } while (++i < nbox);
1193         }
1194
1195         if (discard) {
1196                 dev_priv->counter++;
1197
1198                 (void) cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1199                                I830_BUF_HARDWARE);
1200
1201                 BEGIN_LP_RING(8);
1202                 OUT_RING( CMD_STORE_DWORD_IDX );
1203                 OUT_RING( 20 );
1204                 OUT_RING( dev_priv->counter );
1205                 OUT_RING( CMD_STORE_DWORD_IDX );
1206                 OUT_RING( buf_priv->my_use_idx );
1207                 OUT_RING( I830_BUF_FREE );
1208                 OUT_RING( CMD_REPORT_HEAD );
1209                 OUT_RING( 0 );
1210                 ADVANCE_LP_RING();
1211         }
1212 }
1213
1214
1215 static void i830_dma_quiescent(drm_device_t *dev)
1216 {
1217         drm_i830_private_t *dev_priv = dev->dev_private;
1218         RING_LOCALS;
1219
1220         i830_kernel_lost_context(dev);
1221
1222         BEGIN_LP_RING(4);
1223         OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE );
1224         OUT_RING( CMD_REPORT_HEAD );
1225         OUT_RING( 0 );
1226         OUT_RING( 0 );
1227         ADVANCE_LP_RING();
1228
1229         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1230 }
1231
1232 static int i830_flush_queue(drm_device_t *dev)
1233 {
1234         drm_i830_private_t *dev_priv = dev->dev_private;
1235         drm_device_dma_t *dma = dev->dma;
1236         int i, ret = 0;
1237         RING_LOCALS;
1238
1239         i830_kernel_lost_context(dev);
1240
1241         BEGIN_LP_RING(2);
1242         OUT_RING( CMD_REPORT_HEAD );
1243         OUT_RING( 0 );
1244         ADVANCE_LP_RING();
1245
1246         i830_wait_ring( dev, dev_priv->ring.Size - 8, __FUNCTION__ );
1247
1248         for (i = 0; i < dma->buf_count; i++) {
1249                 drm_buf_t *buf = dma->buflist[ i ];
1250                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1251
1252                 int used = cmpxchg(buf_priv->in_use, I830_BUF_HARDWARE,
1253                                    I830_BUF_FREE);
1254
1255                 if (used == I830_BUF_HARDWARE)
1256                         DRM_DEBUG("reclaimed from HARDWARE\n");
1257                 if (used == I830_BUF_CLIENT)
1258                         DRM_DEBUG("still on client\n");
1259         }
1260
1261         return ret;
1262 }
1263
1264 /* Must be called with the lock held */
1265 void i830_reclaim_buffers(drm_device_t *dev, struct file *filp)
1266 {
1267         drm_device_dma_t *dma = dev->dma;
1268         int              i;
1269
1270         if (!dma) return;
1271         if (!dev->dev_private) return;
1272         if (!dma->buflist) return;
1273
1274         i830_flush_queue(dev);
1275
1276         for (i = 0; i < dma->buf_count; i++) {
1277                 drm_buf_t *buf = dma->buflist[ i ];
1278                 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
1279
1280                 if (buf->filp == filp && buf_priv) {
1281                         int used = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1282                                            I830_BUF_FREE);
1283
1284                         if (used == I830_BUF_CLIENT)
1285                                 DRM_DEBUG("reclaimed from client\n");
1286                         if(buf_priv->currently_mapped == I830_BUF_MAPPED)
1287                                 buf_priv->currently_mapped = I830_BUF_UNMAPPED;
1288                 }
1289         }
1290 }
1291
1292 static int i830_flush_ioctl(struct inode *inode, struct file *filp,
1293                              unsigned int cmd, unsigned long arg)
1294 {
1295         drm_file_t        *priv   = filp->private_data;
1296         drm_device_t      *dev    = priv->head->dev;
1297
1298         LOCK_TEST_WITH_RETURN(dev, filp);
1299
1300         i830_flush_queue(dev);
1301         return 0;
1302 }
1303
1304 static int i830_dma_vertex(struct inode *inode, struct file *filp,
1305                        unsigned int cmd, unsigned long arg)
1306 {
1307         drm_file_t *priv = filp->private_data;
1308         drm_device_t *dev = priv->head->dev;
1309         drm_device_dma_t *dma = dev->dma;
1310         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1311         u32 *hw_status = dev_priv->hw_status_page;
1312         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1313                                         dev_priv->sarea_priv;
1314         drm_i830_vertex_t vertex;
1315
1316         if (copy_from_user(&vertex, (drm_i830_vertex_t __user *)arg, sizeof(vertex)))
1317                 return -EFAULT;
1318
1319         LOCK_TEST_WITH_RETURN(dev, filp);
1320
1321         DRM_DEBUG("i830 dma vertex, idx %d used %d discard %d\n",
1322                   vertex.idx, vertex.used, vertex.discard);
1323
1324         if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
1325
1326         i830_dma_dispatch_vertex( dev,
1327                                   dma->buflist[ vertex.idx ],
1328                                   vertex.discard, vertex.used );
1329
1330         sarea_priv->last_enqueue = dev_priv->counter-1;
1331         sarea_priv->last_dispatch = (int) hw_status[5];
1332
1333         return 0;
1334 }
1335
1336 static int i830_clear_bufs(struct inode *inode, struct file *filp,
1337                            unsigned int cmd, unsigned long arg)
1338 {
1339         drm_file_t *priv = filp->private_data;
1340         drm_device_t *dev = priv->head->dev;
1341         drm_i830_clear_t clear;
1342
1343         if (copy_from_user(&clear, (drm_i830_clear_t __user *)arg, sizeof(clear)))
1344                 return -EFAULT;
1345
1346         LOCK_TEST_WITH_RETURN(dev, filp);
1347
1348         /* GH: Someone's doing nasty things... */
1349         if (!dev->dev_private) {
1350                 return -EINVAL;
1351         }
1352
1353         i830_dma_dispatch_clear( dev, clear.flags,
1354                                  clear.clear_color,
1355                                  clear.clear_depth,
1356                                  clear.clear_depthmask);
1357         return 0;
1358 }
1359
1360 static int i830_swap_bufs(struct inode *inode, struct file *filp,
1361                           unsigned int cmd, unsigned long arg)
1362 {
1363         drm_file_t *priv = filp->private_data;
1364         drm_device_t *dev = priv->head->dev;
1365
1366         DRM_DEBUG("i830_swap_bufs\n");
1367
1368         LOCK_TEST_WITH_RETURN(dev, filp);
1369
1370         i830_dma_dispatch_swap( dev );
1371         return 0;
1372 }
1373
1374
1375
1376 /* Not sure why this isn't set all the time:
1377  */
1378 static void i830_do_init_pageflip( drm_device_t *dev )
1379 {
1380         drm_i830_private_t *dev_priv = dev->dev_private;
1381
1382         DRM_DEBUG("%s\n", __FUNCTION__);
1383         dev_priv->page_flipping = 1;
1384         dev_priv->current_page = 0;
1385         dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1386 }
1387
1388 static int i830_do_cleanup_pageflip( drm_device_t *dev )
1389 {
1390         drm_i830_private_t *dev_priv = dev->dev_private;
1391
1392         DRM_DEBUG("%s\n", __FUNCTION__);
1393         if (dev_priv->current_page != 0)
1394                 i830_dma_dispatch_flip( dev );
1395
1396         dev_priv->page_flipping = 0;
1397         return 0;
1398 }
1399
1400 static int i830_flip_bufs(struct inode *inode, struct file *filp,
1401                            unsigned int cmd, unsigned long arg)
1402 {
1403         drm_file_t *priv = filp->private_data;
1404         drm_device_t *dev = priv->head->dev;
1405         drm_i830_private_t *dev_priv = dev->dev_private;
1406
1407         DRM_DEBUG("%s\n", __FUNCTION__);
1408
1409         LOCK_TEST_WITH_RETURN(dev, filp);
1410
1411         if (!dev_priv->page_flipping)
1412                 i830_do_init_pageflip( dev );
1413
1414         i830_dma_dispatch_flip( dev );
1415         return 0;
1416 }
1417
1418 static int i830_getage(struct inode *inode, struct file *filp, unsigned int cmd,
1419                         unsigned long arg)
1420 {
1421         drm_file_t        *priv     = filp->private_data;
1422         drm_device_t      *dev      = priv->head->dev;
1423         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1424         u32 *hw_status = dev_priv->hw_status_page;
1425         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1426                                         dev_priv->sarea_priv;
1427
1428         sarea_priv->last_dispatch = (int) hw_status[5];
1429         return 0;
1430 }
1431
1432 static int i830_getbuf(struct inode *inode, struct file *filp, unsigned int cmd,
1433                         unsigned long arg)
1434 {
1435         drm_file_t        *priv     = filp->private_data;
1436         drm_device_t      *dev      = priv->head->dev;
1437         int               retcode   = 0;
1438         drm_i830_dma_t    d;
1439         drm_i830_private_t *dev_priv = (drm_i830_private_t *)dev->dev_private;
1440         u32 *hw_status = dev_priv->hw_status_page;
1441         drm_i830_sarea_t *sarea_priv = (drm_i830_sarea_t *)
1442                                         dev_priv->sarea_priv;
1443
1444         DRM_DEBUG("getbuf\n");
1445         if (copy_from_user(&d, (drm_i830_dma_t __user *)arg, sizeof(d)))
1446                 return -EFAULT;
1447
1448         LOCK_TEST_WITH_RETURN(dev, filp);
1449
1450         d.granted = 0;
1451
1452         retcode = i830_dma_get_buffer(dev, &d, filp);
1453
1454         DRM_DEBUG("i830_dma: %d returning %d, granted = %d\n",
1455                   current->pid, retcode, d.granted);
1456
1457         if (copy_to_user((drm_dma_t __user *)arg, &d, sizeof(d)))
1458                 return -EFAULT;
1459         sarea_priv->last_dispatch = (int) hw_status[5];
1460
1461         return retcode;
1462 }
1463
1464 static int i830_copybuf(struct inode *inode,
1465                          struct file *filp, unsigned int cmd, unsigned long arg)
1466 {
1467         /* Never copy - 2.4.x doesn't need it */
1468         return 0;
1469 }
1470
1471 static int i830_docopy(struct inode *inode, struct file *filp, unsigned int cmd,
1472                         unsigned long arg)
1473 {
1474         return 0;
1475 }
1476
1477
1478
1479 static int i830_getparam( struct inode *inode, struct file *filp,
1480                         unsigned int cmd, unsigned long arg )
1481 {
1482         drm_file_t        *priv     = filp->private_data;
1483         drm_device_t      *dev      = priv->head->dev;
1484         drm_i830_private_t *dev_priv = dev->dev_private;
1485         drm_i830_getparam_t param;
1486         int value;
1487
1488         if ( !dev_priv ) {
1489                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1490                 return -EINVAL;
1491         }
1492
1493         if (copy_from_user(&param, (drm_i830_getparam_t __user *)arg, sizeof(param) ))
1494                 return -EFAULT;
1495
1496         switch( param.param ) {
1497         case I830_PARAM_IRQ_ACTIVE:
1498                 value = dev->irq_enabled;
1499                 break;
1500         default:
1501                 return -EINVAL;
1502         }
1503
1504         if ( copy_to_user( param.value, &value, sizeof(int) ) ) {
1505                 DRM_ERROR( "copy_to_user\n" );
1506                 return -EFAULT;
1507         }
1508
1509         return 0;
1510 }
1511
1512
1513 static int i830_setparam( struct inode *inode, struct file *filp,
1514                         unsigned int cmd, unsigned long arg )
1515 {
1516         drm_file_t        *priv     = filp->private_data;
1517         drm_device_t      *dev      = priv->head->dev;
1518         drm_i830_private_t *dev_priv = dev->dev_private;
1519         drm_i830_setparam_t param;
1520
1521         if ( !dev_priv ) {
1522                 DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
1523                 return -EINVAL;
1524         }
1525
1526         if (copy_from_user(&param, (drm_i830_setparam_t __user *)arg, sizeof(param) ))
1527                 return -EFAULT;
1528
1529         switch( param.param ) {
1530         case I830_SETPARAM_USE_MI_BATCHBUFFER_START:
1531                 dev_priv->use_mi_batchbuffer_start = param.value;
1532                 break;
1533         default:
1534                 return -EINVAL;
1535         }
1536
1537         return 0;
1538 }
1539
1540
1541 void i830_driver_pretakedown(drm_device_t *dev)
1542 {
1543         i830_dma_cleanup( dev );
1544 }
1545
1546 void i830_driver_prerelease(drm_device_t *dev, DRMFILE filp)
1547 {
1548         if (dev->dev_private) {
1549                 drm_i830_private_t *dev_priv = dev->dev_private;
1550                 if (dev_priv->page_flipping) {
1551                         i830_do_cleanup_pageflip(dev);
1552                 }
1553         }
1554 }
1555
1556 void i830_driver_release(drm_device_t *dev, struct file *filp)
1557 {
1558         i830_reclaim_buffers(dev, filp);
1559 }
1560
1561 int i830_driver_dma_quiescent(drm_device_t *dev)
1562 {
1563         i830_dma_quiescent( dev );
1564         return 0;
1565 }
1566
1567 drm_ioctl_desc_t i830_ioctls[] = {
1568         [DRM_IOCTL_NR(DRM_I830_INIT)]     = { i830_dma_init,    1, 1 },
1569         [DRM_IOCTL_NR(DRM_I830_VERTEX)]   = { i830_dma_vertex,  1, 0 },
1570         [DRM_IOCTL_NR(DRM_I830_CLEAR)]    = { i830_clear_bufs,  1, 0 },
1571         [DRM_IOCTL_NR(DRM_I830_FLUSH)]    = { i830_flush_ioctl, 1, 0 },
1572         [DRM_IOCTL_NR(DRM_I830_GETAGE)]   = { i830_getage,      1, 0 },
1573         [DRM_IOCTL_NR(DRM_I830_GETBUF)]   = { i830_getbuf,      1, 0 },
1574         [DRM_IOCTL_NR(DRM_I830_SWAP)]     = { i830_swap_bufs,   1, 0 },
1575         [DRM_IOCTL_NR(DRM_I830_COPY)]     = { i830_copybuf,     1, 0 },
1576         [DRM_IOCTL_NR(DRM_I830_DOCOPY)]   = { i830_docopy,      1, 0 },
1577         [DRM_IOCTL_NR(DRM_I830_FLIP)]     = { i830_flip_bufs,   1, 0 },
1578         [DRM_IOCTL_NR(DRM_I830_IRQ_EMIT)] = { i830_irq_emit,    1, 0 },
1579         [DRM_IOCTL_NR(DRM_I830_IRQ_WAIT)] = { i830_irq_wait,    1, 0 },
1580         [DRM_IOCTL_NR(DRM_I830_GETPARAM)] = { i830_getparam,    1, 0 },
1581         [DRM_IOCTL_NR(DRM_I830_SETPARAM)] = { i830_setparam,    1, 0 }
1582 };
1583
1584 int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1585
1586 /**
1587  * Determine if the device really is AGP or not.
1588  *
1589  * All Intel graphics chipsets are treated as AGP, even if they are really
1590  * PCI-e.
1591  *
1592  * \param dev   The device to be tested.
1593  *
1594  * \returns
1595  * A value of 1 is always retured to indictate every i8xx is AGP.
1596  */
1597 int i830_driver_device_is_agp(drm_device_t * dev)
1598 {
1599         return 1;
1600 }