2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
96 MODULE_AUTHOR("Jeff Garzik");
97 MODULE_DESCRIPTION("Library module for ATA devices");
98 MODULE_LICENSE("GPL");
99 MODULE_VERSION(DRV_VERSION);
103 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
104 * @tf: Taskfile to convert
105 * @fis: Buffer into which data will output
106 * @pmp: Port multiplier port
108 * Converts a standard ATA taskfile to a Serial ATA
109 * FIS structure (Register - Host to Device).
112 * Inherited from caller.
115 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
117 fis[0] = 0x27; /* Register - Host to Device FIS */
118 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
119 bit 7 indicates Command FIS */
120 fis[2] = tf->command;
121 fis[3] = tf->feature;
128 fis[8] = tf->hob_lbal;
129 fis[9] = tf->hob_lbam;
130 fis[10] = tf->hob_lbah;
131 fis[11] = tf->hob_feature;
134 fis[13] = tf->hob_nsect;
145 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
146 * @fis: Buffer from which data will be input
147 * @tf: Taskfile to output
149 * Converts a serial ATA FIS structure to a standard ATA taskfile.
152 * Inherited from caller.
155 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
157 tf->command = fis[2]; /* status */
158 tf->feature = fis[3]; /* error */
165 tf->hob_lbal = fis[8];
166 tf->hob_lbam = fis[9];
167 tf->hob_lbah = fis[10];
170 tf->hob_nsect = fis[13];
173 static const u8 ata_rw_cmds[] = {
177 ATA_CMD_READ_MULTI_EXT,
178 ATA_CMD_WRITE_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_FUA_EXT,
186 ATA_CMD_PIO_READ_EXT,
187 ATA_CMD_PIO_WRITE_EXT,
200 ATA_CMD_WRITE_FUA_EXT
204 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
205 * @tf: command to examine and configure
206 * @dev: device tf belongs to
208 * Examine the device configuration and tf->flags to calculate
209 * the proper read/write commands and protocol to use.
214 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
218 int index, fua, lba48, write;
220 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
221 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
222 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
224 if (dev->flags & ATA_DFLAG_PIO) {
225 tf->protocol = ATA_PROT_PIO;
226 index = dev->multi_count ? 0 : 8;
227 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
228 /* Unable to use DMA due to host limitation */
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
232 tf->protocol = ATA_PROT_DMA;
236 cmd = ata_rw_cmds[index + fua + lba48 + write];
245 * ata_tf_read_block - Read block address from ATA taskfile
246 * @tf: ATA taskfile of interest
247 * @dev: ATA device @tf belongs to
252 * Read block address from @tf. This function can handle all
253 * three address formats - LBA, LBA48 and CHS. tf->protocol and
254 * flags select the address format to use.
257 * Block address read from @tf.
259 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
263 if (tf->flags & ATA_TFLAG_LBA) {
264 if (tf->flags & ATA_TFLAG_LBA48) {
265 block |= (u64)tf->hob_lbah << 40;
266 block |= (u64)tf->hob_lbam << 32;
267 block |= tf->hob_lbal << 24;
269 block |= (tf->device & 0xf) << 24;
271 block |= tf->lbah << 16;
272 block |= tf->lbam << 8;
277 cyl = tf->lbam | (tf->lbah << 8);
278 head = tf->device & 0xf;
281 block = (cyl * dev->heads + head) * dev->sectors + sect;
288 * ata_build_rw_tf - Build ATA taskfile for given read/write request
289 * @tf: Target ATA taskfile
290 * @dev: ATA device @tf belongs to
291 * @block: Block address
292 * @n_block: Number of blocks
293 * @tf_flags: RW/FUA etc...
299 * Build ATA taskfile @tf for read/write request described by
300 * @block, @n_block, @tf_flags and @tag on @dev.
304 * 0 on success, -ERANGE if the request is too large for @dev,
305 * -EINVAL if the request is invalid.
307 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
308 u64 block, u32 n_block, unsigned int tf_flags,
311 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
312 tf->flags |= tf_flags;
314 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
315 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
316 likely(tag != ATA_TAG_INTERNAL)) {
318 if (!lba_48_ok(block, n_block))
321 tf->protocol = ATA_PROT_NCQ;
322 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
324 if (tf->flags & ATA_TFLAG_WRITE)
325 tf->command = ATA_CMD_FPDMA_WRITE;
327 tf->command = ATA_CMD_FPDMA_READ;
329 tf->nsect = tag << 3;
330 tf->hob_feature = (n_block >> 8) & 0xff;
331 tf->feature = n_block & 0xff;
333 tf->hob_lbah = (block >> 40) & 0xff;
334 tf->hob_lbam = (block >> 32) & 0xff;
335 tf->hob_lbal = (block >> 24) & 0xff;
336 tf->lbah = (block >> 16) & 0xff;
337 tf->lbam = (block >> 8) & 0xff;
338 tf->lbal = block & 0xff;
341 if (tf->flags & ATA_TFLAG_FUA)
342 tf->device |= 1 << 7;
343 } else if (dev->flags & ATA_DFLAG_LBA) {
344 tf->flags |= ATA_TFLAG_LBA;
346 if (lba_28_ok(block, n_block)) {
348 tf->device |= (block >> 24) & 0xf;
349 } else if (lba_48_ok(block, n_block)) {
350 if (!(dev->flags & ATA_DFLAG_LBA48))
354 tf->flags |= ATA_TFLAG_LBA48;
356 tf->hob_nsect = (n_block >> 8) & 0xff;
358 tf->hob_lbah = (block >> 40) & 0xff;
359 tf->hob_lbam = (block >> 32) & 0xff;
360 tf->hob_lbal = (block >> 24) & 0xff;
362 /* request too large even for LBA48 */
365 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
368 tf->nsect = n_block & 0xff;
370 tf->lbah = (block >> 16) & 0xff;
371 tf->lbam = (block >> 8) & 0xff;
372 tf->lbal = block & 0xff;
374 tf->device |= ATA_LBA;
377 u32 sect, head, cyl, track;
379 /* The request -may- be too large for CHS addressing. */
380 if (!lba_28_ok(block, n_block))
383 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
386 /* Convert LBA to CHS */
387 track = (u32)block / dev->sectors;
388 cyl = track / dev->heads;
389 head = track % dev->heads;
390 sect = (u32)block % dev->sectors + 1;
392 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
393 (u32)block, track, cyl, head, sect);
395 /* Check whether the converted CHS can fit.
399 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
402 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
413 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
414 * @pio_mask: pio_mask
415 * @mwdma_mask: mwdma_mask
416 * @udma_mask: udma_mask
418 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
419 * unsigned int xfer_mask.
427 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
428 unsigned int mwdma_mask,
429 unsigned int udma_mask)
431 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
432 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
433 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
437 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
438 * @xfer_mask: xfer_mask to unpack
439 * @pio_mask: resulting pio_mask
440 * @mwdma_mask: resulting mwdma_mask
441 * @udma_mask: resulting udma_mask
443 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
444 * Any NULL distination masks will be ignored.
446 static void ata_unpack_xfermask(unsigned int xfer_mask,
447 unsigned int *pio_mask,
448 unsigned int *mwdma_mask,
449 unsigned int *udma_mask)
452 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
454 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
456 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
459 static const struct ata_xfer_ent {
463 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
464 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
465 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
470 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
471 * @xfer_mask: xfer_mask of interest
473 * Return matching XFER_* value for @xfer_mask. Only the highest
474 * bit of @xfer_mask is considered.
480 * Matching XFER_* value, 0 if no match found.
482 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
484 int highbit = fls(xfer_mask) - 1;
485 const struct ata_xfer_ent *ent;
487 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
488 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
489 return ent->base + highbit - ent->shift;
494 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
495 * @xfer_mode: XFER_* of interest
497 * Return matching xfer_mask for @xfer_mode.
503 * Matching xfer_mask, 0 if no match found.
505 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
507 const struct ata_xfer_ent *ent;
509 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
510 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
511 return 1 << (ent->shift + xfer_mode - ent->base);
516 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
517 * @xfer_mode: XFER_* of interest
519 * Return matching xfer_shift for @xfer_mode.
525 * Matching xfer_shift, -1 if no match found.
527 static int ata_xfer_mode2shift(unsigned int xfer_mode)
529 const struct ata_xfer_ent *ent;
531 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
532 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
538 * ata_mode_string - convert xfer_mask to string
539 * @xfer_mask: mask of bits supported; only highest bit counts.
541 * Determine string which represents the highest speed
542 * (highest bit in @modemask).
548 * Constant C string representing highest speed listed in
549 * @mode_mask, or the constant C string "<n/a>".
551 static const char *ata_mode_string(unsigned int xfer_mask)
553 static const char * const xfer_mode_str[] = {
577 highbit = fls(xfer_mask) - 1;
578 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
579 return xfer_mode_str[highbit];
583 static const char *sata_spd_string(unsigned int spd)
585 static const char * const spd_str[] = {
590 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
592 return spd_str[spd - 1];
595 void ata_dev_disable(struct ata_device *dev)
597 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
598 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
604 * ata_pio_devchk - PATA device presence detection
605 * @ap: ATA channel to examine
606 * @device: Device to examine (starting at zero)
608 * This technique was originally described in
609 * Hale Landis's ATADRVR (www.ata-atapi.com), and
610 * later found its way into the ATA/ATAPI spec.
612 * Write a pattern to the ATA shadow registers,
613 * and if a device is present, it will respond by
614 * correctly storing and echoing back the
615 * ATA shadow register contents.
621 static unsigned int ata_pio_devchk(struct ata_port *ap,
624 struct ata_ioports *ioaddr = &ap->ioaddr;
627 ap->ops->dev_select(ap, device);
629 outb(0x55, ioaddr->nsect_addr);
630 outb(0xaa, ioaddr->lbal_addr);
632 outb(0xaa, ioaddr->nsect_addr);
633 outb(0x55, ioaddr->lbal_addr);
635 outb(0x55, ioaddr->nsect_addr);
636 outb(0xaa, ioaddr->lbal_addr);
638 nsect = inb(ioaddr->nsect_addr);
639 lbal = inb(ioaddr->lbal_addr);
641 if ((nsect == 0x55) && (lbal == 0xaa))
642 return 1; /* we found a device */
644 return 0; /* nothing found */
648 * ata_mmio_devchk - PATA device presence detection
649 * @ap: ATA channel to examine
650 * @device: Device to examine (starting at zero)
652 * This technique was originally described in
653 * Hale Landis's ATADRVR (www.ata-atapi.com), and
654 * later found its way into the ATA/ATAPI spec.
656 * Write a pattern to the ATA shadow registers,
657 * and if a device is present, it will respond by
658 * correctly storing and echoing back the
659 * ATA shadow register contents.
665 static unsigned int ata_mmio_devchk(struct ata_port *ap,
668 struct ata_ioports *ioaddr = &ap->ioaddr;
671 ap->ops->dev_select(ap, device);
673 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
674 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
676 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
677 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
679 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
680 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
682 nsect = readb((void __iomem *) ioaddr->nsect_addr);
683 lbal = readb((void __iomem *) ioaddr->lbal_addr);
685 if ((nsect == 0x55) && (lbal == 0xaa))
686 return 1; /* we found a device */
688 return 0; /* nothing found */
692 * ata_devchk - PATA device presence detection
693 * @ap: ATA channel to examine
694 * @device: Device to examine (starting at zero)
696 * Dispatch ATA device presence detection, depending
697 * on whether we are using PIO or MMIO to talk to the
698 * ATA shadow registers.
704 static unsigned int ata_devchk(struct ata_port *ap,
707 if (ap->flags & ATA_FLAG_MMIO)
708 return ata_mmio_devchk(ap, device);
709 return ata_pio_devchk(ap, device);
713 * ata_dev_classify - determine device type based on ATA-spec signature
714 * @tf: ATA taskfile register set for device to be identified
716 * Determine from taskfile register contents whether a device is
717 * ATA or ATAPI, as per "Signature and persistence" section
718 * of ATA/PI spec (volume 1, sect 5.14).
724 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
725 * the event of failure.
728 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
730 /* Apple's open source Darwin code hints that some devices only
731 * put a proper signature into the LBA mid/high registers,
732 * So, we only check those. It's sufficient for uniqueness.
735 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
736 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
737 DPRINTK("found ATA device by sig\n");
741 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
742 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
743 DPRINTK("found ATAPI device by sig\n");
744 return ATA_DEV_ATAPI;
747 DPRINTK("unknown device\n");
748 return ATA_DEV_UNKNOWN;
752 * ata_dev_try_classify - Parse returned ATA device signature
753 * @ap: ATA channel to examine
754 * @device: Device to examine (starting at zero)
755 * @r_err: Value of error register on completion
757 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
758 * an ATA/ATAPI-defined set of values is placed in the ATA
759 * shadow registers, indicating the results of device detection
762 * Select the ATA device, and read the values from the ATA shadow
763 * registers. Then parse according to the Error register value,
764 * and the spec-defined values examined by ata_dev_classify().
770 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
774 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
776 struct ata_taskfile tf;
780 ap->ops->dev_select(ap, device);
782 memset(&tf, 0, sizeof(tf));
784 ap->ops->tf_read(ap, &tf);
789 /* see if device passed diags: if master then continue and warn later */
790 if (err == 0 && device == 0)
791 /* diagnostic fail : do nothing _YET_ */
792 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
795 else if ((device == 0) && (err == 0x81))
800 /* determine if device is ATA or ATAPI */
801 class = ata_dev_classify(&tf);
803 if (class == ATA_DEV_UNKNOWN)
805 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
811 * ata_id_string - Convert IDENTIFY DEVICE page into string
812 * @id: IDENTIFY DEVICE results we will examine
813 * @s: string into which data is output
814 * @ofs: offset into identify device page
815 * @len: length of string to return. must be an even number.
817 * The strings in the IDENTIFY DEVICE page are broken up into
818 * 16-bit chunks. Run through the string, and output each
819 * 8-bit chunk linearly, regardless of platform.
825 void ata_id_string(const u16 *id, unsigned char *s,
826 unsigned int ofs, unsigned int len)
845 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
846 * @id: IDENTIFY DEVICE results we will examine
847 * @s: string into which data is output
848 * @ofs: offset into identify device page
849 * @len: length of string to return. must be an odd number.
851 * This function is identical to ata_id_string except that it
852 * trims trailing spaces and terminates the resulting string with
853 * null. @len must be actual maximum length (even number) + 1.
858 void ata_id_c_string(const u16 *id, unsigned char *s,
859 unsigned int ofs, unsigned int len)
865 ata_id_string(id, s, ofs, len - 1);
867 p = s + strnlen(s, len - 1);
868 while (p > s && p[-1] == ' ')
873 static u64 ata_id_n_sectors(const u16 *id)
875 if (ata_id_has_lba(id)) {
876 if (ata_id_has_lba48(id))
877 return ata_id_u64(id, 100);
879 return ata_id_u32(id, 60);
881 if (ata_id_current_chs_valid(id))
882 return ata_id_u32(id, 57);
884 return id[1] * id[3] * id[6];
889 * ata_noop_dev_select - Select device 0/1 on ATA bus
890 * @ap: ATA channel to manipulate
891 * @device: ATA device (numbered from zero) to select
893 * This function performs no actual function.
895 * May be used as the dev_select() entry in ata_port_operations.
900 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
906 * ata_std_dev_select - Select device 0/1 on ATA bus
907 * @ap: ATA channel to manipulate
908 * @device: ATA device (numbered from zero) to select
910 * Use the method defined in the ATA specification to
911 * make either device 0, or device 1, active on the
912 * ATA channel. Works with both PIO and MMIO.
914 * May be used as the dev_select() entry in ata_port_operations.
920 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
925 tmp = ATA_DEVICE_OBS;
927 tmp = ATA_DEVICE_OBS | ATA_DEV1;
929 if (ap->flags & ATA_FLAG_MMIO) {
930 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
932 outb(tmp, ap->ioaddr.device_addr);
934 ata_pause(ap); /* needed; also flushes, for mmio */
938 * ata_dev_select - Select device 0/1 on ATA bus
939 * @ap: ATA channel to manipulate
940 * @device: ATA device (numbered from zero) to select
941 * @wait: non-zero to wait for Status register BSY bit to clear
942 * @can_sleep: non-zero if context allows sleeping
944 * Use the method defined in the ATA specification to
945 * make either device 0, or device 1, active on the
948 * This is a high-level version of ata_std_dev_select(),
949 * which additionally provides the services of inserting
950 * the proper pauses and status polling, where needed.
956 void ata_dev_select(struct ata_port *ap, unsigned int device,
957 unsigned int wait, unsigned int can_sleep)
959 if (ata_msg_probe(ap))
960 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
961 "device %u, wait %u\n", ap->id, device, wait);
966 ap->ops->dev_select(ap, device);
969 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
976 * ata_dump_id - IDENTIFY DEVICE info debugging output
977 * @id: IDENTIFY DEVICE page to dump
979 * Dump selected 16-bit words from the given IDENTIFY DEVICE
986 static inline void ata_dump_id(const u16 *id)
988 DPRINTK("49==0x%04x "
998 DPRINTK("80==0x%04x "
1008 DPRINTK("88==0x%04x "
1015 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1016 * @id: IDENTIFY data to compute xfer mask from
1018 * Compute the xfermask for this device. This is not as trivial
1019 * as it seems if we must consider early devices correctly.
1021 * FIXME: pre IDE drive timing (do we care ?).
1029 static unsigned int ata_id_xfermask(const u16 *id)
1031 unsigned int pio_mask, mwdma_mask, udma_mask;
1033 /* Usual case. Word 53 indicates word 64 is valid */
1034 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1035 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1039 /* If word 64 isn't valid then Word 51 high byte holds
1040 * the PIO timing number for the maximum. Turn it into
1043 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
1044 if (mode < 5) /* Valid PIO range */
1045 pio_mask = (2 << mode) - 1;
1049 /* But wait.. there's more. Design your standards by
1050 * committee and you too can get a free iordy field to
1051 * process. However its the speeds not the modes that
1052 * are supported... Note drivers using the timing API
1053 * will get this right anyway
1057 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
1059 if (ata_id_is_cfa(id)) {
1061 * Process compact flash extended modes
1063 int pio = id[163] & 0x7;
1064 int dma = (id[163] >> 3) & 7;
1067 pio_mask |= (1 << 5);
1069 pio_mask |= (1 << 6);
1071 mwdma_mask |= (1 << 3);
1073 mwdma_mask |= (1 << 4);
1077 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1078 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1080 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1084 * ata_port_queue_task - Queue port_task
1085 * @ap: The ata_port to queue port_task for
1086 * @fn: workqueue function to be scheduled
1087 * @data: data for @fn to use
1088 * @delay: delay time for workqueue function
1090 * Schedule @fn(@data) for execution after @delay jiffies using
1091 * port_task. There is one port_task per port and it's the
1092 * user(low level driver)'s responsibility to make sure that only
1093 * one task is active at any given time.
1095 * libata core layer takes care of synchronization between
1096 * port_task and EH. ata_port_queue_task() may be ignored for EH
1100 * Inherited from caller.
1102 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1103 unsigned long delay)
1107 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1110 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1111 ap->port_task_data = data;
1113 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1115 /* rc == 0 means that another user is using port task */
1120 * ata_port_flush_task - Flush port_task
1121 * @ap: The ata_port to flush port_task for
1123 * After this function completes, port_task is guranteed not to
1124 * be running or scheduled.
1127 * Kernel thread context (may sleep)
1129 void ata_port_flush_task(struct ata_port *ap)
1131 unsigned long flags;
1135 spin_lock_irqsave(ap->lock, flags);
1136 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1137 spin_unlock_irqrestore(ap->lock, flags);
1139 DPRINTK("flush #1\n");
1140 flush_workqueue(ata_wq);
1143 * At this point, if a task is running, it's guaranteed to see
1144 * the FLUSH flag; thus, it will never queue pio tasks again.
1147 if (!cancel_delayed_work(&ap->port_task)) {
1148 if (ata_msg_ctl(ap))
1149 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1151 flush_workqueue(ata_wq);
1154 spin_lock_irqsave(ap->lock, flags);
1155 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1156 spin_unlock_irqrestore(ap->lock, flags);
1158 if (ata_msg_ctl(ap))
1159 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1162 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1164 struct completion *waiting = qc->private_data;
1170 * ata_exec_internal_sg - execute libata internal command
1171 * @dev: Device to which the command is sent
1172 * @tf: Taskfile registers for the command and the result
1173 * @cdb: CDB for packet command
1174 * @dma_dir: Data tranfer direction of the command
1175 * @sg: sg list for the data buffer of the command
1176 * @n_elem: Number of sg entries
1178 * Executes libata internal command with timeout. @tf contains
1179 * command on entry and result on return. Timeout and error
1180 * conditions are reported via return value. No recovery action
1181 * is taken after a command times out. It's caller's duty to
1182 * clean up after timeout.
1185 * None. Should be called with kernel context, might sleep.
1188 * Zero on success, AC_ERR_* mask on failure
1190 unsigned ata_exec_internal_sg(struct ata_device *dev,
1191 struct ata_taskfile *tf, const u8 *cdb,
1192 int dma_dir, struct scatterlist *sg,
1193 unsigned int n_elem)
1195 struct ata_port *ap = dev->ap;
1196 u8 command = tf->command;
1197 struct ata_queued_cmd *qc;
1198 unsigned int tag, preempted_tag;
1199 u32 preempted_sactive, preempted_qc_active;
1200 DECLARE_COMPLETION_ONSTACK(wait);
1201 unsigned long flags;
1202 unsigned int err_mask;
1205 spin_lock_irqsave(ap->lock, flags);
1207 /* no internal command while frozen */
1208 if (ap->pflags & ATA_PFLAG_FROZEN) {
1209 spin_unlock_irqrestore(ap->lock, flags);
1210 return AC_ERR_SYSTEM;
1213 /* initialize internal qc */
1215 /* XXX: Tag 0 is used for drivers with legacy EH as some
1216 * drivers choke if any other tag is given. This breaks
1217 * ata_tag_internal() test for those drivers. Don't use new
1218 * EH stuff without converting to it.
1220 if (ap->ops->error_handler)
1221 tag = ATA_TAG_INTERNAL;
1225 if (test_and_set_bit(tag, &ap->qc_allocated))
1227 qc = __ata_qc_from_tag(ap, tag);
1235 preempted_tag = ap->active_tag;
1236 preempted_sactive = ap->sactive;
1237 preempted_qc_active = ap->qc_active;
1238 ap->active_tag = ATA_TAG_POISON;
1242 /* prepare & issue qc */
1245 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1246 qc->flags |= ATA_QCFLAG_RESULT_TF;
1247 qc->dma_dir = dma_dir;
1248 if (dma_dir != DMA_NONE) {
1249 unsigned int i, buflen = 0;
1251 for (i = 0; i < n_elem; i++)
1252 buflen += sg[i].length;
1254 ata_sg_init(qc, sg, n_elem);
1255 qc->nbytes = buflen;
1258 qc->private_data = &wait;
1259 qc->complete_fn = ata_qc_complete_internal;
1263 spin_unlock_irqrestore(ap->lock, flags);
1265 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1267 ata_port_flush_task(ap);
1270 spin_lock_irqsave(ap->lock, flags);
1272 /* We're racing with irq here. If we lose, the
1273 * following test prevents us from completing the qc
1274 * twice. If we win, the port is frozen and will be
1275 * cleaned up by ->post_internal_cmd().
1277 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1278 qc->err_mask |= AC_ERR_TIMEOUT;
1280 if (ap->ops->error_handler)
1281 ata_port_freeze(ap);
1283 ata_qc_complete(qc);
1285 if (ata_msg_warn(ap))
1286 ata_dev_printk(dev, KERN_WARNING,
1287 "qc timeout (cmd 0x%x)\n", command);
1290 spin_unlock_irqrestore(ap->lock, flags);
1293 /* do post_internal_cmd */
1294 if (ap->ops->post_internal_cmd)
1295 ap->ops->post_internal_cmd(qc);
1297 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1298 if (ata_msg_warn(ap))
1299 ata_dev_printk(dev, KERN_WARNING,
1300 "zero err_mask for failed "
1301 "internal command, assuming AC_ERR_OTHER\n");
1302 qc->err_mask |= AC_ERR_OTHER;
1306 spin_lock_irqsave(ap->lock, flags);
1308 *tf = qc->result_tf;
1309 err_mask = qc->err_mask;
1312 ap->active_tag = preempted_tag;
1313 ap->sactive = preempted_sactive;
1314 ap->qc_active = preempted_qc_active;
1316 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1317 * Until those drivers are fixed, we detect the condition
1318 * here, fail the command with AC_ERR_SYSTEM and reenable the
1321 * Note that this doesn't change any behavior as internal
1322 * command failure results in disabling the device in the
1323 * higher layer for LLDDs without new reset/EH callbacks.
1325 * Kill the following code as soon as those drivers are fixed.
1327 if (ap->flags & ATA_FLAG_DISABLED) {
1328 err_mask |= AC_ERR_SYSTEM;
1332 spin_unlock_irqrestore(ap->lock, flags);
1338 * ata_exec_internal - execute libata internal command
1339 * @dev: Device to which the command is sent
1340 * @tf: Taskfile registers for the command and the result
1341 * @cdb: CDB for packet command
1342 * @dma_dir: Data tranfer direction of the command
1343 * @buf: Data buffer of the command
1344 * @buflen: Length of data buffer
1346 * Wrapper around ata_exec_internal_sg() which takes simple
1347 * buffer instead of sg list.
1350 * None. Should be called with kernel context, might sleep.
1353 * Zero on success, AC_ERR_* mask on failure
1355 unsigned ata_exec_internal(struct ata_device *dev,
1356 struct ata_taskfile *tf, const u8 *cdb,
1357 int dma_dir, void *buf, unsigned int buflen)
1359 struct scatterlist *psg = NULL, sg;
1360 unsigned int n_elem = 0;
1362 if (dma_dir != DMA_NONE) {
1364 sg_init_one(&sg, buf, buflen);
1369 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1373 * ata_do_simple_cmd - execute simple internal command
1374 * @dev: Device to which the command is sent
1375 * @cmd: Opcode to execute
1377 * Execute a 'simple' command, that only consists of the opcode
1378 * 'cmd' itself, without filling any other registers
1381 * Kernel thread context (may sleep).
1384 * Zero on success, AC_ERR_* mask on failure
1386 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1388 struct ata_taskfile tf;
1390 ata_tf_init(dev, &tf);
1393 tf.flags |= ATA_TFLAG_DEVICE;
1394 tf.protocol = ATA_PROT_NODATA;
1396 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1400 * ata_pio_need_iordy - check if iordy needed
1403 * Check if the current speed of the device requires IORDY. Used
1404 * by various controllers for chip configuration.
1407 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1410 int speed = adev->pio_mode - XFER_PIO_0;
1417 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1419 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1420 pio = adev->id[ATA_ID_EIDE_PIO];
1421 /* Is the speed faster than the drive allows non IORDY ? */
1423 /* This is cycle times not frequency - watch the logic! */
1424 if (pio > 240) /* PIO2 is 240nS per cycle */
1433 * ata_dev_read_id - Read ID data from the specified device
1434 * @dev: target device
1435 * @p_class: pointer to class of the target device (may be changed)
1436 * @flags: ATA_READID_* flags
1437 * @id: buffer to read IDENTIFY data into
1439 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1440 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1441 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1442 * for pre-ATA4 drives.
1445 * Kernel thread context (may sleep)
1448 * 0 on success, -errno otherwise.
1450 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1451 unsigned int flags, u16 *id)
1453 struct ata_port *ap = dev->ap;
1454 unsigned int class = *p_class;
1455 struct ata_taskfile tf;
1456 unsigned int err_mask = 0;
1460 if (ata_msg_ctl(ap))
1461 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1462 __FUNCTION__, ap->id, dev->devno);
1464 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1467 ata_tf_init(dev, &tf);
1471 tf.command = ATA_CMD_ID_ATA;
1474 tf.command = ATA_CMD_ID_ATAPI;
1478 reason = "unsupported class";
1482 tf.protocol = ATA_PROT_PIO;
1483 tf.flags |= ATA_TFLAG_POLLING; /* for polling presence detection */
1485 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1486 id, sizeof(id[0]) * ATA_ID_WORDS);
1488 if (err_mask & AC_ERR_NODEV_HINT) {
1489 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1490 ap->id, dev->devno);
1495 reason = "I/O error";
1499 swap_buf_le16(id, ATA_ID_WORDS);
1503 reason = "device reports illegal type";
1505 if (class == ATA_DEV_ATA) {
1506 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1509 if (ata_id_is_ata(id))
1513 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1515 * The exact sequence expected by certain pre-ATA4 drives is:
1518 * INITIALIZE DEVICE PARAMETERS
1520 * Some drives were very specific about that exact sequence.
1522 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1523 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1526 reason = "INIT_DEV_PARAMS failed";
1530 /* current CHS translation info (id[53-58]) might be
1531 * changed. reread the identify device info.
1533 flags &= ~ATA_READID_POSTRESET;
1543 if (ata_msg_warn(ap))
1544 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1545 "(%s, err_mask=0x%x)\n", reason, err_mask);
1549 static inline u8 ata_dev_knobble(struct ata_device *dev)
1551 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1554 static void ata_dev_config_ncq(struct ata_device *dev,
1555 char *desc, size_t desc_sz)
1557 struct ata_port *ap = dev->ap;
1558 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1560 if (!ata_id_has_ncq(dev->id)) {
1564 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1565 snprintf(desc, desc_sz, "NCQ (not used)");
1568 if (ap->flags & ATA_FLAG_NCQ) {
1569 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1570 dev->flags |= ATA_DFLAG_NCQ;
1573 if (hdepth >= ddepth)
1574 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1576 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1579 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1583 if (ap->scsi_host) {
1584 unsigned int len = 0;
1586 for (i = 0; i < ATA_MAX_DEVICES; i++)
1587 len = max(len, ap->device[i].cdb_len);
1589 ap->scsi_host->max_cmd_len = len;
1594 * ata_dev_configure - Configure the specified ATA/ATAPI device
1595 * @dev: Target device to configure
1597 * Configure @dev according to @dev->id. Generic and low-level
1598 * driver specific fixups are also applied.
1601 * Kernel thread context (may sleep)
1604 * 0 on success, -errno otherwise
1606 int ata_dev_configure(struct ata_device *dev)
1608 struct ata_port *ap = dev->ap;
1609 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1610 const u16 *id = dev->id;
1611 unsigned int xfer_mask;
1612 char revbuf[7]; /* XYZ-99\0 */
1615 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1616 ata_dev_printk(dev, KERN_INFO,
1617 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1618 __FUNCTION__, ap->id, dev->devno);
1622 if (ata_msg_probe(ap))
1623 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1624 __FUNCTION__, ap->id, dev->devno);
1626 /* print device capabilities */
1627 if (ata_msg_probe(ap))
1628 ata_dev_printk(dev, KERN_DEBUG,
1629 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1630 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1632 id[49], id[82], id[83], id[84],
1633 id[85], id[86], id[87], id[88]);
1635 /* initialize to-be-configured parameters */
1636 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1637 dev->max_sectors = 0;
1645 * common ATA, ATAPI feature tests
1648 /* find max transfer mode; for printk only */
1649 xfer_mask = ata_id_xfermask(id);
1651 if (ata_msg_probe(ap))
1654 /* ATA-specific feature tests */
1655 if (dev->class == ATA_DEV_ATA) {
1656 if (ata_id_is_cfa(id)) {
1657 if (id[162] & 1) /* CPRM may make this media unusable */
1658 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1659 ap->id, dev->devno);
1660 snprintf(revbuf, 7, "CFA");
1663 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1665 dev->n_sectors = ata_id_n_sectors(id);
1667 if (ata_id_has_lba(id)) {
1668 const char *lba_desc;
1672 dev->flags |= ATA_DFLAG_LBA;
1673 if (ata_id_has_lba48(id)) {
1674 dev->flags |= ATA_DFLAG_LBA48;
1677 if (dev->n_sectors >= (1UL << 28) &&
1678 ata_id_has_flush_ext(id))
1679 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1683 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1685 /* print device info to dmesg */
1686 if (ata_msg_drv(ap) && print_info)
1687 ata_dev_printk(dev, KERN_INFO, "%s, "
1688 "max %s, %Lu sectors: %s %s\n",
1690 ata_mode_string(xfer_mask),
1691 (unsigned long long)dev->n_sectors,
1692 lba_desc, ncq_desc);
1696 /* Default translation */
1697 dev->cylinders = id[1];
1699 dev->sectors = id[6];
1701 if (ata_id_current_chs_valid(id)) {
1702 /* Current CHS translation is valid. */
1703 dev->cylinders = id[54];
1704 dev->heads = id[55];
1705 dev->sectors = id[56];
1708 /* print device info to dmesg */
1709 if (ata_msg_drv(ap) && print_info)
1710 ata_dev_printk(dev, KERN_INFO, "%s, "
1711 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1713 ata_mode_string(xfer_mask),
1714 (unsigned long long)dev->n_sectors,
1715 dev->cylinders, dev->heads,
1719 if (dev->id[59] & 0x100) {
1720 dev->multi_count = dev->id[59] & 0xff;
1721 if (ata_msg_drv(ap) && print_info)
1722 ata_dev_printk(dev, KERN_INFO,
1723 "ata%u: dev %u multi count %u\n",
1724 ap->id, dev->devno, dev->multi_count);
1730 /* ATAPI-specific feature tests */
1731 else if (dev->class == ATA_DEV_ATAPI) {
1732 char *cdb_intr_string = "";
1734 rc = atapi_cdb_len(id);
1735 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1736 if (ata_msg_warn(ap))
1737 ata_dev_printk(dev, KERN_WARNING,
1738 "unsupported CDB len\n");
1742 dev->cdb_len = (unsigned int) rc;
1744 if (ata_id_cdb_intr(dev->id)) {
1745 dev->flags |= ATA_DFLAG_CDB_INTR;
1746 cdb_intr_string = ", CDB intr";
1749 /* print device info to dmesg */
1750 if (ata_msg_drv(ap) && print_info)
1751 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1752 ata_mode_string(xfer_mask),
1756 /* determine max_sectors */
1757 dev->max_sectors = ATA_MAX_SECTORS;
1758 if (dev->flags & ATA_DFLAG_LBA48)
1759 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1761 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1762 /* Let the user know. We don't want to disallow opens for
1763 rescue purposes, or in case the vendor is just a blithering
1766 ata_dev_printk(dev, KERN_WARNING,
1767 "Drive reports diagnostics failure. This may indicate a drive\n");
1768 ata_dev_printk(dev, KERN_WARNING,
1769 "fault or invalid emulation. Contact drive vendor for information.\n");
1773 ata_set_port_max_cmd_len(ap);
1775 /* limit bridge transfers to udma5, 200 sectors */
1776 if (ata_dev_knobble(dev)) {
1777 if (ata_msg_drv(ap) && print_info)
1778 ata_dev_printk(dev, KERN_INFO,
1779 "applying bridge limits\n");
1780 dev->udma_mask &= ATA_UDMA5;
1781 dev->max_sectors = ATA_MAX_SECTORS;
1784 if (ap->ops->dev_config)
1785 ap->ops->dev_config(ap, dev);
1787 if (ata_msg_probe(ap))
1788 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1789 __FUNCTION__, ata_chk_status(ap));
1793 if (ata_msg_probe(ap))
1794 ata_dev_printk(dev, KERN_DEBUG,
1795 "%s: EXIT, err\n", __FUNCTION__);
1800 * ata_bus_probe - Reset and probe ATA bus
1803 * Master ATA bus probing function. Initiates a hardware-dependent
1804 * bus reset, then attempts to identify any devices found on
1808 * PCI/etc. bus probe sem.
1811 * Zero on success, negative errno otherwise.
1814 int ata_bus_probe(struct ata_port *ap)
1816 unsigned int classes[ATA_MAX_DEVICES];
1817 int tries[ATA_MAX_DEVICES];
1818 int i, rc, down_xfermask;
1819 struct ata_device *dev;
1823 for (i = 0; i < ATA_MAX_DEVICES; i++)
1824 tries[i] = ATA_PROBE_MAX_TRIES;
1829 /* reset and determine device classes */
1830 ap->ops->phy_reset(ap);
1832 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1833 dev = &ap->device[i];
1835 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1836 dev->class != ATA_DEV_UNKNOWN)
1837 classes[dev->devno] = dev->class;
1839 classes[dev->devno] = ATA_DEV_NONE;
1841 dev->class = ATA_DEV_UNKNOWN;
1846 /* after the reset the device state is PIO 0 and the controller
1847 state is undefined. Record the mode */
1849 for (i = 0; i < ATA_MAX_DEVICES; i++)
1850 ap->device[i].pio_mode = XFER_PIO_0;
1852 /* read IDENTIFY page and configure devices */
1853 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1854 dev = &ap->device[i];
1857 dev->class = classes[i];
1859 if (!ata_dev_enabled(dev))
1862 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1867 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1868 rc = ata_dev_configure(dev);
1869 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1874 /* configure transfer mode */
1875 rc = ata_set_mode(ap, &dev);
1881 for (i = 0; i < ATA_MAX_DEVICES; i++)
1882 if (ata_dev_enabled(&ap->device[i]))
1885 /* no device present, disable port */
1886 ata_port_disable(ap);
1887 ap->ops->port_disable(ap);
1894 tries[dev->devno] = 0;
1897 sata_down_spd_limit(ap);
1900 tries[dev->devno]--;
1901 if (down_xfermask &&
1902 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1903 tries[dev->devno] = 0;
1906 if (!tries[dev->devno]) {
1907 ata_down_xfermask_limit(dev, 1);
1908 ata_dev_disable(dev);
1915 * ata_port_probe - Mark port as enabled
1916 * @ap: Port for which we indicate enablement
1918 * Modify @ap data structure such that the system
1919 * thinks that the entire port is enabled.
1921 * LOCKING: host lock, or some other form of
1925 void ata_port_probe(struct ata_port *ap)
1927 ap->flags &= ~ATA_FLAG_DISABLED;
1931 * sata_print_link_status - Print SATA link status
1932 * @ap: SATA port to printk link status about
1934 * This function prints link speed and status of a SATA link.
1939 static void sata_print_link_status(struct ata_port *ap)
1941 u32 sstatus, scontrol, tmp;
1943 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1945 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1947 if (ata_port_online(ap)) {
1948 tmp = (sstatus >> 4) & 0xf;
1949 ata_port_printk(ap, KERN_INFO,
1950 "SATA link up %s (SStatus %X SControl %X)\n",
1951 sata_spd_string(tmp), sstatus, scontrol);
1953 ata_port_printk(ap, KERN_INFO,
1954 "SATA link down (SStatus %X SControl %X)\n",
1960 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1961 * @ap: SATA port associated with target SATA PHY.
1963 * This function issues commands to standard SATA Sxxx
1964 * PHY registers, to wake up the phy (and device), and
1965 * clear any reset condition.
1968 * PCI/etc. bus probe sem.
1971 void __sata_phy_reset(struct ata_port *ap)
1974 unsigned long timeout = jiffies + (HZ * 5);
1976 if (ap->flags & ATA_FLAG_SATA_RESET) {
1977 /* issue phy wake/reset */
1978 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1979 /* Couldn't find anything in SATA I/II specs, but
1980 * AHCI-1.1 10.4.2 says at least 1 ms. */
1983 /* phy wake/clear reset */
1984 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1986 /* wait for phy to become ready, if necessary */
1989 sata_scr_read(ap, SCR_STATUS, &sstatus);
1990 if ((sstatus & 0xf) != 1)
1992 } while (time_before(jiffies, timeout));
1994 /* print link status */
1995 sata_print_link_status(ap);
1997 /* TODO: phy layer with polling, timeouts, etc. */
1998 if (!ata_port_offline(ap))
2001 ata_port_disable(ap);
2003 if (ap->flags & ATA_FLAG_DISABLED)
2006 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2007 ata_port_disable(ap);
2011 ap->cbl = ATA_CBL_SATA;
2015 * sata_phy_reset - Reset SATA bus.
2016 * @ap: SATA port associated with target SATA PHY.
2018 * This function resets the SATA bus, and then probes
2019 * the bus for devices.
2022 * PCI/etc. bus probe sem.
2025 void sata_phy_reset(struct ata_port *ap)
2027 __sata_phy_reset(ap);
2028 if (ap->flags & ATA_FLAG_DISABLED)
2034 * ata_dev_pair - return other device on cable
2037 * Obtain the other device on the same cable, or if none is
2038 * present NULL is returned
2041 struct ata_device *ata_dev_pair(struct ata_device *adev)
2043 struct ata_port *ap = adev->ap;
2044 struct ata_device *pair = &ap->device[1 - adev->devno];
2045 if (!ata_dev_enabled(pair))
2051 * ata_port_disable - Disable port.
2052 * @ap: Port to be disabled.
2054 * Modify @ap data structure such that the system
2055 * thinks that the entire port is disabled, and should
2056 * never attempt to probe or communicate with devices
2059 * LOCKING: host lock, or some other form of
2063 void ata_port_disable(struct ata_port *ap)
2065 ap->device[0].class = ATA_DEV_NONE;
2066 ap->device[1].class = ATA_DEV_NONE;
2067 ap->flags |= ATA_FLAG_DISABLED;
2071 * sata_down_spd_limit - adjust SATA spd limit downward
2072 * @ap: Port to adjust SATA spd limit for
2074 * Adjust SATA spd limit of @ap downward. Note that this
2075 * function only adjusts the limit. The change must be applied
2076 * using sata_set_spd().
2079 * Inherited from caller.
2082 * 0 on success, negative errno on failure
2084 int sata_down_spd_limit(struct ata_port *ap)
2086 u32 sstatus, spd, mask;
2089 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2093 mask = ap->sata_spd_limit;
2096 highbit = fls(mask) - 1;
2097 mask &= ~(1 << highbit);
2099 spd = (sstatus >> 4) & 0xf;
2103 mask &= (1 << spd) - 1;
2107 ap->sata_spd_limit = mask;
2109 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2110 sata_spd_string(fls(mask)));
2115 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2119 if (ap->sata_spd_limit == UINT_MAX)
2122 limit = fls(ap->sata_spd_limit);
2124 spd = (*scontrol >> 4) & 0xf;
2125 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2127 return spd != limit;
2131 * sata_set_spd_needed - is SATA spd configuration needed
2132 * @ap: Port in question
2134 * Test whether the spd limit in SControl matches
2135 * @ap->sata_spd_limit. This function is used to determine
2136 * whether hardreset is necessary to apply SATA spd
2140 * Inherited from caller.
2143 * 1 if SATA spd configuration is needed, 0 otherwise.
2145 int sata_set_spd_needed(struct ata_port *ap)
2149 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2152 return __sata_set_spd_needed(ap, &scontrol);
2156 * sata_set_spd - set SATA spd according to spd limit
2157 * @ap: Port to set SATA spd for
2159 * Set SATA spd of @ap according to sata_spd_limit.
2162 * Inherited from caller.
2165 * 0 if spd doesn't need to be changed, 1 if spd has been
2166 * changed. Negative errno if SCR registers are inaccessible.
2168 int sata_set_spd(struct ata_port *ap)
2173 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2176 if (!__sata_set_spd_needed(ap, &scontrol))
2179 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2186 * This mode timing computation functionality is ported over from
2187 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2190 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2191 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2192 * for UDMA6, which is currently supported only by Maxtor drives.
2194 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2197 static const struct ata_timing ata_timing[] = {
2199 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2200 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2201 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2202 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2204 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2205 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2206 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2207 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2208 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2210 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2212 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2213 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2214 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2216 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2217 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2218 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2220 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2221 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2222 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2223 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2225 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2226 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2227 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2229 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2234 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2235 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2237 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2239 q->setup = EZ(t->setup * 1000, T);
2240 q->act8b = EZ(t->act8b * 1000, T);
2241 q->rec8b = EZ(t->rec8b * 1000, T);
2242 q->cyc8b = EZ(t->cyc8b * 1000, T);
2243 q->active = EZ(t->active * 1000, T);
2244 q->recover = EZ(t->recover * 1000, T);
2245 q->cycle = EZ(t->cycle * 1000, T);
2246 q->udma = EZ(t->udma * 1000, UT);
2249 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2250 struct ata_timing *m, unsigned int what)
2252 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2253 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2254 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2255 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2256 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2257 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2258 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2259 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2262 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2264 const struct ata_timing *t;
2266 for (t = ata_timing; t->mode != speed; t++)
2267 if (t->mode == 0xFF)
2272 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2273 struct ata_timing *t, int T, int UT)
2275 const struct ata_timing *s;
2276 struct ata_timing p;
2282 if (!(s = ata_timing_find_mode(speed)))
2285 memcpy(t, s, sizeof(*s));
2288 * If the drive is an EIDE drive, it can tell us it needs extended
2289 * PIO/MW_DMA cycle timing.
2292 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2293 memset(&p, 0, sizeof(p));
2294 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2295 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2296 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2297 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2298 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2300 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2304 * Convert the timing to bus clock counts.
2307 ata_timing_quantize(t, t, T, UT);
2310 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2311 * S.M.A.R.T * and some other commands. We have to ensure that the
2312 * DMA cycle timing is slower/equal than the fastest PIO timing.
2315 if (speed > XFER_PIO_6) {
2316 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2317 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2321 * Lengthen active & recovery time so that cycle time is correct.
2324 if (t->act8b + t->rec8b < t->cyc8b) {
2325 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2326 t->rec8b = t->cyc8b - t->act8b;
2329 if (t->active + t->recover < t->cycle) {
2330 t->active += (t->cycle - (t->active + t->recover)) / 2;
2331 t->recover = t->cycle - t->active;
2338 * ata_down_xfermask_limit - adjust dev xfer masks downward
2339 * @dev: Device to adjust xfer masks
2340 * @force_pio0: Force PIO0
2342 * Adjust xfer masks of @dev downward. Note that this function
2343 * does not apply the change. Invoking ata_set_mode() afterwards
2344 * will apply the limit.
2347 * Inherited from caller.
2350 * 0 on success, negative errno on failure
2352 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2354 unsigned long xfer_mask;
2357 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2362 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2363 if (xfer_mask & ATA_MASK_UDMA)
2364 xfer_mask &= ~ATA_MASK_MWDMA;
2366 highbit = fls(xfer_mask) - 1;
2367 xfer_mask &= ~(1 << highbit);
2369 xfer_mask &= 1 << ATA_SHIFT_PIO;
2373 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2376 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2377 ata_mode_string(xfer_mask));
2385 static int ata_dev_set_mode(struct ata_device *dev)
2387 struct ata_eh_context *ehc = &dev->ap->eh_context;
2388 unsigned int err_mask;
2391 dev->flags &= ~ATA_DFLAG_PIO;
2392 if (dev->xfer_shift == ATA_SHIFT_PIO)
2393 dev->flags |= ATA_DFLAG_PIO;
2395 err_mask = ata_dev_set_xfermode(dev);
2397 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2398 "(err_mask=0x%x)\n", err_mask);
2402 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2403 rc = ata_dev_revalidate(dev, 0);
2404 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2408 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2409 dev->xfer_shift, (int)dev->xfer_mode);
2411 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2412 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2417 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2418 * @ap: port on which timings will be programmed
2419 * @r_failed_dev: out paramter for failed device
2421 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2422 * ata_set_mode() fails, pointer to the failing device is
2423 * returned in @r_failed_dev.
2426 * PCI/etc. bus probe sem.
2429 * 0 on success, negative errno otherwise
2431 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2433 struct ata_device *dev;
2434 int i, rc = 0, used_dma = 0, found = 0;
2436 /* has private set_mode? */
2437 if (ap->ops->set_mode)
2438 return ap->ops->set_mode(ap, r_failed_dev);
2440 /* step 1: calculate xfer_mask */
2441 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2442 unsigned int pio_mask, dma_mask;
2444 dev = &ap->device[i];
2446 if (!ata_dev_enabled(dev))
2449 ata_dev_xfermask(dev);
2451 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2452 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2453 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2454 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2463 /* step 2: always set host PIO timings */
2464 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2465 dev = &ap->device[i];
2466 if (!ata_dev_enabled(dev))
2469 if (!dev->pio_mode) {
2470 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2475 dev->xfer_mode = dev->pio_mode;
2476 dev->xfer_shift = ATA_SHIFT_PIO;
2477 if (ap->ops->set_piomode)
2478 ap->ops->set_piomode(ap, dev);
2481 /* step 3: set host DMA timings */
2482 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2483 dev = &ap->device[i];
2485 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2488 dev->xfer_mode = dev->dma_mode;
2489 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2490 if (ap->ops->set_dmamode)
2491 ap->ops->set_dmamode(ap, dev);
2494 /* step 4: update devices' xfer mode */
2495 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2496 dev = &ap->device[i];
2498 /* don't update suspended devices' xfer mode */
2499 if (!ata_dev_ready(dev))
2502 rc = ata_dev_set_mode(dev);
2507 /* Record simplex status. If we selected DMA then the other
2508 * host channels are not permitted to do so.
2510 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2511 ap->host->simplex_claimed = 1;
2513 /* step5: chip specific finalisation */
2514 if (ap->ops->post_set_mode)
2515 ap->ops->post_set_mode(ap);
2519 *r_failed_dev = dev;
2524 * ata_tf_to_host - issue ATA taskfile to host controller
2525 * @ap: port to which command is being issued
2526 * @tf: ATA taskfile register set
2528 * Issues ATA taskfile register set to ATA host controller,
2529 * with proper synchronization with interrupt handler and
2533 * spin_lock_irqsave(host lock)
2536 static inline void ata_tf_to_host(struct ata_port *ap,
2537 const struct ata_taskfile *tf)
2539 ap->ops->tf_load(ap, tf);
2540 ap->ops->exec_command(ap, tf);
2544 * ata_busy_sleep - sleep until BSY clears, or timeout
2545 * @ap: port containing status register to be polled
2546 * @tmout_pat: impatience timeout
2547 * @tmout: overall timeout
2549 * Sleep until ATA Status register bit BSY clears,
2550 * or a timeout occurs.
2553 * Kernel thread context (may sleep).
2556 * 0 on success, -errno otherwise.
2558 int ata_busy_sleep(struct ata_port *ap,
2559 unsigned long tmout_pat, unsigned long tmout)
2561 unsigned long timer_start, timeout;
2564 status = ata_busy_wait(ap, ATA_BUSY, 300);
2565 timer_start = jiffies;
2566 timeout = timer_start + tmout_pat;
2567 while (status != 0xff && (status & ATA_BUSY) &&
2568 time_before(jiffies, timeout)) {
2570 status = ata_busy_wait(ap, ATA_BUSY, 3);
2573 if (status != 0xff && (status & ATA_BUSY))
2574 ata_port_printk(ap, KERN_WARNING,
2575 "port is slow to respond, please be patient "
2576 "(Status 0x%x)\n", status);
2578 timeout = timer_start + tmout;
2579 while (status != 0xff && (status & ATA_BUSY) &&
2580 time_before(jiffies, timeout)) {
2582 status = ata_chk_status(ap);
2588 if (status & ATA_BUSY) {
2589 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2590 "(%lu secs, Status 0x%x)\n",
2591 tmout / HZ, status);
2598 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2600 struct ata_ioports *ioaddr = &ap->ioaddr;
2601 unsigned int dev0 = devmask & (1 << 0);
2602 unsigned int dev1 = devmask & (1 << 1);
2603 unsigned long timeout;
2605 /* if device 0 was found in ata_devchk, wait for its
2609 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2611 /* if device 1 was found in ata_devchk, wait for
2612 * register access, then wait for BSY to clear
2614 timeout = jiffies + ATA_TMOUT_BOOT;
2618 ap->ops->dev_select(ap, 1);
2619 if (ap->flags & ATA_FLAG_MMIO) {
2620 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2621 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2623 nsect = inb(ioaddr->nsect_addr);
2624 lbal = inb(ioaddr->lbal_addr);
2626 if ((nsect == 1) && (lbal == 1))
2628 if (time_after(jiffies, timeout)) {
2632 msleep(50); /* give drive a breather */
2635 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2637 /* is all this really necessary? */
2638 ap->ops->dev_select(ap, 0);
2640 ap->ops->dev_select(ap, 1);
2642 ap->ops->dev_select(ap, 0);
2645 static unsigned int ata_bus_softreset(struct ata_port *ap,
2646 unsigned int devmask)
2648 struct ata_ioports *ioaddr = &ap->ioaddr;
2650 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2652 /* software reset. causes dev0 to be selected */
2653 if (ap->flags & ATA_FLAG_MMIO) {
2654 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2655 udelay(20); /* FIXME: flush */
2656 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2657 udelay(20); /* FIXME: flush */
2658 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2660 outb(ap->ctl, ioaddr->ctl_addr);
2662 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2664 outb(ap->ctl, ioaddr->ctl_addr);
2667 /* spec mandates ">= 2ms" before checking status.
2668 * We wait 150ms, because that was the magic delay used for
2669 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2670 * between when the ATA command register is written, and then
2671 * status is checked. Because waiting for "a while" before
2672 * checking status is fine, post SRST, we perform this magic
2673 * delay here as well.
2675 * Old drivers/ide uses the 2mS rule and then waits for ready
2679 /* Before we perform post reset processing we want to see if
2680 * the bus shows 0xFF because the odd clown forgets the D7
2681 * pulldown resistor.
2683 if (ata_check_status(ap) == 0xFF)
2686 ata_bus_post_reset(ap, devmask);
2692 * ata_bus_reset - reset host port and associated ATA channel
2693 * @ap: port to reset
2695 * This is typically the first time we actually start issuing
2696 * commands to the ATA channel. We wait for BSY to clear, then
2697 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2698 * result. Determine what devices, if any, are on the channel
2699 * by looking at the device 0/1 error register. Look at the signature
2700 * stored in each device's taskfile registers, to determine if
2701 * the device is ATA or ATAPI.
2704 * PCI/etc. bus probe sem.
2705 * Obtains host lock.
2708 * Sets ATA_FLAG_DISABLED if bus reset fails.
2711 void ata_bus_reset(struct ata_port *ap)
2713 struct ata_ioports *ioaddr = &ap->ioaddr;
2714 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2716 unsigned int dev0, dev1 = 0, devmask = 0;
2718 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2720 /* determine if device 0/1 are present */
2721 if (ap->flags & ATA_FLAG_SATA_RESET)
2724 dev0 = ata_devchk(ap, 0);
2726 dev1 = ata_devchk(ap, 1);
2730 devmask |= (1 << 0);
2732 devmask |= (1 << 1);
2734 /* select device 0 again */
2735 ap->ops->dev_select(ap, 0);
2737 /* issue bus reset */
2738 if (ap->flags & ATA_FLAG_SRST)
2739 if (ata_bus_softreset(ap, devmask))
2743 * determine by signature whether we have ATA or ATAPI devices
2745 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2746 if ((slave_possible) && (err != 0x81))
2747 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2749 /* re-enable interrupts */
2750 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2753 /* is double-select really necessary? */
2754 if (ap->device[1].class != ATA_DEV_NONE)
2755 ap->ops->dev_select(ap, 1);
2756 if (ap->device[0].class != ATA_DEV_NONE)
2757 ap->ops->dev_select(ap, 0);
2759 /* if no devices were detected, disable this port */
2760 if ((ap->device[0].class == ATA_DEV_NONE) &&
2761 (ap->device[1].class == ATA_DEV_NONE))
2764 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2765 /* set up device control for ATA_FLAG_SATA_RESET */
2766 if (ap->flags & ATA_FLAG_MMIO)
2767 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2769 outb(ap->ctl, ioaddr->ctl_addr);
2776 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2777 ap->ops->port_disable(ap);
2783 * sata_phy_debounce - debounce SATA phy status
2784 * @ap: ATA port to debounce SATA phy status for
2785 * @params: timing parameters { interval, duratinon, timeout } in msec
2787 * Make sure SStatus of @ap reaches stable state, determined by
2788 * holding the same value where DET is not 1 for @duration polled
2789 * every @interval, before @timeout. Timeout constraints the
2790 * beginning of the stable state. Because, after hot unplugging,
2791 * DET gets stuck at 1 on some controllers, this functions waits
2792 * until timeout then returns 0 if DET is stable at 1.
2795 * Kernel thread context (may sleep)
2798 * 0 on success, -errno on failure.
2800 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2802 unsigned long interval_msec = params[0];
2803 unsigned long duration = params[1] * HZ / 1000;
2804 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2805 unsigned long last_jiffies;
2809 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2814 last_jiffies = jiffies;
2817 msleep(interval_msec);
2818 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2824 if (cur == 1 && time_before(jiffies, timeout))
2826 if (time_after(jiffies, last_jiffies + duration))
2831 /* unstable, start over */
2833 last_jiffies = jiffies;
2836 if (time_after(jiffies, timeout))
2842 * sata_phy_resume - resume SATA phy
2843 * @ap: ATA port to resume SATA phy for
2844 * @params: timing parameters { interval, duratinon, timeout } in msec
2846 * Resume SATA phy of @ap and debounce it.
2849 * Kernel thread context (may sleep)
2852 * 0 on success, -errno on failure.
2854 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2859 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2862 scontrol = (scontrol & 0x0f0) | 0x300;
2864 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2867 /* Some PHYs react badly if SStatus is pounded immediately
2868 * after resuming. Delay 200ms before debouncing.
2872 return sata_phy_debounce(ap, params);
2875 static void ata_wait_spinup(struct ata_port *ap)
2877 struct ata_eh_context *ehc = &ap->eh_context;
2878 unsigned long end, secs;
2881 /* first, debounce phy if SATA */
2882 if (ap->cbl == ATA_CBL_SATA) {
2883 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2885 /* if debounced successfully and offline, no need to wait */
2886 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2890 /* okay, let's give the drive time to spin up */
2891 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2892 secs = ((end - jiffies) + HZ - 1) / HZ;
2894 if (time_after(jiffies, end))
2898 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2899 "(%lu secs)\n", secs);
2901 schedule_timeout_uninterruptible(end - jiffies);
2905 * ata_std_prereset - prepare for reset
2906 * @ap: ATA port to be reset
2908 * @ap is about to be reset. Initialize it.
2911 * Kernel thread context (may sleep)
2914 * 0 on success, -errno otherwise.
2916 int ata_std_prereset(struct ata_port *ap)
2918 struct ata_eh_context *ehc = &ap->eh_context;
2919 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2922 /* handle link resume & hotplug spinup */
2923 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2924 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2925 ehc->i.action |= ATA_EH_HARDRESET;
2927 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2928 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2929 ata_wait_spinup(ap);
2931 /* if we're about to do hardreset, nothing more to do */
2932 if (ehc->i.action & ATA_EH_HARDRESET)
2935 /* if SATA, resume phy */
2936 if (ap->cbl == ATA_CBL_SATA) {
2937 rc = sata_phy_resume(ap, timing);
2938 if (rc && rc != -EOPNOTSUPP) {
2939 /* phy resume failed */
2940 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2941 "link for reset (errno=%d)\n", rc);
2946 /* Wait for !BSY if the controller can wait for the first D2H
2947 * Reg FIS and we don't know that no device is attached.
2949 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2950 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2956 * ata_std_softreset - reset host port via ATA SRST
2957 * @ap: port to reset
2958 * @classes: resulting classes of attached devices
2960 * Reset host port using ATA SRST.
2963 * Kernel thread context (may sleep)
2966 * 0 on success, -errno otherwise.
2968 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2970 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2971 unsigned int devmask = 0, err_mask;
2976 if (ata_port_offline(ap)) {
2977 classes[0] = ATA_DEV_NONE;
2981 /* determine if device 0/1 are present */
2982 if (ata_devchk(ap, 0))
2983 devmask |= (1 << 0);
2984 if (slave_possible && ata_devchk(ap, 1))
2985 devmask |= (1 << 1);
2987 /* select device 0 again */
2988 ap->ops->dev_select(ap, 0);
2990 /* issue bus reset */
2991 DPRINTK("about to softreset, devmask=%x\n", devmask);
2992 err_mask = ata_bus_softreset(ap, devmask);
2994 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2999 /* determine by signature whether we have ATA or ATAPI devices */
3000 classes[0] = ata_dev_try_classify(ap, 0, &err);
3001 if (slave_possible && err != 0x81)
3002 classes[1] = ata_dev_try_classify(ap, 1, &err);
3005 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
3010 * sata_port_hardreset - reset port via SATA phy reset
3011 * @ap: port to reset
3012 * @timing: timing parameters { interval, duratinon, timeout } in msec
3014 * SATA phy-reset host port using DET bits of SControl register.
3017 * Kernel thread context (may sleep)
3020 * 0 on success, -errno otherwise.
3022 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
3029 if (sata_set_spd_needed(ap)) {
3030 /* SATA spec says nothing about how to reconfigure
3031 * spd. To be on the safe side, turn off phy during
3032 * reconfiguration. This works for at least ICH7 AHCI
3035 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3038 scontrol = (scontrol & 0x0f0) | 0x304;
3040 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
3046 /* issue phy wake/reset */
3047 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
3050 scontrol = (scontrol & 0x0f0) | 0x301;
3052 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
3055 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
3056 * 10.4.2 says at least 1 ms.
3060 /* bring phy back */
3061 rc = sata_phy_resume(ap, timing);
3063 DPRINTK("EXIT, rc=%d\n", rc);
3068 * sata_std_hardreset - reset host port via SATA phy reset
3069 * @ap: port to reset
3070 * @class: resulting class of attached device
3072 * SATA phy-reset host port using DET bits of SControl register,
3073 * wait for !BSY and classify the attached device.
3076 * Kernel thread context (may sleep)
3079 * 0 on success, -errno otherwise.
3081 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3083 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3089 rc = sata_port_hardreset(ap, timing);
3091 ata_port_printk(ap, KERN_ERR,
3092 "COMRESET failed (errno=%d)\n", rc);
3096 /* TODO: phy layer with polling, timeouts, etc. */
3097 if (ata_port_offline(ap)) {
3098 *class = ATA_DEV_NONE;
3099 DPRINTK("EXIT, link offline\n");
3103 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3104 ata_port_printk(ap, KERN_ERR,
3105 "COMRESET failed (device not ready)\n");
3109 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3111 *class = ata_dev_try_classify(ap, 0, NULL);
3113 DPRINTK("EXIT, class=%u\n", *class);
3118 * ata_std_postreset - standard postreset callback
3119 * @ap: the target ata_port
3120 * @classes: classes of attached devices
3122 * This function is invoked after a successful reset. Note that
3123 * the device might have been reset more than once using
3124 * different reset methods before postreset is invoked.
3127 * Kernel thread context (may sleep)
3129 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3135 /* print link status */
3136 sata_print_link_status(ap);
3139 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3140 sata_scr_write(ap, SCR_ERROR, serror);
3142 /* re-enable interrupts */
3143 if (!ap->ops->error_handler) {
3144 /* FIXME: hack. create a hook instead */
3145 if (ap->ioaddr.ctl_addr)
3149 /* is double-select really necessary? */
3150 if (classes[0] != ATA_DEV_NONE)
3151 ap->ops->dev_select(ap, 1);
3152 if (classes[1] != ATA_DEV_NONE)
3153 ap->ops->dev_select(ap, 0);
3155 /* bail out if no device is present */
3156 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3157 DPRINTK("EXIT, no device\n");
3161 /* set up device control */
3162 if (ap->ioaddr.ctl_addr) {
3163 if (ap->flags & ATA_FLAG_MMIO)
3164 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
3166 outb(ap->ctl, ap->ioaddr.ctl_addr);
3173 * ata_dev_same_device - Determine whether new ID matches configured device
3174 * @dev: device to compare against
3175 * @new_class: class of the new device
3176 * @new_id: IDENTIFY page of the new device
3178 * Compare @new_class and @new_id against @dev and determine
3179 * whether @dev is the device indicated by @new_class and
3186 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3188 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3191 const u16 *old_id = dev->id;
3192 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3193 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3196 if (dev->class != new_class) {
3197 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3198 dev->class, new_class);
3202 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3203 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3204 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3205 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3206 new_n_sectors = ata_id_n_sectors(new_id);
3208 if (strcmp(model[0], model[1])) {
3209 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3210 "'%s' != '%s'\n", model[0], model[1]);
3214 if (strcmp(serial[0], serial[1])) {
3215 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3216 "'%s' != '%s'\n", serial[0], serial[1]);
3220 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3221 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3223 (unsigned long long)dev->n_sectors,
3224 (unsigned long long)new_n_sectors);
3232 * ata_dev_revalidate - Revalidate ATA device
3233 * @dev: device to revalidate
3234 * @readid_flags: read ID flags
3236 * Re-read IDENTIFY page and make sure @dev is still attached to
3240 * Kernel thread context (may sleep)
3243 * 0 on success, negative errno otherwise
3245 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3247 unsigned int class = dev->class;
3248 u16 *id = (void *)dev->ap->sector_buf;
3251 if (!ata_dev_enabled(dev)) {
3257 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3261 /* is the device still there? */
3262 if (!ata_dev_same_device(dev, class, id)) {
3267 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3269 /* configure device according to the new ID */
3270 rc = ata_dev_configure(dev);
3275 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3279 struct ata_blacklist_entry {
3280 const char *model_num;
3281 const char *model_rev;
3282 unsigned long horkage;
3285 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3286 /* Devices with DMA related problems under Linux */
3287 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3288 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3289 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3290 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3291 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3292 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3293 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3294 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3295 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3296 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3297 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3298 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3299 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3300 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3301 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3302 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3303 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3304 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3305 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3306 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3307 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3308 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3309 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3310 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3311 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3312 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3313 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3314 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3315 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3316 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3318 /* Devices we expect to fail diagnostics */
3320 /* Devices where NCQ should be avoided */
3322 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3324 /* Devices with NCQ limits */
3330 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3332 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3333 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3334 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3336 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3337 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3339 while (ad->model_num) {
3340 if (!strcmp(ad->model_num, model_num)) {
3341 if (ad->model_rev == NULL)
3343 if (!strcmp(ad->model_rev, model_rev))
3351 static int ata_dma_blacklisted(const struct ata_device *dev)
3353 /* We don't support polling DMA.
3354 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3355 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3357 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3358 (dev->flags & ATA_DFLAG_CDB_INTR))
3360 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3364 * ata_dev_xfermask - Compute supported xfermask of the given device
3365 * @dev: Device to compute xfermask for
3367 * Compute supported xfermask of @dev and store it in
3368 * dev->*_mask. This function is responsible for applying all
3369 * known limits including host controller limits, device
3375 static void ata_dev_xfermask(struct ata_device *dev)
3377 struct ata_port *ap = dev->ap;
3378 struct ata_host *host = ap->host;
3379 unsigned long xfer_mask;
3381 /* controller modes available */
3382 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3383 ap->mwdma_mask, ap->udma_mask);
3385 /* Apply cable rule here. Don't apply it early because when
3386 * we handle hot plug the cable type can itself change.
3388 if (ap->cbl == ATA_CBL_PATA40)
3389 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3390 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3391 * host side are checked drive side as well. Cases where we know a
3392 * 40wire cable is used safely for 80 are not checked here.
3394 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3395 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3398 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3399 dev->mwdma_mask, dev->udma_mask);
3400 xfer_mask &= ata_id_xfermask(dev->id);
3403 * CFA Advanced TrueIDE timings are not allowed on a shared
3406 if (ata_dev_pair(dev)) {
3407 /* No PIO5 or PIO6 */
3408 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3409 /* No MWDMA3 or MWDMA 4 */
3410 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3413 if (ata_dma_blacklisted(dev)) {
3414 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3415 ata_dev_printk(dev, KERN_WARNING,
3416 "device is on DMA blacklist, disabling DMA\n");
3419 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3420 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3421 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3422 "other device, disabling DMA\n");
3425 if (ap->ops->mode_filter)
3426 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3428 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3429 &dev->mwdma_mask, &dev->udma_mask);
3433 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3434 * @dev: Device to which command will be sent
3436 * Issue SET FEATURES - XFER MODE command to device @dev
3440 * PCI/etc. bus probe sem.
3443 * 0 on success, AC_ERR_* mask otherwise.
3446 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3448 struct ata_taskfile tf;
3449 unsigned int err_mask;
3451 /* set up set-features taskfile */
3452 DPRINTK("set features - xfer mode\n");
3454 ata_tf_init(dev, &tf);
3455 tf.command = ATA_CMD_SET_FEATURES;
3456 tf.feature = SETFEATURES_XFER;
3457 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3458 tf.protocol = ATA_PROT_NODATA;
3459 tf.nsect = dev->xfer_mode;
3461 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3463 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3468 * ata_dev_init_params - Issue INIT DEV PARAMS command
3469 * @dev: Device to which command will be sent
3470 * @heads: Number of heads (taskfile parameter)
3471 * @sectors: Number of sectors (taskfile parameter)
3474 * Kernel thread context (may sleep)
3477 * 0 on success, AC_ERR_* mask otherwise.
3479 static unsigned int ata_dev_init_params(struct ata_device *dev,
3480 u16 heads, u16 sectors)
3482 struct ata_taskfile tf;
3483 unsigned int err_mask;
3485 /* Number of sectors per track 1-255. Number of heads 1-16 */
3486 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3487 return AC_ERR_INVALID;
3489 /* set up init dev params taskfile */
3490 DPRINTK("init dev params \n");
3492 ata_tf_init(dev, &tf);
3493 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3494 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3495 tf.protocol = ATA_PROT_NODATA;
3497 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3499 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3501 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3506 * ata_sg_clean - Unmap DMA memory associated with command
3507 * @qc: Command containing DMA memory to be released
3509 * Unmap all mapped DMA memory associated with this command.
3512 * spin_lock_irqsave(host lock)
3514 void ata_sg_clean(struct ata_queued_cmd *qc)
3516 struct ata_port *ap = qc->ap;
3517 struct scatterlist *sg = qc->__sg;
3518 int dir = qc->dma_dir;
3519 void *pad_buf = NULL;
3521 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3522 WARN_ON(sg == NULL);
3524 if (qc->flags & ATA_QCFLAG_SINGLE)
3525 WARN_ON(qc->n_elem > 1);
3527 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3529 /* if we padded the buffer out to 32-bit bound, and data
3530 * xfer direction is from-device, we must copy from the
3531 * pad buffer back into the supplied buffer
3533 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3534 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3536 if (qc->flags & ATA_QCFLAG_SG) {
3538 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3539 /* restore last sg */
3540 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3542 struct scatterlist *psg = &qc->pad_sgent;
3543 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3544 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3545 kunmap_atomic(addr, KM_IRQ0);
3549 dma_unmap_single(ap->dev,
3550 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3553 sg->length += qc->pad_len;
3555 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3556 pad_buf, qc->pad_len);
3559 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3564 * ata_fill_sg - Fill PCI IDE PRD table
3565 * @qc: Metadata associated with taskfile to be transferred
3567 * Fill PCI IDE PRD (scatter-gather) table with segments
3568 * associated with the current disk command.
3571 * spin_lock_irqsave(host lock)
3574 static void ata_fill_sg(struct ata_queued_cmd *qc)
3576 struct ata_port *ap = qc->ap;
3577 struct scatterlist *sg;
3580 WARN_ON(qc->__sg == NULL);
3581 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3584 ata_for_each_sg(sg, qc) {
3588 /* determine if physical DMA addr spans 64K boundary.
3589 * Note h/w doesn't support 64-bit, so we unconditionally
3590 * truncate dma_addr_t to u32.
3592 addr = (u32) sg_dma_address(sg);
3593 sg_len = sg_dma_len(sg);
3596 offset = addr & 0xffff;
3598 if ((offset + sg_len) > 0x10000)
3599 len = 0x10000 - offset;
3601 ap->prd[idx].addr = cpu_to_le32(addr);
3602 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3603 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3612 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3615 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3616 * @qc: Metadata associated with taskfile to check
3618 * Allow low-level driver to filter ATA PACKET commands, returning
3619 * a status indicating whether or not it is OK to use DMA for the
3620 * supplied PACKET command.
3623 * spin_lock_irqsave(host lock)
3625 * RETURNS: 0 when ATAPI DMA can be used
3628 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3630 struct ata_port *ap = qc->ap;
3631 int rc = 0; /* Assume ATAPI DMA is OK by default */
3633 if (ap->ops->check_atapi_dma)
3634 rc = ap->ops->check_atapi_dma(qc);
3639 * ata_qc_prep - Prepare taskfile for submission
3640 * @qc: Metadata associated with taskfile to be prepared
3642 * Prepare ATA taskfile for submission.
3645 * spin_lock_irqsave(host lock)
3647 void ata_qc_prep(struct ata_queued_cmd *qc)
3649 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3655 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3658 * ata_sg_init_one - Associate command with memory buffer
3659 * @qc: Command to be associated
3660 * @buf: Memory buffer
3661 * @buflen: Length of memory buffer, in bytes.
3663 * Initialize the data-related elements of queued_cmd @qc
3664 * to point to a single memory buffer, @buf of byte length @buflen.
3667 * spin_lock_irqsave(host lock)
3670 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3672 qc->flags |= ATA_QCFLAG_SINGLE;
3674 qc->__sg = &qc->sgent;
3676 qc->orig_n_elem = 1;
3678 qc->nbytes = buflen;
3680 sg_init_one(&qc->sgent, buf, buflen);
3684 * ata_sg_init - Associate command with scatter-gather table.
3685 * @qc: Command to be associated
3686 * @sg: Scatter-gather table.
3687 * @n_elem: Number of elements in s/g table.
3689 * Initialize the data-related elements of queued_cmd @qc
3690 * to point to a scatter-gather table @sg, containing @n_elem
3694 * spin_lock_irqsave(host lock)
3697 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3698 unsigned int n_elem)
3700 qc->flags |= ATA_QCFLAG_SG;
3702 qc->n_elem = n_elem;
3703 qc->orig_n_elem = n_elem;
3707 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3708 * @qc: Command with memory buffer to be mapped.
3710 * DMA-map the memory buffer associated with queued_cmd @qc.
3713 * spin_lock_irqsave(host lock)
3716 * Zero on success, negative on error.
3719 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3721 struct ata_port *ap = qc->ap;
3722 int dir = qc->dma_dir;
3723 struct scatterlist *sg = qc->__sg;
3724 dma_addr_t dma_address;
3727 /* we must lengthen transfers to end on a 32-bit boundary */
3728 qc->pad_len = sg->length & 3;
3730 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3731 struct scatterlist *psg = &qc->pad_sgent;
3733 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3735 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3737 if (qc->tf.flags & ATA_TFLAG_WRITE)
3738 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3741 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3742 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3744 sg->length -= qc->pad_len;
3745 if (sg->length == 0)
3748 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3749 sg->length, qc->pad_len);
3757 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3759 if (dma_mapping_error(dma_address)) {
3761 sg->length += qc->pad_len;
3765 sg_dma_address(sg) = dma_address;
3766 sg_dma_len(sg) = sg->length;
3769 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3770 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3776 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3777 * @qc: Command with scatter-gather table to be mapped.
3779 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3782 * spin_lock_irqsave(host lock)
3785 * Zero on success, negative on error.
3789 static int ata_sg_setup(struct ata_queued_cmd *qc)
3791 struct ata_port *ap = qc->ap;
3792 struct scatterlist *sg = qc->__sg;
3793 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3794 int n_elem, pre_n_elem, dir, trim_sg = 0;
3796 VPRINTK("ENTER, ata%u\n", ap->id);
3797 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3799 /* we must lengthen transfers to end on a 32-bit boundary */
3800 qc->pad_len = lsg->length & 3;
3802 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3803 struct scatterlist *psg = &qc->pad_sgent;
3804 unsigned int offset;
3806 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3808 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3811 * psg->page/offset are used to copy to-be-written
3812 * data in this function or read data in ata_sg_clean.
3814 offset = lsg->offset + lsg->length - qc->pad_len;
3815 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3816 psg->offset = offset_in_page(offset);
3818 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3819 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3820 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3821 kunmap_atomic(addr, KM_IRQ0);
3824 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3825 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3827 lsg->length -= qc->pad_len;
3828 if (lsg->length == 0)
3831 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3832 qc->n_elem - 1, lsg->length, qc->pad_len);
3835 pre_n_elem = qc->n_elem;
3836 if (trim_sg && pre_n_elem)
3845 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3847 /* restore last sg */
3848 lsg->length += qc->pad_len;
3852 DPRINTK("%d sg elements mapped\n", n_elem);
3855 qc->n_elem = n_elem;
3861 * swap_buf_le16 - swap halves of 16-bit words in place
3862 * @buf: Buffer to swap
3863 * @buf_words: Number of 16-bit words in buffer.
3865 * Swap halves of 16-bit words if needed to convert from
3866 * little-endian byte order to native cpu byte order, or
3870 * Inherited from caller.
3872 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3877 for (i = 0; i < buf_words; i++)
3878 buf[i] = le16_to_cpu(buf[i]);
3879 #endif /* __BIG_ENDIAN */
3883 * ata_mmio_data_xfer - Transfer data by MMIO
3884 * @adev: device for this I/O
3886 * @buflen: buffer length
3887 * @write_data: read/write
3889 * Transfer data from/to the device data register by MMIO.
3892 * Inherited from caller.
3895 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3896 unsigned int buflen, int write_data)
3898 struct ata_port *ap = adev->ap;
3900 unsigned int words = buflen >> 1;
3901 u16 *buf16 = (u16 *) buf;
3902 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3904 /* Transfer multiple of 2 bytes */
3906 for (i = 0; i < words; i++)
3907 writew(le16_to_cpu(buf16[i]), mmio);
3909 for (i = 0; i < words; i++)
3910 buf16[i] = cpu_to_le16(readw(mmio));
3913 /* Transfer trailing 1 byte, if any. */
3914 if (unlikely(buflen & 0x01)) {
3915 u16 align_buf[1] = { 0 };
3916 unsigned char *trailing_buf = buf + buflen - 1;
3919 memcpy(align_buf, trailing_buf, 1);
3920 writew(le16_to_cpu(align_buf[0]), mmio);
3922 align_buf[0] = cpu_to_le16(readw(mmio));
3923 memcpy(trailing_buf, align_buf, 1);
3929 * ata_pio_data_xfer - Transfer data by PIO
3930 * @adev: device to target
3932 * @buflen: buffer length
3933 * @write_data: read/write
3935 * Transfer data from/to the device data register by PIO.
3938 * Inherited from caller.
3941 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3942 unsigned int buflen, int write_data)
3944 struct ata_port *ap = adev->ap;
3945 unsigned int words = buflen >> 1;
3947 /* Transfer multiple of 2 bytes */
3949 outsw(ap->ioaddr.data_addr, buf, words);
3951 insw(ap->ioaddr.data_addr, buf, words);
3953 /* Transfer trailing 1 byte, if any. */
3954 if (unlikely(buflen & 0x01)) {
3955 u16 align_buf[1] = { 0 };
3956 unsigned char *trailing_buf = buf + buflen - 1;
3959 memcpy(align_buf, trailing_buf, 1);
3960 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3962 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3963 memcpy(trailing_buf, align_buf, 1);
3969 * ata_pio_data_xfer_noirq - Transfer data by PIO
3970 * @adev: device to target
3972 * @buflen: buffer length
3973 * @write_data: read/write
3975 * Transfer data from/to the device data register by PIO. Do the
3976 * transfer with interrupts disabled.
3979 * Inherited from caller.
3982 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3983 unsigned int buflen, int write_data)
3985 unsigned long flags;
3986 local_irq_save(flags);
3987 ata_pio_data_xfer(adev, buf, buflen, write_data);
3988 local_irq_restore(flags);
3993 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3994 * @qc: Command on going
3996 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3999 * Inherited from caller.
4002 static void ata_pio_sector(struct ata_queued_cmd *qc)
4004 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4005 struct scatterlist *sg = qc->__sg;
4006 struct ata_port *ap = qc->ap;
4008 unsigned int offset;
4011 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
4012 ap->hsm_task_state = HSM_ST_LAST;
4014 page = sg[qc->cursg].page;
4015 offset = sg[qc->cursg].offset + qc->cursg_ofs;
4017 /* get the current page and offset */
4018 page = nth_page(page, (offset >> PAGE_SHIFT));
4019 offset %= PAGE_SIZE;
4021 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4023 if (PageHighMem(page)) {
4024 unsigned long flags;
4026 /* FIXME: use a bounce buffer */
4027 local_irq_save(flags);
4028 buf = kmap_atomic(page, KM_IRQ0);
4030 /* do the actual data transfer */
4031 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4033 kunmap_atomic(buf, KM_IRQ0);
4034 local_irq_restore(flags);
4036 buf = page_address(page);
4037 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
4040 qc->curbytes += ATA_SECT_SIZE;
4041 qc->cursg_ofs += ATA_SECT_SIZE;
4043 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
4050 * ata_pio_sectors - Transfer one or many 512-byte sectors.
4051 * @qc: Command on going
4053 * Transfer one or many ATA_SECT_SIZE of data from/to the
4054 * ATA device for the DRQ request.
4057 * Inherited from caller.
4060 static void ata_pio_sectors(struct ata_queued_cmd *qc)
4062 if (is_multi_taskfile(&qc->tf)) {
4063 /* READ/WRITE MULTIPLE */
4066 WARN_ON(qc->dev->multi_count == 0);
4068 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
4069 qc->dev->multi_count);
4077 * atapi_send_cdb - Write CDB bytes to hardware
4078 * @ap: Port to which ATAPI device is attached.
4079 * @qc: Taskfile currently active
4081 * When device has indicated its readiness to accept
4082 * a CDB, this function is called. Send the CDB.
4088 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
4091 DPRINTK("send cdb\n");
4092 WARN_ON(qc->dev->cdb_len < 12);
4094 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
4095 ata_altstatus(ap); /* flush */
4097 switch (qc->tf.protocol) {
4098 case ATA_PROT_ATAPI:
4099 ap->hsm_task_state = HSM_ST;
4101 case ATA_PROT_ATAPI_NODATA:
4102 ap->hsm_task_state = HSM_ST_LAST;
4104 case ATA_PROT_ATAPI_DMA:
4105 ap->hsm_task_state = HSM_ST_LAST;
4106 /* initiate bmdma */
4107 ap->ops->bmdma_start(qc);
4113 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
4114 * @qc: Command on going
4115 * @bytes: number of bytes
4117 * Transfer Transfer data from/to the ATAPI device.
4120 * Inherited from caller.
4124 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
4126 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
4127 struct scatterlist *sg = qc->__sg;
4128 struct ata_port *ap = qc->ap;
4131 unsigned int offset, count;
4133 if (qc->curbytes + bytes >= qc->nbytes)
4134 ap->hsm_task_state = HSM_ST_LAST;
4137 if (unlikely(qc->cursg >= qc->n_elem)) {
4139 * The end of qc->sg is reached and the device expects
4140 * more data to transfer. In order not to overrun qc->sg
4141 * and fulfill length specified in the byte count register,
4142 * - for read case, discard trailing data from the device
4143 * - for write case, padding zero data to the device
4145 u16 pad_buf[1] = { 0 };
4146 unsigned int words = bytes >> 1;
4149 if (words) /* warning if bytes > 1 */
4150 ata_dev_printk(qc->dev, KERN_WARNING,
4151 "%u bytes trailing data\n", bytes);
4153 for (i = 0; i < words; i++)
4154 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4156 ap->hsm_task_state = HSM_ST_LAST;
4160 sg = &qc->__sg[qc->cursg];
4163 offset = sg->offset + qc->cursg_ofs;
4165 /* get the current page and offset */
4166 page = nth_page(page, (offset >> PAGE_SHIFT));
4167 offset %= PAGE_SIZE;
4169 /* don't overrun current sg */
4170 count = min(sg->length - qc->cursg_ofs, bytes);
4172 /* don't cross page boundaries */
4173 count = min(count, (unsigned int)PAGE_SIZE - offset);
4175 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4177 if (PageHighMem(page)) {
4178 unsigned long flags;
4180 /* FIXME: use bounce buffer */
4181 local_irq_save(flags);
4182 buf = kmap_atomic(page, KM_IRQ0);
4184 /* do the actual data transfer */
4185 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4187 kunmap_atomic(buf, KM_IRQ0);
4188 local_irq_restore(flags);
4190 buf = page_address(page);
4191 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4195 qc->curbytes += count;
4196 qc->cursg_ofs += count;
4198 if (qc->cursg_ofs == sg->length) {
4208 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4209 * @qc: Command on going
4211 * Transfer Transfer data from/to the ATAPI device.
4214 * Inherited from caller.
4217 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4219 struct ata_port *ap = qc->ap;
4220 struct ata_device *dev = qc->dev;
4221 unsigned int ireason, bc_lo, bc_hi, bytes;
4222 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4224 /* Abuse qc->result_tf for temp storage of intermediate TF
4225 * here to save some kernel stack usage.
4226 * For normal completion, qc->result_tf is not relevant. For
4227 * error, qc->result_tf is later overwritten by ata_qc_complete().
4228 * So, the correctness of qc->result_tf is not affected.
4230 ap->ops->tf_read(ap, &qc->result_tf);
4231 ireason = qc->result_tf.nsect;
4232 bc_lo = qc->result_tf.lbam;
4233 bc_hi = qc->result_tf.lbah;
4234 bytes = (bc_hi << 8) | bc_lo;
4236 /* shall be cleared to zero, indicating xfer of data */
4237 if (ireason & (1 << 0))
4240 /* make sure transfer direction matches expected */
4241 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4242 if (do_write != i_write)
4245 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4247 __atapi_pio_bytes(qc, bytes);
4252 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4253 qc->err_mask |= AC_ERR_HSM;
4254 ap->hsm_task_state = HSM_ST_ERR;
4258 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4259 * @ap: the target ata_port
4263 * 1 if ok in workqueue, 0 otherwise.
4266 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4268 if (qc->tf.flags & ATA_TFLAG_POLLING)
4271 if (ap->hsm_task_state == HSM_ST_FIRST) {
4272 if (qc->tf.protocol == ATA_PROT_PIO &&
4273 (qc->tf.flags & ATA_TFLAG_WRITE))
4276 if (is_atapi_taskfile(&qc->tf) &&
4277 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4285 * ata_hsm_qc_complete - finish a qc running on standard HSM
4286 * @qc: Command to complete
4287 * @in_wq: 1 if called from workqueue, 0 otherwise
4289 * Finish @qc which is running on standard HSM.
4292 * If @in_wq is zero, spin_lock_irqsave(host lock).
4293 * Otherwise, none on entry and grabs host lock.
4295 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4297 struct ata_port *ap = qc->ap;
4298 unsigned long flags;
4300 if (ap->ops->error_handler) {
4302 spin_lock_irqsave(ap->lock, flags);
4304 /* EH might have kicked in while host lock is
4307 qc = ata_qc_from_tag(ap, qc->tag);
4309 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4311 ata_qc_complete(qc);
4313 ata_port_freeze(ap);
4316 spin_unlock_irqrestore(ap->lock, flags);
4318 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4319 ata_qc_complete(qc);
4321 ata_port_freeze(ap);
4325 spin_lock_irqsave(ap->lock, flags);
4327 ata_qc_complete(qc);
4328 spin_unlock_irqrestore(ap->lock, flags);
4330 ata_qc_complete(qc);
4333 ata_altstatus(ap); /* flush */
4337 * ata_hsm_move - move the HSM to the next state.
4338 * @ap: the target ata_port
4340 * @status: current device status
4341 * @in_wq: 1 if called from workqueue, 0 otherwise
4344 * 1 when poll next status needed, 0 otherwise.
4346 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4347 u8 status, int in_wq)
4349 unsigned long flags = 0;
4352 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4354 /* Make sure ata_qc_issue_prot() does not throw things
4355 * like DMA polling into the workqueue. Notice that
4356 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4358 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4361 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4362 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4364 switch (ap->hsm_task_state) {
4366 /* Send first data block or PACKET CDB */
4368 /* If polling, we will stay in the work queue after
4369 * sending the data. Otherwise, interrupt handler
4370 * takes over after sending the data.
4372 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4374 /* check device status */
4375 if (unlikely((status & ATA_DRQ) == 0)) {
4376 /* handle BSY=0, DRQ=0 as error */
4377 if (likely(status & (ATA_ERR | ATA_DF)))
4378 /* device stops HSM for abort/error */
4379 qc->err_mask |= AC_ERR_DEV;
4381 /* HSM violation. Let EH handle this */
4382 qc->err_mask |= AC_ERR_HSM;
4384 ap->hsm_task_state = HSM_ST_ERR;
4388 /* Device should not ask for data transfer (DRQ=1)
4389 * when it finds something wrong.
4390 * We ignore DRQ here and stop the HSM by
4391 * changing hsm_task_state to HSM_ST_ERR and
4392 * let the EH abort the command or reset the device.
4394 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4395 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4397 qc->err_mask |= AC_ERR_HSM;
4398 ap->hsm_task_state = HSM_ST_ERR;
4402 /* Send the CDB (atapi) or the first data block (ata pio out).
4403 * During the state transition, interrupt handler shouldn't
4404 * be invoked before the data transfer is complete and
4405 * hsm_task_state is changed. Hence, the following locking.
4408 spin_lock_irqsave(ap->lock, flags);
4410 if (qc->tf.protocol == ATA_PROT_PIO) {
4411 /* PIO data out protocol.
4412 * send first data block.
4415 /* ata_pio_sectors() might change the state
4416 * to HSM_ST_LAST. so, the state is changed here
4417 * before ata_pio_sectors().
4419 ap->hsm_task_state = HSM_ST;
4420 ata_pio_sectors(qc);
4421 ata_altstatus(ap); /* flush */
4424 atapi_send_cdb(ap, qc);
4427 spin_unlock_irqrestore(ap->lock, flags);
4429 /* if polling, ata_pio_task() handles the rest.
4430 * otherwise, interrupt handler takes over from here.
4435 /* complete command or read/write the data register */
4436 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4437 /* ATAPI PIO protocol */
4438 if ((status & ATA_DRQ) == 0) {
4439 /* No more data to transfer or device error.
4440 * Device error will be tagged in HSM_ST_LAST.
4442 ap->hsm_task_state = HSM_ST_LAST;
4446 /* Device should not ask for data transfer (DRQ=1)
4447 * when it finds something wrong.
4448 * We ignore DRQ here and stop the HSM by
4449 * changing hsm_task_state to HSM_ST_ERR and
4450 * let the EH abort the command or reset the device.
4452 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4453 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4455 qc->err_mask |= AC_ERR_HSM;
4456 ap->hsm_task_state = HSM_ST_ERR;
4460 atapi_pio_bytes(qc);
4462 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4463 /* bad ireason reported by device */
4467 /* ATA PIO protocol */
4468 if (unlikely((status & ATA_DRQ) == 0)) {
4469 /* handle BSY=0, DRQ=0 as error */
4470 if (likely(status & (ATA_ERR | ATA_DF)))
4471 /* device stops HSM for abort/error */
4472 qc->err_mask |= AC_ERR_DEV;
4474 /* HSM violation. Let EH handle this.
4475 * Phantom devices also trigger this
4476 * condition. Mark hint.
4478 qc->err_mask |= AC_ERR_HSM |
4481 ap->hsm_task_state = HSM_ST_ERR;
4485 /* For PIO reads, some devices may ask for
4486 * data transfer (DRQ=1) alone with ERR=1.
4487 * We respect DRQ here and transfer one
4488 * block of junk data before changing the
4489 * hsm_task_state to HSM_ST_ERR.
4491 * For PIO writes, ERR=1 DRQ=1 doesn't make
4492 * sense since the data block has been
4493 * transferred to the device.
4495 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4496 /* data might be corrputed */
4497 qc->err_mask |= AC_ERR_DEV;
4499 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4500 ata_pio_sectors(qc);
4502 status = ata_wait_idle(ap);
4505 if (status & (ATA_BUSY | ATA_DRQ))
4506 qc->err_mask |= AC_ERR_HSM;
4508 /* ata_pio_sectors() might change the
4509 * state to HSM_ST_LAST. so, the state
4510 * is changed after ata_pio_sectors().
4512 ap->hsm_task_state = HSM_ST_ERR;
4516 ata_pio_sectors(qc);
4518 if (ap->hsm_task_state == HSM_ST_LAST &&
4519 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4522 status = ata_wait_idle(ap);
4527 ata_altstatus(ap); /* flush */
4532 if (unlikely(!ata_ok(status))) {
4533 qc->err_mask |= __ac_err_mask(status);
4534 ap->hsm_task_state = HSM_ST_ERR;
4538 /* no more data to transfer */
4539 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4540 ap->id, qc->dev->devno, status);
4542 WARN_ON(qc->err_mask);
4544 ap->hsm_task_state = HSM_ST_IDLE;
4546 /* complete taskfile transaction */
4547 ata_hsm_qc_complete(qc, in_wq);
4553 /* make sure qc->err_mask is available to
4554 * know what's wrong and recover
4556 WARN_ON(qc->err_mask == 0);
4558 ap->hsm_task_state = HSM_ST_IDLE;
4560 /* complete taskfile transaction */
4561 ata_hsm_qc_complete(qc, in_wq);
4573 static void ata_pio_task(struct work_struct *work)
4575 struct ata_port *ap =
4576 container_of(work, struct ata_port, port_task.work);
4577 struct ata_queued_cmd *qc = ap->port_task_data;
4582 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4585 * This is purely heuristic. This is a fast path.
4586 * Sometimes when we enter, BSY will be cleared in
4587 * a chk-status or two. If not, the drive is probably seeking
4588 * or something. Snooze for a couple msecs, then
4589 * chk-status again. If still busy, queue delayed work.
4591 status = ata_busy_wait(ap, ATA_BUSY, 5);
4592 if (status & ATA_BUSY) {
4594 status = ata_busy_wait(ap, ATA_BUSY, 10);
4595 if (status & ATA_BUSY) {
4596 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4602 poll_next = ata_hsm_move(ap, qc, status, 1);
4604 /* another command or interrupt handler
4605 * may be running at this point.
4612 * ata_qc_new - Request an available ATA command, for queueing
4613 * @ap: Port associated with device @dev
4614 * @dev: Device from whom we request an available command structure
4620 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4622 struct ata_queued_cmd *qc = NULL;
4625 /* no command while frozen */
4626 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4629 /* the last tag is reserved for internal command. */
4630 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4631 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4632 qc = __ata_qc_from_tag(ap, i);
4643 * ata_qc_new_init - Request an available ATA command, and initialize it
4644 * @dev: Device from whom we request an available command structure
4650 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4652 struct ata_port *ap = dev->ap;
4653 struct ata_queued_cmd *qc;
4655 qc = ata_qc_new(ap);
4668 * ata_qc_free - free unused ata_queued_cmd
4669 * @qc: Command to complete
4671 * Designed to free unused ata_queued_cmd object
4672 * in case something prevents using it.
4675 * spin_lock_irqsave(host lock)
4677 void ata_qc_free(struct ata_queued_cmd *qc)
4679 struct ata_port *ap = qc->ap;
4682 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4686 if (likely(ata_tag_valid(tag))) {
4687 qc->tag = ATA_TAG_POISON;
4688 clear_bit(tag, &ap->qc_allocated);
4692 void __ata_qc_complete(struct ata_queued_cmd *qc)
4694 struct ata_port *ap = qc->ap;
4696 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4697 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4699 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4702 /* command should be marked inactive atomically with qc completion */
4703 if (qc->tf.protocol == ATA_PROT_NCQ)
4704 ap->sactive &= ~(1 << qc->tag);
4706 ap->active_tag = ATA_TAG_POISON;
4708 /* atapi: mark qc as inactive to prevent the interrupt handler
4709 * from completing the command twice later, before the error handler
4710 * is called. (when rc != 0 and atapi request sense is needed)
4712 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4713 ap->qc_active &= ~(1 << qc->tag);
4715 /* call completion callback */
4716 qc->complete_fn(qc);
4719 static void fill_result_tf(struct ata_queued_cmd *qc)
4721 struct ata_port *ap = qc->ap;
4723 ap->ops->tf_read(ap, &qc->result_tf);
4724 qc->result_tf.flags = qc->tf.flags;
4728 * ata_qc_complete - Complete an active ATA command
4729 * @qc: Command to complete
4730 * @err_mask: ATA Status register contents
4732 * Indicate to the mid and upper layers that an ATA
4733 * command has completed, with either an ok or not-ok status.
4736 * spin_lock_irqsave(host lock)
4738 void ata_qc_complete(struct ata_queued_cmd *qc)
4740 struct ata_port *ap = qc->ap;
4742 /* XXX: New EH and old EH use different mechanisms to
4743 * synchronize EH with regular execution path.
4745 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4746 * Normal execution path is responsible for not accessing a
4747 * failed qc. libata core enforces the rule by returning NULL
4748 * from ata_qc_from_tag() for failed qcs.
4750 * Old EH depends on ata_qc_complete() nullifying completion
4751 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4752 * not synchronize with interrupt handler. Only PIO task is
4755 if (ap->ops->error_handler) {
4756 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4758 if (unlikely(qc->err_mask))
4759 qc->flags |= ATA_QCFLAG_FAILED;
4761 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4762 if (!ata_tag_internal(qc->tag)) {
4763 /* always fill result TF for failed qc */
4765 ata_qc_schedule_eh(qc);
4770 /* read result TF if requested */
4771 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4774 __ata_qc_complete(qc);
4776 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4779 /* read result TF if failed or requested */
4780 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4783 __ata_qc_complete(qc);
4788 * ata_qc_complete_multiple - Complete multiple qcs successfully
4789 * @ap: port in question
4790 * @qc_active: new qc_active mask
4791 * @finish_qc: LLDD callback invoked before completing a qc
4793 * Complete in-flight commands. This functions is meant to be
4794 * called from low-level driver's interrupt routine to complete
4795 * requests normally. ap->qc_active and @qc_active is compared
4796 * and commands are completed accordingly.
4799 * spin_lock_irqsave(host lock)
4802 * Number of completed commands on success, -errno otherwise.
4804 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4805 void (*finish_qc)(struct ata_queued_cmd *))
4811 done_mask = ap->qc_active ^ qc_active;
4813 if (unlikely(done_mask & qc_active)) {
4814 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4815 "(%08x->%08x)\n", ap->qc_active, qc_active);
4819 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4820 struct ata_queued_cmd *qc;
4822 if (!(done_mask & (1 << i)))
4825 if ((qc = ata_qc_from_tag(ap, i))) {
4828 ata_qc_complete(qc);
4836 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4838 struct ata_port *ap = qc->ap;
4840 switch (qc->tf.protocol) {
4843 case ATA_PROT_ATAPI_DMA:
4846 case ATA_PROT_ATAPI:
4848 if (ap->flags & ATA_FLAG_PIO_DMA)
4861 * ata_qc_issue - issue taskfile to device
4862 * @qc: command to issue to device
4864 * Prepare an ATA command to submission to device.
4865 * This includes mapping the data into a DMA-able
4866 * area, filling in the S/G table, and finally
4867 * writing the taskfile to hardware, starting the command.
4870 * spin_lock_irqsave(host lock)
4872 void ata_qc_issue(struct ata_queued_cmd *qc)
4874 struct ata_port *ap = qc->ap;
4876 /* Make sure only one non-NCQ command is outstanding. The
4877 * check is skipped for old EH because it reuses active qc to
4878 * request ATAPI sense.
4880 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4882 if (qc->tf.protocol == ATA_PROT_NCQ) {
4883 WARN_ON(ap->sactive & (1 << qc->tag));
4884 ap->sactive |= 1 << qc->tag;
4886 WARN_ON(ap->sactive);
4887 ap->active_tag = qc->tag;
4890 qc->flags |= ATA_QCFLAG_ACTIVE;
4891 ap->qc_active |= 1 << qc->tag;
4893 if (ata_should_dma_map(qc)) {
4894 if (qc->flags & ATA_QCFLAG_SG) {
4895 if (ata_sg_setup(qc))
4897 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4898 if (ata_sg_setup_one(qc))
4902 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4905 ap->ops->qc_prep(qc);
4907 qc->err_mask |= ap->ops->qc_issue(qc);
4908 if (unlikely(qc->err_mask))
4913 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4914 qc->err_mask |= AC_ERR_SYSTEM;
4916 ata_qc_complete(qc);
4920 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4921 * @qc: command to issue to device
4923 * Using various libata functions and hooks, this function
4924 * starts an ATA command. ATA commands are grouped into
4925 * classes called "protocols", and issuing each type of protocol
4926 * is slightly different.
4928 * May be used as the qc_issue() entry in ata_port_operations.
4931 * spin_lock_irqsave(host lock)
4934 * Zero on success, AC_ERR_* mask on failure
4937 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4939 struct ata_port *ap = qc->ap;
4941 /* Use polling pio if the LLD doesn't handle
4942 * interrupt driven pio and atapi CDB interrupt.
4944 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4945 switch (qc->tf.protocol) {
4947 case ATA_PROT_NODATA:
4948 case ATA_PROT_ATAPI:
4949 case ATA_PROT_ATAPI_NODATA:
4950 qc->tf.flags |= ATA_TFLAG_POLLING;
4952 case ATA_PROT_ATAPI_DMA:
4953 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4954 /* see ata_dma_blacklisted() */
4962 /* Some controllers show flaky interrupt behavior after
4963 * setting xfer mode. Use polling instead.
4965 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4966 qc->tf.feature == SETFEATURES_XFER) &&
4967 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4968 qc->tf.flags |= ATA_TFLAG_POLLING;
4970 /* select the device */
4971 ata_dev_select(ap, qc->dev->devno, 1, 0);
4973 /* start the command */
4974 switch (qc->tf.protocol) {
4975 case ATA_PROT_NODATA:
4976 if (qc->tf.flags & ATA_TFLAG_POLLING)
4977 ata_qc_set_polling(qc);
4979 ata_tf_to_host(ap, &qc->tf);
4980 ap->hsm_task_state = HSM_ST_LAST;
4982 if (qc->tf.flags & ATA_TFLAG_POLLING)
4983 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4988 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4990 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4991 ap->ops->bmdma_setup(qc); /* set up bmdma */
4992 ap->ops->bmdma_start(qc); /* initiate bmdma */
4993 ap->hsm_task_state = HSM_ST_LAST;
4997 if (qc->tf.flags & ATA_TFLAG_POLLING)
4998 ata_qc_set_polling(qc);
5000 ata_tf_to_host(ap, &qc->tf);
5002 if (qc->tf.flags & ATA_TFLAG_WRITE) {
5003 /* PIO data out protocol */
5004 ap->hsm_task_state = HSM_ST_FIRST;
5005 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5007 /* always send first data block using
5008 * the ata_pio_task() codepath.
5011 /* PIO data in protocol */
5012 ap->hsm_task_state = HSM_ST;
5014 if (qc->tf.flags & ATA_TFLAG_POLLING)
5015 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5017 /* if polling, ata_pio_task() handles the rest.
5018 * otherwise, interrupt handler takes over from here.
5024 case ATA_PROT_ATAPI:
5025 case ATA_PROT_ATAPI_NODATA:
5026 if (qc->tf.flags & ATA_TFLAG_POLLING)
5027 ata_qc_set_polling(qc);
5029 ata_tf_to_host(ap, &qc->tf);
5031 ap->hsm_task_state = HSM_ST_FIRST;
5033 /* send cdb by polling if no cdb interrupt */
5034 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
5035 (qc->tf.flags & ATA_TFLAG_POLLING))
5036 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5039 case ATA_PROT_ATAPI_DMA:
5040 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
5042 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
5043 ap->ops->bmdma_setup(qc); /* set up bmdma */
5044 ap->hsm_task_state = HSM_ST_FIRST;
5046 /* send cdb by polling if no cdb interrupt */
5047 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5048 ata_port_queue_task(ap, ata_pio_task, qc, 0);
5053 return AC_ERR_SYSTEM;
5060 * ata_host_intr - Handle host interrupt for given (port, task)
5061 * @ap: Port on which interrupt arrived (possibly...)
5062 * @qc: Taskfile currently active in engine
5064 * Handle host interrupt for given queued command. Currently,
5065 * only DMA interrupts are handled. All other commands are
5066 * handled via polling with interrupts disabled (nIEN bit).
5069 * spin_lock_irqsave(host lock)
5072 * One if interrupt was handled, zero if not (shared irq).
5075 inline unsigned int ata_host_intr (struct ata_port *ap,
5076 struct ata_queued_cmd *qc)
5078 struct ata_eh_info *ehi = &ap->eh_info;
5079 u8 status, host_stat = 0;
5081 VPRINTK("ata%u: protocol %d task_state %d\n",
5082 ap->id, qc->tf.protocol, ap->hsm_task_state);
5084 /* Check whether we are expecting interrupt in this state */
5085 switch (ap->hsm_task_state) {
5087 /* Some pre-ATAPI-4 devices assert INTRQ
5088 * at this state when ready to receive CDB.
5091 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
5092 * The flag was turned on only for atapi devices.
5093 * No need to check is_atapi_taskfile(&qc->tf) again.
5095 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
5099 if (qc->tf.protocol == ATA_PROT_DMA ||
5100 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
5101 /* check status of DMA engine */
5102 host_stat = ap->ops->bmdma_status(ap);
5103 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
5105 /* if it's not our irq... */
5106 if (!(host_stat & ATA_DMA_INTR))
5109 /* before we do anything else, clear DMA-Start bit */
5110 ap->ops->bmdma_stop(qc);
5112 if (unlikely(host_stat & ATA_DMA_ERR)) {
5113 /* error when transfering data to/from memory */
5114 qc->err_mask |= AC_ERR_HOST_BUS;
5115 ap->hsm_task_state = HSM_ST_ERR;
5125 /* check altstatus */
5126 status = ata_altstatus(ap);
5127 if (status & ATA_BUSY)
5130 /* check main status, clearing INTRQ */
5131 status = ata_chk_status(ap);
5132 if (unlikely(status & ATA_BUSY))
5135 /* ack bmdma irq events */
5136 ap->ops->irq_clear(ap);
5138 ata_hsm_move(ap, qc, status, 0);
5140 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5141 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5142 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5144 return 1; /* irq handled */
5147 ap->stats.idle_irq++;
5150 if ((ap->stats.idle_irq % 1000) == 0) {
5151 ata_irq_ack(ap, 0); /* debug trap */
5152 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5156 return 0; /* irq not handled */
5160 * ata_interrupt - Default ATA host interrupt handler
5161 * @irq: irq line (unused)
5162 * @dev_instance: pointer to our ata_host information structure
5164 * Default interrupt handler for PCI IDE devices. Calls
5165 * ata_host_intr() for each port that is not disabled.
5168 * Obtains host lock during operation.
5171 * IRQ_NONE or IRQ_HANDLED.
5174 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5176 struct ata_host *host = dev_instance;
5178 unsigned int handled = 0;
5179 unsigned long flags;
5181 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5182 spin_lock_irqsave(&host->lock, flags);
5184 for (i = 0; i < host->n_ports; i++) {
5185 struct ata_port *ap;
5187 ap = host->ports[i];
5189 !(ap->flags & ATA_FLAG_DISABLED)) {
5190 struct ata_queued_cmd *qc;
5192 qc = ata_qc_from_tag(ap, ap->active_tag);
5193 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5194 (qc->flags & ATA_QCFLAG_ACTIVE))
5195 handled |= ata_host_intr(ap, qc);
5199 spin_unlock_irqrestore(&host->lock, flags);
5201 return IRQ_RETVAL(handled);
5205 * sata_scr_valid - test whether SCRs are accessible
5206 * @ap: ATA port to test SCR accessibility for
5208 * Test whether SCRs are accessible for @ap.
5214 * 1 if SCRs are accessible, 0 otherwise.
5216 int sata_scr_valid(struct ata_port *ap)
5218 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5222 * sata_scr_read - read SCR register of the specified port
5223 * @ap: ATA port to read SCR for
5225 * @val: Place to store read value
5227 * Read SCR register @reg of @ap into *@val. This function is
5228 * guaranteed to succeed if the cable type of the port is SATA
5229 * and the port implements ->scr_read.
5235 * 0 on success, negative errno on failure.
5237 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5239 if (sata_scr_valid(ap)) {
5240 *val = ap->ops->scr_read(ap, reg);
5247 * sata_scr_write - write SCR register of the specified port
5248 * @ap: ATA port to write SCR for
5249 * @reg: SCR to write
5250 * @val: value to write
5252 * Write @val to SCR register @reg of @ap. This function is
5253 * guaranteed to succeed if the cable type of the port is SATA
5254 * and the port implements ->scr_read.
5260 * 0 on success, negative errno on failure.
5262 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5264 if (sata_scr_valid(ap)) {
5265 ap->ops->scr_write(ap, reg, val);
5272 * sata_scr_write_flush - write SCR register of the specified port and flush
5273 * @ap: ATA port to write SCR for
5274 * @reg: SCR to write
5275 * @val: value to write
5277 * This function is identical to sata_scr_write() except that this
5278 * function performs flush after writing to the register.
5284 * 0 on success, negative errno on failure.
5286 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5288 if (sata_scr_valid(ap)) {
5289 ap->ops->scr_write(ap, reg, val);
5290 ap->ops->scr_read(ap, reg);
5297 * ata_port_online - test whether the given port is online
5298 * @ap: ATA port to test
5300 * Test whether @ap is online. Note that this function returns 0
5301 * if online status of @ap cannot be obtained, so
5302 * ata_port_online(ap) != !ata_port_offline(ap).
5308 * 1 if the port online status is available and online.
5310 int ata_port_online(struct ata_port *ap)
5314 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5320 * ata_port_offline - test whether the given port is offline
5321 * @ap: ATA port to test
5323 * Test whether @ap is offline. Note that this function returns
5324 * 0 if offline status of @ap cannot be obtained, so
5325 * ata_port_online(ap) != !ata_port_offline(ap).
5331 * 1 if the port offline status is available and offline.
5333 int ata_port_offline(struct ata_port *ap)
5337 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5342 int ata_flush_cache(struct ata_device *dev)
5344 unsigned int err_mask;
5347 if (!ata_try_flush_cache(dev))
5350 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5351 cmd = ATA_CMD_FLUSH_EXT;
5353 cmd = ATA_CMD_FLUSH;
5355 err_mask = ata_do_simple_cmd(dev, cmd);
5357 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5364 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5365 unsigned int action, unsigned int ehi_flags,
5368 unsigned long flags;
5371 for (i = 0; i < host->n_ports; i++) {
5372 struct ata_port *ap = host->ports[i];
5374 /* Previous resume operation might still be in
5375 * progress. Wait for PM_PENDING to clear.
5377 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5378 ata_port_wait_eh(ap);
5379 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5382 /* request PM ops to EH */
5383 spin_lock_irqsave(ap->lock, flags);
5388 ap->pm_result = &rc;
5391 ap->pflags |= ATA_PFLAG_PM_PENDING;
5392 ap->eh_info.action |= action;
5393 ap->eh_info.flags |= ehi_flags;
5395 ata_port_schedule_eh(ap);
5397 spin_unlock_irqrestore(ap->lock, flags);
5399 /* wait and check result */
5401 ata_port_wait_eh(ap);
5402 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5412 * ata_host_suspend - suspend host
5413 * @host: host to suspend
5416 * Suspend @host. Actual operation is performed by EH. This
5417 * function requests EH to perform PM operations and waits for EH
5421 * Kernel thread context (may sleep).
5424 * 0 on success, -errno on failure.
5426 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5430 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5434 /* EH is quiescent now. Fail if we have any ready device.
5435 * This happens if hotplug occurs between completion of device
5436 * suspension and here.
5438 for (i = 0; i < host->n_ports; i++) {
5439 struct ata_port *ap = host->ports[i];
5441 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5442 struct ata_device *dev = &ap->device[j];
5444 if (ata_dev_ready(dev)) {
5445 ata_port_printk(ap, KERN_WARNING,
5446 "suspend failed, device %d "
5447 "still active\n", dev->devno);
5454 host->dev->power.power_state = mesg;
5458 ata_host_resume(host);
5463 * ata_host_resume - resume host
5464 * @host: host to resume
5466 * Resume @host. Actual operation is performed by EH. This
5467 * function requests EH to perform PM operations and returns.
5468 * Note that all resume operations are performed parallely.
5471 * Kernel thread context (may sleep).
5473 void ata_host_resume(struct ata_host *host)
5475 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5476 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5477 host->dev->power.power_state = PMSG_ON;
5481 * ata_port_start - Set port up for dma.
5482 * @ap: Port to initialize
5484 * Called just after data structures for each port are
5485 * initialized. Allocates space for PRD table.
5487 * May be used as the port_start() entry in ata_port_operations.
5490 * Inherited from caller.
5492 int ata_port_start(struct ata_port *ap)
5494 struct device *dev = ap->dev;
5497 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5502 rc = ata_pad_alloc(ap, dev);
5506 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5507 (unsigned long long)ap->prd_dma);
5512 * ata_dev_init - Initialize an ata_device structure
5513 * @dev: Device structure to initialize
5515 * Initialize @dev in preparation for probing.
5518 * Inherited from caller.
5520 void ata_dev_init(struct ata_device *dev)
5522 struct ata_port *ap = dev->ap;
5523 unsigned long flags;
5525 /* SATA spd limit is bound to the first device */
5526 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5528 /* High bits of dev->flags are used to record warm plug
5529 * requests which occur asynchronously. Synchronize using
5532 spin_lock_irqsave(ap->lock, flags);
5533 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5534 spin_unlock_irqrestore(ap->lock, flags);
5536 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5537 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5538 dev->pio_mask = UINT_MAX;
5539 dev->mwdma_mask = UINT_MAX;
5540 dev->udma_mask = UINT_MAX;
5544 * ata_port_init - Initialize an ata_port structure
5545 * @ap: Structure to initialize
5546 * @host: Collection of hosts to which @ap belongs
5547 * @ent: Probe information provided by low-level driver
5548 * @port_no: Port number associated with this ata_port
5550 * Initialize a new ata_port structure.
5553 * Inherited from caller.
5555 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5556 const struct ata_probe_ent *ent, unsigned int port_no)
5560 ap->lock = &host->lock;
5561 ap->flags = ATA_FLAG_DISABLED;
5562 ap->id = ata_unique_id++;
5563 ap->ctl = ATA_DEVCTL_OBS;
5566 ap->port_no = port_no;
5567 if (port_no == 1 && ent->pinfo2) {
5568 ap->pio_mask = ent->pinfo2->pio_mask;
5569 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5570 ap->udma_mask = ent->pinfo2->udma_mask;
5571 ap->flags |= ent->pinfo2->flags;
5572 ap->ops = ent->pinfo2->port_ops;
5574 ap->pio_mask = ent->pio_mask;
5575 ap->mwdma_mask = ent->mwdma_mask;
5576 ap->udma_mask = ent->udma_mask;
5577 ap->flags |= ent->port_flags;
5578 ap->ops = ent->port_ops;
5580 ap->hw_sata_spd_limit = UINT_MAX;
5581 ap->active_tag = ATA_TAG_POISON;
5582 ap->last_ctl = 0xFF;
5584 #if defined(ATA_VERBOSE_DEBUG)
5585 /* turn on all debugging levels */
5586 ap->msg_enable = 0x00FF;
5587 #elif defined(ATA_DEBUG)
5588 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5590 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5593 INIT_DELAYED_WORK(&ap->port_task, NULL);
5594 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5595 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5596 INIT_LIST_HEAD(&ap->eh_done_q);
5597 init_waitqueue_head(&ap->eh_wait_q);
5599 /* set cable type */
5600 ap->cbl = ATA_CBL_NONE;
5601 if (ap->flags & ATA_FLAG_SATA)
5602 ap->cbl = ATA_CBL_SATA;
5604 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5605 struct ata_device *dev = &ap->device[i];
5612 ap->stats.unhandled_irq = 1;
5613 ap->stats.idle_irq = 1;
5616 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5620 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5621 * @ap: ATA port to initialize SCSI host for
5622 * @shost: SCSI host associated with @ap
5624 * Initialize SCSI host @shost associated with ATA port @ap.
5627 * Inherited from caller.
5629 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5631 ap->scsi_host = shost;
5633 shost->unique_id = ap->id;
5636 shost->max_channel = 1;
5637 shost->max_cmd_len = 12;
5641 * ata_port_add - Attach low-level ATA driver to system
5642 * @ent: Information provided by low-level driver
5643 * @host: Collections of ports to which we add
5644 * @port_no: Port number associated with this host
5646 * Attach low-level ATA driver to system.
5649 * PCI/etc. bus probe sem.
5652 * New ata_port on success, for NULL on error.
5654 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5655 struct ata_host *host,
5656 unsigned int port_no)
5658 struct Scsi_Host *shost;
5659 struct ata_port *ap;
5663 if (!ent->port_ops->error_handler &&
5664 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5665 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5670 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5674 shost->transportt = &ata_scsi_transport_template;
5676 ap = ata_shost_to_port(shost);
5678 ata_port_init(ap, host, ent, port_no);
5679 ata_port_init_shost(ap, shost);
5684 static void ata_host_release(struct device *gendev, void *res)
5686 struct ata_host *host = dev_get_drvdata(gendev);
5689 for (i = 0; i < host->n_ports; i++) {
5690 struct ata_port *ap = host->ports[i];
5695 if (ap->ops->port_stop)
5696 ap->ops->port_stop(ap);
5698 scsi_host_put(ap->scsi_host);
5701 if (host->ops->host_stop)
5702 host->ops->host_stop(host);
5706 * ata_sas_host_init - Initialize a host struct
5707 * @host: host to initialize
5708 * @dev: device host is attached to
5709 * @flags: host flags
5713 * PCI/etc. bus probe sem.
5717 void ata_host_init(struct ata_host *host, struct device *dev,
5718 unsigned long flags, const struct ata_port_operations *ops)
5720 spin_lock_init(&host->lock);
5722 host->flags = flags;
5727 * ata_device_add - Register hardware device with ATA and SCSI layers
5728 * @ent: Probe information describing hardware device to be registered
5730 * This function processes the information provided in the probe
5731 * information struct @ent, allocates the necessary ATA and SCSI
5732 * host information structures, initializes them, and registers
5733 * everything with requisite kernel subsystems.
5735 * This function requests irqs, probes the ATA bus, and probes
5739 * PCI/etc. bus probe sem.
5742 * Number of ports registered. Zero on error (no ports registered).
5744 int ata_device_add(const struct ata_probe_ent *ent)
5747 struct device *dev = ent->dev;
5748 struct ata_host *host;
5753 if (ent->irq == 0) {
5754 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5758 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5761 /* alloc a container for our list of ATA ports (buses) */
5762 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5763 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5766 devres_add(dev, host);
5767 dev_set_drvdata(dev, host);
5769 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5770 host->n_ports = ent->n_ports;
5771 host->irq = ent->irq;
5772 host->irq2 = ent->irq2;
5773 host->mmio_base = ent->mmio_base;
5774 host->private_data = ent->private_data;
5776 /* register each port bound to this device */
5777 for (i = 0; i < host->n_ports; i++) {
5778 struct ata_port *ap;
5779 unsigned long xfer_mode_mask;
5780 int irq_line = ent->irq;
5782 ap = ata_port_add(ent, host, i);
5783 host->ports[i] = ap;
5788 if (ent->dummy_port_mask & (1 << i)) {
5789 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5790 ap->ops = &ata_dummy_port_ops;
5795 rc = ap->ops->port_start(ap);
5797 host->ports[i] = NULL;
5798 scsi_host_put(ap->scsi_host);
5802 /* Report the secondary IRQ for second channel legacy */
5803 if (i == 1 && ent->irq2)
5804 irq_line = ent->irq2;
5806 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5807 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5808 (ap->pio_mask << ATA_SHIFT_PIO);
5810 /* print per-port info to dmesg */
5811 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5812 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5813 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5814 ata_mode_string(xfer_mode_mask),
5815 ap->ioaddr.cmd_addr,
5816 ap->ioaddr.ctl_addr,
5817 ap->ioaddr.bmdma_addr,
5820 /* freeze port before requesting IRQ */
5821 ata_eh_freeze_port(ap);
5824 /* obtain irq, that may be shared between channels */
5825 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5826 ent->irq_flags, DRV_NAME, host);
5828 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5833 /* do we have a second IRQ for the other channel, eg legacy mode */
5835 /* We will get weird core code crashes later if this is true
5837 BUG_ON(ent->irq == ent->irq2);
5839 rc = devm_request_irq(dev, ent->irq2,
5840 ent->port_ops->irq_handler, ent->irq_flags,
5843 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5849 /* resource acquisition complete */
5850 devres_remove_group(dev, ata_device_add);
5852 /* perform each probe synchronously */
5853 DPRINTK("probe begin\n");
5854 for (i = 0; i < host->n_ports; i++) {
5855 struct ata_port *ap = host->ports[i];
5859 /* init sata_spd_limit to the current value */
5860 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5861 int spd = (scontrol >> 4) & 0xf;
5862 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5864 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5866 rc = scsi_add_host(ap->scsi_host, dev);
5868 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5869 /* FIXME: do something useful here */
5870 /* FIXME: handle unconditional calls to
5871 * scsi_scan_host and ata_host_remove, below,
5876 if (ap->ops->error_handler) {
5877 struct ata_eh_info *ehi = &ap->eh_info;
5878 unsigned long flags;
5882 /* kick EH for boot probing */
5883 spin_lock_irqsave(ap->lock, flags);
5885 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5886 ehi->action |= ATA_EH_SOFTRESET;
5887 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5889 ap->pflags |= ATA_PFLAG_LOADING;
5890 ata_port_schedule_eh(ap);
5892 spin_unlock_irqrestore(ap->lock, flags);
5894 /* wait for EH to finish */
5895 ata_port_wait_eh(ap);
5897 DPRINTK("ata%u: bus probe begin\n", ap->id);
5898 rc = ata_bus_probe(ap);
5899 DPRINTK("ata%u: bus probe end\n", ap->id);
5902 /* FIXME: do something useful here?
5903 * Current libata behavior will
5904 * tear down everything when
5905 * the module is removed
5906 * or the h/w is unplugged.
5912 /* probes are done, now scan each port's disk(s) */
5913 DPRINTK("host probe begin\n");
5914 for (i = 0; i < host->n_ports; i++) {
5915 struct ata_port *ap = host->ports[i];
5917 ata_scsi_scan_host(ap);
5920 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5921 return ent->n_ports; /* success */
5924 devres_release_group(dev, ata_device_add);
5925 dev_set_drvdata(dev, NULL);
5926 VPRINTK("EXIT, returning %d\n", rc);
5931 * ata_port_detach - Detach ATA port in prepration of device removal
5932 * @ap: ATA port to be detached
5934 * Detach all ATA devices and the associated SCSI devices of @ap;
5935 * then, remove the associated SCSI host. @ap is guaranteed to
5936 * be quiescent on return from this function.
5939 * Kernel thread context (may sleep).
5941 void ata_port_detach(struct ata_port *ap)
5943 unsigned long flags;
5946 if (!ap->ops->error_handler)
5949 /* tell EH we're leaving & flush EH */
5950 spin_lock_irqsave(ap->lock, flags);
5951 ap->pflags |= ATA_PFLAG_UNLOADING;
5952 spin_unlock_irqrestore(ap->lock, flags);
5954 ata_port_wait_eh(ap);
5956 /* EH is now guaranteed to see UNLOADING, so no new device
5957 * will be attached. Disable all existing devices.
5959 spin_lock_irqsave(ap->lock, flags);
5961 for (i = 0; i < ATA_MAX_DEVICES; i++)
5962 ata_dev_disable(&ap->device[i]);
5964 spin_unlock_irqrestore(ap->lock, flags);
5966 /* Final freeze & EH. All in-flight commands are aborted. EH
5967 * will be skipped and retrials will be terminated with bad
5970 spin_lock_irqsave(ap->lock, flags);
5971 ata_port_freeze(ap); /* won't be thawed */
5972 spin_unlock_irqrestore(ap->lock, flags);
5974 ata_port_wait_eh(ap);
5976 /* Flush hotplug task. The sequence is similar to
5977 * ata_port_flush_task().
5979 flush_workqueue(ata_aux_wq);
5980 cancel_delayed_work(&ap->hotplug_task);
5981 flush_workqueue(ata_aux_wq);
5984 /* remove the associated SCSI host */
5985 scsi_remove_host(ap->scsi_host);
5989 * ata_host_detach - Detach all ports of an ATA host
5990 * @host: Host to detach
5992 * Detach all ports of @host.
5995 * Kernel thread context (may sleep).
5997 void ata_host_detach(struct ata_host *host)
6001 for (i = 0; i < host->n_ports; i++)
6002 ata_port_detach(host->ports[i]);
6005 struct ata_probe_ent *
6006 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
6008 struct ata_probe_ent *probe_ent;
6010 /* XXX - the following if can go away once all LLDs are managed */
6011 if (!list_empty(&dev->devres_head))
6012 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
6014 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
6016 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
6017 kobject_name(&(dev->kobj)));
6021 INIT_LIST_HEAD(&probe_ent->node);
6022 probe_ent->dev = dev;
6024 probe_ent->sht = port->sht;
6025 probe_ent->port_flags = port->flags;
6026 probe_ent->pio_mask = port->pio_mask;
6027 probe_ent->mwdma_mask = port->mwdma_mask;
6028 probe_ent->udma_mask = port->udma_mask;
6029 probe_ent->port_ops = port->port_ops;
6030 probe_ent->private_data = port->private_data;
6036 * ata_std_ports - initialize ioaddr with standard port offsets.
6037 * @ioaddr: IO address structure to be initialized
6039 * Utility function which initializes data_addr, error_addr,
6040 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
6041 * device_addr, status_addr, and command_addr to standard offsets
6042 * relative to cmd_addr.
6044 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
6047 void ata_std_ports(struct ata_ioports *ioaddr)
6049 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
6050 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
6051 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
6052 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
6053 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
6054 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
6055 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
6056 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
6057 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
6058 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
6065 * ata_pci_remove_one - PCI layer callback for device removal
6066 * @pdev: PCI device that was removed
6068 * PCI layer indicates to libata via this hook that hot-unplug or
6069 * module unload event has occurred. Detach all ports. Resource
6070 * release is handled via devres.
6073 * Inherited from PCI layer (may sleep).
6075 void ata_pci_remove_one(struct pci_dev *pdev)
6077 struct device *dev = pci_dev_to_dev(pdev);
6078 struct ata_host *host = dev_get_drvdata(dev);
6080 ata_host_detach(host);
6083 /* move to PCI subsystem */
6084 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
6086 unsigned long tmp = 0;
6088 switch (bits->width) {
6091 pci_read_config_byte(pdev, bits->reg, &tmp8);
6097 pci_read_config_word(pdev, bits->reg, &tmp16);
6103 pci_read_config_dword(pdev, bits->reg, &tmp32);
6114 return (tmp == bits->val) ? 1 : 0;
6117 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
6119 pci_save_state(pdev);
6121 if (mesg.event == PM_EVENT_SUSPEND) {
6122 pci_disable_device(pdev);
6123 pci_set_power_state(pdev, PCI_D3hot);
6127 int ata_pci_device_do_resume(struct pci_dev *pdev)
6131 pci_set_power_state(pdev, PCI_D0);
6132 pci_restore_state(pdev);
6134 rc = pcim_enable_device(pdev);
6136 dev_printk(KERN_ERR, &pdev->dev,
6137 "failed to enable device after resume (%d)\n", rc);
6141 pci_set_master(pdev);
6145 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6147 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6150 rc = ata_host_suspend(host, mesg);
6154 ata_pci_device_do_suspend(pdev, mesg);
6159 int ata_pci_device_resume(struct pci_dev *pdev)
6161 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6164 rc = ata_pci_device_do_resume(pdev);
6166 ata_host_resume(host);
6169 #endif /* CONFIG_PCI */
6172 static int __init ata_init(void)
6174 ata_probe_timeout *= HZ;
6175 ata_wq = create_workqueue("ata");
6179 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6181 destroy_workqueue(ata_wq);
6185 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6189 static void __exit ata_exit(void)
6191 destroy_workqueue(ata_wq);
6192 destroy_workqueue(ata_aux_wq);
6195 subsys_initcall(ata_init);
6196 module_exit(ata_exit);
6198 static unsigned long ratelimit_time;
6199 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6201 int ata_ratelimit(void)
6204 unsigned long flags;
6206 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6208 if (time_after(jiffies, ratelimit_time)) {
6210 ratelimit_time = jiffies + (HZ/5);
6214 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6220 * ata_wait_register - wait until register value changes
6221 * @reg: IO-mapped register
6222 * @mask: Mask to apply to read register value
6223 * @val: Wait condition
6224 * @interval_msec: polling interval in milliseconds
6225 * @timeout_msec: timeout in milliseconds
6227 * Waiting for some bits of register to change is a common
6228 * operation for ATA controllers. This function reads 32bit LE
6229 * IO-mapped register @reg and tests for the following condition.
6231 * (*@reg & mask) != val
6233 * If the condition is met, it returns; otherwise, the process is
6234 * repeated after @interval_msec until timeout.
6237 * Kernel thread context (may sleep)
6240 * The final register value.
6242 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6243 unsigned long interval_msec,
6244 unsigned long timeout_msec)
6246 unsigned long timeout;
6249 tmp = ioread32(reg);
6251 /* Calculate timeout _after_ the first read to make sure
6252 * preceding writes reach the controller before starting to
6253 * eat away the timeout.
6255 timeout = jiffies + (timeout_msec * HZ) / 1000;
6257 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6258 msleep(interval_msec);
6259 tmp = ioread32(reg);
6268 static void ata_dummy_noret(struct ata_port *ap) { }
6269 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6270 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6272 static u8 ata_dummy_check_status(struct ata_port *ap)
6277 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6279 return AC_ERR_SYSTEM;
6282 const struct ata_port_operations ata_dummy_port_ops = {
6283 .port_disable = ata_port_disable,
6284 .check_status = ata_dummy_check_status,
6285 .check_altstatus = ata_dummy_check_status,
6286 .dev_select = ata_noop_dev_select,
6287 .qc_prep = ata_noop_qc_prep,
6288 .qc_issue = ata_dummy_qc_issue,
6289 .freeze = ata_dummy_noret,
6290 .thaw = ata_dummy_noret,
6291 .error_handler = ata_dummy_noret,
6292 .post_internal_cmd = ata_dummy_qc_noret,
6293 .irq_clear = ata_dummy_noret,
6294 .port_start = ata_dummy_ret0,
6295 .port_stop = ata_dummy_noret,
6299 * libata is essentially a library of internal helper functions for
6300 * low-level ATA host controller drivers. As such, the API/ABI is
6301 * likely to change as new drivers are added and updated.
6302 * Do not depend on ABI/API stability.
6305 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6306 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6307 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6308 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6309 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6310 EXPORT_SYMBOL_GPL(ata_std_ports);
6311 EXPORT_SYMBOL_GPL(ata_host_init);
6312 EXPORT_SYMBOL_GPL(ata_device_add);
6313 EXPORT_SYMBOL_GPL(ata_host_detach);
6314 EXPORT_SYMBOL_GPL(ata_sg_init);
6315 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6316 EXPORT_SYMBOL_GPL(ata_hsm_move);
6317 EXPORT_SYMBOL_GPL(ata_qc_complete);
6318 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6319 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6320 EXPORT_SYMBOL_GPL(ata_tf_load);
6321 EXPORT_SYMBOL_GPL(ata_tf_read);
6322 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6323 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6324 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6325 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6326 EXPORT_SYMBOL_GPL(ata_check_status);
6327 EXPORT_SYMBOL_GPL(ata_altstatus);
6328 EXPORT_SYMBOL_GPL(ata_exec_command);
6329 EXPORT_SYMBOL_GPL(ata_port_start);
6330 EXPORT_SYMBOL_GPL(ata_interrupt);
6331 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6332 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6333 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6334 EXPORT_SYMBOL_GPL(ata_qc_prep);
6335 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6336 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6337 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6338 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6339 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6340 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6341 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6342 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6343 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6344 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6345 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6346 EXPORT_SYMBOL_GPL(ata_port_probe);
6347 EXPORT_SYMBOL_GPL(sata_set_spd);
6348 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6349 EXPORT_SYMBOL_GPL(sata_phy_resume);
6350 EXPORT_SYMBOL_GPL(sata_phy_reset);
6351 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6352 EXPORT_SYMBOL_GPL(ata_bus_reset);
6353 EXPORT_SYMBOL_GPL(ata_std_prereset);
6354 EXPORT_SYMBOL_GPL(ata_std_softreset);
6355 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6356 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6357 EXPORT_SYMBOL_GPL(ata_std_postreset);
6358 EXPORT_SYMBOL_GPL(ata_dev_classify);
6359 EXPORT_SYMBOL_GPL(ata_dev_pair);
6360 EXPORT_SYMBOL_GPL(ata_port_disable);
6361 EXPORT_SYMBOL_GPL(ata_ratelimit);
6362 EXPORT_SYMBOL_GPL(ata_wait_register);
6363 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6364 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6365 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6366 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6367 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6368 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6369 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6370 EXPORT_SYMBOL_GPL(ata_host_intr);
6371 EXPORT_SYMBOL_GPL(sata_scr_valid);
6372 EXPORT_SYMBOL_GPL(sata_scr_read);
6373 EXPORT_SYMBOL_GPL(sata_scr_write);
6374 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6375 EXPORT_SYMBOL_GPL(ata_port_online);
6376 EXPORT_SYMBOL_GPL(ata_port_offline);
6377 EXPORT_SYMBOL_GPL(ata_host_suspend);
6378 EXPORT_SYMBOL_GPL(ata_host_resume);
6379 EXPORT_SYMBOL_GPL(ata_id_string);
6380 EXPORT_SYMBOL_GPL(ata_id_c_string);
6381 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6382 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6384 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6385 EXPORT_SYMBOL_GPL(ata_timing_compute);
6386 EXPORT_SYMBOL_GPL(ata_timing_merge);
6389 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6390 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6391 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6392 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6393 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6394 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6395 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6396 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6397 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6398 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6399 #endif /* CONFIG_PCI */
6401 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6402 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6404 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6405 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6406 EXPORT_SYMBOL_GPL(ata_port_abort);
6407 EXPORT_SYMBOL_GPL(ata_port_freeze);
6408 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6409 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6410 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6411 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6412 EXPORT_SYMBOL_GPL(ata_do_eh);