2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 /* debounce timing parameters in msecs { interval, duration, timeout } */
63 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
64 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
65 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
67 static unsigned int ata_dev_init_params(struct ata_device *dev,
68 u16 heads, u16 sectors);
69 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
70 static void ata_dev_xfermask(struct ata_device *dev);
72 static unsigned int ata_unique_id = 1;
73 static struct workqueue_struct *ata_wq;
75 struct workqueue_struct *ata_aux_wq;
77 int atapi_enabled = 1;
78 module_param(atapi_enabled, int, 0444);
79 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82 module_param(atapi_dmadir, int, 0444);
83 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
86 module_param_named(fua, libata_fua, int, 0444);
87 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
89 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
90 module_param(ata_probe_timeout, int, 0444);
91 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
93 MODULE_AUTHOR("Jeff Garzik");
94 MODULE_DESCRIPTION("Library module for ATA devices");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRV_VERSION);
100 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
101 * @tf: Taskfile to convert
102 * @fis: Buffer into which data will output
103 * @pmp: Port multiplier port
105 * Converts a standard ATA taskfile to a Serial ATA
106 * FIS structure (Register - Host to Device).
109 * Inherited from caller.
112 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
114 fis[0] = 0x27; /* Register - Host to Device FIS */
115 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
116 bit 7 indicates Command FIS */
117 fis[2] = tf->command;
118 fis[3] = tf->feature;
125 fis[8] = tf->hob_lbal;
126 fis[9] = tf->hob_lbam;
127 fis[10] = tf->hob_lbah;
128 fis[11] = tf->hob_feature;
131 fis[13] = tf->hob_nsect;
142 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
143 * @fis: Buffer from which data will be input
144 * @tf: Taskfile to output
146 * Converts a serial ATA FIS structure to a standard ATA taskfile.
149 * Inherited from caller.
152 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
154 tf->command = fis[2]; /* status */
155 tf->feature = fis[3]; /* error */
162 tf->hob_lbal = fis[8];
163 tf->hob_lbam = fis[9];
164 tf->hob_lbah = fis[10];
167 tf->hob_nsect = fis[13];
170 static const u8 ata_rw_cmds[] = {
174 ATA_CMD_READ_MULTI_EXT,
175 ATA_CMD_WRITE_MULTI_EXT,
179 ATA_CMD_WRITE_MULTI_FUA_EXT,
183 ATA_CMD_PIO_READ_EXT,
184 ATA_CMD_PIO_WRITE_EXT,
197 ATA_CMD_WRITE_FUA_EXT
201 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
202 * @qc: command to examine and configure
204 * Examine the device configuration and tf->flags to calculate
205 * the proper read/write commands and protocol to use.
210 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
212 struct ata_taskfile *tf = &qc->tf;
213 struct ata_device *dev = qc->dev;
216 int index, fua, lba48, write;
218 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
219 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
220 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
222 if (dev->flags & ATA_DFLAG_PIO) {
223 tf->protocol = ATA_PROT_PIO;
224 index = dev->multi_count ? 0 : 8;
225 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
226 /* Unable to use DMA due to host limitation */
227 tf->protocol = ATA_PROT_PIO;
228 index = dev->multi_count ? 0 : 8;
230 tf->protocol = ATA_PROT_DMA;
234 cmd = ata_rw_cmds[index + fua + lba48 + write];
243 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
244 * @pio_mask: pio_mask
245 * @mwdma_mask: mwdma_mask
246 * @udma_mask: udma_mask
248 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
249 * unsigned int xfer_mask.
257 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
258 unsigned int mwdma_mask,
259 unsigned int udma_mask)
261 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
262 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
263 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
267 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
268 * @xfer_mask: xfer_mask to unpack
269 * @pio_mask: resulting pio_mask
270 * @mwdma_mask: resulting mwdma_mask
271 * @udma_mask: resulting udma_mask
273 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
274 * Any NULL distination masks will be ignored.
276 static void ata_unpack_xfermask(unsigned int xfer_mask,
277 unsigned int *pio_mask,
278 unsigned int *mwdma_mask,
279 unsigned int *udma_mask)
282 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
284 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
286 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
289 static const struct ata_xfer_ent {
293 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
294 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
295 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
300 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
301 * @xfer_mask: xfer_mask of interest
303 * Return matching XFER_* value for @xfer_mask. Only the highest
304 * bit of @xfer_mask is considered.
310 * Matching XFER_* value, 0 if no match found.
312 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
314 int highbit = fls(xfer_mask) - 1;
315 const struct ata_xfer_ent *ent;
317 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
318 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
319 return ent->base + highbit - ent->shift;
324 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
325 * @xfer_mode: XFER_* of interest
327 * Return matching xfer_mask for @xfer_mode.
333 * Matching xfer_mask, 0 if no match found.
335 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
337 const struct ata_xfer_ent *ent;
339 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
340 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
341 return 1 << (ent->shift + xfer_mode - ent->base);
346 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
347 * @xfer_mode: XFER_* of interest
349 * Return matching xfer_shift for @xfer_mode.
355 * Matching xfer_shift, -1 if no match found.
357 static int ata_xfer_mode2shift(unsigned int xfer_mode)
359 const struct ata_xfer_ent *ent;
361 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
362 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
368 * ata_mode_string - convert xfer_mask to string
369 * @xfer_mask: mask of bits supported; only highest bit counts.
371 * Determine string which represents the highest speed
372 * (highest bit in @modemask).
378 * Constant C string representing highest speed listed in
379 * @mode_mask, or the constant C string "<n/a>".
381 static const char *ata_mode_string(unsigned int xfer_mask)
383 static const char * const xfer_mode_str[] = {
407 highbit = fls(xfer_mask) - 1;
408 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
409 return xfer_mode_str[highbit];
413 static const char *sata_spd_string(unsigned int spd)
415 static const char * const spd_str[] = {
420 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
422 return spd_str[spd - 1];
425 void ata_dev_disable(struct ata_device *dev)
427 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
428 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
434 * ata_pio_devchk - PATA device presence detection
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
438 * This technique was originally described in
439 * Hale Landis's ATADRVR (www.ata-atapi.com), and
440 * later found its way into the ATA/ATAPI spec.
442 * Write a pattern to the ATA shadow registers,
443 * and if a device is present, it will respond by
444 * correctly storing and echoing back the
445 * ATA shadow register contents.
451 static unsigned int ata_pio_devchk(struct ata_port *ap,
454 struct ata_ioports *ioaddr = &ap->ioaddr;
457 ap->ops->dev_select(ap, device);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 outb(0xaa, ioaddr->nsect_addr);
463 outb(0x55, ioaddr->lbal_addr);
465 outb(0x55, ioaddr->nsect_addr);
466 outb(0xaa, ioaddr->lbal_addr);
468 nsect = inb(ioaddr->nsect_addr);
469 lbal = inb(ioaddr->lbal_addr);
471 if ((nsect == 0x55) && (lbal == 0xaa))
472 return 1; /* we found a device */
474 return 0; /* nothing found */
478 * ata_mmio_devchk - PATA device presence detection
479 * @ap: ATA channel to examine
480 * @device: Device to examine (starting at zero)
482 * This technique was originally described in
483 * Hale Landis's ATADRVR (www.ata-atapi.com), and
484 * later found its way into the ATA/ATAPI spec.
486 * Write a pattern to the ATA shadow registers,
487 * and if a device is present, it will respond by
488 * correctly storing and echoing back the
489 * ATA shadow register contents.
495 static unsigned int ata_mmio_devchk(struct ata_port *ap,
498 struct ata_ioports *ioaddr = &ap->ioaddr;
501 ap->ops->dev_select(ap, device);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
509 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
510 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
512 nsect = readb((void __iomem *) ioaddr->nsect_addr);
513 lbal = readb((void __iomem *) ioaddr->lbal_addr);
515 if ((nsect == 0x55) && (lbal == 0xaa))
516 return 1; /* we found a device */
518 return 0; /* nothing found */
522 * ata_devchk - PATA device presence detection
523 * @ap: ATA channel to examine
524 * @device: Device to examine (starting at zero)
526 * Dispatch ATA device presence detection, depending
527 * on whether we are using PIO or MMIO to talk to the
528 * ATA shadow registers.
534 static unsigned int ata_devchk(struct ata_port *ap,
537 if (ap->flags & ATA_FLAG_MMIO)
538 return ata_mmio_devchk(ap, device);
539 return ata_pio_devchk(ap, device);
543 * ata_dev_classify - determine device type based on ATA-spec signature
544 * @tf: ATA taskfile register set for device to be identified
546 * Determine from taskfile register contents whether a device is
547 * ATA or ATAPI, as per "Signature and persistence" section
548 * of ATA/PI spec (volume 1, sect 5.14).
554 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
555 * the event of failure.
558 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
560 /* Apple's open source Darwin code hints that some devices only
561 * put a proper signature into the LBA mid/high registers,
562 * So, we only check those. It's sufficient for uniqueness.
565 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
566 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
567 DPRINTK("found ATA device by sig\n");
571 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
572 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
573 DPRINTK("found ATAPI device by sig\n");
574 return ATA_DEV_ATAPI;
577 DPRINTK("unknown device\n");
578 return ATA_DEV_UNKNOWN;
582 * ata_dev_try_classify - Parse returned ATA device signature
583 * @ap: ATA channel to examine
584 * @device: Device to examine (starting at zero)
585 * @r_err: Value of error register on completion
587 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
588 * an ATA/ATAPI-defined set of values is placed in the ATA
589 * shadow registers, indicating the results of device detection
592 * Select the ATA device, and read the values from the ATA shadow
593 * registers. Then parse according to the Error register value,
594 * and the spec-defined values examined by ata_dev_classify().
600 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
604 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
606 struct ata_taskfile tf;
610 ap->ops->dev_select(ap, device);
612 memset(&tf, 0, sizeof(tf));
614 ap->ops->tf_read(ap, &tf);
619 /* see if device passed diags: if master then continue and warn later */
620 if (err == 0 && device == 0)
621 /* diagnostic fail : do nothing _YET_ */
622 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
625 else if ((device == 0) && (err == 0x81))
630 /* determine if device is ATA or ATAPI */
631 class = ata_dev_classify(&tf);
633 if (class == ATA_DEV_UNKNOWN)
635 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
641 * ata_id_string - Convert IDENTIFY DEVICE page into string
642 * @id: IDENTIFY DEVICE results we will examine
643 * @s: string into which data is output
644 * @ofs: offset into identify device page
645 * @len: length of string to return. must be an even number.
647 * The strings in the IDENTIFY DEVICE page are broken up into
648 * 16-bit chunks. Run through the string, and output each
649 * 8-bit chunk linearly, regardless of platform.
655 void ata_id_string(const u16 *id, unsigned char *s,
656 unsigned int ofs, unsigned int len)
675 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
676 * @id: IDENTIFY DEVICE results we will examine
677 * @s: string into which data is output
678 * @ofs: offset into identify device page
679 * @len: length of string to return. must be an odd number.
681 * This function is identical to ata_id_string except that it
682 * trims trailing spaces and terminates the resulting string with
683 * null. @len must be actual maximum length (even number) + 1.
688 void ata_id_c_string(const u16 *id, unsigned char *s,
689 unsigned int ofs, unsigned int len)
695 ata_id_string(id, s, ofs, len - 1);
697 p = s + strnlen(s, len - 1);
698 while (p > s && p[-1] == ' ')
703 static u64 ata_id_n_sectors(const u16 *id)
705 if (ata_id_has_lba(id)) {
706 if (ata_id_has_lba48(id))
707 return ata_id_u64(id, 100);
709 return ata_id_u32(id, 60);
711 if (ata_id_current_chs_valid(id))
712 return ata_id_u32(id, 57);
714 return id[1] * id[3] * id[6];
719 * ata_noop_dev_select - Select device 0/1 on ATA bus
720 * @ap: ATA channel to manipulate
721 * @device: ATA device (numbered from zero) to select
723 * This function performs no actual function.
725 * May be used as the dev_select() entry in ata_port_operations.
730 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
736 * ata_std_dev_select - Select device 0/1 on ATA bus
737 * @ap: ATA channel to manipulate
738 * @device: ATA device (numbered from zero) to select
740 * Use the method defined in the ATA specification to
741 * make either device 0, or device 1, active on the
742 * ATA channel. Works with both PIO and MMIO.
744 * May be used as the dev_select() entry in ata_port_operations.
750 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
755 tmp = ATA_DEVICE_OBS;
757 tmp = ATA_DEVICE_OBS | ATA_DEV1;
759 if (ap->flags & ATA_FLAG_MMIO) {
760 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
762 outb(tmp, ap->ioaddr.device_addr);
764 ata_pause(ap); /* needed; also flushes, for mmio */
768 * ata_dev_select - Select device 0/1 on ATA bus
769 * @ap: ATA channel to manipulate
770 * @device: ATA device (numbered from zero) to select
771 * @wait: non-zero to wait for Status register BSY bit to clear
772 * @can_sleep: non-zero if context allows sleeping
774 * Use the method defined in the ATA specification to
775 * make either device 0, or device 1, active on the
778 * This is a high-level version of ata_std_dev_select(),
779 * which additionally provides the services of inserting
780 * the proper pauses and status polling, where needed.
786 void ata_dev_select(struct ata_port *ap, unsigned int device,
787 unsigned int wait, unsigned int can_sleep)
789 if (ata_msg_probe(ap))
790 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
791 "device %u, wait %u\n", ap->id, device, wait);
796 ap->ops->dev_select(ap, device);
799 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
806 * ata_dump_id - IDENTIFY DEVICE info debugging output
807 * @id: IDENTIFY DEVICE page to dump
809 * Dump selected 16-bit words from the given IDENTIFY DEVICE
816 static inline void ata_dump_id(const u16 *id)
818 DPRINTK("49==0x%04x "
828 DPRINTK("80==0x%04x "
838 DPRINTK("88==0x%04x "
845 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
846 * @id: IDENTIFY data to compute xfer mask from
848 * Compute the xfermask for this device. This is not as trivial
849 * as it seems if we must consider early devices correctly.
851 * FIXME: pre IDE drive timing (do we care ?).
859 static unsigned int ata_id_xfermask(const u16 *id)
861 unsigned int pio_mask, mwdma_mask, udma_mask;
863 /* Usual case. Word 53 indicates word 64 is valid */
864 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
865 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
869 /* If word 64 isn't valid then Word 51 high byte holds
870 * the PIO timing number for the maximum. Turn it into
873 u8 mode = id[ATA_ID_OLD_PIO_MODES] & 0xFF;
874 if (mode < 5) /* Valid PIO range */
875 pio_mask = (2 << mode) - 1;
879 /* But wait.. there's more. Design your standards by
880 * committee and you too can get a free iordy field to
881 * process. However its the speeds not the modes that
882 * are supported... Note drivers using the timing API
883 * will get this right anyway
887 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
889 if (ata_id_is_cfa(id)) {
891 * Process compact flash extended modes
893 int pio = id[163] & 0x7;
894 int dma = (id[163] >> 3) & 7;
897 pio_mask |= (1 << 5);
899 pio_mask |= (1 << 6);
901 mwdma_mask |= (1 << 3);
903 mwdma_mask |= (1 << 4);
907 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
908 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
910 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
914 * ata_port_queue_task - Queue port_task
915 * @ap: The ata_port to queue port_task for
916 * @fn: workqueue function to be scheduled
917 * @data: data value to pass to workqueue function
918 * @delay: delay time for workqueue function
920 * Schedule @fn(@data) for execution after @delay jiffies using
921 * port_task. There is one port_task per port and it's the
922 * user(low level driver)'s responsibility to make sure that only
923 * one task is active at any given time.
925 * libata core layer takes care of synchronization between
926 * port_task and EH. ata_port_queue_task() may be ignored for EH
930 * Inherited from caller.
932 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
937 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
940 PREPARE_WORK(&ap->port_task, fn, data);
943 rc = queue_work(ata_wq, &ap->port_task);
945 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
947 /* rc == 0 means that another user is using port task */
952 * ata_port_flush_task - Flush port_task
953 * @ap: The ata_port to flush port_task for
955 * After this function completes, port_task is guranteed not to
956 * be running or scheduled.
959 * Kernel thread context (may sleep)
961 void ata_port_flush_task(struct ata_port *ap)
967 spin_lock_irqsave(ap->lock, flags);
968 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
969 spin_unlock_irqrestore(ap->lock, flags);
971 DPRINTK("flush #1\n");
972 flush_workqueue(ata_wq);
975 * At this point, if a task is running, it's guaranteed to see
976 * the FLUSH flag; thus, it will never queue pio tasks again.
979 if (!cancel_delayed_work(&ap->port_task)) {
981 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
983 flush_workqueue(ata_wq);
986 spin_lock_irqsave(ap->lock, flags);
987 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
988 spin_unlock_irqrestore(ap->lock, flags);
991 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
994 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
996 struct completion *waiting = qc->private_data;
1002 * ata_exec_internal - execute libata internal command
1003 * @dev: Device to which the command is sent
1004 * @tf: Taskfile registers for the command and the result
1005 * @cdb: CDB for packet command
1006 * @dma_dir: Data tranfer direction of the command
1007 * @buf: Data buffer of the command
1008 * @buflen: Length of data buffer
1010 * Executes libata internal command with timeout. @tf contains
1011 * command on entry and result on return. Timeout and error
1012 * conditions are reported via return value. No recovery action
1013 * is taken after a command times out. It's caller's duty to
1014 * clean up after timeout.
1017 * None. Should be called with kernel context, might sleep.
1020 * Zero on success, AC_ERR_* mask on failure
1022 unsigned ata_exec_internal(struct ata_device *dev,
1023 struct ata_taskfile *tf, const u8 *cdb,
1024 int dma_dir, void *buf, unsigned int buflen)
1026 struct ata_port *ap = dev->ap;
1027 u8 command = tf->command;
1028 struct ata_queued_cmd *qc;
1029 unsigned int tag, preempted_tag;
1030 u32 preempted_sactive, preempted_qc_active;
1031 DECLARE_COMPLETION_ONSTACK(wait);
1032 unsigned long flags;
1033 unsigned int err_mask;
1036 spin_lock_irqsave(ap->lock, flags);
1038 /* no internal command while frozen */
1039 if (ap->pflags & ATA_PFLAG_FROZEN) {
1040 spin_unlock_irqrestore(ap->lock, flags);
1041 return AC_ERR_SYSTEM;
1044 /* initialize internal qc */
1046 /* XXX: Tag 0 is used for drivers with legacy EH as some
1047 * drivers choke if any other tag is given. This breaks
1048 * ata_tag_internal() test for those drivers. Don't use new
1049 * EH stuff without converting to it.
1051 if (ap->ops->error_handler)
1052 tag = ATA_TAG_INTERNAL;
1056 if (test_and_set_bit(tag, &ap->qc_allocated))
1058 qc = __ata_qc_from_tag(ap, tag);
1066 preempted_tag = ap->active_tag;
1067 preempted_sactive = ap->sactive;
1068 preempted_qc_active = ap->qc_active;
1069 ap->active_tag = ATA_TAG_POISON;
1073 /* prepare & issue qc */
1076 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1077 qc->flags |= ATA_QCFLAG_RESULT_TF;
1078 qc->dma_dir = dma_dir;
1079 if (dma_dir != DMA_NONE) {
1080 ata_sg_init_one(qc, buf, buflen);
1081 qc->nsect = buflen / ATA_SECT_SIZE;
1084 qc->private_data = &wait;
1085 qc->complete_fn = ata_qc_complete_internal;
1089 spin_unlock_irqrestore(ap->lock, flags);
1091 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1093 ata_port_flush_task(ap);
1096 spin_lock_irqsave(ap->lock, flags);
1098 /* We're racing with irq here. If we lose, the
1099 * following test prevents us from completing the qc
1100 * twice. If we win, the port is frozen and will be
1101 * cleaned up by ->post_internal_cmd().
1103 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1104 qc->err_mask |= AC_ERR_TIMEOUT;
1106 if (ap->ops->error_handler)
1107 ata_port_freeze(ap);
1109 ata_qc_complete(qc);
1111 if (ata_msg_warn(ap))
1112 ata_dev_printk(dev, KERN_WARNING,
1113 "qc timeout (cmd 0x%x)\n", command);
1116 spin_unlock_irqrestore(ap->lock, flags);
1119 /* do post_internal_cmd */
1120 if (ap->ops->post_internal_cmd)
1121 ap->ops->post_internal_cmd(qc);
1123 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1124 if (ata_msg_warn(ap))
1125 ata_dev_printk(dev, KERN_WARNING,
1126 "zero err_mask for failed "
1127 "internal command, assuming AC_ERR_OTHER\n");
1128 qc->err_mask |= AC_ERR_OTHER;
1132 spin_lock_irqsave(ap->lock, flags);
1134 *tf = qc->result_tf;
1135 err_mask = qc->err_mask;
1138 ap->active_tag = preempted_tag;
1139 ap->sactive = preempted_sactive;
1140 ap->qc_active = preempted_qc_active;
1142 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1143 * Until those drivers are fixed, we detect the condition
1144 * here, fail the command with AC_ERR_SYSTEM and reenable the
1147 * Note that this doesn't change any behavior as internal
1148 * command failure results in disabling the device in the
1149 * higher layer for LLDDs without new reset/EH callbacks.
1151 * Kill the following code as soon as those drivers are fixed.
1153 if (ap->flags & ATA_FLAG_DISABLED) {
1154 err_mask |= AC_ERR_SYSTEM;
1158 spin_unlock_irqrestore(ap->lock, flags);
1164 * ata_do_simple_cmd - execute simple internal command
1165 * @dev: Device to which the command is sent
1166 * @cmd: Opcode to execute
1168 * Execute a 'simple' command, that only consists of the opcode
1169 * 'cmd' itself, without filling any other registers
1172 * Kernel thread context (may sleep).
1175 * Zero on success, AC_ERR_* mask on failure
1177 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1179 struct ata_taskfile tf;
1181 ata_tf_init(dev, &tf);
1184 tf.flags |= ATA_TFLAG_DEVICE;
1185 tf.protocol = ATA_PROT_NODATA;
1187 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1191 * ata_pio_need_iordy - check if iordy needed
1194 * Check if the current speed of the device requires IORDY. Used
1195 * by various controllers for chip configuration.
1198 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1201 int speed = adev->pio_mode - XFER_PIO_0;
1208 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1210 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1211 pio = adev->id[ATA_ID_EIDE_PIO];
1212 /* Is the speed faster than the drive allows non IORDY ? */
1214 /* This is cycle times not frequency - watch the logic! */
1215 if (pio > 240) /* PIO2 is 240nS per cycle */
1224 * ata_dev_read_id - Read ID data from the specified device
1225 * @dev: target device
1226 * @p_class: pointer to class of the target device (may be changed)
1227 * @post_reset: is this read ID post-reset?
1228 * @id: buffer to read IDENTIFY data into
1230 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1231 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1232 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1233 * for pre-ATA4 drives.
1236 * Kernel thread context (may sleep)
1239 * 0 on success, -errno otherwise.
1241 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1242 int post_reset, u16 *id)
1244 struct ata_port *ap = dev->ap;
1245 unsigned int class = *p_class;
1246 struct ata_taskfile tf;
1247 unsigned int err_mask = 0;
1251 if (ata_msg_ctl(ap))
1252 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1253 __FUNCTION__, ap->id, dev->devno);
1255 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1258 ata_tf_init(dev, &tf);
1262 tf.command = ATA_CMD_ID_ATA;
1265 tf.command = ATA_CMD_ID_ATAPI;
1269 reason = "unsupported class";
1273 tf.protocol = ATA_PROT_PIO;
1275 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1276 id, sizeof(id[0]) * ATA_ID_WORDS);
1279 reason = "I/O error";
1283 swap_buf_le16(id, ATA_ID_WORDS);
1287 reason = "device reports illegal type";
1289 if (class == ATA_DEV_ATA) {
1290 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1293 if (ata_id_is_ata(id))
1297 if (post_reset && class == ATA_DEV_ATA) {
1299 * The exact sequence expected by certain pre-ATA4 drives is:
1302 * INITIALIZE DEVICE PARAMETERS
1304 * Some drives were very specific about that exact sequence.
1306 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1307 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1310 reason = "INIT_DEV_PARAMS failed";
1314 /* current CHS translation info (id[53-58]) might be
1315 * changed. reread the identify device info.
1327 if (ata_msg_warn(ap))
1328 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1329 "(%s, err_mask=0x%x)\n", reason, err_mask);
1333 static inline u8 ata_dev_knobble(struct ata_device *dev)
1335 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1338 static void ata_dev_config_ncq(struct ata_device *dev,
1339 char *desc, size_t desc_sz)
1341 struct ata_port *ap = dev->ap;
1342 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1344 if (!ata_id_has_ncq(dev->id)) {
1348 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1349 snprintf(desc, desc_sz, "NCQ (not used)");
1352 if (ap->flags & ATA_FLAG_NCQ) {
1353 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1354 dev->flags |= ATA_DFLAG_NCQ;
1357 if (hdepth >= ddepth)
1358 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1360 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1363 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1367 if (ap->scsi_host) {
1368 unsigned int len = 0;
1370 for (i = 0; i < ATA_MAX_DEVICES; i++)
1371 len = max(len, ap->device[i].cdb_len);
1373 ap->scsi_host->max_cmd_len = len;
1378 * ata_dev_configure - Configure the specified ATA/ATAPI device
1379 * @dev: Target device to configure
1381 * Configure @dev according to @dev->id. Generic and low-level
1382 * driver specific fixups are also applied.
1385 * Kernel thread context (may sleep)
1388 * 0 on success, -errno otherwise
1390 int ata_dev_configure(struct ata_device *dev)
1392 struct ata_port *ap = dev->ap;
1393 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1394 const u16 *id = dev->id;
1395 unsigned int xfer_mask;
1396 char revbuf[7]; /* XYZ-99\0 */
1399 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1400 ata_dev_printk(dev, KERN_INFO,
1401 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1402 __FUNCTION__, ap->id, dev->devno);
1406 if (ata_msg_probe(ap))
1407 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1408 __FUNCTION__, ap->id, dev->devno);
1410 /* print device capabilities */
1411 if (ata_msg_probe(ap))
1412 ata_dev_printk(dev, KERN_DEBUG,
1413 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1414 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1416 id[49], id[82], id[83], id[84],
1417 id[85], id[86], id[87], id[88]);
1419 /* initialize to-be-configured parameters */
1420 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1421 dev->max_sectors = 0;
1429 * common ATA, ATAPI feature tests
1432 /* find max transfer mode; for printk only */
1433 xfer_mask = ata_id_xfermask(id);
1435 if (ata_msg_probe(ap))
1438 /* ATA-specific feature tests */
1439 if (dev->class == ATA_DEV_ATA) {
1440 if (ata_id_is_cfa(id)) {
1441 if (id[162] & 1) /* CPRM may make this media unusable */
1442 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1443 ap->id, dev->devno);
1444 snprintf(revbuf, 7, "CFA");
1447 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1449 dev->n_sectors = ata_id_n_sectors(id);
1451 if (ata_id_has_lba(id)) {
1452 const char *lba_desc;
1456 dev->flags |= ATA_DFLAG_LBA;
1457 if (ata_id_has_lba48(id)) {
1458 dev->flags |= ATA_DFLAG_LBA48;
1463 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1465 /* print device info to dmesg */
1466 if (ata_msg_drv(ap) && print_info)
1467 ata_dev_printk(dev, KERN_INFO, "%s, "
1468 "max %s, %Lu sectors: %s %s\n",
1470 ata_mode_string(xfer_mask),
1471 (unsigned long long)dev->n_sectors,
1472 lba_desc, ncq_desc);
1476 /* Default translation */
1477 dev->cylinders = id[1];
1479 dev->sectors = id[6];
1481 if (ata_id_current_chs_valid(id)) {
1482 /* Current CHS translation is valid. */
1483 dev->cylinders = id[54];
1484 dev->heads = id[55];
1485 dev->sectors = id[56];
1488 /* print device info to dmesg */
1489 if (ata_msg_drv(ap) && print_info)
1490 ata_dev_printk(dev, KERN_INFO, "%s, "
1491 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1493 ata_mode_string(xfer_mask),
1494 (unsigned long long)dev->n_sectors,
1495 dev->cylinders, dev->heads,
1499 if (dev->id[59] & 0x100) {
1500 dev->multi_count = dev->id[59] & 0xff;
1501 if (ata_msg_drv(ap) && print_info)
1502 ata_dev_printk(dev, KERN_INFO,
1503 "ata%u: dev %u multi count %u\n",
1504 ap->id, dev->devno, dev->multi_count);
1510 /* ATAPI-specific feature tests */
1511 else if (dev->class == ATA_DEV_ATAPI) {
1512 char *cdb_intr_string = "";
1514 rc = atapi_cdb_len(id);
1515 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1516 if (ata_msg_warn(ap))
1517 ata_dev_printk(dev, KERN_WARNING,
1518 "unsupported CDB len\n");
1522 dev->cdb_len = (unsigned int) rc;
1524 if (ata_id_cdb_intr(dev->id)) {
1525 dev->flags |= ATA_DFLAG_CDB_INTR;
1526 cdb_intr_string = ", CDB intr";
1529 /* print device info to dmesg */
1530 if (ata_msg_drv(ap) && print_info)
1531 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1532 ata_mode_string(xfer_mask),
1536 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1537 /* Let the user know. We don't want to disallow opens for
1538 rescue purposes, or in case the vendor is just a blithering
1541 ata_dev_printk(dev, KERN_WARNING,
1542 "Drive reports diagnostics failure. This may indicate a drive\n");
1543 ata_dev_printk(dev, KERN_WARNING,
1544 "fault or invalid emulation. Contact drive vendor for information.\n");
1548 ata_set_port_max_cmd_len(ap);
1550 /* limit bridge transfers to udma5, 200 sectors */
1551 if (ata_dev_knobble(dev)) {
1552 if (ata_msg_drv(ap) && print_info)
1553 ata_dev_printk(dev, KERN_INFO,
1554 "applying bridge limits\n");
1555 dev->udma_mask &= ATA_UDMA5;
1556 dev->max_sectors = ATA_MAX_SECTORS;
1559 if (ap->ops->dev_config)
1560 ap->ops->dev_config(ap, dev);
1562 if (ata_msg_probe(ap))
1563 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1564 __FUNCTION__, ata_chk_status(ap));
1568 if (ata_msg_probe(ap))
1569 ata_dev_printk(dev, KERN_DEBUG,
1570 "%s: EXIT, err\n", __FUNCTION__);
1575 * ata_bus_probe - Reset and probe ATA bus
1578 * Master ATA bus probing function. Initiates a hardware-dependent
1579 * bus reset, then attempts to identify any devices found on
1583 * PCI/etc. bus probe sem.
1586 * Zero on success, negative errno otherwise.
1589 int ata_bus_probe(struct ata_port *ap)
1591 unsigned int classes[ATA_MAX_DEVICES];
1592 int tries[ATA_MAX_DEVICES];
1593 int i, rc, down_xfermask;
1594 struct ata_device *dev;
1598 for (i = 0; i < ATA_MAX_DEVICES; i++)
1599 tries[i] = ATA_PROBE_MAX_TRIES;
1604 /* reset and determine device classes */
1605 ap->ops->phy_reset(ap);
1607 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1608 dev = &ap->device[i];
1610 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1611 dev->class != ATA_DEV_UNKNOWN)
1612 classes[dev->devno] = dev->class;
1614 classes[dev->devno] = ATA_DEV_NONE;
1616 dev->class = ATA_DEV_UNKNOWN;
1621 /* after the reset the device state is PIO 0 and the controller
1622 state is undefined. Record the mode */
1624 for (i = 0; i < ATA_MAX_DEVICES; i++)
1625 ap->device[i].pio_mode = XFER_PIO_0;
1627 /* read IDENTIFY page and configure devices */
1628 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1629 dev = &ap->device[i];
1632 dev->class = classes[i];
1634 if (!ata_dev_enabled(dev))
1637 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1641 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1642 rc = ata_dev_configure(dev);
1643 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1648 /* configure transfer mode */
1649 rc = ata_set_mode(ap, &dev);
1655 for (i = 0; i < ATA_MAX_DEVICES; i++)
1656 if (ata_dev_enabled(&ap->device[i]))
1659 /* no device present, disable port */
1660 ata_port_disable(ap);
1661 ap->ops->port_disable(ap);
1668 tries[dev->devno] = 0;
1671 sata_down_spd_limit(ap);
1674 tries[dev->devno]--;
1675 if (down_xfermask &&
1676 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1677 tries[dev->devno] = 0;
1680 if (!tries[dev->devno]) {
1681 ata_down_xfermask_limit(dev, 1);
1682 ata_dev_disable(dev);
1689 * ata_port_probe - Mark port as enabled
1690 * @ap: Port for which we indicate enablement
1692 * Modify @ap data structure such that the system
1693 * thinks that the entire port is enabled.
1695 * LOCKING: host lock, or some other form of
1699 void ata_port_probe(struct ata_port *ap)
1701 ap->flags &= ~ATA_FLAG_DISABLED;
1705 * sata_print_link_status - Print SATA link status
1706 * @ap: SATA port to printk link status about
1708 * This function prints link speed and status of a SATA link.
1713 static void sata_print_link_status(struct ata_port *ap)
1715 u32 sstatus, scontrol, tmp;
1717 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1719 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1721 if (ata_port_online(ap)) {
1722 tmp = (sstatus >> 4) & 0xf;
1723 ata_port_printk(ap, KERN_INFO,
1724 "SATA link up %s (SStatus %X SControl %X)\n",
1725 sata_spd_string(tmp), sstatus, scontrol);
1727 ata_port_printk(ap, KERN_INFO,
1728 "SATA link down (SStatus %X SControl %X)\n",
1734 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1735 * @ap: SATA port associated with target SATA PHY.
1737 * This function issues commands to standard SATA Sxxx
1738 * PHY registers, to wake up the phy (and device), and
1739 * clear any reset condition.
1742 * PCI/etc. bus probe sem.
1745 void __sata_phy_reset(struct ata_port *ap)
1748 unsigned long timeout = jiffies + (HZ * 5);
1750 if (ap->flags & ATA_FLAG_SATA_RESET) {
1751 /* issue phy wake/reset */
1752 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1753 /* Couldn't find anything in SATA I/II specs, but
1754 * AHCI-1.1 10.4.2 says at least 1 ms. */
1757 /* phy wake/clear reset */
1758 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1760 /* wait for phy to become ready, if necessary */
1763 sata_scr_read(ap, SCR_STATUS, &sstatus);
1764 if ((sstatus & 0xf) != 1)
1766 } while (time_before(jiffies, timeout));
1768 /* print link status */
1769 sata_print_link_status(ap);
1771 /* TODO: phy layer with polling, timeouts, etc. */
1772 if (!ata_port_offline(ap))
1775 ata_port_disable(ap);
1777 if (ap->flags & ATA_FLAG_DISABLED)
1780 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1781 ata_port_disable(ap);
1785 ap->cbl = ATA_CBL_SATA;
1789 * sata_phy_reset - Reset SATA bus.
1790 * @ap: SATA port associated with target SATA PHY.
1792 * This function resets the SATA bus, and then probes
1793 * the bus for devices.
1796 * PCI/etc. bus probe sem.
1799 void sata_phy_reset(struct ata_port *ap)
1801 __sata_phy_reset(ap);
1802 if (ap->flags & ATA_FLAG_DISABLED)
1808 * ata_dev_pair - return other device on cable
1811 * Obtain the other device on the same cable, or if none is
1812 * present NULL is returned
1815 struct ata_device *ata_dev_pair(struct ata_device *adev)
1817 struct ata_port *ap = adev->ap;
1818 struct ata_device *pair = &ap->device[1 - adev->devno];
1819 if (!ata_dev_enabled(pair))
1825 * ata_port_disable - Disable port.
1826 * @ap: Port to be disabled.
1828 * Modify @ap data structure such that the system
1829 * thinks that the entire port is disabled, and should
1830 * never attempt to probe or communicate with devices
1833 * LOCKING: host lock, or some other form of
1837 void ata_port_disable(struct ata_port *ap)
1839 ap->device[0].class = ATA_DEV_NONE;
1840 ap->device[1].class = ATA_DEV_NONE;
1841 ap->flags |= ATA_FLAG_DISABLED;
1845 * sata_down_spd_limit - adjust SATA spd limit downward
1846 * @ap: Port to adjust SATA spd limit for
1848 * Adjust SATA spd limit of @ap downward. Note that this
1849 * function only adjusts the limit. The change must be applied
1850 * using sata_set_spd().
1853 * Inherited from caller.
1856 * 0 on success, negative errno on failure
1858 int sata_down_spd_limit(struct ata_port *ap)
1860 u32 sstatus, spd, mask;
1863 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1867 mask = ap->sata_spd_limit;
1870 highbit = fls(mask) - 1;
1871 mask &= ~(1 << highbit);
1873 spd = (sstatus >> 4) & 0xf;
1877 mask &= (1 << spd) - 1;
1881 ap->sata_spd_limit = mask;
1883 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1884 sata_spd_string(fls(mask)));
1889 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1893 if (ap->sata_spd_limit == UINT_MAX)
1896 limit = fls(ap->sata_spd_limit);
1898 spd = (*scontrol >> 4) & 0xf;
1899 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1901 return spd != limit;
1905 * sata_set_spd_needed - is SATA spd configuration needed
1906 * @ap: Port in question
1908 * Test whether the spd limit in SControl matches
1909 * @ap->sata_spd_limit. This function is used to determine
1910 * whether hardreset is necessary to apply SATA spd
1914 * Inherited from caller.
1917 * 1 if SATA spd configuration is needed, 0 otherwise.
1919 int sata_set_spd_needed(struct ata_port *ap)
1923 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1926 return __sata_set_spd_needed(ap, &scontrol);
1930 * sata_set_spd - set SATA spd according to spd limit
1931 * @ap: Port to set SATA spd for
1933 * Set SATA spd of @ap according to sata_spd_limit.
1936 * Inherited from caller.
1939 * 0 if spd doesn't need to be changed, 1 if spd has been
1940 * changed. Negative errno if SCR registers are inaccessible.
1942 int sata_set_spd(struct ata_port *ap)
1947 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1950 if (!__sata_set_spd_needed(ap, &scontrol))
1953 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1960 * This mode timing computation functionality is ported over from
1961 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1964 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1965 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1966 * for UDMA6, which is currently supported only by Maxtor drives.
1968 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
1971 static const struct ata_timing ata_timing[] = {
1973 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1974 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1975 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1976 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1978 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
1979 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
1980 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1981 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1982 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1984 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1986 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1987 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1988 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1990 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1991 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1992 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1994 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
1995 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
1996 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1997 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1999 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2000 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2001 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2003 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2008 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2009 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2011 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2013 q->setup = EZ(t->setup * 1000, T);
2014 q->act8b = EZ(t->act8b * 1000, T);
2015 q->rec8b = EZ(t->rec8b * 1000, T);
2016 q->cyc8b = EZ(t->cyc8b * 1000, T);
2017 q->active = EZ(t->active * 1000, T);
2018 q->recover = EZ(t->recover * 1000, T);
2019 q->cycle = EZ(t->cycle * 1000, T);
2020 q->udma = EZ(t->udma * 1000, UT);
2023 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2024 struct ata_timing *m, unsigned int what)
2026 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2027 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2028 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2029 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2030 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2031 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2032 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2033 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2036 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2038 const struct ata_timing *t;
2040 for (t = ata_timing; t->mode != speed; t++)
2041 if (t->mode == 0xFF)
2046 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2047 struct ata_timing *t, int T, int UT)
2049 const struct ata_timing *s;
2050 struct ata_timing p;
2056 if (!(s = ata_timing_find_mode(speed)))
2059 memcpy(t, s, sizeof(*s));
2062 * If the drive is an EIDE drive, it can tell us it needs extended
2063 * PIO/MW_DMA cycle timing.
2066 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2067 memset(&p, 0, sizeof(p));
2068 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2069 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2070 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2071 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2072 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2074 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2078 * Convert the timing to bus clock counts.
2081 ata_timing_quantize(t, t, T, UT);
2084 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2085 * S.M.A.R.T * and some other commands. We have to ensure that the
2086 * DMA cycle timing is slower/equal than the fastest PIO timing.
2089 if (speed > XFER_PIO_4) {
2090 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2091 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2095 * Lengthen active & recovery time so that cycle time is correct.
2098 if (t->act8b + t->rec8b < t->cyc8b) {
2099 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2100 t->rec8b = t->cyc8b - t->act8b;
2103 if (t->active + t->recover < t->cycle) {
2104 t->active += (t->cycle - (t->active + t->recover)) / 2;
2105 t->recover = t->cycle - t->active;
2112 * ata_down_xfermask_limit - adjust dev xfer masks downward
2113 * @dev: Device to adjust xfer masks
2114 * @force_pio0: Force PIO0
2116 * Adjust xfer masks of @dev downward. Note that this function
2117 * does not apply the change. Invoking ata_set_mode() afterwards
2118 * will apply the limit.
2121 * Inherited from caller.
2124 * 0 on success, negative errno on failure
2126 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2128 unsigned long xfer_mask;
2131 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2136 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2137 if (xfer_mask & ATA_MASK_UDMA)
2138 xfer_mask &= ~ATA_MASK_MWDMA;
2140 highbit = fls(xfer_mask) - 1;
2141 xfer_mask &= ~(1 << highbit);
2143 xfer_mask &= 1 << ATA_SHIFT_PIO;
2147 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2150 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2151 ata_mode_string(xfer_mask));
2159 static int ata_dev_set_mode(struct ata_device *dev)
2161 unsigned int err_mask;
2164 dev->flags &= ~ATA_DFLAG_PIO;
2165 if (dev->xfer_shift == ATA_SHIFT_PIO)
2166 dev->flags |= ATA_DFLAG_PIO;
2168 err_mask = ata_dev_set_xfermode(dev);
2170 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2171 "(err_mask=0x%x)\n", err_mask);
2175 rc = ata_dev_revalidate(dev, 0);
2179 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2180 dev->xfer_shift, (int)dev->xfer_mode);
2182 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2183 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2188 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2189 * @ap: port on which timings will be programmed
2190 * @r_failed_dev: out paramter for failed device
2192 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2193 * ata_set_mode() fails, pointer to the failing device is
2194 * returned in @r_failed_dev.
2197 * PCI/etc. bus probe sem.
2200 * 0 on success, negative errno otherwise
2202 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2204 struct ata_device *dev;
2205 int i, rc = 0, used_dma = 0, found = 0;
2207 /* has private set_mode? */
2208 if (ap->ops->set_mode) {
2209 /* FIXME: make ->set_mode handle no device case and
2210 * return error code and failing device on failure.
2212 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2213 if (ata_dev_ready(&ap->device[i])) {
2214 ap->ops->set_mode(ap);
2221 /* step 1: calculate xfer_mask */
2222 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2223 unsigned int pio_mask, dma_mask;
2225 dev = &ap->device[i];
2227 if (!ata_dev_enabled(dev))
2230 ata_dev_xfermask(dev);
2232 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2233 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2234 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2235 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2244 /* step 2: always set host PIO timings */
2245 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2246 dev = &ap->device[i];
2247 if (!ata_dev_enabled(dev))
2250 if (!dev->pio_mode) {
2251 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2256 dev->xfer_mode = dev->pio_mode;
2257 dev->xfer_shift = ATA_SHIFT_PIO;
2258 if (ap->ops->set_piomode)
2259 ap->ops->set_piomode(ap, dev);
2262 /* step 3: set host DMA timings */
2263 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2264 dev = &ap->device[i];
2266 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2269 dev->xfer_mode = dev->dma_mode;
2270 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2271 if (ap->ops->set_dmamode)
2272 ap->ops->set_dmamode(ap, dev);
2275 /* step 4: update devices' xfer mode */
2276 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2277 dev = &ap->device[i];
2279 /* don't udpate suspended devices' xfer mode */
2280 if (!ata_dev_ready(dev))
2283 rc = ata_dev_set_mode(dev);
2288 /* Record simplex status. If we selected DMA then the other
2289 * host channels are not permitted to do so.
2291 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2292 ap->host->simplex_claimed = 1;
2294 /* step5: chip specific finalisation */
2295 if (ap->ops->post_set_mode)
2296 ap->ops->post_set_mode(ap);
2300 *r_failed_dev = dev;
2305 * ata_tf_to_host - issue ATA taskfile to host controller
2306 * @ap: port to which command is being issued
2307 * @tf: ATA taskfile register set
2309 * Issues ATA taskfile register set to ATA host controller,
2310 * with proper synchronization with interrupt handler and
2314 * spin_lock_irqsave(host lock)
2317 static inline void ata_tf_to_host(struct ata_port *ap,
2318 const struct ata_taskfile *tf)
2320 ap->ops->tf_load(ap, tf);
2321 ap->ops->exec_command(ap, tf);
2325 * ata_busy_sleep - sleep until BSY clears, or timeout
2326 * @ap: port containing status register to be polled
2327 * @tmout_pat: impatience timeout
2328 * @tmout: overall timeout
2330 * Sleep until ATA Status register bit BSY clears,
2331 * or a timeout occurs.
2334 * Kernel thread context (may sleep).
2337 * 0 on success, -errno otherwise.
2339 int ata_busy_sleep(struct ata_port *ap,
2340 unsigned long tmout_pat, unsigned long tmout)
2342 unsigned long timer_start, timeout;
2345 status = ata_busy_wait(ap, ATA_BUSY, 300);
2346 timer_start = jiffies;
2347 timeout = timer_start + tmout_pat;
2348 while (status != 0xff && (status & ATA_BUSY) &&
2349 time_before(jiffies, timeout)) {
2351 status = ata_busy_wait(ap, ATA_BUSY, 3);
2354 if (status != 0xff && (status & ATA_BUSY))
2355 ata_port_printk(ap, KERN_WARNING,
2356 "port is slow to respond, please be patient "
2357 "(Status 0x%x)\n", status);
2359 timeout = timer_start + tmout;
2360 while (status != 0xff && (status & ATA_BUSY) &&
2361 time_before(jiffies, timeout)) {
2363 status = ata_chk_status(ap);
2369 if (status & ATA_BUSY) {
2370 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2371 "(%lu secs, Status 0x%x)\n",
2372 tmout / HZ, status);
2379 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2381 struct ata_ioports *ioaddr = &ap->ioaddr;
2382 unsigned int dev0 = devmask & (1 << 0);
2383 unsigned int dev1 = devmask & (1 << 1);
2384 unsigned long timeout;
2386 /* if device 0 was found in ata_devchk, wait for its
2390 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2392 /* if device 1 was found in ata_devchk, wait for
2393 * register access, then wait for BSY to clear
2395 timeout = jiffies + ATA_TMOUT_BOOT;
2399 ap->ops->dev_select(ap, 1);
2400 if (ap->flags & ATA_FLAG_MMIO) {
2401 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2402 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2404 nsect = inb(ioaddr->nsect_addr);
2405 lbal = inb(ioaddr->lbal_addr);
2407 if ((nsect == 1) && (lbal == 1))
2409 if (time_after(jiffies, timeout)) {
2413 msleep(50); /* give drive a breather */
2416 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2418 /* is all this really necessary? */
2419 ap->ops->dev_select(ap, 0);
2421 ap->ops->dev_select(ap, 1);
2423 ap->ops->dev_select(ap, 0);
2426 static unsigned int ata_bus_softreset(struct ata_port *ap,
2427 unsigned int devmask)
2429 struct ata_ioports *ioaddr = &ap->ioaddr;
2431 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2433 /* software reset. causes dev0 to be selected */
2434 if (ap->flags & ATA_FLAG_MMIO) {
2435 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2436 udelay(20); /* FIXME: flush */
2437 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2438 udelay(20); /* FIXME: flush */
2439 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2441 outb(ap->ctl, ioaddr->ctl_addr);
2443 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2445 outb(ap->ctl, ioaddr->ctl_addr);
2448 /* spec mandates ">= 2ms" before checking status.
2449 * We wait 150ms, because that was the magic delay used for
2450 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2451 * between when the ATA command register is written, and then
2452 * status is checked. Because waiting for "a while" before
2453 * checking status is fine, post SRST, we perform this magic
2454 * delay here as well.
2456 * Old drivers/ide uses the 2mS rule and then waits for ready
2460 /* Before we perform post reset processing we want to see if
2461 * the bus shows 0xFF because the odd clown forgets the D7
2462 * pulldown resistor.
2464 if (ata_check_status(ap) == 0xFF)
2467 ata_bus_post_reset(ap, devmask);
2473 * ata_bus_reset - reset host port and associated ATA channel
2474 * @ap: port to reset
2476 * This is typically the first time we actually start issuing
2477 * commands to the ATA channel. We wait for BSY to clear, then
2478 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2479 * result. Determine what devices, if any, are on the channel
2480 * by looking at the device 0/1 error register. Look at the signature
2481 * stored in each device's taskfile registers, to determine if
2482 * the device is ATA or ATAPI.
2485 * PCI/etc. bus probe sem.
2486 * Obtains host lock.
2489 * Sets ATA_FLAG_DISABLED if bus reset fails.
2492 void ata_bus_reset(struct ata_port *ap)
2494 struct ata_ioports *ioaddr = &ap->ioaddr;
2495 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2497 unsigned int dev0, dev1 = 0, devmask = 0;
2499 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2501 /* determine if device 0/1 are present */
2502 if (ap->flags & ATA_FLAG_SATA_RESET)
2505 dev0 = ata_devchk(ap, 0);
2507 dev1 = ata_devchk(ap, 1);
2511 devmask |= (1 << 0);
2513 devmask |= (1 << 1);
2515 /* select device 0 again */
2516 ap->ops->dev_select(ap, 0);
2518 /* issue bus reset */
2519 if (ap->flags & ATA_FLAG_SRST)
2520 if (ata_bus_softreset(ap, devmask))
2524 * determine by signature whether we have ATA or ATAPI devices
2526 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2527 if ((slave_possible) && (err != 0x81))
2528 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2530 /* re-enable interrupts */
2531 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2534 /* is double-select really necessary? */
2535 if (ap->device[1].class != ATA_DEV_NONE)
2536 ap->ops->dev_select(ap, 1);
2537 if (ap->device[0].class != ATA_DEV_NONE)
2538 ap->ops->dev_select(ap, 0);
2540 /* if no devices were detected, disable this port */
2541 if ((ap->device[0].class == ATA_DEV_NONE) &&
2542 (ap->device[1].class == ATA_DEV_NONE))
2545 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2546 /* set up device control for ATA_FLAG_SATA_RESET */
2547 if (ap->flags & ATA_FLAG_MMIO)
2548 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2550 outb(ap->ctl, ioaddr->ctl_addr);
2557 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2558 ap->ops->port_disable(ap);
2564 * sata_phy_debounce - debounce SATA phy status
2565 * @ap: ATA port to debounce SATA phy status for
2566 * @params: timing parameters { interval, duratinon, timeout } in msec
2568 * Make sure SStatus of @ap reaches stable state, determined by
2569 * holding the same value where DET is not 1 for @duration polled
2570 * every @interval, before @timeout. Timeout constraints the
2571 * beginning of the stable state. Because, after hot unplugging,
2572 * DET gets stuck at 1 on some controllers, this functions waits
2573 * until timeout then returns 0 if DET is stable at 1.
2576 * Kernel thread context (may sleep)
2579 * 0 on success, -errno on failure.
2581 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2583 unsigned long interval_msec = params[0];
2584 unsigned long duration = params[1] * HZ / 1000;
2585 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2586 unsigned long last_jiffies;
2590 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2595 last_jiffies = jiffies;
2598 msleep(interval_msec);
2599 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2605 if (cur == 1 && time_before(jiffies, timeout))
2607 if (time_after(jiffies, last_jiffies + duration))
2612 /* unstable, start over */
2614 last_jiffies = jiffies;
2617 if (time_after(jiffies, timeout))
2623 * sata_phy_resume - resume SATA phy
2624 * @ap: ATA port to resume SATA phy for
2625 * @params: timing parameters { interval, duratinon, timeout } in msec
2627 * Resume SATA phy of @ap and debounce it.
2630 * Kernel thread context (may sleep)
2633 * 0 on success, -errno on failure.
2635 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2640 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2643 scontrol = (scontrol & 0x0f0) | 0x300;
2645 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2648 /* Some PHYs react badly if SStatus is pounded immediately
2649 * after resuming. Delay 200ms before debouncing.
2653 return sata_phy_debounce(ap, params);
2656 static void ata_wait_spinup(struct ata_port *ap)
2658 struct ata_eh_context *ehc = &ap->eh_context;
2659 unsigned long end, secs;
2662 /* first, debounce phy if SATA */
2663 if (ap->cbl == ATA_CBL_SATA) {
2664 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2666 /* if debounced successfully and offline, no need to wait */
2667 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2671 /* okay, let's give the drive time to spin up */
2672 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2673 secs = ((end - jiffies) + HZ - 1) / HZ;
2675 if (time_after(jiffies, end))
2679 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2680 "(%lu secs)\n", secs);
2682 schedule_timeout_uninterruptible(end - jiffies);
2686 * ata_std_prereset - prepare for reset
2687 * @ap: ATA port to be reset
2689 * @ap is about to be reset. Initialize it.
2692 * Kernel thread context (may sleep)
2695 * 0 on success, -errno otherwise.
2697 int ata_std_prereset(struct ata_port *ap)
2699 struct ata_eh_context *ehc = &ap->eh_context;
2700 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2703 /* handle link resume & hotplug spinup */
2704 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2705 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2706 ehc->i.action |= ATA_EH_HARDRESET;
2708 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2709 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2710 ata_wait_spinup(ap);
2712 /* if we're about to do hardreset, nothing more to do */
2713 if (ehc->i.action & ATA_EH_HARDRESET)
2716 /* if SATA, resume phy */
2717 if (ap->cbl == ATA_CBL_SATA) {
2718 rc = sata_phy_resume(ap, timing);
2719 if (rc && rc != -EOPNOTSUPP) {
2720 /* phy resume failed */
2721 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2722 "link for reset (errno=%d)\n", rc);
2727 /* Wait for !BSY if the controller can wait for the first D2H
2728 * Reg FIS and we don't know that no device is attached.
2730 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2731 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2737 * ata_std_softreset - reset host port via ATA SRST
2738 * @ap: port to reset
2739 * @classes: resulting classes of attached devices
2741 * Reset host port using ATA SRST.
2744 * Kernel thread context (may sleep)
2747 * 0 on success, -errno otherwise.
2749 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2751 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2752 unsigned int devmask = 0, err_mask;
2757 if (ata_port_offline(ap)) {
2758 classes[0] = ATA_DEV_NONE;
2762 /* determine if device 0/1 are present */
2763 if (ata_devchk(ap, 0))
2764 devmask |= (1 << 0);
2765 if (slave_possible && ata_devchk(ap, 1))
2766 devmask |= (1 << 1);
2768 /* select device 0 again */
2769 ap->ops->dev_select(ap, 0);
2771 /* issue bus reset */
2772 DPRINTK("about to softreset, devmask=%x\n", devmask);
2773 err_mask = ata_bus_softreset(ap, devmask);
2775 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2780 /* determine by signature whether we have ATA or ATAPI devices */
2781 classes[0] = ata_dev_try_classify(ap, 0, &err);
2782 if (slave_possible && err != 0x81)
2783 classes[1] = ata_dev_try_classify(ap, 1, &err);
2786 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2791 * sata_port_hardreset - reset port via SATA phy reset
2792 * @ap: port to reset
2793 * @timing: timing parameters { interval, duratinon, timeout } in msec
2795 * SATA phy-reset host port using DET bits of SControl register.
2798 * Kernel thread context (may sleep)
2801 * 0 on success, -errno otherwise.
2803 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2810 if (sata_set_spd_needed(ap)) {
2811 /* SATA spec says nothing about how to reconfigure
2812 * spd. To be on the safe side, turn off phy during
2813 * reconfiguration. This works for at least ICH7 AHCI
2816 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2819 scontrol = (scontrol & 0x0f0) | 0x304;
2821 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2827 /* issue phy wake/reset */
2828 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2831 scontrol = (scontrol & 0x0f0) | 0x301;
2833 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2836 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2837 * 10.4.2 says at least 1 ms.
2841 /* bring phy back */
2842 rc = sata_phy_resume(ap, timing);
2844 DPRINTK("EXIT, rc=%d\n", rc);
2849 * sata_std_hardreset - reset host port via SATA phy reset
2850 * @ap: port to reset
2851 * @class: resulting class of attached device
2853 * SATA phy-reset host port using DET bits of SControl register,
2854 * wait for !BSY and classify the attached device.
2857 * Kernel thread context (may sleep)
2860 * 0 on success, -errno otherwise.
2862 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2864 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
2870 rc = sata_port_hardreset(ap, timing);
2872 ata_port_printk(ap, KERN_ERR,
2873 "COMRESET failed (errno=%d)\n", rc);
2877 /* TODO: phy layer with polling, timeouts, etc. */
2878 if (ata_port_offline(ap)) {
2879 *class = ATA_DEV_NONE;
2880 DPRINTK("EXIT, link offline\n");
2884 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2885 ata_port_printk(ap, KERN_ERR,
2886 "COMRESET failed (device not ready)\n");
2890 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2892 *class = ata_dev_try_classify(ap, 0, NULL);
2894 DPRINTK("EXIT, class=%u\n", *class);
2899 * ata_std_postreset - standard postreset callback
2900 * @ap: the target ata_port
2901 * @classes: classes of attached devices
2903 * This function is invoked after a successful reset. Note that
2904 * the device might have been reset more than once using
2905 * different reset methods before postreset is invoked.
2908 * Kernel thread context (may sleep)
2910 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2916 /* print link status */
2917 sata_print_link_status(ap);
2920 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2921 sata_scr_write(ap, SCR_ERROR, serror);
2923 /* re-enable interrupts */
2924 if (!ap->ops->error_handler) {
2925 /* FIXME: hack. create a hook instead */
2926 if (ap->ioaddr.ctl_addr)
2930 /* is double-select really necessary? */
2931 if (classes[0] != ATA_DEV_NONE)
2932 ap->ops->dev_select(ap, 1);
2933 if (classes[1] != ATA_DEV_NONE)
2934 ap->ops->dev_select(ap, 0);
2936 /* bail out if no device is present */
2937 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2938 DPRINTK("EXIT, no device\n");
2942 /* set up device control */
2943 if (ap->ioaddr.ctl_addr) {
2944 if (ap->flags & ATA_FLAG_MMIO)
2945 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2947 outb(ap->ctl, ap->ioaddr.ctl_addr);
2954 * ata_dev_same_device - Determine whether new ID matches configured device
2955 * @dev: device to compare against
2956 * @new_class: class of the new device
2957 * @new_id: IDENTIFY page of the new device
2959 * Compare @new_class and @new_id against @dev and determine
2960 * whether @dev is the device indicated by @new_class and
2967 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2969 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2972 const u16 *old_id = dev->id;
2973 unsigned char model[2][41], serial[2][21];
2976 if (dev->class != new_class) {
2977 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2978 dev->class, new_class);
2982 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2983 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2984 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2985 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2986 new_n_sectors = ata_id_n_sectors(new_id);
2988 if (strcmp(model[0], model[1])) {
2989 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2990 "'%s' != '%s'\n", model[0], model[1]);
2994 if (strcmp(serial[0], serial[1])) {
2995 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2996 "'%s' != '%s'\n", serial[0], serial[1]);
3000 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3001 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3003 (unsigned long long)dev->n_sectors,
3004 (unsigned long long)new_n_sectors);
3012 * ata_dev_revalidate - Revalidate ATA device
3013 * @dev: device to revalidate
3014 * @post_reset: is this revalidation after reset?
3016 * Re-read IDENTIFY page and make sure @dev is still attached to
3020 * Kernel thread context (may sleep)
3023 * 0 on success, negative errno otherwise
3025 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
3027 unsigned int class = dev->class;
3028 u16 *id = (void *)dev->ap->sector_buf;
3031 if (!ata_dev_enabled(dev)) {
3037 rc = ata_dev_read_id(dev, &class, post_reset, id);
3041 /* is the device still there? */
3042 if (!ata_dev_same_device(dev, class, id)) {
3047 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3049 /* configure device according to the new ID */
3050 rc = ata_dev_configure(dev);
3055 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3059 struct ata_blacklist_entry {
3060 const char *model_num;
3061 const char *model_rev;
3062 unsigned long horkage;
3065 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3066 /* Devices with DMA related problems under Linux */
3067 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3068 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3069 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3070 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3071 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3072 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3073 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3074 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3075 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3076 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3077 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3078 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3079 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3080 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3081 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3082 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3083 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3084 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3085 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3086 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3087 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3088 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3089 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3090 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3091 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3092 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3093 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3094 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3095 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3096 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3098 /* Devices we expect to fail diagnostics */
3100 /* Devices where NCQ should be avoided */
3102 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3104 /* Devices with NCQ limits */
3110 static int ata_strim(char *s, size_t len)
3112 len = strnlen(s, len);
3114 /* ATAPI specifies that empty space is blank-filled; remove blanks */
3115 while ((len > 0) && (s[len - 1] == ' ')) {
3122 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3124 unsigned char model_num[40];
3125 unsigned char model_rev[16];
3126 unsigned int nlen, rlen;
3127 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3129 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3131 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3133 nlen = ata_strim(model_num, sizeof(model_num));
3134 rlen = ata_strim(model_rev, sizeof(model_rev));
3136 while (ad->model_num) {
3137 if (!strncmp(ad->model_num, model_num, nlen)) {
3138 if (ad->model_rev == NULL)
3140 if (!strncmp(ad->model_rev, model_rev, rlen))
3148 static int ata_dma_blacklisted(const struct ata_device *dev)
3150 /* We don't support polling DMA.
3151 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3152 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3154 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3155 (dev->flags & ATA_DFLAG_CDB_INTR))
3157 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3161 * ata_dev_xfermask - Compute supported xfermask of the given device
3162 * @dev: Device to compute xfermask for
3164 * Compute supported xfermask of @dev and store it in
3165 * dev->*_mask. This function is responsible for applying all
3166 * known limits including host controller limits, device
3172 static void ata_dev_xfermask(struct ata_device *dev)
3174 struct ata_port *ap = dev->ap;
3175 struct ata_host *host = ap->host;
3176 unsigned long xfer_mask;
3178 /* controller modes available */
3179 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3180 ap->mwdma_mask, ap->udma_mask);
3182 /* Apply cable rule here. Don't apply it early because when
3183 * we handle hot plug the cable type can itself change.
3185 if (ap->cbl == ATA_CBL_PATA40)
3186 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3187 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3188 * host side are checked drive side as well. Cases where we know a
3189 * 40wire cable is used safely for 80 are not checked here.
3191 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3192 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3195 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3196 dev->mwdma_mask, dev->udma_mask);
3197 xfer_mask &= ata_id_xfermask(dev->id);
3200 * CFA Advanced TrueIDE timings are not allowed on a shared
3203 if (ata_dev_pair(dev)) {
3204 /* No PIO5 or PIO6 */
3205 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3206 /* No MWDMA3 or MWDMA 4 */
3207 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3210 if (ata_dma_blacklisted(dev)) {
3211 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3212 ata_dev_printk(dev, KERN_WARNING,
3213 "device is on DMA blacklist, disabling DMA\n");
3216 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3217 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3218 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3219 "other device, disabling DMA\n");
3222 if (ap->ops->mode_filter)
3223 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3225 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3226 &dev->mwdma_mask, &dev->udma_mask);
3230 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3231 * @dev: Device to which command will be sent
3233 * Issue SET FEATURES - XFER MODE command to device @dev
3237 * PCI/etc. bus probe sem.
3240 * 0 on success, AC_ERR_* mask otherwise.
3243 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3245 struct ata_taskfile tf;
3246 unsigned int err_mask;
3248 /* set up set-features taskfile */
3249 DPRINTK("set features - xfer mode\n");
3251 ata_tf_init(dev, &tf);
3252 tf.command = ATA_CMD_SET_FEATURES;
3253 tf.feature = SETFEATURES_XFER;
3254 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3255 tf.protocol = ATA_PROT_NODATA;
3256 tf.nsect = dev->xfer_mode;
3258 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3260 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3265 * ata_dev_init_params - Issue INIT DEV PARAMS command
3266 * @dev: Device to which command will be sent
3267 * @heads: Number of heads (taskfile parameter)
3268 * @sectors: Number of sectors (taskfile parameter)
3271 * Kernel thread context (may sleep)
3274 * 0 on success, AC_ERR_* mask otherwise.
3276 static unsigned int ata_dev_init_params(struct ata_device *dev,
3277 u16 heads, u16 sectors)
3279 struct ata_taskfile tf;
3280 unsigned int err_mask;
3282 /* Number of sectors per track 1-255. Number of heads 1-16 */
3283 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3284 return AC_ERR_INVALID;
3286 /* set up init dev params taskfile */
3287 DPRINTK("init dev params \n");
3289 ata_tf_init(dev, &tf);
3290 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3291 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3292 tf.protocol = ATA_PROT_NODATA;
3294 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3296 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3298 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3303 * ata_sg_clean - Unmap DMA memory associated with command
3304 * @qc: Command containing DMA memory to be released
3306 * Unmap all mapped DMA memory associated with this command.
3309 * spin_lock_irqsave(host lock)
3312 static void ata_sg_clean(struct ata_queued_cmd *qc)
3314 struct ata_port *ap = qc->ap;
3315 struct scatterlist *sg = qc->__sg;
3316 int dir = qc->dma_dir;
3317 void *pad_buf = NULL;
3319 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3320 WARN_ON(sg == NULL);
3322 if (qc->flags & ATA_QCFLAG_SINGLE)
3323 WARN_ON(qc->n_elem > 1);
3325 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3327 /* if we padded the buffer out to 32-bit bound, and data
3328 * xfer direction is from-device, we must copy from the
3329 * pad buffer back into the supplied buffer
3331 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3332 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3334 if (qc->flags & ATA_QCFLAG_SG) {
3336 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3337 /* restore last sg */
3338 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3340 struct scatterlist *psg = &qc->pad_sgent;
3341 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3342 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3343 kunmap_atomic(addr, KM_IRQ0);
3347 dma_unmap_single(ap->dev,
3348 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3351 sg->length += qc->pad_len;
3353 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3354 pad_buf, qc->pad_len);
3357 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3362 * ata_fill_sg - Fill PCI IDE PRD table
3363 * @qc: Metadata associated with taskfile to be transferred
3365 * Fill PCI IDE PRD (scatter-gather) table with segments
3366 * associated with the current disk command.
3369 * spin_lock_irqsave(host lock)
3372 static void ata_fill_sg(struct ata_queued_cmd *qc)
3374 struct ata_port *ap = qc->ap;
3375 struct scatterlist *sg;
3378 WARN_ON(qc->__sg == NULL);
3379 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3382 ata_for_each_sg(sg, qc) {
3386 /* determine if physical DMA addr spans 64K boundary.
3387 * Note h/w doesn't support 64-bit, so we unconditionally
3388 * truncate dma_addr_t to u32.
3390 addr = (u32) sg_dma_address(sg);
3391 sg_len = sg_dma_len(sg);
3394 offset = addr & 0xffff;
3396 if ((offset + sg_len) > 0x10000)
3397 len = 0x10000 - offset;
3399 ap->prd[idx].addr = cpu_to_le32(addr);
3400 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3401 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3410 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3413 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3414 * @qc: Metadata associated with taskfile to check
3416 * Allow low-level driver to filter ATA PACKET commands, returning
3417 * a status indicating whether or not it is OK to use DMA for the
3418 * supplied PACKET command.
3421 * spin_lock_irqsave(host lock)
3423 * RETURNS: 0 when ATAPI DMA can be used
3426 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3428 struct ata_port *ap = qc->ap;
3429 int rc = 0; /* Assume ATAPI DMA is OK by default */
3431 if (ap->ops->check_atapi_dma)
3432 rc = ap->ops->check_atapi_dma(qc);
3437 * ata_qc_prep - Prepare taskfile for submission
3438 * @qc: Metadata associated with taskfile to be prepared
3440 * Prepare ATA taskfile for submission.
3443 * spin_lock_irqsave(host lock)
3445 void ata_qc_prep(struct ata_queued_cmd *qc)
3447 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3453 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3456 * ata_sg_init_one - Associate command with memory buffer
3457 * @qc: Command to be associated
3458 * @buf: Memory buffer
3459 * @buflen: Length of memory buffer, in bytes.
3461 * Initialize the data-related elements of queued_cmd @qc
3462 * to point to a single memory buffer, @buf of byte length @buflen.
3465 * spin_lock_irqsave(host lock)
3468 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3470 struct scatterlist *sg;
3472 qc->flags |= ATA_QCFLAG_SINGLE;
3474 memset(&qc->sgent, 0, sizeof(qc->sgent));
3475 qc->__sg = &qc->sgent;
3477 qc->orig_n_elem = 1;
3479 qc->nbytes = buflen;
3482 sg_init_one(sg, buf, buflen);
3486 * ata_sg_init - Associate command with scatter-gather table.
3487 * @qc: Command to be associated
3488 * @sg: Scatter-gather table.
3489 * @n_elem: Number of elements in s/g table.
3491 * Initialize the data-related elements of queued_cmd @qc
3492 * to point to a scatter-gather table @sg, containing @n_elem
3496 * spin_lock_irqsave(host lock)
3499 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3500 unsigned int n_elem)
3502 qc->flags |= ATA_QCFLAG_SG;
3504 qc->n_elem = n_elem;
3505 qc->orig_n_elem = n_elem;
3509 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3510 * @qc: Command with memory buffer to be mapped.
3512 * DMA-map the memory buffer associated with queued_cmd @qc.
3515 * spin_lock_irqsave(host lock)
3518 * Zero on success, negative on error.
3521 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3523 struct ata_port *ap = qc->ap;
3524 int dir = qc->dma_dir;
3525 struct scatterlist *sg = qc->__sg;
3526 dma_addr_t dma_address;
3529 /* we must lengthen transfers to end on a 32-bit boundary */
3530 qc->pad_len = sg->length & 3;
3532 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3533 struct scatterlist *psg = &qc->pad_sgent;
3535 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3537 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3539 if (qc->tf.flags & ATA_TFLAG_WRITE)
3540 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3543 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3544 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3546 sg->length -= qc->pad_len;
3547 if (sg->length == 0)
3550 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3551 sg->length, qc->pad_len);
3559 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3561 if (dma_mapping_error(dma_address)) {
3563 sg->length += qc->pad_len;
3567 sg_dma_address(sg) = dma_address;
3568 sg_dma_len(sg) = sg->length;
3571 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3572 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3578 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3579 * @qc: Command with scatter-gather table to be mapped.
3581 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3584 * spin_lock_irqsave(host lock)
3587 * Zero on success, negative on error.
3591 static int ata_sg_setup(struct ata_queued_cmd *qc)
3593 struct ata_port *ap = qc->ap;
3594 struct scatterlist *sg = qc->__sg;
3595 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3596 int n_elem, pre_n_elem, dir, trim_sg = 0;
3598 VPRINTK("ENTER, ata%u\n", ap->id);
3599 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3601 /* we must lengthen transfers to end on a 32-bit boundary */
3602 qc->pad_len = lsg->length & 3;
3604 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3605 struct scatterlist *psg = &qc->pad_sgent;
3606 unsigned int offset;
3608 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3610 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3613 * psg->page/offset are used to copy to-be-written
3614 * data in this function or read data in ata_sg_clean.
3616 offset = lsg->offset + lsg->length - qc->pad_len;
3617 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3618 psg->offset = offset_in_page(offset);
3620 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3621 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3622 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3623 kunmap_atomic(addr, KM_IRQ0);
3626 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3627 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3629 lsg->length -= qc->pad_len;
3630 if (lsg->length == 0)
3633 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3634 qc->n_elem - 1, lsg->length, qc->pad_len);
3637 pre_n_elem = qc->n_elem;
3638 if (trim_sg && pre_n_elem)
3647 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3649 /* restore last sg */
3650 lsg->length += qc->pad_len;
3654 DPRINTK("%d sg elements mapped\n", n_elem);
3657 qc->n_elem = n_elem;
3663 * swap_buf_le16 - swap halves of 16-bit words in place
3664 * @buf: Buffer to swap
3665 * @buf_words: Number of 16-bit words in buffer.
3667 * Swap halves of 16-bit words if needed to convert from
3668 * little-endian byte order to native cpu byte order, or
3672 * Inherited from caller.
3674 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3679 for (i = 0; i < buf_words; i++)
3680 buf[i] = le16_to_cpu(buf[i]);
3681 #endif /* __BIG_ENDIAN */
3685 * ata_mmio_data_xfer - Transfer data by MMIO
3686 * @adev: device for this I/O
3688 * @buflen: buffer length
3689 * @write_data: read/write
3691 * Transfer data from/to the device data register by MMIO.
3694 * Inherited from caller.
3697 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3698 unsigned int buflen, int write_data)
3700 struct ata_port *ap = adev->ap;
3702 unsigned int words = buflen >> 1;
3703 u16 *buf16 = (u16 *) buf;
3704 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3706 /* Transfer multiple of 2 bytes */
3708 for (i = 0; i < words; i++)
3709 writew(le16_to_cpu(buf16[i]), mmio);
3711 for (i = 0; i < words; i++)
3712 buf16[i] = cpu_to_le16(readw(mmio));
3715 /* Transfer trailing 1 byte, if any. */
3716 if (unlikely(buflen & 0x01)) {
3717 u16 align_buf[1] = { 0 };
3718 unsigned char *trailing_buf = buf + buflen - 1;
3721 memcpy(align_buf, trailing_buf, 1);
3722 writew(le16_to_cpu(align_buf[0]), mmio);
3724 align_buf[0] = cpu_to_le16(readw(mmio));
3725 memcpy(trailing_buf, align_buf, 1);
3731 * ata_pio_data_xfer - Transfer data by PIO
3732 * @adev: device to target
3734 * @buflen: buffer length
3735 * @write_data: read/write
3737 * Transfer data from/to the device data register by PIO.
3740 * Inherited from caller.
3743 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3744 unsigned int buflen, int write_data)
3746 struct ata_port *ap = adev->ap;
3747 unsigned int words = buflen >> 1;
3749 /* Transfer multiple of 2 bytes */
3751 outsw(ap->ioaddr.data_addr, buf, words);
3753 insw(ap->ioaddr.data_addr, buf, words);
3755 /* Transfer trailing 1 byte, if any. */
3756 if (unlikely(buflen & 0x01)) {
3757 u16 align_buf[1] = { 0 };
3758 unsigned char *trailing_buf = buf + buflen - 1;
3761 memcpy(align_buf, trailing_buf, 1);
3762 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3764 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3765 memcpy(trailing_buf, align_buf, 1);
3771 * ata_pio_data_xfer_noirq - Transfer data by PIO
3772 * @adev: device to target
3774 * @buflen: buffer length
3775 * @write_data: read/write
3777 * Transfer data from/to the device data register by PIO. Do the
3778 * transfer with interrupts disabled.
3781 * Inherited from caller.
3784 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3785 unsigned int buflen, int write_data)
3787 unsigned long flags;
3788 local_irq_save(flags);
3789 ata_pio_data_xfer(adev, buf, buflen, write_data);
3790 local_irq_restore(flags);
3795 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3796 * @qc: Command on going
3798 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3801 * Inherited from caller.
3804 static void ata_pio_sector(struct ata_queued_cmd *qc)
3806 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3807 struct scatterlist *sg = qc->__sg;
3808 struct ata_port *ap = qc->ap;
3810 unsigned int offset;
3813 if (qc->cursect == (qc->nsect - 1))
3814 ap->hsm_task_state = HSM_ST_LAST;
3816 page = sg[qc->cursg].page;
3817 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3819 /* get the current page and offset */
3820 page = nth_page(page, (offset >> PAGE_SHIFT));
3821 offset %= PAGE_SIZE;
3823 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3825 if (PageHighMem(page)) {
3826 unsigned long flags;
3828 /* FIXME: use a bounce buffer */
3829 local_irq_save(flags);
3830 buf = kmap_atomic(page, KM_IRQ0);
3832 /* do the actual data transfer */
3833 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3835 kunmap_atomic(buf, KM_IRQ0);
3836 local_irq_restore(flags);
3838 buf = page_address(page);
3839 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3845 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3852 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3853 * @qc: Command on going
3855 * Transfer one or many ATA_SECT_SIZE of data from/to the
3856 * ATA device for the DRQ request.
3859 * Inherited from caller.
3862 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3864 if (is_multi_taskfile(&qc->tf)) {
3865 /* READ/WRITE MULTIPLE */
3868 WARN_ON(qc->dev->multi_count == 0);
3870 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3878 * atapi_send_cdb - Write CDB bytes to hardware
3879 * @ap: Port to which ATAPI device is attached.
3880 * @qc: Taskfile currently active
3882 * When device has indicated its readiness to accept
3883 * a CDB, this function is called. Send the CDB.
3889 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3892 DPRINTK("send cdb\n");
3893 WARN_ON(qc->dev->cdb_len < 12);
3895 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3896 ata_altstatus(ap); /* flush */
3898 switch (qc->tf.protocol) {
3899 case ATA_PROT_ATAPI:
3900 ap->hsm_task_state = HSM_ST;
3902 case ATA_PROT_ATAPI_NODATA:
3903 ap->hsm_task_state = HSM_ST_LAST;
3905 case ATA_PROT_ATAPI_DMA:
3906 ap->hsm_task_state = HSM_ST_LAST;
3907 /* initiate bmdma */
3908 ap->ops->bmdma_start(qc);
3914 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3915 * @qc: Command on going
3916 * @bytes: number of bytes
3918 * Transfer Transfer data from/to the ATAPI device.
3921 * Inherited from caller.
3925 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3927 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3928 struct scatterlist *sg = qc->__sg;
3929 struct ata_port *ap = qc->ap;
3932 unsigned int offset, count;
3934 if (qc->curbytes + bytes >= qc->nbytes)
3935 ap->hsm_task_state = HSM_ST_LAST;
3938 if (unlikely(qc->cursg >= qc->n_elem)) {
3940 * The end of qc->sg is reached and the device expects
3941 * more data to transfer. In order not to overrun qc->sg
3942 * and fulfill length specified in the byte count register,
3943 * - for read case, discard trailing data from the device
3944 * - for write case, padding zero data to the device
3946 u16 pad_buf[1] = { 0 };
3947 unsigned int words = bytes >> 1;
3950 if (words) /* warning if bytes > 1 */
3951 ata_dev_printk(qc->dev, KERN_WARNING,
3952 "%u bytes trailing data\n", bytes);
3954 for (i = 0; i < words; i++)
3955 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3957 ap->hsm_task_state = HSM_ST_LAST;
3961 sg = &qc->__sg[qc->cursg];
3964 offset = sg->offset + qc->cursg_ofs;
3966 /* get the current page and offset */
3967 page = nth_page(page, (offset >> PAGE_SHIFT));
3968 offset %= PAGE_SIZE;
3970 /* don't overrun current sg */
3971 count = min(sg->length - qc->cursg_ofs, bytes);
3973 /* don't cross page boundaries */
3974 count = min(count, (unsigned int)PAGE_SIZE - offset);
3976 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3978 if (PageHighMem(page)) {
3979 unsigned long flags;
3981 /* FIXME: use bounce buffer */
3982 local_irq_save(flags);
3983 buf = kmap_atomic(page, KM_IRQ0);
3985 /* do the actual data transfer */
3986 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3988 kunmap_atomic(buf, KM_IRQ0);
3989 local_irq_restore(flags);
3991 buf = page_address(page);
3992 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3996 qc->curbytes += count;
3997 qc->cursg_ofs += count;
3999 if (qc->cursg_ofs == sg->length) {
4009 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4010 * @qc: Command on going
4012 * Transfer Transfer data from/to the ATAPI device.
4015 * Inherited from caller.
4018 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4020 struct ata_port *ap = qc->ap;
4021 struct ata_device *dev = qc->dev;
4022 unsigned int ireason, bc_lo, bc_hi, bytes;
4023 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4025 /* Abuse qc->result_tf for temp storage of intermediate TF
4026 * here to save some kernel stack usage.
4027 * For normal completion, qc->result_tf is not relevant. For
4028 * error, qc->result_tf is later overwritten by ata_qc_complete().
4029 * So, the correctness of qc->result_tf is not affected.
4031 ap->ops->tf_read(ap, &qc->result_tf);
4032 ireason = qc->result_tf.nsect;
4033 bc_lo = qc->result_tf.lbam;
4034 bc_hi = qc->result_tf.lbah;
4035 bytes = (bc_hi << 8) | bc_lo;
4037 /* shall be cleared to zero, indicating xfer of data */
4038 if (ireason & (1 << 0))
4041 /* make sure transfer direction matches expected */
4042 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4043 if (do_write != i_write)
4046 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4048 __atapi_pio_bytes(qc, bytes);
4053 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4054 qc->err_mask |= AC_ERR_HSM;
4055 ap->hsm_task_state = HSM_ST_ERR;
4059 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4060 * @ap: the target ata_port
4064 * 1 if ok in workqueue, 0 otherwise.
4067 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4069 if (qc->tf.flags & ATA_TFLAG_POLLING)
4072 if (ap->hsm_task_state == HSM_ST_FIRST) {
4073 if (qc->tf.protocol == ATA_PROT_PIO &&
4074 (qc->tf.flags & ATA_TFLAG_WRITE))
4077 if (is_atapi_taskfile(&qc->tf) &&
4078 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4086 * ata_hsm_qc_complete - finish a qc running on standard HSM
4087 * @qc: Command to complete
4088 * @in_wq: 1 if called from workqueue, 0 otherwise
4090 * Finish @qc which is running on standard HSM.
4093 * If @in_wq is zero, spin_lock_irqsave(host lock).
4094 * Otherwise, none on entry and grabs host lock.
4096 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4098 struct ata_port *ap = qc->ap;
4099 unsigned long flags;
4101 if (ap->ops->error_handler) {
4103 spin_lock_irqsave(ap->lock, flags);
4105 /* EH might have kicked in while host lock is
4108 qc = ata_qc_from_tag(ap, qc->tag);
4110 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4112 ata_qc_complete(qc);
4114 ata_port_freeze(ap);
4117 spin_unlock_irqrestore(ap->lock, flags);
4119 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4120 ata_qc_complete(qc);
4122 ata_port_freeze(ap);
4126 spin_lock_irqsave(ap->lock, flags);
4128 ata_qc_complete(qc);
4129 spin_unlock_irqrestore(ap->lock, flags);
4131 ata_qc_complete(qc);
4134 ata_altstatus(ap); /* flush */
4138 * ata_hsm_move - move the HSM to the next state.
4139 * @ap: the target ata_port
4141 * @status: current device status
4142 * @in_wq: 1 if called from workqueue, 0 otherwise
4145 * 1 when poll next status needed, 0 otherwise.
4147 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4148 u8 status, int in_wq)
4150 unsigned long flags = 0;
4153 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4155 /* Make sure ata_qc_issue_prot() does not throw things
4156 * like DMA polling into the workqueue. Notice that
4157 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4159 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4162 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4163 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4165 switch (ap->hsm_task_state) {
4167 /* Send first data block or PACKET CDB */
4169 /* If polling, we will stay in the work queue after
4170 * sending the data. Otherwise, interrupt handler
4171 * takes over after sending the data.
4173 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4175 /* check device status */
4176 if (unlikely((status & ATA_DRQ) == 0)) {
4177 /* handle BSY=0, DRQ=0 as error */
4178 if (likely(status & (ATA_ERR | ATA_DF)))
4179 /* device stops HSM for abort/error */
4180 qc->err_mask |= AC_ERR_DEV;
4182 /* HSM violation. Let EH handle this */
4183 qc->err_mask |= AC_ERR_HSM;
4185 ap->hsm_task_state = HSM_ST_ERR;
4189 /* Device should not ask for data transfer (DRQ=1)
4190 * when it finds something wrong.
4191 * We ignore DRQ here and stop the HSM by
4192 * changing hsm_task_state to HSM_ST_ERR and
4193 * let the EH abort the command or reset the device.
4195 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4196 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4198 qc->err_mask |= AC_ERR_HSM;
4199 ap->hsm_task_state = HSM_ST_ERR;
4203 /* Send the CDB (atapi) or the first data block (ata pio out).
4204 * During the state transition, interrupt handler shouldn't
4205 * be invoked before the data transfer is complete and
4206 * hsm_task_state is changed. Hence, the following locking.
4209 spin_lock_irqsave(ap->lock, flags);
4211 if (qc->tf.protocol == ATA_PROT_PIO) {
4212 /* PIO data out protocol.
4213 * send first data block.
4216 /* ata_pio_sectors() might change the state
4217 * to HSM_ST_LAST. so, the state is changed here
4218 * before ata_pio_sectors().
4220 ap->hsm_task_state = HSM_ST;
4221 ata_pio_sectors(qc);
4222 ata_altstatus(ap); /* flush */
4225 atapi_send_cdb(ap, qc);
4228 spin_unlock_irqrestore(ap->lock, flags);
4230 /* if polling, ata_pio_task() handles the rest.
4231 * otherwise, interrupt handler takes over from here.
4236 /* complete command or read/write the data register */
4237 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4238 /* ATAPI PIO protocol */
4239 if ((status & ATA_DRQ) == 0) {
4240 /* No more data to transfer or device error.
4241 * Device error will be tagged in HSM_ST_LAST.
4243 ap->hsm_task_state = HSM_ST_LAST;
4247 /* Device should not ask for data transfer (DRQ=1)
4248 * when it finds something wrong.
4249 * We ignore DRQ here and stop the HSM by
4250 * changing hsm_task_state to HSM_ST_ERR and
4251 * let the EH abort the command or reset the device.
4253 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4254 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4256 qc->err_mask |= AC_ERR_HSM;
4257 ap->hsm_task_state = HSM_ST_ERR;
4261 atapi_pio_bytes(qc);
4263 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4264 /* bad ireason reported by device */
4268 /* ATA PIO protocol */
4269 if (unlikely((status & ATA_DRQ) == 0)) {
4270 /* handle BSY=0, DRQ=0 as error */
4271 if (likely(status & (ATA_ERR | ATA_DF)))
4272 /* device stops HSM for abort/error */
4273 qc->err_mask |= AC_ERR_DEV;
4275 /* HSM violation. Let EH handle this */
4276 qc->err_mask |= AC_ERR_HSM;
4278 ap->hsm_task_state = HSM_ST_ERR;
4282 /* For PIO reads, some devices may ask for
4283 * data transfer (DRQ=1) alone with ERR=1.
4284 * We respect DRQ here and transfer one
4285 * block of junk data before changing the
4286 * hsm_task_state to HSM_ST_ERR.
4288 * For PIO writes, ERR=1 DRQ=1 doesn't make
4289 * sense since the data block has been
4290 * transferred to the device.
4292 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4293 /* data might be corrputed */
4294 qc->err_mask |= AC_ERR_DEV;
4296 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4297 ata_pio_sectors(qc);
4299 status = ata_wait_idle(ap);
4302 if (status & (ATA_BUSY | ATA_DRQ))
4303 qc->err_mask |= AC_ERR_HSM;
4305 /* ata_pio_sectors() might change the
4306 * state to HSM_ST_LAST. so, the state
4307 * is changed after ata_pio_sectors().
4309 ap->hsm_task_state = HSM_ST_ERR;
4313 ata_pio_sectors(qc);
4315 if (ap->hsm_task_state == HSM_ST_LAST &&
4316 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4319 status = ata_wait_idle(ap);
4324 ata_altstatus(ap); /* flush */
4329 if (unlikely(!ata_ok(status))) {
4330 qc->err_mask |= __ac_err_mask(status);
4331 ap->hsm_task_state = HSM_ST_ERR;
4335 /* no more data to transfer */
4336 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4337 ap->id, qc->dev->devno, status);
4339 WARN_ON(qc->err_mask);
4341 ap->hsm_task_state = HSM_ST_IDLE;
4343 /* complete taskfile transaction */
4344 ata_hsm_qc_complete(qc, in_wq);
4350 /* make sure qc->err_mask is available to
4351 * know what's wrong and recover
4353 WARN_ON(qc->err_mask == 0);
4355 ap->hsm_task_state = HSM_ST_IDLE;
4357 /* complete taskfile transaction */
4358 ata_hsm_qc_complete(qc, in_wq);
4370 static void ata_pio_task(void *_data)
4372 struct ata_queued_cmd *qc = _data;
4373 struct ata_port *ap = qc->ap;
4378 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4381 * This is purely heuristic. This is a fast path.
4382 * Sometimes when we enter, BSY will be cleared in
4383 * a chk-status or two. If not, the drive is probably seeking
4384 * or something. Snooze for a couple msecs, then
4385 * chk-status again. If still busy, queue delayed work.
4387 status = ata_busy_wait(ap, ATA_BUSY, 5);
4388 if (status & ATA_BUSY) {
4390 status = ata_busy_wait(ap, ATA_BUSY, 10);
4391 if (status & ATA_BUSY) {
4392 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4398 poll_next = ata_hsm_move(ap, qc, status, 1);
4400 /* another command or interrupt handler
4401 * may be running at this point.
4408 * ata_qc_new - Request an available ATA command, for queueing
4409 * @ap: Port associated with device @dev
4410 * @dev: Device from whom we request an available command structure
4416 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4418 struct ata_queued_cmd *qc = NULL;
4421 /* no command while frozen */
4422 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4425 /* the last tag is reserved for internal command. */
4426 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4427 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4428 qc = __ata_qc_from_tag(ap, i);
4439 * ata_qc_new_init - Request an available ATA command, and initialize it
4440 * @dev: Device from whom we request an available command structure
4446 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4448 struct ata_port *ap = dev->ap;
4449 struct ata_queued_cmd *qc;
4451 qc = ata_qc_new(ap);
4464 * ata_qc_free - free unused ata_queued_cmd
4465 * @qc: Command to complete
4467 * Designed to free unused ata_queued_cmd object
4468 * in case something prevents using it.
4471 * spin_lock_irqsave(host lock)
4473 void ata_qc_free(struct ata_queued_cmd *qc)
4475 struct ata_port *ap = qc->ap;
4478 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4482 if (likely(ata_tag_valid(tag))) {
4483 qc->tag = ATA_TAG_POISON;
4484 clear_bit(tag, &ap->qc_allocated);
4488 void __ata_qc_complete(struct ata_queued_cmd *qc)
4490 struct ata_port *ap = qc->ap;
4492 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4493 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4495 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4498 /* command should be marked inactive atomically with qc completion */
4499 if (qc->tf.protocol == ATA_PROT_NCQ)
4500 ap->sactive &= ~(1 << qc->tag);
4502 ap->active_tag = ATA_TAG_POISON;
4504 /* atapi: mark qc as inactive to prevent the interrupt handler
4505 * from completing the command twice later, before the error handler
4506 * is called. (when rc != 0 and atapi request sense is needed)
4508 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4509 ap->qc_active &= ~(1 << qc->tag);
4511 /* call completion callback */
4512 qc->complete_fn(qc);
4516 * ata_qc_complete - Complete an active ATA command
4517 * @qc: Command to complete
4518 * @err_mask: ATA Status register contents
4520 * Indicate to the mid and upper layers that an ATA
4521 * command has completed, with either an ok or not-ok status.
4524 * spin_lock_irqsave(host lock)
4526 void ata_qc_complete(struct ata_queued_cmd *qc)
4528 struct ata_port *ap = qc->ap;
4530 /* XXX: New EH and old EH use different mechanisms to
4531 * synchronize EH with regular execution path.
4533 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4534 * Normal execution path is responsible for not accessing a
4535 * failed qc. libata core enforces the rule by returning NULL
4536 * from ata_qc_from_tag() for failed qcs.
4538 * Old EH depends on ata_qc_complete() nullifying completion
4539 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4540 * not synchronize with interrupt handler. Only PIO task is
4543 if (ap->ops->error_handler) {
4544 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4546 if (unlikely(qc->err_mask))
4547 qc->flags |= ATA_QCFLAG_FAILED;
4549 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4550 if (!ata_tag_internal(qc->tag)) {
4551 /* always fill result TF for failed qc */
4552 ap->ops->tf_read(ap, &qc->result_tf);
4553 ata_qc_schedule_eh(qc);
4558 /* read result TF if requested */
4559 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4560 ap->ops->tf_read(ap, &qc->result_tf);
4562 __ata_qc_complete(qc);
4564 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4567 /* read result TF if failed or requested */
4568 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4569 ap->ops->tf_read(ap, &qc->result_tf);
4571 __ata_qc_complete(qc);
4576 * ata_qc_complete_multiple - Complete multiple qcs successfully
4577 * @ap: port in question
4578 * @qc_active: new qc_active mask
4579 * @finish_qc: LLDD callback invoked before completing a qc
4581 * Complete in-flight commands. This functions is meant to be
4582 * called from low-level driver's interrupt routine to complete
4583 * requests normally. ap->qc_active and @qc_active is compared
4584 * and commands are completed accordingly.
4587 * spin_lock_irqsave(host lock)
4590 * Number of completed commands on success, -errno otherwise.
4592 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4593 void (*finish_qc)(struct ata_queued_cmd *))
4599 done_mask = ap->qc_active ^ qc_active;
4601 if (unlikely(done_mask & qc_active)) {
4602 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4603 "(%08x->%08x)\n", ap->qc_active, qc_active);
4607 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4608 struct ata_queued_cmd *qc;
4610 if (!(done_mask & (1 << i)))
4613 if ((qc = ata_qc_from_tag(ap, i))) {
4616 ata_qc_complete(qc);
4624 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4626 struct ata_port *ap = qc->ap;
4628 switch (qc->tf.protocol) {
4631 case ATA_PROT_ATAPI_DMA:
4634 case ATA_PROT_ATAPI:
4636 if (ap->flags & ATA_FLAG_PIO_DMA)
4649 * ata_qc_issue - issue taskfile to device
4650 * @qc: command to issue to device
4652 * Prepare an ATA command to submission to device.
4653 * This includes mapping the data into a DMA-able
4654 * area, filling in the S/G table, and finally
4655 * writing the taskfile to hardware, starting the command.
4658 * spin_lock_irqsave(host lock)
4660 void ata_qc_issue(struct ata_queued_cmd *qc)
4662 struct ata_port *ap = qc->ap;
4664 /* Make sure only one non-NCQ command is outstanding. The
4665 * check is skipped for old EH because it reuses active qc to
4666 * request ATAPI sense.
4668 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4670 if (qc->tf.protocol == ATA_PROT_NCQ) {
4671 WARN_ON(ap->sactive & (1 << qc->tag));
4672 ap->sactive |= 1 << qc->tag;
4674 WARN_ON(ap->sactive);
4675 ap->active_tag = qc->tag;
4678 qc->flags |= ATA_QCFLAG_ACTIVE;
4679 ap->qc_active |= 1 << qc->tag;
4681 if (ata_should_dma_map(qc)) {
4682 if (qc->flags & ATA_QCFLAG_SG) {
4683 if (ata_sg_setup(qc))
4685 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4686 if (ata_sg_setup_one(qc))
4690 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4693 ap->ops->qc_prep(qc);
4695 qc->err_mask |= ap->ops->qc_issue(qc);
4696 if (unlikely(qc->err_mask))
4701 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4702 qc->err_mask |= AC_ERR_SYSTEM;
4704 ata_qc_complete(qc);
4708 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4709 * @qc: command to issue to device
4711 * Using various libata functions and hooks, this function
4712 * starts an ATA command. ATA commands are grouped into
4713 * classes called "protocols", and issuing each type of protocol
4714 * is slightly different.
4716 * May be used as the qc_issue() entry in ata_port_operations.
4719 * spin_lock_irqsave(host lock)
4722 * Zero on success, AC_ERR_* mask on failure
4725 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4727 struct ata_port *ap = qc->ap;
4729 /* Use polling pio if the LLD doesn't handle
4730 * interrupt driven pio and atapi CDB interrupt.
4732 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4733 switch (qc->tf.protocol) {
4735 case ATA_PROT_ATAPI:
4736 case ATA_PROT_ATAPI_NODATA:
4737 qc->tf.flags |= ATA_TFLAG_POLLING;
4739 case ATA_PROT_ATAPI_DMA:
4740 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4741 /* see ata_dma_blacklisted() */
4749 /* select the device */
4750 ata_dev_select(ap, qc->dev->devno, 1, 0);
4752 /* start the command */
4753 switch (qc->tf.protocol) {
4754 case ATA_PROT_NODATA:
4755 if (qc->tf.flags & ATA_TFLAG_POLLING)
4756 ata_qc_set_polling(qc);
4758 ata_tf_to_host(ap, &qc->tf);
4759 ap->hsm_task_state = HSM_ST_LAST;
4761 if (qc->tf.flags & ATA_TFLAG_POLLING)
4762 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4767 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4769 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4770 ap->ops->bmdma_setup(qc); /* set up bmdma */
4771 ap->ops->bmdma_start(qc); /* initiate bmdma */
4772 ap->hsm_task_state = HSM_ST_LAST;
4776 if (qc->tf.flags & ATA_TFLAG_POLLING)
4777 ata_qc_set_polling(qc);
4779 ata_tf_to_host(ap, &qc->tf);
4781 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4782 /* PIO data out protocol */
4783 ap->hsm_task_state = HSM_ST_FIRST;
4784 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4786 /* always send first data block using
4787 * the ata_pio_task() codepath.
4790 /* PIO data in protocol */
4791 ap->hsm_task_state = HSM_ST;
4793 if (qc->tf.flags & ATA_TFLAG_POLLING)
4794 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4796 /* if polling, ata_pio_task() handles the rest.
4797 * otherwise, interrupt handler takes over from here.
4803 case ATA_PROT_ATAPI:
4804 case ATA_PROT_ATAPI_NODATA:
4805 if (qc->tf.flags & ATA_TFLAG_POLLING)
4806 ata_qc_set_polling(qc);
4808 ata_tf_to_host(ap, &qc->tf);
4810 ap->hsm_task_state = HSM_ST_FIRST;
4812 /* send cdb by polling if no cdb interrupt */
4813 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4814 (qc->tf.flags & ATA_TFLAG_POLLING))
4815 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4818 case ATA_PROT_ATAPI_DMA:
4819 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4821 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4822 ap->ops->bmdma_setup(qc); /* set up bmdma */
4823 ap->hsm_task_state = HSM_ST_FIRST;
4825 /* send cdb by polling if no cdb interrupt */
4826 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4827 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4832 return AC_ERR_SYSTEM;
4839 * ata_host_intr - Handle host interrupt for given (port, task)
4840 * @ap: Port on which interrupt arrived (possibly...)
4841 * @qc: Taskfile currently active in engine
4843 * Handle host interrupt for given queued command. Currently,
4844 * only DMA interrupts are handled. All other commands are
4845 * handled via polling with interrupts disabled (nIEN bit).
4848 * spin_lock_irqsave(host lock)
4851 * One if interrupt was handled, zero if not (shared irq).
4854 inline unsigned int ata_host_intr (struct ata_port *ap,
4855 struct ata_queued_cmd *qc)
4857 u8 status, host_stat = 0;
4859 VPRINTK("ata%u: protocol %d task_state %d\n",
4860 ap->id, qc->tf.protocol, ap->hsm_task_state);
4862 /* Check whether we are expecting interrupt in this state */
4863 switch (ap->hsm_task_state) {
4865 /* Some pre-ATAPI-4 devices assert INTRQ
4866 * at this state when ready to receive CDB.
4869 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4870 * The flag was turned on only for atapi devices.
4871 * No need to check is_atapi_taskfile(&qc->tf) again.
4873 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4877 if (qc->tf.protocol == ATA_PROT_DMA ||
4878 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4879 /* check status of DMA engine */
4880 host_stat = ap->ops->bmdma_status(ap);
4881 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4883 /* if it's not our irq... */
4884 if (!(host_stat & ATA_DMA_INTR))
4887 /* before we do anything else, clear DMA-Start bit */
4888 ap->ops->bmdma_stop(qc);
4890 if (unlikely(host_stat & ATA_DMA_ERR)) {
4891 /* error when transfering data to/from memory */
4892 qc->err_mask |= AC_ERR_HOST_BUS;
4893 ap->hsm_task_state = HSM_ST_ERR;
4903 /* check altstatus */
4904 status = ata_altstatus(ap);
4905 if (status & ATA_BUSY)
4908 /* check main status, clearing INTRQ */
4909 status = ata_chk_status(ap);
4910 if (unlikely(status & ATA_BUSY))
4913 /* ack bmdma irq events */
4914 ap->ops->irq_clear(ap);
4916 ata_hsm_move(ap, qc, status, 0);
4917 return 1; /* irq handled */
4920 ap->stats.idle_irq++;
4923 if ((ap->stats.idle_irq % 1000) == 0) {
4924 ata_irq_ack(ap, 0); /* debug trap */
4925 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4929 return 0; /* irq not handled */
4933 * ata_interrupt - Default ATA host interrupt handler
4934 * @irq: irq line (unused)
4935 * @dev_instance: pointer to our ata_host information structure
4937 * Default interrupt handler for PCI IDE devices. Calls
4938 * ata_host_intr() for each port that is not disabled.
4941 * Obtains host lock during operation.
4944 * IRQ_NONE or IRQ_HANDLED.
4947 irqreturn_t ata_interrupt (int irq, void *dev_instance)
4949 struct ata_host *host = dev_instance;
4951 unsigned int handled = 0;
4952 unsigned long flags;
4954 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4955 spin_lock_irqsave(&host->lock, flags);
4957 for (i = 0; i < host->n_ports; i++) {
4958 struct ata_port *ap;
4960 ap = host->ports[i];
4962 !(ap->flags & ATA_FLAG_DISABLED)) {
4963 struct ata_queued_cmd *qc;
4965 qc = ata_qc_from_tag(ap, ap->active_tag);
4966 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4967 (qc->flags & ATA_QCFLAG_ACTIVE))
4968 handled |= ata_host_intr(ap, qc);
4972 spin_unlock_irqrestore(&host->lock, flags);
4974 return IRQ_RETVAL(handled);
4978 * sata_scr_valid - test whether SCRs are accessible
4979 * @ap: ATA port to test SCR accessibility for
4981 * Test whether SCRs are accessible for @ap.
4987 * 1 if SCRs are accessible, 0 otherwise.
4989 int sata_scr_valid(struct ata_port *ap)
4991 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4995 * sata_scr_read - read SCR register of the specified port
4996 * @ap: ATA port to read SCR for
4998 * @val: Place to store read value
5000 * Read SCR register @reg of @ap into *@val. This function is
5001 * guaranteed to succeed if the cable type of the port is SATA
5002 * and the port implements ->scr_read.
5008 * 0 on success, negative errno on failure.
5010 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5012 if (sata_scr_valid(ap)) {
5013 *val = ap->ops->scr_read(ap, reg);
5020 * sata_scr_write - write SCR register of the specified port
5021 * @ap: ATA port to write SCR for
5022 * @reg: SCR to write
5023 * @val: value to write
5025 * Write @val to SCR register @reg of @ap. This function is
5026 * guaranteed to succeed if the cable type of the port is SATA
5027 * and the port implements ->scr_read.
5033 * 0 on success, negative errno on failure.
5035 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5037 if (sata_scr_valid(ap)) {
5038 ap->ops->scr_write(ap, reg, val);
5045 * sata_scr_write_flush - write SCR register of the specified port and flush
5046 * @ap: ATA port to write SCR for
5047 * @reg: SCR to write
5048 * @val: value to write
5050 * This function is identical to sata_scr_write() except that this
5051 * function performs flush after writing to the register.
5057 * 0 on success, negative errno on failure.
5059 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5061 if (sata_scr_valid(ap)) {
5062 ap->ops->scr_write(ap, reg, val);
5063 ap->ops->scr_read(ap, reg);
5070 * ata_port_online - test whether the given port is online
5071 * @ap: ATA port to test
5073 * Test whether @ap is online. Note that this function returns 0
5074 * if online status of @ap cannot be obtained, so
5075 * ata_port_online(ap) != !ata_port_offline(ap).
5081 * 1 if the port online status is available and online.
5083 int ata_port_online(struct ata_port *ap)
5087 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5093 * ata_port_offline - test whether the given port is offline
5094 * @ap: ATA port to test
5096 * Test whether @ap is offline. Note that this function returns
5097 * 0 if offline status of @ap cannot be obtained, so
5098 * ata_port_online(ap) != !ata_port_offline(ap).
5104 * 1 if the port offline status is available and offline.
5106 int ata_port_offline(struct ata_port *ap)
5110 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5115 int ata_flush_cache(struct ata_device *dev)
5117 unsigned int err_mask;
5120 if (!ata_try_flush_cache(dev))
5123 if (ata_id_has_flush_ext(dev->id))
5124 cmd = ATA_CMD_FLUSH_EXT;
5126 cmd = ATA_CMD_FLUSH;
5128 err_mask = ata_do_simple_cmd(dev, cmd);
5130 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5137 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5138 unsigned int action, unsigned int ehi_flags,
5141 unsigned long flags;
5144 for (i = 0; i < host->n_ports; i++) {
5145 struct ata_port *ap = host->ports[i];
5147 /* Previous resume operation might still be in
5148 * progress. Wait for PM_PENDING to clear.
5150 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5151 ata_port_wait_eh(ap);
5152 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5155 /* request PM ops to EH */
5156 spin_lock_irqsave(ap->lock, flags);
5161 ap->pm_result = &rc;
5164 ap->pflags |= ATA_PFLAG_PM_PENDING;
5165 ap->eh_info.action |= action;
5166 ap->eh_info.flags |= ehi_flags;
5168 ata_port_schedule_eh(ap);
5170 spin_unlock_irqrestore(ap->lock, flags);
5172 /* wait and check result */
5174 ata_port_wait_eh(ap);
5175 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5185 * ata_host_suspend - suspend host
5186 * @host: host to suspend
5189 * Suspend @host. Actual operation is performed by EH. This
5190 * function requests EH to perform PM operations and waits for EH
5194 * Kernel thread context (may sleep).
5197 * 0 on success, -errno on failure.
5199 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5203 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5207 /* EH is quiescent now. Fail if we have any ready device.
5208 * This happens if hotplug occurs between completion of device
5209 * suspension and here.
5211 for (i = 0; i < host->n_ports; i++) {
5212 struct ata_port *ap = host->ports[i];
5214 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5215 struct ata_device *dev = &ap->device[j];
5217 if (ata_dev_ready(dev)) {
5218 ata_port_printk(ap, KERN_WARNING,
5219 "suspend failed, device %d "
5220 "still active\n", dev->devno);
5227 host->dev->power.power_state = mesg;
5231 ata_host_resume(host);
5236 * ata_host_resume - resume host
5237 * @host: host to resume
5239 * Resume @host. Actual operation is performed by EH. This
5240 * function requests EH to perform PM operations and returns.
5241 * Note that all resume operations are performed parallely.
5244 * Kernel thread context (may sleep).
5246 void ata_host_resume(struct ata_host *host)
5248 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5249 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5250 host->dev->power.power_state = PMSG_ON;
5254 * ata_port_start - Set port up for dma.
5255 * @ap: Port to initialize
5257 * Called just after data structures for each port are
5258 * initialized. Allocates space for PRD table.
5260 * May be used as the port_start() entry in ata_port_operations.
5263 * Inherited from caller.
5266 int ata_port_start (struct ata_port *ap)
5268 struct device *dev = ap->dev;
5271 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5275 rc = ata_pad_alloc(ap, dev);
5277 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5281 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5288 * ata_port_stop - Undo ata_port_start()
5289 * @ap: Port to shut down
5291 * Frees the PRD table.
5293 * May be used as the port_stop() entry in ata_port_operations.
5296 * Inherited from caller.
5299 void ata_port_stop (struct ata_port *ap)
5301 struct device *dev = ap->dev;
5303 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5304 ata_pad_free(ap, dev);
5307 void ata_host_stop (struct ata_host *host)
5309 if (host->mmio_base)
5310 iounmap(host->mmio_base);
5314 * ata_dev_init - Initialize an ata_device structure
5315 * @dev: Device structure to initialize
5317 * Initialize @dev in preparation for probing.
5320 * Inherited from caller.
5322 void ata_dev_init(struct ata_device *dev)
5324 struct ata_port *ap = dev->ap;
5325 unsigned long flags;
5327 /* SATA spd limit is bound to the first device */
5328 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5330 /* High bits of dev->flags are used to record warm plug
5331 * requests which occur asynchronously. Synchronize using
5334 spin_lock_irqsave(ap->lock, flags);
5335 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5336 spin_unlock_irqrestore(ap->lock, flags);
5338 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5339 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5340 dev->pio_mask = UINT_MAX;
5341 dev->mwdma_mask = UINT_MAX;
5342 dev->udma_mask = UINT_MAX;
5346 * ata_port_init - Initialize an ata_port structure
5347 * @ap: Structure to initialize
5348 * @host: Collection of hosts to which @ap belongs
5349 * @ent: Probe information provided by low-level driver
5350 * @port_no: Port number associated with this ata_port
5352 * Initialize a new ata_port structure.
5355 * Inherited from caller.
5357 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5358 const struct ata_probe_ent *ent, unsigned int port_no)
5362 ap->lock = &host->lock;
5363 ap->flags = ATA_FLAG_DISABLED;
5364 ap->id = ata_unique_id++;
5365 ap->ctl = ATA_DEVCTL_OBS;
5368 ap->port_no = port_no;
5369 if (port_no == 1 && ent->pinfo2) {
5370 ap->pio_mask = ent->pinfo2->pio_mask;
5371 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5372 ap->udma_mask = ent->pinfo2->udma_mask;
5373 ap->flags |= ent->pinfo2->flags;
5374 ap->ops = ent->pinfo2->port_ops;
5376 ap->pio_mask = ent->pio_mask;
5377 ap->mwdma_mask = ent->mwdma_mask;
5378 ap->udma_mask = ent->udma_mask;
5379 ap->flags |= ent->port_flags;
5380 ap->ops = ent->port_ops;
5382 ap->hw_sata_spd_limit = UINT_MAX;
5383 ap->active_tag = ATA_TAG_POISON;
5384 ap->last_ctl = 0xFF;
5386 #if defined(ATA_VERBOSE_DEBUG)
5387 /* turn on all debugging levels */
5388 ap->msg_enable = 0x00FF;
5389 #elif defined(ATA_DEBUG)
5390 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5392 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5395 INIT_WORK(&ap->port_task, NULL, NULL);
5396 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5397 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5398 INIT_LIST_HEAD(&ap->eh_done_q);
5399 init_waitqueue_head(&ap->eh_wait_q);
5401 /* set cable type */
5402 ap->cbl = ATA_CBL_NONE;
5403 if (ap->flags & ATA_FLAG_SATA)
5404 ap->cbl = ATA_CBL_SATA;
5406 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5407 struct ata_device *dev = &ap->device[i];
5414 ap->stats.unhandled_irq = 1;
5415 ap->stats.idle_irq = 1;
5418 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5422 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5423 * @ap: ATA port to initialize SCSI host for
5424 * @shost: SCSI host associated with @ap
5426 * Initialize SCSI host @shost associated with ATA port @ap.
5429 * Inherited from caller.
5431 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5433 ap->scsi_host = shost;
5435 shost->unique_id = ap->id;
5438 shost->max_channel = 1;
5439 shost->max_cmd_len = 12;
5443 * ata_port_add - Attach low-level ATA driver to system
5444 * @ent: Information provided by low-level driver
5445 * @host: Collections of ports to which we add
5446 * @port_no: Port number associated with this host
5448 * Attach low-level ATA driver to system.
5451 * PCI/etc. bus probe sem.
5454 * New ata_port on success, for NULL on error.
5456 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5457 struct ata_host *host,
5458 unsigned int port_no)
5460 struct Scsi_Host *shost;
5461 struct ata_port *ap;
5465 if (!ent->port_ops->error_handler &&
5466 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5467 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5472 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5476 shost->transportt = &ata_scsi_transport_template;
5478 ap = ata_shost_to_port(shost);
5480 ata_port_init(ap, host, ent, port_no);
5481 ata_port_init_shost(ap, shost);
5487 * ata_sas_host_init - Initialize a host struct
5488 * @host: host to initialize
5489 * @dev: device host is attached to
5490 * @flags: host flags
5494 * PCI/etc. bus probe sem.
5498 void ata_host_init(struct ata_host *host, struct device *dev,
5499 unsigned long flags, const struct ata_port_operations *ops)
5501 spin_lock_init(&host->lock);
5503 host->flags = flags;
5508 * ata_device_add - Register hardware device with ATA and SCSI layers
5509 * @ent: Probe information describing hardware device to be registered
5511 * This function processes the information provided in the probe
5512 * information struct @ent, allocates the necessary ATA and SCSI
5513 * host information structures, initializes them, and registers
5514 * everything with requisite kernel subsystems.
5516 * This function requests irqs, probes the ATA bus, and probes
5520 * PCI/etc. bus probe sem.
5523 * Number of ports registered. Zero on error (no ports registered).
5525 int ata_device_add(const struct ata_probe_ent *ent)
5528 struct device *dev = ent->dev;
5529 struct ata_host *host;
5534 if (ent->irq == 0) {
5535 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5538 /* alloc a container for our list of ATA ports (buses) */
5539 host = kzalloc(sizeof(struct ata_host) +
5540 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5544 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5545 host->n_ports = ent->n_ports;
5546 host->irq = ent->irq;
5547 host->irq2 = ent->irq2;
5548 host->mmio_base = ent->mmio_base;
5549 host->private_data = ent->private_data;
5551 /* register each port bound to this device */
5552 for (i = 0; i < host->n_ports; i++) {
5553 struct ata_port *ap;
5554 unsigned long xfer_mode_mask;
5555 int irq_line = ent->irq;
5557 ap = ata_port_add(ent, host, i);
5558 host->ports[i] = ap;
5563 if (ent->dummy_port_mask & (1 << i)) {
5564 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5565 ap->ops = &ata_dummy_port_ops;
5570 rc = ap->ops->port_start(ap);
5572 host->ports[i] = NULL;
5573 scsi_host_put(ap->scsi_host);
5577 /* Report the secondary IRQ for second channel legacy */
5578 if (i == 1 && ent->irq2)
5579 irq_line = ent->irq2;
5581 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5582 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5583 (ap->pio_mask << ATA_SHIFT_PIO);
5585 /* print per-port info to dmesg */
5586 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5587 "ctl 0x%lX bmdma 0x%lX irq %d\n",
5588 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5589 ata_mode_string(xfer_mode_mask),
5590 ap->ioaddr.cmd_addr,
5591 ap->ioaddr.ctl_addr,
5592 ap->ioaddr.bmdma_addr,
5596 host->ops->irq_clear(ap);
5597 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5600 /* obtain irq, that may be shared between channels */
5601 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5604 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5609 /* do we have a second IRQ for the other channel, eg legacy mode */
5611 /* We will get weird core code crashes later if this is true
5613 BUG_ON(ent->irq == ent->irq2);
5615 rc = request_irq(ent->irq2, ent->port_ops->irq_handler, ent->irq_flags,
5618 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5620 goto err_out_free_irq;
5624 /* perform each probe synchronously */
5625 DPRINTK("probe begin\n");
5626 for (i = 0; i < host->n_ports; i++) {
5627 struct ata_port *ap = host->ports[i];
5631 /* init sata_spd_limit to the current value */
5632 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5633 int spd = (scontrol >> 4) & 0xf;
5634 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5636 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5638 rc = scsi_add_host(ap->scsi_host, dev);
5640 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5641 /* FIXME: do something useful here */
5642 /* FIXME: handle unconditional calls to
5643 * scsi_scan_host and ata_host_remove, below,
5648 if (ap->ops->error_handler) {
5649 struct ata_eh_info *ehi = &ap->eh_info;
5650 unsigned long flags;
5654 /* kick EH for boot probing */
5655 spin_lock_irqsave(ap->lock, flags);
5657 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5658 ehi->action |= ATA_EH_SOFTRESET;
5659 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5661 ap->pflags |= ATA_PFLAG_LOADING;
5662 ata_port_schedule_eh(ap);
5664 spin_unlock_irqrestore(ap->lock, flags);
5666 /* wait for EH to finish */
5667 ata_port_wait_eh(ap);
5669 DPRINTK("ata%u: bus probe begin\n", ap->id);
5670 rc = ata_bus_probe(ap);
5671 DPRINTK("ata%u: bus probe end\n", ap->id);
5674 /* FIXME: do something useful here?
5675 * Current libata behavior will
5676 * tear down everything when
5677 * the module is removed
5678 * or the h/w is unplugged.
5684 /* probes are done, now scan each port's disk(s) */
5685 DPRINTK("host probe begin\n");
5686 for (i = 0; i < host->n_ports; i++) {
5687 struct ata_port *ap = host->ports[i];
5689 ata_scsi_scan_host(ap);
5692 dev_set_drvdata(dev, host);
5694 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5695 return ent->n_ports; /* success */
5698 free_irq(ent->irq, host);
5700 for (i = 0; i < host->n_ports; i++) {
5701 struct ata_port *ap = host->ports[i];
5703 ap->ops->port_stop(ap);
5704 scsi_host_put(ap->scsi_host);
5709 VPRINTK("EXIT, returning 0\n");
5714 * ata_port_detach - Detach ATA port in prepration of device removal
5715 * @ap: ATA port to be detached
5717 * Detach all ATA devices and the associated SCSI devices of @ap;
5718 * then, remove the associated SCSI host. @ap is guaranteed to
5719 * be quiescent on return from this function.
5722 * Kernel thread context (may sleep).
5724 void ata_port_detach(struct ata_port *ap)
5726 unsigned long flags;
5729 if (!ap->ops->error_handler)
5732 /* tell EH we're leaving & flush EH */
5733 spin_lock_irqsave(ap->lock, flags);
5734 ap->pflags |= ATA_PFLAG_UNLOADING;
5735 spin_unlock_irqrestore(ap->lock, flags);
5737 ata_port_wait_eh(ap);
5739 /* EH is now guaranteed to see UNLOADING, so no new device
5740 * will be attached. Disable all existing devices.
5742 spin_lock_irqsave(ap->lock, flags);
5744 for (i = 0; i < ATA_MAX_DEVICES; i++)
5745 ata_dev_disable(&ap->device[i]);
5747 spin_unlock_irqrestore(ap->lock, flags);
5749 /* Final freeze & EH. All in-flight commands are aborted. EH
5750 * will be skipped and retrials will be terminated with bad
5753 spin_lock_irqsave(ap->lock, flags);
5754 ata_port_freeze(ap); /* won't be thawed */
5755 spin_unlock_irqrestore(ap->lock, flags);
5757 ata_port_wait_eh(ap);
5759 /* Flush hotplug task. The sequence is similar to
5760 * ata_port_flush_task().
5762 flush_workqueue(ata_aux_wq);
5763 cancel_delayed_work(&ap->hotplug_task);
5764 flush_workqueue(ata_aux_wq);
5767 /* remove the associated SCSI host */
5768 scsi_remove_host(ap->scsi_host);
5772 * ata_host_remove - PCI layer callback for device removal
5773 * @host: ATA host set that was removed
5775 * Unregister all objects associated with this host set. Free those
5779 * Inherited from calling layer (may sleep).
5782 void ata_host_remove(struct ata_host *host)
5786 for (i = 0; i < host->n_ports; i++)
5787 ata_port_detach(host->ports[i]);
5789 free_irq(host->irq, host);
5791 free_irq(host->irq2, host);
5793 for (i = 0; i < host->n_ports; i++) {
5794 struct ata_port *ap = host->ports[i];
5796 ata_scsi_release(ap->scsi_host);
5798 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5799 struct ata_ioports *ioaddr = &ap->ioaddr;
5801 /* FIXME: Add -ac IDE pci mods to remove these special cases */
5802 if (ioaddr->cmd_addr == ATA_PRIMARY_CMD)
5803 release_region(ATA_PRIMARY_CMD, 8);
5804 else if (ioaddr->cmd_addr == ATA_SECONDARY_CMD)
5805 release_region(ATA_SECONDARY_CMD, 8);
5808 scsi_host_put(ap->scsi_host);
5811 if (host->ops->host_stop)
5812 host->ops->host_stop(host);
5818 * ata_scsi_release - SCSI layer callback hook for host unload
5819 * @shost: libata host to be unloaded
5821 * Performs all duties necessary to shut down a libata port...
5822 * Kill port kthread, disable port, and release resources.
5825 * Inherited from SCSI layer.
5831 int ata_scsi_release(struct Scsi_Host *shost)
5833 struct ata_port *ap = ata_shost_to_port(shost);
5837 ap->ops->port_disable(ap);
5838 ap->ops->port_stop(ap);
5844 struct ata_probe_ent *
5845 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5847 struct ata_probe_ent *probe_ent;
5849 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5851 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5852 kobject_name(&(dev->kobj)));
5856 INIT_LIST_HEAD(&probe_ent->node);
5857 probe_ent->dev = dev;
5859 probe_ent->sht = port->sht;
5860 probe_ent->port_flags = port->flags;
5861 probe_ent->pio_mask = port->pio_mask;
5862 probe_ent->mwdma_mask = port->mwdma_mask;
5863 probe_ent->udma_mask = port->udma_mask;
5864 probe_ent->port_ops = port->port_ops;
5865 probe_ent->private_data = port->private_data;
5871 * ata_std_ports - initialize ioaddr with standard port offsets.
5872 * @ioaddr: IO address structure to be initialized
5874 * Utility function which initializes data_addr, error_addr,
5875 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5876 * device_addr, status_addr, and command_addr to standard offsets
5877 * relative to cmd_addr.
5879 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5882 void ata_std_ports(struct ata_ioports *ioaddr)
5884 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5885 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5886 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5887 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5888 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5889 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5890 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5891 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5892 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5893 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5899 void ata_pci_host_stop (struct ata_host *host)
5901 struct pci_dev *pdev = to_pci_dev(host->dev);
5903 pci_iounmap(pdev, host->mmio_base);
5907 * ata_pci_remove_one - PCI layer callback for device removal
5908 * @pdev: PCI device that was removed
5910 * PCI layer indicates to libata via this hook that
5911 * hot-unplug or module unload event has occurred.
5912 * Handle this by unregistering all objects associated
5913 * with this PCI device. Free those objects. Then finally
5914 * release PCI resources and disable device.
5917 * Inherited from PCI layer (may sleep).
5920 void ata_pci_remove_one (struct pci_dev *pdev)
5922 struct device *dev = pci_dev_to_dev(pdev);
5923 struct ata_host *host = dev_get_drvdata(dev);
5925 ata_host_remove(host);
5927 pci_release_regions(pdev);
5928 pci_disable_device(pdev);
5929 dev_set_drvdata(dev, NULL);
5932 /* move to PCI subsystem */
5933 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5935 unsigned long tmp = 0;
5937 switch (bits->width) {
5940 pci_read_config_byte(pdev, bits->reg, &tmp8);
5946 pci_read_config_word(pdev, bits->reg, &tmp16);
5952 pci_read_config_dword(pdev, bits->reg, &tmp32);
5963 return (tmp == bits->val) ? 1 : 0;
5966 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5968 pci_save_state(pdev);
5970 if (mesg.event == PM_EVENT_SUSPEND) {
5971 pci_disable_device(pdev);
5972 pci_set_power_state(pdev, PCI_D3hot);
5976 void ata_pci_device_do_resume(struct pci_dev *pdev)
5978 pci_set_power_state(pdev, PCI_D0);
5979 pci_restore_state(pdev);
5980 pci_enable_device(pdev);
5981 pci_set_master(pdev);
5984 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
5986 struct ata_host *host = dev_get_drvdata(&pdev->dev);
5989 rc = ata_host_suspend(host, mesg);
5993 ata_pci_device_do_suspend(pdev, mesg);
5998 int ata_pci_device_resume(struct pci_dev *pdev)
6000 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6002 ata_pci_device_do_resume(pdev);
6003 ata_host_resume(host);
6006 #endif /* CONFIG_PCI */
6009 static int __init ata_init(void)
6011 ata_probe_timeout *= HZ;
6012 ata_wq = create_workqueue("ata");
6016 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6018 destroy_workqueue(ata_wq);
6022 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6026 static void __exit ata_exit(void)
6028 destroy_workqueue(ata_wq);
6029 destroy_workqueue(ata_aux_wq);
6032 subsys_initcall(ata_init);
6033 module_exit(ata_exit);
6035 static unsigned long ratelimit_time;
6036 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6038 int ata_ratelimit(void)
6041 unsigned long flags;
6043 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6045 if (time_after(jiffies, ratelimit_time)) {
6047 ratelimit_time = jiffies + (HZ/5);
6051 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6057 * ata_wait_register - wait until register value changes
6058 * @reg: IO-mapped register
6059 * @mask: Mask to apply to read register value
6060 * @val: Wait condition
6061 * @interval_msec: polling interval in milliseconds
6062 * @timeout_msec: timeout in milliseconds
6064 * Waiting for some bits of register to change is a common
6065 * operation for ATA controllers. This function reads 32bit LE
6066 * IO-mapped register @reg and tests for the following condition.
6068 * (*@reg & mask) != val
6070 * If the condition is met, it returns; otherwise, the process is
6071 * repeated after @interval_msec until timeout.
6074 * Kernel thread context (may sleep)
6077 * The final register value.
6079 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6080 unsigned long interval_msec,
6081 unsigned long timeout_msec)
6083 unsigned long timeout;
6086 tmp = ioread32(reg);
6088 /* Calculate timeout _after_ the first read to make sure
6089 * preceding writes reach the controller before starting to
6090 * eat away the timeout.
6092 timeout = jiffies + (timeout_msec * HZ) / 1000;
6094 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6095 msleep(interval_msec);
6096 tmp = ioread32(reg);
6105 static void ata_dummy_noret(struct ata_port *ap) { }
6106 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6107 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6109 static u8 ata_dummy_check_status(struct ata_port *ap)
6114 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6116 return AC_ERR_SYSTEM;
6119 const struct ata_port_operations ata_dummy_port_ops = {
6120 .port_disable = ata_port_disable,
6121 .check_status = ata_dummy_check_status,
6122 .check_altstatus = ata_dummy_check_status,
6123 .dev_select = ata_noop_dev_select,
6124 .qc_prep = ata_noop_qc_prep,
6125 .qc_issue = ata_dummy_qc_issue,
6126 .freeze = ata_dummy_noret,
6127 .thaw = ata_dummy_noret,
6128 .error_handler = ata_dummy_noret,
6129 .post_internal_cmd = ata_dummy_qc_noret,
6130 .irq_clear = ata_dummy_noret,
6131 .port_start = ata_dummy_ret0,
6132 .port_stop = ata_dummy_noret,
6136 * libata is essentially a library of internal helper functions for
6137 * low-level ATA host controller drivers. As such, the API/ABI is
6138 * likely to change as new drivers are added and updated.
6139 * Do not depend on ABI/API stability.
6142 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6143 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6144 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6145 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6146 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6147 EXPORT_SYMBOL_GPL(ata_std_ports);
6148 EXPORT_SYMBOL_GPL(ata_host_init);
6149 EXPORT_SYMBOL_GPL(ata_device_add);
6150 EXPORT_SYMBOL_GPL(ata_port_detach);
6151 EXPORT_SYMBOL_GPL(ata_host_remove);
6152 EXPORT_SYMBOL_GPL(ata_sg_init);
6153 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6154 EXPORT_SYMBOL_GPL(ata_hsm_move);
6155 EXPORT_SYMBOL_GPL(ata_qc_complete);
6156 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6157 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6158 EXPORT_SYMBOL_GPL(ata_tf_load);
6159 EXPORT_SYMBOL_GPL(ata_tf_read);
6160 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6161 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6162 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6163 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6164 EXPORT_SYMBOL_GPL(ata_check_status);
6165 EXPORT_SYMBOL_GPL(ata_altstatus);
6166 EXPORT_SYMBOL_GPL(ata_exec_command);
6167 EXPORT_SYMBOL_GPL(ata_port_start);
6168 EXPORT_SYMBOL_GPL(ata_port_stop);
6169 EXPORT_SYMBOL_GPL(ata_host_stop);
6170 EXPORT_SYMBOL_GPL(ata_interrupt);
6171 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
6172 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
6173 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
6174 EXPORT_SYMBOL_GPL(ata_qc_prep);
6175 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6176 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6177 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6178 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6179 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6180 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6181 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6182 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6183 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6184 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6185 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6186 EXPORT_SYMBOL_GPL(ata_port_probe);
6187 EXPORT_SYMBOL_GPL(sata_set_spd);
6188 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6189 EXPORT_SYMBOL_GPL(sata_phy_resume);
6190 EXPORT_SYMBOL_GPL(sata_phy_reset);
6191 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6192 EXPORT_SYMBOL_GPL(ata_bus_reset);
6193 EXPORT_SYMBOL_GPL(ata_std_prereset);
6194 EXPORT_SYMBOL_GPL(ata_std_softreset);
6195 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6196 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6197 EXPORT_SYMBOL_GPL(ata_std_postreset);
6198 EXPORT_SYMBOL_GPL(ata_dev_classify);
6199 EXPORT_SYMBOL_GPL(ata_dev_pair);
6200 EXPORT_SYMBOL_GPL(ata_port_disable);
6201 EXPORT_SYMBOL_GPL(ata_ratelimit);
6202 EXPORT_SYMBOL_GPL(ata_wait_register);
6203 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6204 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6205 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6206 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6207 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6208 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6209 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6210 EXPORT_SYMBOL_GPL(ata_scsi_release);
6211 EXPORT_SYMBOL_GPL(ata_host_intr);
6212 EXPORT_SYMBOL_GPL(sata_scr_valid);
6213 EXPORT_SYMBOL_GPL(sata_scr_read);
6214 EXPORT_SYMBOL_GPL(sata_scr_write);
6215 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6216 EXPORT_SYMBOL_GPL(ata_port_online);
6217 EXPORT_SYMBOL_GPL(ata_port_offline);
6218 EXPORT_SYMBOL_GPL(ata_host_suspend);
6219 EXPORT_SYMBOL_GPL(ata_host_resume);
6220 EXPORT_SYMBOL_GPL(ata_id_string);
6221 EXPORT_SYMBOL_GPL(ata_id_c_string);
6222 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6223 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6225 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6226 EXPORT_SYMBOL_GPL(ata_timing_compute);
6227 EXPORT_SYMBOL_GPL(ata_timing_merge);
6230 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6231 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6232 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6233 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6234 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6235 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6236 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6237 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6238 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6239 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6240 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6241 #endif /* CONFIG_PCI */
6243 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6244 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6246 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6247 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6248 EXPORT_SYMBOL_GPL(ata_port_abort);
6249 EXPORT_SYMBOL_GPL(ata_port_freeze);
6250 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6251 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6252 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6253 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6254 EXPORT_SYMBOL_GPL(ata_do_eh);