2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/list.h>
41 #include <linux/highmem.h>
42 #include <linux/spinlock.h>
43 #include <linux/blkdev.h>
44 #include <linux/delay.h>
45 #include <linux/timer.h>
46 #include <linux/interrupt.h>
47 #include <linux/completion.h>
48 #include <linux/suspend.h>
49 #include <linux/workqueue.h>
50 #include <linux/jiffies.h>
51 #include <linux/scatterlist.h>
52 #include <scsi/scsi.h>
53 #include <scsi/scsi_cmnd.h>
54 #include <scsi/scsi_host.h>
55 #include <linux/libata.h>
57 #include <asm/semaphore.h>
58 #include <asm/byteorder.h>
62 #define DRV_VERSION "2.10" /* must be exactly four chars */
65 /* debounce timing parameters in msecs { interval, duration, timeout } */
66 const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
67 const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
68 const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
70 static unsigned int ata_dev_init_params(struct ata_device *dev,
71 u16 heads, u16 sectors);
72 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
73 static void ata_dev_xfermask(struct ata_device *dev);
75 static unsigned int ata_unique_id = 1;
76 static struct workqueue_struct *ata_wq;
78 struct workqueue_struct *ata_aux_wq;
80 int atapi_enabled = 1;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 module_param(atapi_dmadir, int, 0444);
86 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
89 module_param_named(fua, libata_fua, int, 0444);
90 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
92 static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
93 module_param(ata_probe_timeout, int, 0444);
94 MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
96 MODULE_AUTHOR("Jeff Garzik");
97 MODULE_DESCRIPTION("Library module for ATA devices");
98 MODULE_LICENSE("GPL");
99 MODULE_VERSION(DRV_VERSION);
103 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
104 * @tf: Taskfile to convert
105 * @fis: Buffer into which data will output
106 * @pmp: Port multiplier port
108 * Converts a standard ATA taskfile to a Serial ATA
109 * FIS structure (Register - Host to Device).
112 * Inherited from caller.
115 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
117 fis[0] = 0x27; /* Register - Host to Device FIS */
118 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
119 bit 7 indicates Command FIS */
120 fis[2] = tf->command;
121 fis[3] = tf->feature;
128 fis[8] = tf->hob_lbal;
129 fis[9] = tf->hob_lbam;
130 fis[10] = tf->hob_lbah;
131 fis[11] = tf->hob_feature;
134 fis[13] = tf->hob_nsect;
145 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
146 * @fis: Buffer from which data will be input
147 * @tf: Taskfile to output
149 * Converts a serial ATA FIS structure to a standard ATA taskfile.
152 * Inherited from caller.
155 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
157 tf->command = fis[2]; /* status */
158 tf->feature = fis[3]; /* error */
165 tf->hob_lbal = fis[8];
166 tf->hob_lbam = fis[9];
167 tf->hob_lbah = fis[10];
170 tf->hob_nsect = fis[13];
173 static const u8 ata_rw_cmds[] = {
177 ATA_CMD_READ_MULTI_EXT,
178 ATA_CMD_WRITE_MULTI_EXT,
182 ATA_CMD_WRITE_MULTI_FUA_EXT,
186 ATA_CMD_PIO_READ_EXT,
187 ATA_CMD_PIO_WRITE_EXT,
200 ATA_CMD_WRITE_FUA_EXT
204 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
205 * @tf: command to examine and configure
206 * @dev: device tf belongs to
208 * Examine the device configuration and tf->flags to calculate
209 * the proper read/write commands and protocol to use.
214 static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
218 int index, fua, lba48, write;
220 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
221 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
222 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
224 if (dev->flags & ATA_DFLAG_PIO) {
225 tf->protocol = ATA_PROT_PIO;
226 index = dev->multi_count ? 0 : 8;
227 } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) {
228 /* Unable to use DMA due to host limitation */
229 tf->protocol = ATA_PROT_PIO;
230 index = dev->multi_count ? 0 : 8;
232 tf->protocol = ATA_PROT_DMA;
236 cmd = ata_rw_cmds[index + fua + lba48 + write];
245 * ata_tf_read_block - Read block address from ATA taskfile
246 * @tf: ATA taskfile of interest
247 * @dev: ATA device @tf belongs to
252 * Read block address from @tf. This function can handle all
253 * three address formats - LBA, LBA48 and CHS. tf->protocol and
254 * flags select the address format to use.
257 * Block address read from @tf.
259 u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
263 if (tf->flags & ATA_TFLAG_LBA) {
264 if (tf->flags & ATA_TFLAG_LBA48) {
265 block |= (u64)tf->hob_lbah << 40;
266 block |= (u64)tf->hob_lbam << 32;
267 block |= tf->hob_lbal << 24;
269 block |= (tf->device & 0xf) << 24;
271 block |= tf->lbah << 16;
272 block |= tf->lbam << 8;
277 cyl = tf->lbam | (tf->lbah << 8);
278 head = tf->device & 0xf;
281 block = (cyl * dev->heads + head) * dev->sectors + sect;
288 * ata_build_rw_tf - Build ATA taskfile for given read/write request
289 * @tf: Target ATA taskfile
290 * @dev: ATA device @tf belongs to
291 * @block: Block address
292 * @n_block: Number of blocks
293 * @tf_flags: RW/FUA etc...
299 * Build ATA taskfile @tf for read/write request described by
300 * @block, @n_block, @tf_flags and @tag on @dev.
304 * 0 on success, -ERANGE if the request is too large for @dev,
305 * -EINVAL if the request is invalid.
307 int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
308 u64 block, u32 n_block, unsigned int tf_flags,
311 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
312 tf->flags |= tf_flags;
314 if ((dev->flags & (ATA_DFLAG_PIO | ATA_DFLAG_NCQ_OFF |
315 ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ &&
316 likely(tag != ATA_TAG_INTERNAL)) {
318 if (!lba_48_ok(block, n_block))
321 tf->protocol = ATA_PROT_NCQ;
322 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
324 if (tf->flags & ATA_TFLAG_WRITE)
325 tf->command = ATA_CMD_FPDMA_WRITE;
327 tf->command = ATA_CMD_FPDMA_READ;
329 tf->nsect = tag << 3;
330 tf->hob_feature = (n_block >> 8) & 0xff;
331 tf->feature = n_block & 0xff;
333 tf->hob_lbah = (block >> 40) & 0xff;
334 tf->hob_lbam = (block >> 32) & 0xff;
335 tf->hob_lbal = (block >> 24) & 0xff;
336 tf->lbah = (block >> 16) & 0xff;
337 tf->lbam = (block >> 8) & 0xff;
338 tf->lbal = block & 0xff;
341 if (tf->flags & ATA_TFLAG_FUA)
342 tf->device |= 1 << 7;
343 } else if (dev->flags & ATA_DFLAG_LBA) {
344 tf->flags |= ATA_TFLAG_LBA;
346 if (lba_28_ok(block, n_block)) {
348 tf->device |= (block >> 24) & 0xf;
349 } else if (lba_48_ok(block, n_block)) {
350 if (!(dev->flags & ATA_DFLAG_LBA48))
354 tf->flags |= ATA_TFLAG_LBA48;
356 tf->hob_nsect = (n_block >> 8) & 0xff;
358 tf->hob_lbah = (block >> 40) & 0xff;
359 tf->hob_lbam = (block >> 32) & 0xff;
360 tf->hob_lbal = (block >> 24) & 0xff;
362 /* request too large even for LBA48 */
365 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
368 tf->nsect = n_block & 0xff;
370 tf->lbah = (block >> 16) & 0xff;
371 tf->lbam = (block >> 8) & 0xff;
372 tf->lbal = block & 0xff;
374 tf->device |= ATA_LBA;
377 u32 sect, head, cyl, track;
379 /* The request -may- be too large for CHS addressing. */
380 if (!lba_28_ok(block, n_block))
383 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
386 /* Convert LBA to CHS */
387 track = (u32)block / dev->sectors;
388 cyl = track / dev->heads;
389 head = track % dev->heads;
390 sect = (u32)block % dev->sectors + 1;
392 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
393 (u32)block, track, cyl, head, sect);
395 /* Check whether the converted CHS can fit.
399 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
402 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
413 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
414 * @pio_mask: pio_mask
415 * @mwdma_mask: mwdma_mask
416 * @udma_mask: udma_mask
418 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
419 * unsigned int xfer_mask.
427 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
428 unsigned int mwdma_mask,
429 unsigned int udma_mask)
431 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
432 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
433 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
437 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
438 * @xfer_mask: xfer_mask to unpack
439 * @pio_mask: resulting pio_mask
440 * @mwdma_mask: resulting mwdma_mask
441 * @udma_mask: resulting udma_mask
443 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
444 * Any NULL distination masks will be ignored.
446 static void ata_unpack_xfermask(unsigned int xfer_mask,
447 unsigned int *pio_mask,
448 unsigned int *mwdma_mask,
449 unsigned int *udma_mask)
452 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
454 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
456 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
459 static const struct ata_xfer_ent {
463 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
464 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
465 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
470 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
471 * @xfer_mask: xfer_mask of interest
473 * Return matching XFER_* value for @xfer_mask. Only the highest
474 * bit of @xfer_mask is considered.
480 * Matching XFER_* value, 0 if no match found.
482 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
484 int highbit = fls(xfer_mask) - 1;
485 const struct ata_xfer_ent *ent;
487 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
488 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
489 return ent->base + highbit - ent->shift;
494 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
495 * @xfer_mode: XFER_* of interest
497 * Return matching xfer_mask for @xfer_mode.
503 * Matching xfer_mask, 0 if no match found.
505 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
507 const struct ata_xfer_ent *ent;
509 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
510 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
511 return 1 << (ent->shift + xfer_mode - ent->base);
516 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
517 * @xfer_mode: XFER_* of interest
519 * Return matching xfer_shift for @xfer_mode.
525 * Matching xfer_shift, -1 if no match found.
527 static int ata_xfer_mode2shift(unsigned int xfer_mode)
529 const struct ata_xfer_ent *ent;
531 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
532 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
538 * ata_mode_string - convert xfer_mask to string
539 * @xfer_mask: mask of bits supported; only highest bit counts.
541 * Determine string which represents the highest speed
542 * (highest bit in @modemask).
548 * Constant C string representing highest speed listed in
549 * @mode_mask, or the constant C string "<n/a>".
551 static const char *ata_mode_string(unsigned int xfer_mask)
553 static const char * const xfer_mode_str[] = {
577 highbit = fls(xfer_mask) - 1;
578 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
579 return xfer_mode_str[highbit];
583 static const char *sata_spd_string(unsigned int spd)
585 static const char * const spd_str[] = {
590 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
592 return spd_str[spd - 1];
595 void ata_dev_disable(struct ata_device *dev)
597 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
598 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
604 * ata_devchk - PATA device presence detection
605 * @ap: ATA channel to examine
606 * @device: Device to examine (starting at zero)
608 * This technique was originally described in
609 * Hale Landis's ATADRVR (www.ata-atapi.com), and
610 * later found its way into the ATA/ATAPI spec.
612 * Write a pattern to the ATA shadow registers,
613 * and if a device is present, it will respond by
614 * correctly storing and echoing back the
615 * ATA shadow register contents.
621 static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
623 struct ata_ioports *ioaddr = &ap->ioaddr;
626 ap->ops->dev_select(ap, device);
628 iowrite8(0x55, ioaddr->nsect_addr);
629 iowrite8(0xaa, ioaddr->lbal_addr);
631 iowrite8(0xaa, ioaddr->nsect_addr);
632 iowrite8(0x55, ioaddr->lbal_addr);
634 iowrite8(0x55, ioaddr->nsect_addr);
635 iowrite8(0xaa, ioaddr->lbal_addr);
637 nsect = ioread8(ioaddr->nsect_addr);
638 lbal = ioread8(ioaddr->lbal_addr);
640 if ((nsect == 0x55) && (lbal == 0xaa))
641 return 1; /* we found a device */
643 return 0; /* nothing found */
647 * ata_dev_classify - determine device type based on ATA-spec signature
648 * @tf: ATA taskfile register set for device to be identified
650 * Determine from taskfile register contents whether a device is
651 * ATA or ATAPI, as per "Signature and persistence" section
652 * of ATA/PI spec (volume 1, sect 5.14).
658 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
659 * the event of failure.
662 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
664 /* Apple's open source Darwin code hints that some devices only
665 * put a proper signature into the LBA mid/high registers,
666 * So, we only check those. It's sufficient for uniqueness.
669 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
670 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
671 DPRINTK("found ATA device by sig\n");
675 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
676 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
677 DPRINTK("found ATAPI device by sig\n");
678 return ATA_DEV_ATAPI;
681 DPRINTK("unknown device\n");
682 return ATA_DEV_UNKNOWN;
686 * ata_dev_try_classify - Parse returned ATA device signature
687 * @ap: ATA channel to examine
688 * @device: Device to examine (starting at zero)
689 * @r_err: Value of error register on completion
691 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
692 * an ATA/ATAPI-defined set of values is placed in the ATA
693 * shadow registers, indicating the results of device detection
696 * Select the ATA device, and read the values from the ATA shadow
697 * registers. Then parse according to the Error register value,
698 * and the spec-defined values examined by ata_dev_classify().
704 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
708 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
710 struct ata_taskfile tf;
714 ap->ops->dev_select(ap, device);
716 memset(&tf, 0, sizeof(tf));
718 ap->ops->tf_read(ap, &tf);
723 /* see if device passed diags: if master then continue and warn later */
724 if (err == 0 && device == 0)
725 /* diagnostic fail : do nothing _YET_ */
726 ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC;
729 else if ((device == 0) && (err == 0x81))
734 /* determine if device is ATA or ATAPI */
735 class = ata_dev_classify(&tf);
737 if (class == ATA_DEV_UNKNOWN)
739 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
745 * ata_id_string - Convert IDENTIFY DEVICE page into string
746 * @id: IDENTIFY DEVICE results we will examine
747 * @s: string into which data is output
748 * @ofs: offset into identify device page
749 * @len: length of string to return. must be an even number.
751 * The strings in the IDENTIFY DEVICE page are broken up into
752 * 16-bit chunks. Run through the string, and output each
753 * 8-bit chunk linearly, regardless of platform.
759 void ata_id_string(const u16 *id, unsigned char *s,
760 unsigned int ofs, unsigned int len)
779 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
780 * @id: IDENTIFY DEVICE results we will examine
781 * @s: string into which data is output
782 * @ofs: offset into identify device page
783 * @len: length of string to return. must be an odd number.
785 * This function is identical to ata_id_string except that it
786 * trims trailing spaces and terminates the resulting string with
787 * null. @len must be actual maximum length (even number) + 1.
792 void ata_id_c_string(const u16 *id, unsigned char *s,
793 unsigned int ofs, unsigned int len)
799 ata_id_string(id, s, ofs, len - 1);
801 p = s + strnlen(s, len - 1);
802 while (p > s && p[-1] == ' ')
807 static u64 ata_id_n_sectors(const u16 *id)
809 if (ata_id_has_lba(id)) {
810 if (ata_id_has_lba48(id))
811 return ata_id_u64(id, 100);
813 return ata_id_u32(id, 60);
815 if (ata_id_current_chs_valid(id))
816 return ata_id_u32(id, 57);
818 return id[1] * id[3] * id[6];
823 * ata_noop_dev_select - Select device 0/1 on ATA bus
824 * @ap: ATA channel to manipulate
825 * @device: ATA device (numbered from zero) to select
827 * This function performs no actual function.
829 * May be used as the dev_select() entry in ata_port_operations.
834 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
840 * ata_std_dev_select - Select device 0/1 on ATA bus
841 * @ap: ATA channel to manipulate
842 * @device: ATA device (numbered from zero) to select
844 * Use the method defined in the ATA specification to
845 * make either device 0, or device 1, active on the
846 * ATA channel. Works with both PIO and MMIO.
848 * May be used as the dev_select() entry in ata_port_operations.
854 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
859 tmp = ATA_DEVICE_OBS;
861 tmp = ATA_DEVICE_OBS | ATA_DEV1;
863 iowrite8(tmp, ap->ioaddr.device_addr);
864 ata_pause(ap); /* needed; also flushes, for mmio */
868 * ata_dev_select - Select device 0/1 on ATA bus
869 * @ap: ATA channel to manipulate
870 * @device: ATA device (numbered from zero) to select
871 * @wait: non-zero to wait for Status register BSY bit to clear
872 * @can_sleep: non-zero if context allows sleeping
874 * Use the method defined in the ATA specification to
875 * make either device 0, or device 1, active on the
878 * This is a high-level version of ata_std_dev_select(),
879 * which additionally provides the services of inserting
880 * the proper pauses and status polling, where needed.
886 void ata_dev_select(struct ata_port *ap, unsigned int device,
887 unsigned int wait, unsigned int can_sleep)
889 if (ata_msg_probe(ap))
890 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
891 "device %u, wait %u\n", ap->id, device, wait);
896 ap->ops->dev_select(ap, device);
899 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
906 * ata_dump_id - IDENTIFY DEVICE info debugging output
907 * @id: IDENTIFY DEVICE page to dump
909 * Dump selected 16-bit words from the given IDENTIFY DEVICE
916 static inline void ata_dump_id(const u16 *id)
918 DPRINTK("49==0x%04x "
928 DPRINTK("80==0x%04x "
938 DPRINTK("88==0x%04x "
945 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
946 * @id: IDENTIFY data to compute xfer mask from
948 * Compute the xfermask for this device. This is not as trivial
949 * as it seems if we must consider early devices correctly.
951 * FIXME: pre IDE drive timing (do we care ?).
959 static unsigned int ata_id_xfermask(const u16 *id)
961 unsigned int pio_mask, mwdma_mask, udma_mask;
963 /* Usual case. Word 53 indicates word 64 is valid */
964 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
965 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
969 /* If word 64 isn't valid then Word 51 high byte holds
970 * the PIO timing number for the maximum. Turn it into
973 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
974 if (mode < 5) /* Valid PIO range */
975 pio_mask = (2 << mode) - 1;
979 /* But wait.. there's more. Design your standards by
980 * committee and you too can get a free iordy field to
981 * process. However its the speeds not the modes that
982 * are supported... Note drivers using the timing API
983 * will get this right anyway
987 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
989 if (ata_id_is_cfa(id)) {
991 * Process compact flash extended modes
993 int pio = id[163] & 0x7;
994 int dma = (id[163] >> 3) & 7;
997 pio_mask |= (1 << 5);
999 pio_mask |= (1 << 6);
1001 mwdma_mask |= (1 << 3);
1003 mwdma_mask |= (1 << 4);
1007 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1008 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
1010 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1014 * ata_port_queue_task - Queue port_task
1015 * @ap: The ata_port to queue port_task for
1016 * @fn: workqueue function to be scheduled
1017 * @data: data for @fn to use
1018 * @delay: delay time for workqueue function
1020 * Schedule @fn(@data) for execution after @delay jiffies using
1021 * port_task. There is one port_task per port and it's the
1022 * user(low level driver)'s responsibility to make sure that only
1023 * one task is active at any given time.
1025 * libata core layer takes care of synchronization between
1026 * port_task and EH. ata_port_queue_task() may be ignored for EH
1030 * Inherited from caller.
1032 void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
1033 unsigned long delay)
1037 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
1040 PREPARE_DELAYED_WORK(&ap->port_task, fn);
1041 ap->port_task_data = data;
1043 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
1045 /* rc == 0 means that another user is using port task */
1050 * ata_port_flush_task - Flush port_task
1051 * @ap: The ata_port to flush port_task for
1053 * After this function completes, port_task is guranteed not to
1054 * be running or scheduled.
1057 * Kernel thread context (may sleep)
1059 void ata_port_flush_task(struct ata_port *ap)
1061 unsigned long flags;
1065 spin_lock_irqsave(ap->lock, flags);
1066 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
1067 spin_unlock_irqrestore(ap->lock, flags);
1069 DPRINTK("flush #1\n");
1070 flush_workqueue(ata_wq);
1073 * At this point, if a task is running, it's guaranteed to see
1074 * the FLUSH flag; thus, it will never queue pio tasks again.
1077 if (!cancel_delayed_work(&ap->port_task)) {
1078 if (ata_msg_ctl(ap))
1079 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
1081 flush_workqueue(ata_wq);
1084 spin_lock_irqsave(ap->lock, flags);
1085 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
1086 spin_unlock_irqrestore(ap->lock, flags);
1088 if (ata_msg_ctl(ap))
1089 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
1092 static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1094 struct completion *waiting = qc->private_data;
1100 * ata_exec_internal_sg - execute libata internal command
1101 * @dev: Device to which the command is sent
1102 * @tf: Taskfile registers for the command and the result
1103 * @cdb: CDB for packet command
1104 * @dma_dir: Data tranfer direction of the command
1105 * @sg: sg list for the data buffer of the command
1106 * @n_elem: Number of sg entries
1108 * Executes libata internal command with timeout. @tf contains
1109 * command on entry and result on return. Timeout and error
1110 * conditions are reported via return value. No recovery action
1111 * is taken after a command times out. It's caller's duty to
1112 * clean up after timeout.
1115 * None. Should be called with kernel context, might sleep.
1118 * Zero on success, AC_ERR_* mask on failure
1120 unsigned ata_exec_internal_sg(struct ata_device *dev,
1121 struct ata_taskfile *tf, const u8 *cdb,
1122 int dma_dir, struct scatterlist *sg,
1123 unsigned int n_elem)
1125 struct ata_port *ap = dev->ap;
1126 u8 command = tf->command;
1127 struct ata_queued_cmd *qc;
1128 unsigned int tag, preempted_tag;
1129 u32 preempted_sactive, preempted_qc_active;
1130 DECLARE_COMPLETION_ONSTACK(wait);
1131 unsigned long flags;
1132 unsigned int err_mask;
1135 spin_lock_irqsave(ap->lock, flags);
1137 /* no internal command while frozen */
1138 if (ap->pflags & ATA_PFLAG_FROZEN) {
1139 spin_unlock_irqrestore(ap->lock, flags);
1140 return AC_ERR_SYSTEM;
1143 /* initialize internal qc */
1145 /* XXX: Tag 0 is used for drivers with legacy EH as some
1146 * drivers choke if any other tag is given. This breaks
1147 * ata_tag_internal() test for those drivers. Don't use new
1148 * EH stuff without converting to it.
1150 if (ap->ops->error_handler)
1151 tag = ATA_TAG_INTERNAL;
1155 if (test_and_set_bit(tag, &ap->qc_allocated))
1157 qc = __ata_qc_from_tag(ap, tag);
1165 preempted_tag = ap->active_tag;
1166 preempted_sactive = ap->sactive;
1167 preempted_qc_active = ap->qc_active;
1168 ap->active_tag = ATA_TAG_POISON;
1172 /* prepare & issue qc */
1175 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1176 qc->flags |= ATA_QCFLAG_RESULT_TF;
1177 qc->dma_dir = dma_dir;
1178 if (dma_dir != DMA_NONE) {
1179 unsigned int i, buflen = 0;
1181 for (i = 0; i < n_elem; i++)
1182 buflen += sg[i].length;
1184 ata_sg_init(qc, sg, n_elem);
1185 qc->nbytes = buflen;
1188 qc->private_data = &wait;
1189 qc->complete_fn = ata_qc_complete_internal;
1193 spin_unlock_irqrestore(ap->lock, flags);
1195 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1197 ata_port_flush_task(ap);
1200 spin_lock_irqsave(ap->lock, flags);
1202 /* We're racing with irq here. If we lose, the
1203 * following test prevents us from completing the qc
1204 * twice. If we win, the port is frozen and will be
1205 * cleaned up by ->post_internal_cmd().
1207 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1208 qc->err_mask |= AC_ERR_TIMEOUT;
1210 if (ap->ops->error_handler)
1211 ata_port_freeze(ap);
1213 ata_qc_complete(qc);
1215 if (ata_msg_warn(ap))
1216 ata_dev_printk(dev, KERN_WARNING,
1217 "qc timeout (cmd 0x%x)\n", command);
1220 spin_unlock_irqrestore(ap->lock, flags);
1223 /* do post_internal_cmd */
1224 if (ap->ops->post_internal_cmd)
1225 ap->ops->post_internal_cmd(qc);
1227 if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) {
1228 if (ata_msg_warn(ap))
1229 ata_dev_printk(dev, KERN_WARNING,
1230 "zero err_mask for failed "
1231 "internal command, assuming AC_ERR_OTHER\n");
1232 qc->err_mask |= AC_ERR_OTHER;
1236 spin_lock_irqsave(ap->lock, flags);
1238 *tf = qc->result_tf;
1239 err_mask = qc->err_mask;
1242 ap->active_tag = preempted_tag;
1243 ap->sactive = preempted_sactive;
1244 ap->qc_active = preempted_qc_active;
1246 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1247 * Until those drivers are fixed, we detect the condition
1248 * here, fail the command with AC_ERR_SYSTEM and reenable the
1251 * Note that this doesn't change any behavior as internal
1252 * command failure results in disabling the device in the
1253 * higher layer for LLDDs without new reset/EH callbacks.
1255 * Kill the following code as soon as those drivers are fixed.
1257 if (ap->flags & ATA_FLAG_DISABLED) {
1258 err_mask |= AC_ERR_SYSTEM;
1262 spin_unlock_irqrestore(ap->lock, flags);
1268 * ata_exec_internal - execute libata internal command
1269 * @dev: Device to which the command is sent
1270 * @tf: Taskfile registers for the command and the result
1271 * @cdb: CDB for packet command
1272 * @dma_dir: Data tranfer direction of the command
1273 * @buf: Data buffer of the command
1274 * @buflen: Length of data buffer
1276 * Wrapper around ata_exec_internal_sg() which takes simple
1277 * buffer instead of sg list.
1280 * None. Should be called with kernel context, might sleep.
1283 * Zero on success, AC_ERR_* mask on failure
1285 unsigned ata_exec_internal(struct ata_device *dev,
1286 struct ata_taskfile *tf, const u8 *cdb,
1287 int dma_dir, void *buf, unsigned int buflen)
1289 struct scatterlist *psg = NULL, sg;
1290 unsigned int n_elem = 0;
1292 if (dma_dir != DMA_NONE) {
1294 sg_init_one(&sg, buf, buflen);
1299 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem);
1303 * ata_do_simple_cmd - execute simple internal command
1304 * @dev: Device to which the command is sent
1305 * @cmd: Opcode to execute
1307 * Execute a 'simple' command, that only consists of the opcode
1308 * 'cmd' itself, without filling any other registers
1311 * Kernel thread context (may sleep).
1314 * Zero on success, AC_ERR_* mask on failure
1316 unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1318 struct ata_taskfile tf;
1320 ata_tf_init(dev, &tf);
1323 tf.flags |= ATA_TFLAG_DEVICE;
1324 tf.protocol = ATA_PROT_NODATA;
1326 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1330 * ata_pio_need_iordy - check if iordy needed
1333 * Check if the current speed of the device requires IORDY. Used
1334 * by various controllers for chip configuration.
1337 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1340 int speed = adev->pio_mode - XFER_PIO_0;
1347 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1349 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1350 pio = adev->id[ATA_ID_EIDE_PIO];
1351 /* Is the speed faster than the drive allows non IORDY ? */
1353 /* This is cycle times not frequency - watch the logic! */
1354 if (pio > 240) /* PIO2 is 240nS per cycle */
1363 * ata_dev_read_id - Read ID data from the specified device
1364 * @dev: target device
1365 * @p_class: pointer to class of the target device (may be changed)
1366 * @flags: ATA_READID_* flags
1367 * @id: buffer to read IDENTIFY data into
1369 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1370 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1371 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1372 * for pre-ATA4 drives.
1375 * Kernel thread context (may sleep)
1378 * 0 on success, -errno otherwise.
1380 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1381 unsigned int flags, u16 *id)
1383 struct ata_port *ap = dev->ap;
1384 unsigned int class = *p_class;
1385 struct ata_taskfile tf;
1386 unsigned int err_mask = 0;
1390 if (ata_msg_ctl(ap))
1391 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1392 __FUNCTION__, ap->id, dev->devno);
1394 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1397 ata_tf_init(dev, &tf);
1401 tf.command = ATA_CMD_ID_ATA;
1404 tf.command = ATA_CMD_ID_ATAPI;
1408 reason = "unsupported class";
1412 tf.protocol = ATA_PROT_PIO;
1413 tf.flags |= ATA_TFLAG_POLLING; /* for polling presence detection */
1415 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1416 id, sizeof(id[0]) * ATA_ID_WORDS);
1418 if (err_mask & AC_ERR_NODEV_HINT) {
1419 DPRINTK("ata%u.%d: NODEV after polling detection\n",
1420 ap->id, dev->devno);
1425 reason = "I/O error";
1429 swap_buf_le16(id, ATA_ID_WORDS);
1433 reason = "device reports illegal type";
1435 if (class == ATA_DEV_ATA) {
1436 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1439 if (ata_id_is_ata(id))
1443 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
1445 * The exact sequence expected by certain pre-ATA4 drives is:
1448 * INITIALIZE DEVICE PARAMETERS
1450 * Some drives were very specific about that exact sequence.
1452 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1453 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1456 reason = "INIT_DEV_PARAMS failed";
1460 /* current CHS translation info (id[53-58]) might be
1461 * changed. reread the identify device info.
1463 flags &= ~ATA_READID_POSTRESET;
1473 if (ata_msg_warn(ap))
1474 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1475 "(%s, err_mask=0x%x)\n", reason, err_mask);
1479 static inline u8 ata_dev_knobble(struct ata_device *dev)
1481 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1484 static void ata_dev_config_ncq(struct ata_device *dev,
1485 char *desc, size_t desc_sz)
1487 struct ata_port *ap = dev->ap;
1488 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1490 if (!ata_id_has_ncq(dev->id)) {
1494 if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) {
1495 snprintf(desc, desc_sz, "NCQ (not used)");
1498 if (ap->flags & ATA_FLAG_NCQ) {
1499 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
1500 dev->flags |= ATA_DFLAG_NCQ;
1503 if (hdepth >= ddepth)
1504 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1506 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1509 static void ata_set_port_max_cmd_len(struct ata_port *ap)
1513 if (ap->scsi_host) {
1514 unsigned int len = 0;
1516 for (i = 0; i < ATA_MAX_DEVICES; i++)
1517 len = max(len, ap->device[i].cdb_len);
1519 ap->scsi_host->max_cmd_len = len;
1524 * ata_dev_configure - Configure the specified ATA/ATAPI device
1525 * @dev: Target device to configure
1527 * Configure @dev according to @dev->id. Generic and low-level
1528 * driver specific fixups are also applied.
1531 * Kernel thread context (may sleep)
1534 * 0 on success, -errno otherwise
1536 int ata_dev_configure(struct ata_device *dev)
1538 struct ata_port *ap = dev->ap;
1539 int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;
1540 const u16 *id = dev->id;
1541 unsigned int xfer_mask;
1542 char revbuf[7]; /* XYZ-99\0 */
1543 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
1544 char modelbuf[ATA_ID_PROD_LEN+1];
1547 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1548 ata_dev_printk(dev, KERN_INFO,
1549 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1550 __FUNCTION__, ap->id, dev->devno);
1554 if (ata_msg_probe(ap))
1555 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1556 __FUNCTION__, ap->id, dev->devno);
1558 /* print device capabilities */
1559 if (ata_msg_probe(ap))
1560 ata_dev_printk(dev, KERN_DEBUG,
1561 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1562 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1564 id[49], id[82], id[83], id[84],
1565 id[85], id[86], id[87], id[88]);
1567 /* initialize to-be-configured parameters */
1568 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1569 dev->max_sectors = 0;
1577 * common ATA, ATAPI feature tests
1580 /* find max transfer mode; for printk only */
1581 xfer_mask = ata_id_xfermask(id);
1583 if (ata_msg_probe(ap))
1586 /* ATA-specific feature tests */
1587 if (dev->class == ATA_DEV_ATA) {
1588 if (ata_id_is_cfa(id)) {
1589 if (id[162] & 1) /* CPRM may make this media unusable */
1590 ata_dev_printk(dev, KERN_WARNING, "ata%u: device %u supports DRM functions and may not be fully accessable.\n",
1591 ap->id, dev->devno);
1592 snprintf(revbuf, 7, "CFA");
1595 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
1597 dev->n_sectors = ata_id_n_sectors(id);
1599 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
1600 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV_OFS,
1603 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD_OFS,
1606 if (dev->id[59] & 0x100)
1607 dev->multi_count = dev->id[59] & 0xff;
1609 if (ata_id_has_lba(id)) {
1610 const char *lba_desc;
1614 dev->flags |= ATA_DFLAG_LBA;
1615 if (ata_id_has_lba48(id)) {
1616 dev->flags |= ATA_DFLAG_LBA48;
1619 if (dev->n_sectors >= (1UL << 28) &&
1620 ata_id_has_flush_ext(id))
1621 dev->flags |= ATA_DFLAG_FLUSH_EXT;
1625 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1627 /* print device info to dmesg */
1628 if (ata_msg_drv(ap) && print_info) {
1629 ata_dev_printk(dev, KERN_INFO,
1630 "%s: %s, %s, max %s\n",
1631 revbuf, modelbuf, fwrevbuf,
1632 ata_mode_string(xfer_mask));
1633 ata_dev_printk(dev, KERN_INFO,
1634 "%Lu sectors, multi %u: %s %s\n",
1635 (unsigned long long)dev->n_sectors,
1636 dev->multi_count, lba_desc, ncq_desc);
1641 /* Default translation */
1642 dev->cylinders = id[1];
1644 dev->sectors = id[6];
1646 if (ata_id_current_chs_valid(id)) {
1647 /* Current CHS translation is valid. */
1648 dev->cylinders = id[54];
1649 dev->heads = id[55];
1650 dev->sectors = id[56];
1653 /* print device info to dmesg */
1654 if (ata_msg_drv(ap) && print_info) {
1655 ata_dev_printk(dev, KERN_INFO,
1656 "%s: %s, %s, max %s\n",
1657 revbuf, modelbuf, fwrevbuf,
1658 ata_mode_string(xfer_mask));
1659 ata_dev_printk(dev, KERN_INFO,
1660 "%Lu sectors, multi %u, CHS %u/%u/%u\n",
1661 (unsigned long long)dev->n_sectors,
1662 dev->multi_count, dev->cylinders,
1663 dev->heads, dev->sectors);
1670 /* ATAPI-specific feature tests */
1671 else if (dev->class == ATA_DEV_ATAPI) {
1672 char *cdb_intr_string = "";
1674 rc = atapi_cdb_len(id);
1675 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1676 if (ata_msg_warn(ap))
1677 ata_dev_printk(dev, KERN_WARNING,
1678 "unsupported CDB len\n");
1682 dev->cdb_len = (unsigned int) rc;
1684 if (ata_id_cdb_intr(dev->id)) {
1685 dev->flags |= ATA_DFLAG_CDB_INTR;
1686 cdb_intr_string = ", CDB intr";
1689 /* print device info to dmesg */
1690 if (ata_msg_drv(ap) && print_info)
1691 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1692 ata_mode_string(xfer_mask),
1696 /* determine max_sectors */
1697 dev->max_sectors = ATA_MAX_SECTORS;
1698 if (dev->flags & ATA_DFLAG_LBA48)
1699 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
1701 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
1702 /* Let the user know. We don't want to disallow opens for
1703 rescue purposes, or in case the vendor is just a blithering
1706 ata_dev_printk(dev, KERN_WARNING,
1707 "Drive reports diagnostics failure. This may indicate a drive\n");
1708 ata_dev_printk(dev, KERN_WARNING,
1709 "fault or invalid emulation. Contact drive vendor for information.\n");
1713 ata_set_port_max_cmd_len(ap);
1715 /* limit bridge transfers to udma5, 200 sectors */
1716 if (ata_dev_knobble(dev)) {
1717 if (ata_msg_drv(ap) && print_info)
1718 ata_dev_printk(dev, KERN_INFO,
1719 "applying bridge limits\n");
1720 dev->udma_mask &= ATA_UDMA5;
1721 dev->max_sectors = ATA_MAX_SECTORS;
1724 if (ap->ops->dev_config)
1725 ap->ops->dev_config(ap, dev);
1727 if (ata_msg_probe(ap))
1728 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1729 __FUNCTION__, ata_chk_status(ap));
1733 if (ata_msg_probe(ap))
1734 ata_dev_printk(dev, KERN_DEBUG,
1735 "%s: EXIT, err\n", __FUNCTION__);
1740 * ata_bus_probe - Reset and probe ATA bus
1743 * Master ATA bus probing function. Initiates a hardware-dependent
1744 * bus reset, then attempts to identify any devices found on
1748 * PCI/etc. bus probe sem.
1751 * Zero on success, negative errno otherwise.
1754 int ata_bus_probe(struct ata_port *ap)
1756 unsigned int classes[ATA_MAX_DEVICES];
1757 int tries[ATA_MAX_DEVICES];
1758 int i, rc, down_xfermask;
1759 struct ata_device *dev;
1763 for (i = 0; i < ATA_MAX_DEVICES; i++)
1764 tries[i] = ATA_PROBE_MAX_TRIES;
1769 /* reset and determine device classes */
1770 ap->ops->phy_reset(ap);
1772 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1773 dev = &ap->device[i];
1775 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1776 dev->class != ATA_DEV_UNKNOWN)
1777 classes[dev->devno] = dev->class;
1779 classes[dev->devno] = ATA_DEV_NONE;
1781 dev->class = ATA_DEV_UNKNOWN;
1786 /* after the reset the device state is PIO 0 and the controller
1787 state is undefined. Record the mode */
1789 for (i = 0; i < ATA_MAX_DEVICES; i++)
1790 ap->device[i].pio_mode = XFER_PIO_0;
1792 /* read IDENTIFY page and configure devices */
1793 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1794 dev = &ap->device[i];
1797 dev->class = classes[i];
1799 if (!ata_dev_enabled(dev))
1802 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
1807 ap->eh_context.i.flags |= ATA_EHI_PRINTINFO;
1808 rc = ata_dev_configure(dev);
1809 ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
1814 /* configure transfer mode */
1815 rc = ata_set_mode(ap, &dev);
1821 for (i = 0; i < ATA_MAX_DEVICES; i++)
1822 if (ata_dev_enabled(&ap->device[i]))
1825 /* no device present, disable port */
1826 ata_port_disable(ap);
1827 ap->ops->port_disable(ap);
1834 tries[dev->devno] = 0;
1837 sata_down_spd_limit(ap);
1840 tries[dev->devno]--;
1841 if (down_xfermask &&
1842 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1843 tries[dev->devno] = 0;
1846 if (!tries[dev->devno]) {
1847 ata_down_xfermask_limit(dev, 1);
1848 ata_dev_disable(dev);
1855 * ata_port_probe - Mark port as enabled
1856 * @ap: Port for which we indicate enablement
1858 * Modify @ap data structure such that the system
1859 * thinks that the entire port is enabled.
1861 * LOCKING: host lock, or some other form of
1865 void ata_port_probe(struct ata_port *ap)
1867 ap->flags &= ~ATA_FLAG_DISABLED;
1871 * sata_print_link_status - Print SATA link status
1872 * @ap: SATA port to printk link status about
1874 * This function prints link speed and status of a SATA link.
1879 static void sata_print_link_status(struct ata_port *ap)
1881 u32 sstatus, scontrol, tmp;
1883 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1885 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1887 if (ata_port_online(ap)) {
1888 tmp = (sstatus >> 4) & 0xf;
1889 ata_port_printk(ap, KERN_INFO,
1890 "SATA link up %s (SStatus %X SControl %X)\n",
1891 sata_spd_string(tmp), sstatus, scontrol);
1893 ata_port_printk(ap, KERN_INFO,
1894 "SATA link down (SStatus %X SControl %X)\n",
1900 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1901 * @ap: SATA port associated with target SATA PHY.
1903 * This function issues commands to standard SATA Sxxx
1904 * PHY registers, to wake up the phy (and device), and
1905 * clear any reset condition.
1908 * PCI/etc. bus probe sem.
1911 void __sata_phy_reset(struct ata_port *ap)
1914 unsigned long timeout = jiffies + (HZ * 5);
1916 if (ap->flags & ATA_FLAG_SATA_RESET) {
1917 /* issue phy wake/reset */
1918 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1919 /* Couldn't find anything in SATA I/II specs, but
1920 * AHCI-1.1 10.4.2 says at least 1 ms. */
1923 /* phy wake/clear reset */
1924 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1926 /* wait for phy to become ready, if necessary */
1929 sata_scr_read(ap, SCR_STATUS, &sstatus);
1930 if ((sstatus & 0xf) != 1)
1932 } while (time_before(jiffies, timeout));
1934 /* print link status */
1935 sata_print_link_status(ap);
1937 /* TODO: phy layer with polling, timeouts, etc. */
1938 if (!ata_port_offline(ap))
1941 ata_port_disable(ap);
1943 if (ap->flags & ATA_FLAG_DISABLED)
1946 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1947 ata_port_disable(ap);
1951 ap->cbl = ATA_CBL_SATA;
1955 * sata_phy_reset - Reset SATA bus.
1956 * @ap: SATA port associated with target SATA PHY.
1958 * This function resets the SATA bus, and then probes
1959 * the bus for devices.
1962 * PCI/etc. bus probe sem.
1965 void sata_phy_reset(struct ata_port *ap)
1967 __sata_phy_reset(ap);
1968 if (ap->flags & ATA_FLAG_DISABLED)
1974 * ata_dev_pair - return other device on cable
1977 * Obtain the other device on the same cable, or if none is
1978 * present NULL is returned
1981 struct ata_device *ata_dev_pair(struct ata_device *adev)
1983 struct ata_port *ap = adev->ap;
1984 struct ata_device *pair = &ap->device[1 - adev->devno];
1985 if (!ata_dev_enabled(pair))
1991 * ata_port_disable - Disable port.
1992 * @ap: Port to be disabled.
1994 * Modify @ap data structure such that the system
1995 * thinks that the entire port is disabled, and should
1996 * never attempt to probe or communicate with devices
1999 * LOCKING: host lock, or some other form of
2003 void ata_port_disable(struct ata_port *ap)
2005 ap->device[0].class = ATA_DEV_NONE;
2006 ap->device[1].class = ATA_DEV_NONE;
2007 ap->flags |= ATA_FLAG_DISABLED;
2011 * sata_down_spd_limit - adjust SATA spd limit downward
2012 * @ap: Port to adjust SATA spd limit for
2014 * Adjust SATA spd limit of @ap downward. Note that this
2015 * function only adjusts the limit. The change must be applied
2016 * using sata_set_spd().
2019 * Inherited from caller.
2022 * 0 on success, negative errno on failure
2024 int sata_down_spd_limit(struct ata_port *ap)
2026 u32 sstatus, spd, mask;
2029 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2033 mask = ap->sata_spd_limit;
2036 highbit = fls(mask) - 1;
2037 mask &= ~(1 << highbit);
2039 spd = (sstatus >> 4) & 0xf;
2043 mask &= (1 << spd) - 1;
2047 ap->sata_spd_limit = mask;
2049 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
2050 sata_spd_string(fls(mask)));
2055 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
2059 if (ap->sata_spd_limit == UINT_MAX)
2062 limit = fls(ap->sata_spd_limit);
2064 spd = (*scontrol >> 4) & 0xf;
2065 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
2067 return spd != limit;
2071 * sata_set_spd_needed - is SATA spd configuration needed
2072 * @ap: Port in question
2074 * Test whether the spd limit in SControl matches
2075 * @ap->sata_spd_limit. This function is used to determine
2076 * whether hardreset is necessary to apply SATA spd
2080 * Inherited from caller.
2083 * 1 if SATA spd configuration is needed, 0 otherwise.
2085 int sata_set_spd_needed(struct ata_port *ap)
2089 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
2092 return __sata_set_spd_needed(ap, &scontrol);
2096 * sata_set_spd - set SATA spd according to spd limit
2097 * @ap: Port to set SATA spd for
2099 * Set SATA spd of @ap according to sata_spd_limit.
2102 * Inherited from caller.
2105 * 0 if spd doesn't need to be changed, 1 if spd has been
2106 * changed. Negative errno if SCR registers are inaccessible.
2108 int sata_set_spd(struct ata_port *ap)
2113 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2116 if (!__sata_set_spd_needed(ap, &scontrol))
2119 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2126 * This mode timing computation functionality is ported over from
2127 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2130 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
2131 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
2132 * for UDMA6, which is currently supported only by Maxtor drives.
2134 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
2137 static const struct ata_timing ata_timing[] = {
2139 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
2140 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
2141 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
2142 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
2144 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
2145 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
2146 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
2147 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
2148 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
2150 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2152 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
2153 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
2154 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2156 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
2157 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
2158 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
2160 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
2161 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
2162 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
2163 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
2165 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
2166 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
2167 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
2169 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
2174 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
2175 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
2177 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2179 q->setup = EZ(t->setup * 1000, T);
2180 q->act8b = EZ(t->act8b * 1000, T);
2181 q->rec8b = EZ(t->rec8b * 1000, T);
2182 q->cyc8b = EZ(t->cyc8b * 1000, T);
2183 q->active = EZ(t->active * 1000, T);
2184 q->recover = EZ(t->recover * 1000, T);
2185 q->cycle = EZ(t->cycle * 1000, T);
2186 q->udma = EZ(t->udma * 1000, UT);
2189 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2190 struct ata_timing *m, unsigned int what)
2192 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2193 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2194 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2195 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2196 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2197 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
2198 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2199 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2202 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
2204 const struct ata_timing *t;
2206 for (t = ata_timing; t->mode != speed; t++)
2207 if (t->mode == 0xFF)
2212 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2213 struct ata_timing *t, int T, int UT)
2215 const struct ata_timing *s;
2216 struct ata_timing p;
2222 if (!(s = ata_timing_find_mode(speed)))
2225 memcpy(t, s, sizeof(*s));
2228 * If the drive is an EIDE drive, it can tell us it needs extended
2229 * PIO/MW_DMA cycle timing.
2232 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2233 memset(&p, 0, sizeof(p));
2234 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2235 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2236 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2237 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2238 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2240 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2244 * Convert the timing to bus clock counts.
2247 ata_timing_quantize(t, t, T, UT);
2250 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2251 * S.M.A.R.T * and some other commands. We have to ensure that the
2252 * DMA cycle timing is slower/equal than the fastest PIO timing.
2255 if (speed > XFER_PIO_6) {
2256 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2257 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2261 * Lengthen active & recovery time so that cycle time is correct.
2264 if (t->act8b + t->rec8b < t->cyc8b) {
2265 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2266 t->rec8b = t->cyc8b - t->act8b;
2269 if (t->active + t->recover < t->cycle) {
2270 t->active += (t->cycle - (t->active + t->recover)) / 2;
2271 t->recover = t->cycle - t->active;
2278 * ata_down_xfermask_limit - adjust dev xfer masks downward
2279 * @dev: Device to adjust xfer masks
2280 * @force_pio0: Force PIO0
2282 * Adjust xfer masks of @dev downward. Note that this function
2283 * does not apply the change. Invoking ata_set_mode() afterwards
2284 * will apply the limit.
2287 * Inherited from caller.
2290 * 0 on success, negative errno on failure
2292 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2294 unsigned long xfer_mask;
2297 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2302 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2303 if (xfer_mask & ATA_MASK_UDMA)
2304 xfer_mask &= ~ATA_MASK_MWDMA;
2306 highbit = fls(xfer_mask) - 1;
2307 xfer_mask &= ~(1 << highbit);
2309 xfer_mask &= 1 << ATA_SHIFT_PIO;
2313 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2316 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2317 ata_mode_string(xfer_mask));
2325 static int ata_dev_set_mode(struct ata_device *dev)
2327 struct ata_eh_context *ehc = &dev->ap->eh_context;
2328 unsigned int err_mask;
2331 dev->flags &= ~ATA_DFLAG_PIO;
2332 if (dev->xfer_shift == ATA_SHIFT_PIO)
2333 dev->flags |= ATA_DFLAG_PIO;
2335 err_mask = ata_dev_set_xfermode(dev);
2337 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2338 "(err_mask=0x%x)\n", err_mask);
2342 ehc->i.flags |= ATA_EHI_POST_SETMODE;
2343 rc = ata_dev_revalidate(dev, 0);
2344 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
2348 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2349 dev->xfer_shift, (int)dev->xfer_mode);
2351 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2352 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2357 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2358 * @ap: port on which timings will be programmed
2359 * @r_failed_dev: out paramter for failed device
2361 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2362 * ata_set_mode() fails, pointer to the failing device is
2363 * returned in @r_failed_dev.
2366 * PCI/etc. bus probe sem.
2369 * 0 on success, negative errno otherwise
2371 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2373 struct ata_device *dev;
2374 int i, rc = 0, used_dma = 0, found = 0;
2376 /* has private set_mode? */
2377 if (ap->ops->set_mode)
2378 return ap->ops->set_mode(ap, r_failed_dev);
2380 /* step 1: calculate xfer_mask */
2381 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2382 unsigned int pio_mask, dma_mask;
2384 dev = &ap->device[i];
2386 if (!ata_dev_enabled(dev))
2389 ata_dev_xfermask(dev);
2391 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2392 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2393 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2394 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2403 /* step 2: always set host PIO timings */
2404 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2405 dev = &ap->device[i];
2406 if (!ata_dev_enabled(dev))
2409 if (!dev->pio_mode) {
2410 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2415 dev->xfer_mode = dev->pio_mode;
2416 dev->xfer_shift = ATA_SHIFT_PIO;
2417 if (ap->ops->set_piomode)
2418 ap->ops->set_piomode(ap, dev);
2421 /* step 3: set host DMA timings */
2422 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2423 dev = &ap->device[i];
2425 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2428 dev->xfer_mode = dev->dma_mode;
2429 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2430 if (ap->ops->set_dmamode)
2431 ap->ops->set_dmamode(ap, dev);
2434 /* step 4: update devices' xfer mode */
2435 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2436 dev = &ap->device[i];
2438 /* don't update suspended devices' xfer mode */
2439 if (!ata_dev_ready(dev))
2442 rc = ata_dev_set_mode(dev);
2447 /* Record simplex status. If we selected DMA then the other
2448 * host channels are not permitted to do so.
2450 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
2451 ap->host->simplex_claimed = 1;
2453 /* step5: chip specific finalisation */
2454 if (ap->ops->post_set_mode)
2455 ap->ops->post_set_mode(ap);
2459 *r_failed_dev = dev;
2464 * ata_tf_to_host - issue ATA taskfile to host controller
2465 * @ap: port to which command is being issued
2466 * @tf: ATA taskfile register set
2468 * Issues ATA taskfile register set to ATA host controller,
2469 * with proper synchronization with interrupt handler and
2473 * spin_lock_irqsave(host lock)
2476 static inline void ata_tf_to_host(struct ata_port *ap,
2477 const struct ata_taskfile *tf)
2479 ap->ops->tf_load(ap, tf);
2480 ap->ops->exec_command(ap, tf);
2484 * ata_busy_sleep - sleep until BSY clears, or timeout
2485 * @ap: port containing status register to be polled
2486 * @tmout_pat: impatience timeout
2487 * @tmout: overall timeout
2489 * Sleep until ATA Status register bit BSY clears,
2490 * or a timeout occurs.
2493 * Kernel thread context (may sleep).
2496 * 0 on success, -errno otherwise.
2498 int ata_busy_sleep(struct ata_port *ap,
2499 unsigned long tmout_pat, unsigned long tmout)
2501 unsigned long timer_start, timeout;
2504 status = ata_busy_wait(ap, ATA_BUSY, 300);
2505 timer_start = jiffies;
2506 timeout = timer_start + tmout_pat;
2507 while (status != 0xff && (status & ATA_BUSY) &&
2508 time_before(jiffies, timeout)) {
2510 status = ata_busy_wait(ap, ATA_BUSY, 3);
2513 if (status != 0xff && (status & ATA_BUSY))
2514 ata_port_printk(ap, KERN_WARNING,
2515 "port is slow to respond, please be patient "
2516 "(Status 0x%x)\n", status);
2518 timeout = timer_start + tmout;
2519 while (status != 0xff && (status & ATA_BUSY) &&
2520 time_before(jiffies, timeout)) {
2522 status = ata_chk_status(ap);
2528 if (status & ATA_BUSY) {
2529 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2530 "(%lu secs, Status 0x%x)\n",
2531 tmout / HZ, status);
2538 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2540 struct ata_ioports *ioaddr = &ap->ioaddr;
2541 unsigned int dev0 = devmask & (1 << 0);
2542 unsigned int dev1 = devmask & (1 << 1);
2543 unsigned long timeout;
2545 /* if device 0 was found in ata_devchk, wait for its
2549 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2551 /* if device 1 was found in ata_devchk, wait for
2552 * register access, then wait for BSY to clear
2554 timeout = jiffies + ATA_TMOUT_BOOT;
2558 ap->ops->dev_select(ap, 1);
2559 nsect = ioread8(ioaddr->nsect_addr);
2560 lbal = ioread8(ioaddr->lbal_addr);
2561 if ((nsect == 1) && (lbal == 1))
2563 if (time_after(jiffies, timeout)) {
2567 msleep(50); /* give drive a breather */
2570 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2572 /* is all this really necessary? */
2573 ap->ops->dev_select(ap, 0);
2575 ap->ops->dev_select(ap, 1);
2577 ap->ops->dev_select(ap, 0);
2580 static unsigned int ata_bus_softreset(struct ata_port *ap,
2581 unsigned int devmask)
2583 struct ata_ioports *ioaddr = &ap->ioaddr;
2585 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2587 /* software reset. causes dev0 to be selected */
2588 iowrite8(ap->ctl, ioaddr->ctl_addr);
2589 udelay(20); /* FIXME: flush */
2590 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2591 udelay(20); /* FIXME: flush */
2592 iowrite8(ap->ctl, ioaddr->ctl_addr);
2594 /* spec mandates ">= 2ms" before checking status.
2595 * We wait 150ms, because that was the magic delay used for
2596 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2597 * between when the ATA command register is written, and then
2598 * status is checked. Because waiting for "a while" before
2599 * checking status is fine, post SRST, we perform this magic
2600 * delay here as well.
2602 * Old drivers/ide uses the 2mS rule and then waits for ready
2606 /* Before we perform post reset processing we want to see if
2607 * the bus shows 0xFF because the odd clown forgets the D7
2608 * pulldown resistor.
2610 if (ata_check_status(ap) == 0xFF)
2613 ata_bus_post_reset(ap, devmask);
2619 * ata_bus_reset - reset host port and associated ATA channel
2620 * @ap: port to reset
2622 * This is typically the first time we actually start issuing
2623 * commands to the ATA channel. We wait for BSY to clear, then
2624 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2625 * result. Determine what devices, if any, are on the channel
2626 * by looking at the device 0/1 error register. Look at the signature
2627 * stored in each device's taskfile registers, to determine if
2628 * the device is ATA or ATAPI.
2631 * PCI/etc. bus probe sem.
2632 * Obtains host lock.
2635 * Sets ATA_FLAG_DISABLED if bus reset fails.
2638 void ata_bus_reset(struct ata_port *ap)
2640 struct ata_ioports *ioaddr = &ap->ioaddr;
2641 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2643 unsigned int dev0, dev1 = 0, devmask = 0;
2645 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2647 /* determine if device 0/1 are present */
2648 if (ap->flags & ATA_FLAG_SATA_RESET)
2651 dev0 = ata_devchk(ap, 0);
2653 dev1 = ata_devchk(ap, 1);
2657 devmask |= (1 << 0);
2659 devmask |= (1 << 1);
2661 /* select device 0 again */
2662 ap->ops->dev_select(ap, 0);
2664 /* issue bus reset */
2665 if (ap->flags & ATA_FLAG_SRST)
2666 if (ata_bus_softreset(ap, devmask))
2670 * determine by signature whether we have ATA or ATAPI devices
2672 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2673 if ((slave_possible) && (err != 0x81))
2674 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2676 /* re-enable interrupts */
2677 ap->ops->irq_on(ap);
2679 /* is double-select really necessary? */
2680 if (ap->device[1].class != ATA_DEV_NONE)
2681 ap->ops->dev_select(ap, 1);
2682 if (ap->device[0].class != ATA_DEV_NONE)
2683 ap->ops->dev_select(ap, 0);
2685 /* if no devices were detected, disable this port */
2686 if ((ap->device[0].class == ATA_DEV_NONE) &&
2687 (ap->device[1].class == ATA_DEV_NONE))
2690 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2691 /* set up device control for ATA_FLAG_SATA_RESET */
2692 iowrite8(ap->ctl, ioaddr->ctl_addr);
2699 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2700 ap->ops->port_disable(ap);
2706 * sata_phy_debounce - debounce SATA phy status
2707 * @ap: ATA port to debounce SATA phy status for
2708 * @params: timing parameters { interval, duratinon, timeout } in msec
2710 * Make sure SStatus of @ap reaches stable state, determined by
2711 * holding the same value where DET is not 1 for @duration polled
2712 * every @interval, before @timeout. Timeout constraints the
2713 * beginning of the stable state. Because, after hot unplugging,
2714 * DET gets stuck at 1 on some controllers, this functions waits
2715 * until timeout then returns 0 if DET is stable at 1.
2718 * Kernel thread context (may sleep)
2721 * 0 on success, -errno on failure.
2723 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2725 unsigned long interval_msec = params[0];
2726 unsigned long duration = params[1] * HZ / 1000;
2727 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2728 unsigned long last_jiffies;
2732 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2737 last_jiffies = jiffies;
2740 msleep(interval_msec);
2741 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2747 if (cur == 1 && time_before(jiffies, timeout))
2749 if (time_after(jiffies, last_jiffies + duration))
2754 /* unstable, start over */
2756 last_jiffies = jiffies;
2759 if (time_after(jiffies, timeout))
2765 * sata_phy_resume - resume SATA phy
2766 * @ap: ATA port to resume SATA phy for
2767 * @params: timing parameters { interval, duratinon, timeout } in msec
2769 * Resume SATA phy of @ap and debounce it.
2772 * Kernel thread context (may sleep)
2775 * 0 on success, -errno on failure.
2777 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2782 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2785 scontrol = (scontrol & 0x0f0) | 0x300;
2787 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2790 /* Some PHYs react badly if SStatus is pounded immediately
2791 * after resuming. Delay 200ms before debouncing.
2795 return sata_phy_debounce(ap, params);
2798 static void ata_wait_spinup(struct ata_port *ap)
2800 struct ata_eh_context *ehc = &ap->eh_context;
2801 unsigned long end, secs;
2804 /* first, debounce phy if SATA */
2805 if (ap->cbl == ATA_CBL_SATA) {
2806 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2808 /* if debounced successfully and offline, no need to wait */
2809 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2813 /* okay, let's give the drive time to spin up */
2814 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2815 secs = ((end - jiffies) + HZ - 1) / HZ;
2817 if (time_after(jiffies, end))
2821 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2822 "(%lu secs)\n", secs);
2824 schedule_timeout_uninterruptible(end - jiffies);
2828 * ata_std_prereset - prepare for reset
2829 * @ap: ATA port to be reset
2831 * @ap is about to be reset. Initialize it.
2834 * Kernel thread context (may sleep)
2837 * 0 on success, -errno otherwise.
2839 int ata_std_prereset(struct ata_port *ap)
2841 struct ata_eh_context *ehc = &ap->eh_context;
2842 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2845 /* handle link resume & hotplug spinup */
2846 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2847 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2848 ehc->i.action |= ATA_EH_HARDRESET;
2850 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2851 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2852 ata_wait_spinup(ap);
2854 /* if we're about to do hardreset, nothing more to do */
2855 if (ehc->i.action & ATA_EH_HARDRESET)
2858 /* if SATA, resume phy */
2859 if (ap->cbl == ATA_CBL_SATA) {
2860 rc = sata_phy_resume(ap, timing);
2861 if (rc && rc != -EOPNOTSUPP) {
2862 /* phy resume failed */
2863 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2864 "link for reset (errno=%d)\n", rc);
2869 /* Wait for !BSY if the controller can wait for the first D2H
2870 * Reg FIS and we don't know that no device is attached.
2872 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2873 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2879 * ata_std_softreset - reset host port via ATA SRST
2880 * @ap: port to reset
2881 * @classes: resulting classes of attached devices
2883 * Reset host port using ATA SRST.
2886 * Kernel thread context (may sleep)
2889 * 0 on success, -errno otherwise.
2891 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2893 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2894 unsigned int devmask = 0, err_mask;
2899 if (ata_port_offline(ap)) {
2900 classes[0] = ATA_DEV_NONE;
2904 /* determine if device 0/1 are present */
2905 if (ata_devchk(ap, 0))
2906 devmask |= (1 << 0);
2907 if (slave_possible && ata_devchk(ap, 1))
2908 devmask |= (1 << 1);
2910 /* select device 0 again */
2911 ap->ops->dev_select(ap, 0);
2913 /* issue bus reset */
2914 DPRINTK("about to softreset, devmask=%x\n", devmask);
2915 err_mask = ata_bus_softreset(ap, devmask);
2917 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2922 /* determine by signature whether we have ATA or ATAPI devices */
2923 classes[0] = ata_dev_try_classify(ap, 0, &err);
2924 if (slave_possible && err != 0x81)
2925 classes[1] = ata_dev_try_classify(ap, 1, &err);
2928 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2933 * sata_port_hardreset - reset port via SATA phy reset
2934 * @ap: port to reset
2935 * @timing: timing parameters { interval, duratinon, timeout } in msec
2937 * SATA phy-reset host port using DET bits of SControl register.
2940 * Kernel thread context (may sleep)
2943 * 0 on success, -errno otherwise.
2945 int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing)
2952 if (sata_set_spd_needed(ap)) {
2953 /* SATA spec says nothing about how to reconfigure
2954 * spd. To be on the safe side, turn off phy during
2955 * reconfiguration. This works for at least ICH7 AHCI
2958 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2961 scontrol = (scontrol & 0x0f0) | 0x304;
2963 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2969 /* issue phy wake/reset */
2970 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2973 scontrol = (scontrol & 0x0f0) | 0x301;
2975 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2978 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2979 * 10.4.2 says at least 1 ms.
2983 /* bring phy back */
2984 rc = sata_phy_resume(ap, timing);
2986 DPRINTK("EXIT, rc=%d\n", rc);
2991 * sata_std_hardreset - reset host port via SATA phy reset
2992 * @ap: port to reset
2993 * @class: resulting class of attached device
2995 * SATA phy-reset host port using DET bits of SControl register,
2996 * wait for !BSY and classify the attached device.
2999 * Kernel thread context (may sleep)
3002 * 0 on success, -errno otherwise.
3004 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
3006 const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context);
3012 rc = sata_port_hardreset(ap, timing);
3014 ata_port_printk(ap, KERN_ERR,
3015 "COMRESET failed (errno=%d)\n", rc);
3019 /* TODO: phy layer with polling, timeouts, etc. */
3020 if (ata_port_offline(ap)) {
3021 *class = ATA_DEV_NONE;
3022 DPRINTK("EXIT, link offline\n");
3026 /* wait a while before checking status, see SRST for more info */
3029 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
3030 ata_port_printk(ap, KERN_ERR,
3031 "COMRESET failed (device not ready)\n");
3035 ap->ops->dev_select(ap, 0); /* probably unnecessary */
3037 *class = ata_dev_try_classify(ap, 0, NULL);
3039 DPRINTK("EXIT, class=%u\n", *class);
3044 * ata_std_postreset - standard postreset callback
3045 * @ap: the target ata_port
3046 * @classes: classes of attached devices
3048 * This function is invoked after a successful reset. Note that
3049 * the device might have been reset more than once using
3050 * different reset methods before postreset is invoked.
3053 * Kernel thread context (may sleep)
3055 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
3061 /* print link status */
3062 sata_print_link_status(ap);
3065 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
3066 sata_scr_write(ap, SCR_ERROR, serror);
3068 /* re-enable interrupts */
3069 if (!ap->ops->error_handler)
3070 ap->ops->irq_on(ap);
3072 /* is double-select really necessary? */
3073 if (classes[0] != ATA_DEV_NONE)
3074 ap->ops->dev_select(ap, 1);
3075 if (classes[1] != ATA_DEV_NONE)
3076 ap->ops->dev_select(ap, 0);
3078 /* bail out if no device is present */
3079 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
3080 DPRINTK("EXIT, no device\n");
3084 /* set up device control */
3085 if (ap->ioaddr.ctl_addr)
3086 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
3092 * ata_dev_same_device - Determine whether new ID matches configured device
3093 * @dev: device to compare against
3094 * @new_class: class of the new device
3095 * @new_id: IDENTIFY page of the new device
3097 * Compare @new_class and @new_id against @dev and determine
3098 * whether @dev is the device indicated by @new_class and
3105 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3107 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3110 const u16 *old_id = dev->id;
3111 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3112 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
3115 if (dev->class != new_class) {
3116 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
3117 dev->class, new_class);
3121 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3122 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3123 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3124 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
3125 new_n_sectors = ata_id_n_sectors(new_id);
3127 if (strcmp(model[0], model[1])) {
3128 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
3129 "'%s' != '%s'\n", model[0], model[1]);
3133 if (strcmp(serial[0], serial[1])) {
3134 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
3135 "'%s' != '%s'\n", serial[0], serial[1]);
3139 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
3140 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
3142 (unsigned long long)dev->n_sectors,
3143 (unsigned long long)new_n_sectors);
3151 * ata_dev_revalidate - Revalidate ATA device
3152 * @dev: device to revalidate
3153 * @readid_flags: read ID flags
3155 * Re-read IDENTIFY page and make sure @dev is still attached to
3159 * Kernel thread context (may sleep)
3162 * 0 on success, negative errno otherwise
3164 int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags)
3166 unsigned int class = dev->class;
3167 u16 *id = (void *)dev->ap->sector_buf;
3170 if (!ata_dev_enabled(dev)) {
3176 rc = ata_dev_read_id(dev, &class, readid_flags, id);
3180 /* is the device still there? */
3181 if (!ata_dev_same_device(dev, class, id)) {
3186 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
3188 /* configure device according to the new ID */
3189 rc = ata_dev_configure(dev);
3194 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
3198 struct ata_blacklist_entry {
3199 const char *model_num;
3200 const char *model_rev;
3201 unsigned long horkage;
3204 static const struct ata_blacklist_entry ata_device_blacklist [] = {
3205 /* Devices with DMA related problems under Linux */
3206 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
3207 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
3208 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
3209 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
3210 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
3211 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
3212 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
3213 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
3214 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
3215 { "CRD-8480B", NULL, ATA_HORKAGE_NODMA },
3216 { "CRD-8482B", NULL, ATA_HORKAGE_NODMA },
3217 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
3218 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
3219 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3220 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
3221 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
3222 { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA },
3223 { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA },
3224 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
3225 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
3226 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
3227 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
3228 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
3229 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
3230 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
3231 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
3232 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
3233 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
3234 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
3235 { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA },
3237 /* Devices we expect to fail diagnostics */
3239 /* Devices where NCQ should be avoided */
3241 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
3243 /* Devices with NCQ limits */
3249 unsigned long ata_device_blacklisted(const struct ata_device *dev)
3251 unsigned char model_num[ATA_ID_PROD_LEN + 1];
3252 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
3253 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3255 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
3256 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
3258 while (ad->model_num) {
3259 if (!strcmp(ad->model_num, model_num)) {
3260 if (ad->model_rev == NULL)
3262 if (!strcmp(ad->model_rev, model_rev))
3270 static int ata_dma_blacklisted(const struct ata_device *dev)
3272 /* We don't support polling DMA.
3273 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3274 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3276 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3277 (dev->flags & ATA_DFLAG_CDB_INTR))
3279 return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0;
3283 * ata_dev_xfermask - Compute supported xfermask of the given device
3284 * @dev: Device to compute xfermask for
3286 * Compute supported xfermask of @dev and store it in
3287 * dev->*_mask. This function is responsible for applying all
3288 * known limits including host controller limits, device
3294 static void ata_dev_xfermask(struct ata_device *dev)
3296 struct ata_port *ap = dev->ap;
3297 struct ata_host *host = ap->host;
3298 unsigned long xfer_mask;
3300 /* controller modes available */
3301 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3302 ap->mwdma_mask, ap->udma_mask);
3304 /* Apply cable rule here. Don't apply it early because when
3305 * we handle hot plug the cable type can itself change.
3307 if (ap->cbl == ATA_CBL_PATA40)
3308 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3309 /* Apply drive side cable rule. Unknown or 80 pin cables reported
3310 * host side are checked drive side as well. Cases where we know a
3311 * 40wire cable is used safely for 80 are not checked here.
3313 if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80))
3314 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3317 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
3318 dev->mwdma_mask, dev->udma_mask);
3319 xfer_mask &= ata_id_xfermask(dev->id);
3322 * CFA Advanced TrueIDE timings are not allowed on a shared
3325 if (ata_dev_pair(dev)) {
3326 /* No PIO5 or PIO6 */
3327 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
3328 /* No MWDMA3 or MWDMA 4 */
3329 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
3332 if (ata_dma_blacklisted(dev)) {
3333 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3334 ata_dev_printk(dev, KERN_WARNING,
3335 "device is on DMA blacklist, disabling DMA\n");
3338 if ((host->flags & ATA_HOST_SIMPLEX) && host->simplex_claimed) {
3339 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3340 ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by "
3341 "other device, disabling DMA\n");
3344 if (ap->ops->mode_filter)
3345 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3347 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3348 &dev->mwdma_mask, &dev->udma_mask);
3352 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3353 * @dev: Device to which command will be sent
3355 * Issue SET FEATURES - XFER MODE command to device @dev
3359 * PCI/etc. bus probe sem.
3362 * 0 on success, AC_ERR_* mask otherwise.
3365 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3367 struct ata_taskfile tf;
3368 unsigned int err_mask;
3370 /* set up set-features taskfile */
3371 DPRINTK("set features - xfer mode\n");
3373 ata_tf_init(dev, &tf);
3374 tf.command = ATA_CMD_SET_FEATURES;
3375 tf.feature = SETFEATURES_XFER;
3376 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3377 tf.protocol = ATA_PROT_NODATA;
3378 tf.nsect = dev->xfer_mode;
3380 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3382 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3387 * ata_dev_init_params - Issue INIT DEV PARAMS command
3388 * @dev: Device to which command will be sent
3389 * @heads: Number of heads (taskfile parameter)
3390 * @sectors: Number of sectors (taskfile parameter)
3393 * Kernel thread context (may sleep)
3396 * 0 on success, AC_ERR_* mask otherwise.
3398 static unsigned int ata_dev_init_params(struct ata_device *dev,
3399 u16 heads, u16 sectors)
3401 struct ata_taskfile tf;
3402 unsigned int err_mask;
3404 /* Number of sectors per track 1-255. Number of heads 1-16 */
3405 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3406 return AC_ERR_INVALID;
3408 /* set up init dev params taskfile */
3409 DPRINTK("init dev params \n");
3411 ata_tf_init(dev, &tf);
3412 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3413 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3414 tf.protocol = ATA_PROT_NODATA;
3416 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3418 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3420 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3425 * ata_sg_clean - Unmap DMA memory associated with command
3426 * @qc: Command containing DMA memory to be released
3428 * Unmap all mapped DMA memory associated with this command.
3431 * spin_lock_irqsave(host lock)
3433 void ata_sg_clean(struct ata_queued_cmd *qc)
3435 struct ata_port *ap = qc->ap;
3436 struct scatterlist *sg = qc->__sg;
3437 int dir = qc->dma_dir;
3438 void *pad_buf = NULL;
3440 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3441 WARN_ON(sg == NULL);
3443 if (qc->flags & ATA_QCFLAG_SINGLE)
3444 WARN_ON(qc->n_elem > 1);
3446 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3448 /* if we padded the buffer out to 32-bit bound, and data
3449 * xfer direction is from-device, we must copy from the
3450 * pad buffer back into the supplied buffer
3452 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3453 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3455 if (qc->flags & ATA_QCFLAG_SG) {
3457 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3458 /* restore last sg */
3459 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3461 struct scatterlist *psg = &qc->pad_sgent;
3462 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3463 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3464 kunmap_atomic(addr, KM_IRQ0);
3468 dma_unmap_single(ap->dev,
3469 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3472 sg->length += qc->pad_len;
3474 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3475 pad_buf, qc->pad_len);
3478 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3483 * ata_fill_sg - Fill PCI IDE PRD table
3484 * @qc: Metadata associated with taskfile to be transferred
3486 * Fill PCI IDE PRD (scatter-gather) table with segments
3487 * associated with the current disk command.
3490 * spin_lock_irqsave(host lock)
3493 static void ata_fill_sg(struct ata_queued_cmd *qc)
3495 struct ata_port *ap = qc->ap;
3496 struct scatterlist *sg;
3499 WARN_ON(qc->__sg == NULL);
3500 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3503 ata_for_each_sg(sg, qc) {
3507 /* determine if physical DMA addr spans 64K boundary.
3508 * Note h/w doesn't support 64-bit, so we unconditionally
3509 * truncate dma_addr_t to u32.
3511 addr = (u32) sg_dma_address(sg);
3512 sg_len = sg_dma_len(sg);
3515 offset = addr & 0xffff;
3517 if ((offset + sg_len) > 0x10000)
3518 len = 0x10000 - offset;
3520 ap->prd[idx].addr = cpu_to_le32(addr);
3521 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3522 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3531 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3534 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3535 * @qc: Metadata associated with taskfile to check
3537 * Allow low-level driver to filter ATA PACKET commands, returning
3538 * a status indicating whether or not it is OK to use DMA for the
3539 * supplied PACKET command.
3542 * spin_lock_irqsave(host lock)
3544 * RETURNS: 0 when ATAPI DMA can be used
3547 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3549 struct ata_port *ap = qc->ap;
3550 int rc = 0; /* Assume ATAPI DMA is OK by default */
3552 if (ap->ops->check_atapi_dma)
3553 rc = ap->ops->check_atapi_dma(qc);
3558 * ata_qc_prep - Prepare taskfile for submission
3559 * @qc: Metadata associated with taskfile to be prepared
3561 * Prepare ATA taskfile for submission.
3564 * spin_lock_irqsave(host lock)
3566 void ata_qc_prep(struct ata_queued_cmd *qc)
3568 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3574 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3577 * ata_sg_init_one - Associate command with memory buffer
3578 * @qc: Command to be associated
3579 * @buf: Memory buffer
3580 * @buflen: Length of memory buffer, in bytes.
3582 * Initialize the data-related elements of queued_cmd @qc
3583 * to point to a single memory buffer, @buf of byte length @buflen.
3586 * spin_lock_irqsave(host lock)
3589 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3591 qc->flags |= ATA_QCFLAG_SINGLE;
3593 qc->__sg = &qc->sgent;
3595 qc->orig_n_elem = 1;
3597 qc->nbytes = buflen;
3599 sg_init_one(&qc->sgent, buf, buflen);
3603 * ata_sg_init - Associate command with scatter-gather table.
3604 * @qc: Command to be associated
3605 * @sg: Scatter-gather table.
3606 * @n_elem: Number of elements in s/g table.
3608 * Initialize the data-related elements of queued_cmd @qc
3609 * to point to a scatter-gather table @sg, containing @n_elem
3613 * spin_lock_irqsave(host lock)
3616 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3617 unsigned int n_elem)
3619 qc->flags |= ATA_QCFLAG_SG;
3621 qc->n_elem = n_elem;
3622 qc->orig_n_elem = n_elem;
3626 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3627 * @qc: Command with memory buffer to be mapped.
3629 * DMA-map the memory buffer associated with queued_cmd @qc.
3632 * spin_lock_irqsave(host lock)
3635 * Zero on success, negative on error.
3638 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3640 struct ata_port *ap = qc->ap;
3641 int dir = qc->dma_dir;
3642 struct scatterlist *sg = qc->__sg;
3643 dma_addr_t dma_address;
3646 /* we must lengthen transfers to end on a 32-bit boundary */
3647 qc->pad_len = sg->length & 3;
3649 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3650 struct scatterlist *psg = &qc->pad_sgent;
3652 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3654 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3656 if (qc->tf.flags & ATA_TFLAG_WRITE)
3657 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3660 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3661 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3663 sg->length -= qc->pad_len;
3664 if (sg->length == 0)
3667 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3668 sg->length, qc->pad_len);
3676 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3678 if (dma_mapping_error(dma_address)) {
3680 sg->length += qc->pad_len;
3684 sg_dma_address(sg) = dma_address;
3685 sg_dma_len(sg) = sg->length;
3688 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3689 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3695 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3696 * @qc: Command with scatter-gather table to be mapped.
3698 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3701 * spin_lock_irqsave(host lock)
3704 * Zero on success, negative on error.
3708 static int ata_sg_setup(struct ata_queued_cmd *qc)
3710 struct ata_port *ap = qc->ap;
3711 struct scatterlist *sg = qc->__sg;
3712 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3713 int n_elem, pre_n_elem, dir, trim_sg = 0;
3715 VPRINTK("ENTER, ata%u\n", ap->id);
3716 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3718 /* we must lengthen transfers to end on a 32-bit boundary */
3719 qc->pad_len = lsg->length & 3;
3721 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3722 struct scatterlist *psg = &qc->pad_sgent;
3723 unsigned int offset;
3725 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3727 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3730 * psg->page/offset are used to copy to-be-written
3731 * data in this function or read data in ata_sg_clean.
3733 offset = lsg->offset + lsg->length - qc->pad_len;
3734 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3735 psg->offset = offset_in_page(offset);
3737 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3738 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3739 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3740 kunmap_atomic(addr, KM_IRQ0);
3743 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3744 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3746 lsg->length -= qc->pad_len;
3747 if (lsg->length == 0)
3750 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3751 qc->n_elem - 1, lsg->length, qc->pad_len);
3754 pre_n_elem = qc->n_elem;
3755 if (trim_sg && pre_n_elem)
3764 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3766 /* restore last sg */
3767 lsg->length += qc->pad_len;
3771 DPRINTK("%d sg elements mapped\n", n_elem);
3774 qc->n_elem = n_elem;
3780 * swap_buf_le16 - swap halves of 16-bit words in place
3781 * @buf: Buffer to swap
3782 * @buf_words: Number of 16-bit words in buffer.
3784 * Swap halves of 16-bit words if needed to convert from
3785 * little-endian byte order to native cpu byte order, or
3789 * Inherited from caller.
3791 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3796 for (i = 0; i < buf_words; i++)
3797 buf[i] = le16_to_cpu(buf[i]);
3798 #endif /* __BIG_ENDIAN */
3802 * ata_data_xfer - Transfer data by PIO
3803 * @adev: device to target
3805 * @buflen: buffer length
3806 * @write_data: read/write
3808 * Transfer data from/to the device data register by PIO.
3811 * Inherited from caller.
3813 void ata_data_xfer(struct ata_device *adev, unsigned char *buf,
3814 unsigned int buflen, int write_data)
3816 struct ata_port *ap = adev->ap;
3817 unsigned int words = buflen >> 1;
3819 /* Transfer multiple of 2 bytes */
3821 iowrite16_rep(ap->ioaddr.data_addr, buf, words);
3823 ioread16_rep(ap->ioaddr.data_addr, buf, words);
3825 /* Transfer trailing 1 byte, if any. */
3826 if (unlikely(buflen & 0x01)) {
3827 u16 align_buf[1] = { 0 };
3828 unsigned char *trailing_buf = buf + buflen - 1;
3831 memcpy(align_buf, trailing_buf, 1);
3832 iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3834 align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr));
3835 memcpy(trailing_buf, align_buf, 1);
3841 * ata_data_xfer_noirq - Transfer data by PIO
3842 * @adev: device to target
3844 * @buflen: buffer length
3845 * @write_data: read/write
3847 * Transfer data from/to the device data register by PIO. Do the
3848 * transfer with interrupts disabled.
3851 * Inherited from caller.
3853 void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3854 unsigned int buflen, int write_data)
3856 unsigned long flags;
3857 local_irq_save(flags);
3858 ata_data_xfer(adev, buf, buflen, write_data);
3859 local_irq_restore(flags);
3864 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3865 * @qc: Command on going
3867 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3870 * Inherited from caller.
3873 static void ata_pio_sector(struct ata_queued_cmd *qc)
3875 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3876 struct scatterlist *sg = qc->__sg;
3877 struct ata_port *ap = qc->ap;
3879 unsigned int offset;
3882 if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE)
3883 ap->hsm_task_state = HSM_ST_LAST;
3885 page = sg[qc->cursg].page;
3886 offset = sg[qc->cursg].offset + qc->cursg_ofs;
3888 /* get the current page and offset */
3889 page = nth_page(page, (offset >> PAGE_SHIFT));
3890 offset %= PAGE_SIZE;
3892 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3894 if (PageHighMem(page)) {
3895 unsigned long flags;
3897 /* FIXME: use a bounce buffer */
3898 local_irq_save(flags);
3899 buf = kmap_atomic(page, KM_IRQ0);
3901 /* do the actual data transfer */
3902 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3904 kunmap_atomic(buf, KM_IRQ0);
3905 local_irq_restore(flags);
3907 buf = page_address(page);
3908 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3911 qc->curbytes += ATA_SECT_SIZE;
3912 qc->cursg_ofs += ATA_SECT_SIZE;
3914 if (qc->cursg_ofs == (&sg[qc->cursg])->length) {
3921 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3922 * @qc: Command on going
3924 * Transfer one or many ATA_SECT_SIZE of data from/to the
3925 * ATA device for the DRQ request.
3928 * Inherited from caller.
3931 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3933 if (is_multi_taskfile(&qc->tf)) {
3934 /* READ/WRITE MULTIPLE */
3937 WARN_ON(qc->dev->multi_count == 0);
3939 nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE,
3940 qc->dev->multi_count);
3948 * atapi_send_cdb - Write CDB bytes to hardware
3949 * @ap: Port to which ATAPI device is attached.
3950 * @qc: Taskfile currently active
3952 * When device has indicated its readiness to accept
3953 * a CDB, this function is called. Send the CDB.
3959 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3962 DPRINTK("send cdb\n");
3963 WARN_ON(qc->dev->cdb_len < 12);
3965 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3966 ata_altstatus(ap); /* flush */
3968 switch (qc->tf.protocol) {
3969 case ATA_PROT_ATAPI:
3970 ap->hsm_task_state = HSM_ST;
3972 case ATA_PROT_ATAPI_NODATA:
3973 ap->hsm_task_state = HSM_ST_LAST;
3975 case ATA_PROT_ATAPI_DMA:
3976 ap->hsm_task_state = HSM_ST_LAST;
3977 /* initiate bmdma */
3978 ap->ops->bmdma_start(qc);
3984 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3985 * @qc: Command on going
3986 * @bytes: number of bytes
3988 * Transfer Transfer data from/to the ATAPI device.
3991 * Inherited from caller.
3995 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3997 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3998 struct scatterlist *sg = qc->__sg;
3999 struct ata_port *ap = qc->ap;
4002 unsigned int offset, count;
4004 if (qc->curbytes + bytes >= qc->nbytes)
4005 ap->hsm_task_state = HSM_ST_LAST;
4008 if (unlikely(qc->cursg >= qc->n_elem)) {
4010 * The end of qc->sg is reached and the device expects
4011 * more data to transfer. In order not to overrun qc->sg
4012 * and fulfill length specified in the byte count register,
4013 * - for read case, discard trailing data from the device
4014 * - for write case, padding zero data to the device
4016 u16 pad_buf[1] = { 0 };
4017 unsigned int words = bytes >> 1;
4020 if (words) /* warning if bytes > 1 */
4021 ata_dev_printk(qc->dev, KERN_WARNING,
4022 "%u bytes trailing data\n", bytes);
4024 for (i = 0; i < words; i++)
4025 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
4027 ap->hsm_task_state = HSM_ST_LAST;
4031 sg = &qc->__sg[qc->cursg];
4034 offset = sg->offset + qc->cursg_ofs;
4036 /* get the current page and offset */
4037 page = nth_page(page, (offset >> PAGE_SHIFT));
4038 offset %= PAGE_SIZE;
4040 /* don't overrun current sg */
4041 count = min(sg->length - qc->cursg_ofs, bytes);
4043 /* don't cross page boundaries */
4044 count = min(count, (unsigned int)PAGE_SIZE - offset);
4046 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
4048 if (PageHighMem(page)) {
4049 unsigned long flags;
4051 /* FIXME: use bounce buffer */
4052 local_irq_save(flags);
4053 buf = kmap_atomic(page, KM_IRQ0);
4055 /* do the actual data transfer */
4056 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4058 kunmap_atomic(buf, KM_IRQ0);
4059 local_irq_restore(flags);
4061 buf = page_address(page);
4062 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
4066 qc->curbytes += count;
4067 qc->cursg_ofs += count;
4069 if (qc->cursg_ofs == sg->length) {
4079 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
4080 * @qc: Command on going
4082 * Transfer Transfer data from/to the ATAPI device.
4085 * Inherited from caller.
4088 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
4090 struct ata_port *ap = qc->ap;
4091 struct ata_device *dev = qc->dev;
4092 unsigned int ireason, bc_lo, bc_hi, bytes;
4093 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
4095 /* Abuse qc->result_tf for temp storage of intermediate TF
4096 * here to save some kernel stack usage.
4097 * For normal completion, qc->result_tf is not relevant. For
4098 * error, qc->result_tf is later overwritten by ata_qc_complete().
4099 * So, the correctness of qc->result_tf is not affected.
4101 ap->ops->tf_read(ap, &qc->result_tf);
4102 ireason = qc->result_tf.nsect;
4103 bc_lo = qc->result_tf.lbam;
4104 bc_hi = qc->result_tf.lbah;
4105 bytes = (bc_hi << 8) | bc_lo;
4107 /* shall be cleared to zero, indicating xfer of data */
4108 if (ireason & (1 << 0))
4111 /* make sure transfer direction matches expected */
4112 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
4113 if (do_write != i_write)
4116 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
4118 __atapi_pio_bytes(qc, bytes);
4123 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
4124 qc->err_mask |= AC_ERR_HSM;
4125 ap->hsm_task_state = HSM_ST_ERR;
4129 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
4130 * @ap: the target ata_port
4134 * 1 if ok in workqueue, 0 otherwise.
4137 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
4139 if (qc->tf.flags & ATA_TFLAG_POLLING)
4142 if (ap->hsm_task_state == HSM_ST_FIRST) {
4143 if (qc->tf.protocol == ATA_PROT_PIO &&
4144 (qc->tf.flags & ATA_TFLAG_WRITE))
4147 if (is_atapi_taskfile(&qc->tf) &&
4148 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4156 * ata_hsm_qc_complete - finish a qc running on standard HSM
4157 * @qc: Command to complete
4158 * @in_wq: 1 if called from workqueue, 0 otherwise
4160 * Finish @qc which is running on standard HSM.
4163 * If @in_wq is zero, spin_lock_irqsave(host lock).
4164 * Otherwise, none on entry and grabs host lock.
4166 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
4168 struct ata_port *ap = qc->ap;
4169 unsigned long flags;
4171 if (ap->ops->error_handler) {
4173 spin_lock_irqsave(ap->lock, flags);
4175 /* EH might have kicked in while host lock is
4178 qc = ata_qc_from_tag(ap, qc->tag);
4180 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
4181 ap->ops->irq_on(ap);
4182 ata_qc_complete(qc);
4184 ata_port_freeze(ap);
4187 spin_unlock_irqrestore(ap->lock, flags);
4189 if (likely(!(qc->err_mask & AC_ERR_HSM)))
4190 ata_qc_complete(qc);
4192 ata_port_freeze(ap);
4196 spin_lock_irqsave(ap->lock, flags);
4197 ap->ops->irq_on(ap);
4198 ata_qc_complete(qc);
4199 spin_unlock_irqrestore(ap->lock, flags);
4201 ata_qc_complete(qc);
4204 ata_altstatus(ap); /* flush */
4208 * ata_hsm_move - move the HSM to the next state.
4209 * @ap: the target ata_port
4211 * @status: current device status
4212 * @in_wq: 1 if called from workqueue, 0 otherwise
4215 * 1 when poll next status needed, 0 otherwise.
4217 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4218 u8 status, int in_wq)
4220 unsigned long flags = 0;
4223 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4225 /* Make sure ata_qc_issue_prot() does not throw things
4226 * like DMA polling into the workqueue. Notice that
4227 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4229 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4232 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4233 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4235 switch (ap->hsm_task_state) {
4237 /* Send first data block or PACKET CDB */
4239 /* If polling, we will stay in the work queue after
4240 * sending the data. Otherwise, interrupt handler
4241 * takes over after sending the data.
4243 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4245 /* check device status */
4246 if (unlikely((status & ATA_DRQ) == 0)) {
4247 /* handle BSY=0, DRQ=0 as error */
4248 if (likely(status & (ATA_ERR | ATA_DF)))
4249 /* device stops HSM for abort/error */
4250 qc->err_mask |= AC_ERR_DEV;
4252 /* HSM violation. Let EH handle this */
4253 qc->err_mask |= AC_ERR_HSM;
4255 ap->hsm_task_state = HSM_ST_ERR;
4259 /* Device should not ask for data transfer (DRQ=1)
4260 * when it finds something wrong.
4261 * We ignore DRQ here and stop the HSM by
4262 * changing hsm_task_state to HSM_ST_ERR and
4263 * let the EH abort the command or reset the device.
4265 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4266 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4268 qc->err_mask |= AC_ERR_HSM;
4269 ap->hsm_task_state = HSM_ST_ERR;
4273 /* Send the CDB (atapi) or the first data block (ata pio out).
4274 * During the state transition, interrupt handler shouldn't
4275 * be invoked before the data transfer is complete and
4276 * hsm_task_state is changed. Hence, the following locking.
4279 spin_lock_irqsave(ap->lock, flags);
4281 if (qc->tf.protocol == ATA_PROT_PIO) {
4282 /* PIO data out protocol.
4283 * send first data block.
4286 /* ata_pio_sectors() might change the state
4287 * to HSM_ST_LAST. so, the state is changed here
4288 * before ata_pio_sectors().
4290 ap->hsm_task_state = HSM_ST;
4291 ata_pio_sectors(qc);
4292 ata_altstatus(ap); /* flush */
4295 atapi_send_cdb(ap, qc);
4298 spin_unlock_irqrestore(ap->lock, flags);
4300 /* if polling, ata_pio_task() handles the rest.
4301 * otherwise, interrupt handler takes over from here.
4306 /* complete command or read/write the data register */
4307 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4308 /* ATAPI PIO protocol */
4309 if ((status & ATA_DRQ) == 0) {
4310 /* No more data to transfer or device error.
4311 * Device error will be tagged in HSM_ST_LAST.
4313 ap->hsm_task_state = HSM_ST_LAST;
4317 /* Device should not ask for data transfer (DRQ=1)
4318 * when it finds something wrong.
4319 * We ignore DRQ here and stop the HSM by
4320 * changing hsm_task_state to HSM_ST_ERR and
4321 * let the EH abort the command or reset the device.
4323 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4324 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4326 qc->err_mask |= AC_ERR_HSM;
4327 ap->hsm_task_state = HSM_ST_ERR;
4331 atapi_pio_bytes(qc);
4333 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4334 /* bad ireason reported by device */
4338 /* ATA PIO protocol */
4339 if (unlikely((status & ATA_DRQ) == 0)) {
4340 /* handle BSY=0, DRQ=0 as error */
4341 if (likely(status & (ATA_ERR | ATA_DF)))
4342 /* device stops HSM for abort/error */
4343 qc->err_mask |= AC_ERR_DEV;
4345 /* HSM violation. Let EH handle this.
4346 * Phantom devices also trigger this
4347 * condition. Mark hint.
4349 qc->err_mask |= AC_ERR_HSM |
4352 ap->hsm_task_state = HSM_ST_ERR;
4356 /* For PIO reads, some devices may ask for
4357 * data transfer (DRQ=1) alone with ERR=1.
4358 * We respect DRQ here and transfer one
4359 * block of junk data before changing the
4360 * hsm_task_state to HSM_ST_ERR.
4362 * For PIO writes, ERR=1 DRQ=1 doesn't make
4363 * sense since the data block has been
4364 * transferred to the device.
4366 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4367 /* data might be corrputed */
4368 qc->err_mask |= AC_ERR_DEV;
4370 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4371 ata_pio_sectors(qc);
4373 status = ata_wait_idle(ap);
4376 if (status & (ATA_BUSY | ATA_DRQ))
4377 qc->err_mask |= AC_ERR_HSM;
4379 /* ata_pio_sectors() might change the
4380 * state to HSM_ST_LAST. so, the state
4381 * is changed after ata_pio_sectors().
4383 ap->hsm_task_state = HSM_ST_ERR;
4387 ata_pio_sectors(qc);
4389 if (ap->hsm_task_state == HSM_ST_LAST &&
4390 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4393 status = ata_wait_idle(ap);
4398 ata_altstatus(ap); /* flush */
4403 if (unlikely(!ata_ok(status))) {
4404 qc->err_mask |= __ac_err_mask(status);
4405 ap->hsm_task_state = HSM_ST_ERR;
4409 /* no more data to transfer */
4410 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4411 ap->id, qc->dev->devno, status);
4413 WARN_ON(qc->err_mask);
4415 ap->hsm_task_state = HSM_ST_IDLE;
4417 /* complete taskfile transaction */
4418 ata_hsm_qc_complete(qc, in_wq);
4424 /* make sure qc->err_mask is available to
4425 * know what's wrong and recover
4427 WARN_ON(qc->err_mask == 0);
4429 ap->hsm_task_state = HSM_ST_IDLE;
4431 /* complete taskfile transaction */
4432 ata_hsm_qc_complete(qc, in_wq);
4444 static void ata_pio_task(struct work_struct *work)
4446 struct ata_port *ap =
4447 container_of(work, struct ata_port, port_task.work);
4448 struct ata_queued_cmd *qc = ap->port_task_data;
4453 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4456 * This is purely heuristic. This is a fast path.
4457 * Sometimes when we enter, BSY will be cleared in
4458 * a chk-status or two. If not, the drive is probably seeking
4459 * or something. Snooze for a couple msecs, then
4460 * chk-status again. If still busy, queue delayed work.
4462 status = ata_busy_wait(ap, ATA_BUSY, 5);
4463 if (status & ATA_BUSY) {
4465 status = ata_busy_wait(ap, ATA_BUSY, 10);
4466 if (status & ATA_BUSY) {
4467 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4473 poll_next = ata_hsm_move(ap, qc, status, 1);
4475 /* another command or interrupt handler
4476 * may be running at this point.
4483 * ata_qc_new - Request an available ATA command, for queueing
4484 * @ap: Port associated with device @dev
4485 * @dev: Device from whom we request an available command structure
4491 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4493 struct ata_queued_cmd *qc = NULL;
4496 /* no command while frozen */
4497 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4500 /* the last tag is reserved for internal command. */
4501 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4502 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4503 qc = __ata_qc_from_tag(ap, i);
4514 * ata_qc_new_init - Request an available ATA command, and initialize it
4515 * @dev: Device from whom we request an available command structure
4521 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4523 struct ata_port *ap = dev->ap;
4524 struct ata_queued_cmd *qc;
4526 qc = ata_qc_new(ap);
4539 * ata_qc_free - free unused ata_queued_cmd
4540 * @qc: Command to complete
4542 * Designed to free unused ata_queued_cmd object
4543 * in case something prevents using it.
4546 * spin_lock_irqsave(host lock)
4548 void ata_qc_free(struct ata_queued_cmd *qc)
4550 struct ata_port *ap = qc->ap;
4553 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4557 if (likely(ata_tag_valid(tag))) {
4558 qc->tag = ATA_TAG_POISON;
4559 clear_bit(tag, &ap->qc_allocated);
4563 void __ata_qc_complete(struct ata_queued_cmd *qc)
4565 struct ata_port *ap = qc->ap;
4567 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4568 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4570 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4573 /* command should be marked inactive atomically with qc completion */
4574 if (qc->tf.protocol == ATA_PROT_NCQ)
4575 ap->sactive &= ~(1 << qc->tag);
4577 ap->active_tag = ATA_TAG_POISON;
4579 /* atapi: mark qc as inactive to prevent the interrupt handler
4580 * from completing the command twice later, before the error handler
4581 * is called. (when rc != 0 and atapi request sense is needed)
4583 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4584 ap->qc_active &= ~(1 << qc->tag);
4586 /* call completion callback */
4587 qc->complete_fn(qc);
4590 static void fill_result_tf(struct ata_queued_cmd *qc)
4592 struct ata_port *ap = qc->ap;
4594 ap->ops->tf_read(ap, &qc->result_tf);
4595 qc->result_tf.flags = qc->tf.flags;
4599 * ata_qc_complete - Complete an active ATA command
4600 * @qc: Command to complete
4601 * @err_mask: ATA Status register contents
4603 * Indicate to the mid and upper layers that an ATA
4604 * command has completed, with either an ok or not-ok status.
4607 * spin_lock_irqsave(host lock)
4609 void ata_qc_complete(struct ata_queued_cmd *qc)
4611 struct ata_port *ap = qc->ap;
4613 /* XXX: New EH and old EH use different mechanisms to
4614 * synchronize EH with regular execution path.
4616 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4617 * Normal execution path is responsible for not accessing a
4618 * failed qc. libata core enforces the rule by returning NULL
4619 * from ata_qc_from_tag() for failed qcs.
4621 * Old EH depends on ata_qc_complete() nullifying completion
4622 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4623 * not synchronize with interrupt handler. Only PIO task is
4626 if (ap->ops->error_handler) {
4627 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4629 if (unlikely(qc->err_mask))
4630 qc->flags |= ATA_QCFLAG_FAILED;
4632 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4633 if (!ata_tag_internal(qc->tag)) {
4634 /* always fill result TF for failed qc */
4636 ata_qc_schedule_eh(qc);
4641 /* read result TF if requested */
4642 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4645 __ata_qc_complete(qc);
4647 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4650 /* read result TF if failed or requested */
4651 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4654 __ata_qc_complete(qc);
4659 * ata_qc_complete_multiple - Complete multiple qcs successfully
4660 * @ap: port in question
4661 * @qc_active: new qc_active mask
4662 * @finish_qc: LLDD callback invoked before completing a qc
4664 * Complete in-flight commands. This functions is meant to be
4665 * called from low-level driver's interrupt routine to complete
4666 * requests normally. ap->qc_active and @qc_active is compared
4667 * and commands are completed accordingly.
4670 * spin_lock_irqsave(host lock)
4673 * Number of completed commands on success, -errno otherwise.
4675 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4676 void (*finish_qc)(struct ata_queued_cmd *))
4682 done_mask = ap->qc_active ^ qc_active;
4684 if (unlikely(done_mask & qc_active)) {
4685 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4686 "(%08x->%08x)\n", ap->qc_active, qc_active);
4690 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4691 struct ata_queued_cmd *qc;
4693 if (!(done_mask & (1 << i)))
4696 if ((qc = ata_qc_from_tag(ap, i))) {
4699 ata_qc_complete(qc);
4707 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4709 struct ata_port *ap = qc->ap;
4711 switch (qc->tf.protocol) {
4714 case ATA_PROT_ATAPI_DMA:
4717 case ATA_PROT_ATAPI:
4719 if (ap->flags & ATA_FLAG_PIO_DMA)
4732 * ata_qc_issue - issue taskfile to device
4733 * @qc: command to issue to device
4735 * Prepare an ATA command to submission to device.
4736 * This includes mapping the data into a DMA-able
4737 * area, filling in the S/G table, and finally
4738 * writing the taskfile to hardware, starting the command.
4741 * spin_lock_irqsave(host lock)
4743 void ata_qc_issue(struct ata_queued_cmd *qc)
4745 struct ata_port *ap = qc->ap;
4747 /* Make sure only one non-NCQ command is outstanding. The
4748 * check is skipped for old EH because it reuses active qc to
4749 * request ATAPI sense.
4751 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4753 if (qc->tf.protocol == ATA_PROT_NCQ) {
4754 WARN_ON(ap->sactive & (1 << qc->tag));
4755 ap->sactive |= 1 << qc->tag;
4757 WARN_ON(ap->sactive);
4758 ap->active_tag = qc->tag;
4761 qc->flags |= ATA_QCFLAG_ACTIVE;
4762 ap->qc_active |= 1 << qc->tag;
4764 if (ata_should_dma_map(qc)) {
4765 if (qc->flags & ATA_QCFLAG_SG) {
4766 if (ata_sg_setup(qc))
4768 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4769 if (ata_sg_setup_one(qc))
4773 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4776 ap->ops->qc_prep(qc);
4778 qc->err_mask |= ap->ops->qc_issue(qc);
4779 if (unlikely(qc->err_mask))
4784 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4785 qc->err_mask |= AC_ERR_SYSTEM;
4787 ata_qc_complete(qc);
4791 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4792 * @qc: command to issue to device
4794 * Using various libata functions and hooks, this function
4795 * starts an ATA command. ATA commands are grouped into
4796 * classes called "protocols", and issuing each type of protocol
4797 * is slightly different.
4799 * May be used as the qc_issue() entry in ata_port_operations.
4802 * spin_lock_irqsave(host lock)
4805 * Zero on success, AC_ERR_* mask on failure
4808 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4810 struct ata_port *ap = qc->ap;
4812 /* Use polling pio if the LLD doesn't handle
4813 * interrupt driven pio and atapi CDB interrupt.
4815 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4816 switch (qc->tf.protocol) {
4818 case ATA_PROT_NODATA:
4819 case ATA_PROT_ATAPI:
4820 case ATA_PROT_ATAPI_NODATA:
4821 qc->tf.flags |= ATA_TFLAG_POLLING;
4823 case ATA_PROT_ATAPI_DMA:
4824 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4825 /* see ata_dma_blacklisted() */
4833 /* Some controllers show flaky interrupt behavior after
4834 * setting xfer mode. Use polling instead.
4836 if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES &&
4837 qc->tf.feature == SETFEATURES_XFER) &&
4838 (ap->flags & ATA_FLAG_SETXFER_POLLING))
4839 qc->tf.flags |= ATA_TFLAG_POLLING;
4841 /* select the device */
4842 ata_dev_select(ap, qc->dev->devno, 1, 0);
4844 /* start the command */
4845 switch (qc->tf.protocol) {
4846 case ATA_PROT_NODATA:
4847 if (qc->tf.flags & ATA_TFLAG_POLLING)
4848 ata_qc_set_polling(qc);
4850 ata_tf_to_host(ap, &qc->tf);
4851 ap->hsm_task_state = HSM_ST_LAST;
4853 if (qc->tf.flags & ATA_TFLAG_POLLING)
4854 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4859 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4861 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4862 ap->ops->bmdma_setup(qc); /* set up bmdma */
4863 ap->ops->bmdma_start(qc); /* initiate bmdma */
4864 ap->hsm_task_state = HSM_ST_LAST;
4868 if (qc->tf.flags & ATA_TFLAG_POLLING)
4869 ata_qc_set_polling(qc);
4871 ata_tf_to_host(ap, &qc->tf);
4873 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4874 /* PIO data out protocol */
4875 ap->hsm_task_state = HSM_ST_FIRST;
4876 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4878 /* always send first data block using
4879 * the ata_pio_task() codepath.
4882 /* PIO data in protocol */
4883 ap->hsm_task_state = HSM_ST;
4885 if (qc->tf.flags & ATA_TFLAG_POLLING)
4886 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4888 /* if polling, ata_pio_task() handles the rest.
4889 * otherwise, interrupt handler takes over from here.
4895 case ATA_PROT_ATAPI:
4896 case ATA_PROT_ATAPI_NODATA:
4897 if (qc->tf.flags & ATA_TFLAG_POLLING)
4898 ata_qc_set_polling(qc);
4900 ata_tf_to_host(ap, &qc->tf);
4902 ap->hsm_task_state = HSM_ST_FIRST;
4904 /* send cdb by polling if no cdb interrupt */
4905 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4906 (qc->tf.flags & ATA_TFLAG_POLLING))
4907 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4910 case ATA_PROT_ATAPI_DMA:
4911 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4913 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4914 ap->ops->bmdma_setup(qc); /* set up bmdma */
4915 ap->hsm_task_state = HSM_ST_FIRST;
4917 /* send cdb by polling if no cdb interrupt */
4918 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4919 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4924 return AC_ERR_SYSTEM;
4931 * ata_host_intr - Handle host interrupt for given (port, task)
4932 * @ap: Port on which interrupt arrived (possibly...)
4933 * @qc: Taskfile currently active in engine
4935 * Handle host interrupt for given queued command. Currently,
4936 * only DMA interrupts are handled. All other commands are
4937 * handled via polling with interrupts disabled (nIEN bit).
4940 * spin_lock_irqsave(host lock)
4943 * One if interrupt was handled, zero if not (shared irq).
4946 inline unsigned int ata_host_intr (struct ata_port *ap,
4947 struct ata_queued_cmd *qc)
4949 struct ata_eh_info *ehi = &ap->eh_info;
4950 u8 status, host_stat = 0;
4952 VPRINTK("ata%u: protocol %d task_state %d\n",
4953 ap->id, qc->tf.protocol, ap->hsm_task_state);
4955 /* Check whether we are expecting interrupt in this state */
4956 switch (ap->hsm_task_state) {
4958 /* Some pre-ATAPI-4 devices assert INTRQ
4959 * at this state when ready to receive CDB.
4962 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4963 * The flag was turned on only for atapi devices.
4964 * No need to check is_atapi_taskfile(&qc->tf) again.
4966 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4970 if (qc->tf.protocol == ATA_PROT_DMA ||
4971 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4972 /* check status of DMA engine */
4973 host_stat = ap->ops->bmdma_status(ap);
4974 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4976 /* if it's not our irq... */
4977 if (!(host_stat & ATA_DMA_INTR))
4980 /* before we do anything else, clear DMA-Start bit */
4981 ap->ops->bmdma_stop(qc);
4983 if (unlikely(host_stat & ATA_DMA_ERR)) {
4984 /* error when transfering data to/from memory */
4985 qc->err_mask |= AC_ERR_HOST_BUS;
4986 ap->hsm_task_state = HSM_ST_ERR;
4996 /* check altstatus */
4997 status = ata_altstatus(ap);
4998 if (status & ATA_BUSY)
5001 /* check main status, clearing INTRQ */
5002 status = ata_chk_status(ap);
5003 if (unlikely(status & ATA_BUSY))
5006 /* ack bmdma irq events */
5007 ap->ops->irq_clear(ap);
5009 ata_hsm_move(ap, qc, status, 0);
5011 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
5012 qc->tf.protocol == ATA_PROT_ATAPI_DMA))
5013 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
5015 return 1; /* irq handled */
5018 ap->stats.idle_irq++;
5021 if ((ap->stats.idle_irq % 1000) == 0) {
5022 ap->ops->irq_ack(ap, 0); /* debug trap */
5023 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
5027 return 0; /* irq not handled */
5031 * ata_interrupt - Default ATA host interrupt handler
5032 * @irq: irq line (unused)
5033 * @dev_instance: pointer to our ata_host information structure
5035 * Default interrupt handler for PCI IDE devices. Calls
5036 * ata_host_intr() for each port that is not disabled.
5039 * Obtains host lock during operation.
5042 * IRQ_NONE or IRQ_HANDLED.
5045 irqreturn_t ata_interrupt (int irq, void *dev_instance)
5047 struct ata_host *host = dev_instance;
5049 unsigned int handled = 0;
5050 unsigned long flags;
5052 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
5053 spin_lock_irqsave(&host->lock, flags);
5055 for (i = 0; i < host->n_ports; i++) {
5056 struct ata_port *ap;
5058 ap = host->ports[i];
5060 !(ap->flags & ATA_FLAG_DISABLED)) {
5061 struct ata_queued_cmd *qc;
5063 qc = ata_qc_from_tag(ap, ap->active_tag);
5064 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
5065 (qc->flags & ATA_QCFLAG_ACTIVE))
5066 handled |= ata_host_intr(ap, qc);
5070 spin_unlock_irqrestore(&host->lock, flags);
5072 return IRQ_RETVAL(handled);
5076 * sata_scr_valid - test whether SCRs are accessible
5077 * @ap: ATA port to test SCR accessibility for
5079 * Test whether SCRs are accessible for @ap.
5085 * 1 if SCRs are accessible, 0 otherwise.
5087 int sata_scr_valid(struct ata_port *ap)
5089 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
5093 * sata_scr_read - read SCR register of the specified port
5094 * @ap: ATA port to read SCR for
5096 * @val: Place to store read value
5098 * Read SCR register @reg of @ap into *@val. This function is
5099 * guaranteed to succeed if the cable type of the port is SATA
5100 * and the port implements ->scr_read.
5106 * 0 on success, negative errno on failure.
5108 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5110 if (sata_scr_valid(ap)) {
5111 *val = ap->ops->scr_read(ap, reg);
5118 * sata_scr_write - write SCR register of the specified port
5119 * @ap: ATA port to write SCR for
5120 * @reg: SCR to write
5121 * @val: value to write
5123 * Write @val to SCR register @reg of @ap. This function is
5124 * guaranteed to succeed if the cable type of the port is SATA
5125 * and the port implements ->scr_read.
5131 * 0 on success, negative errno on failure.
5133 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5135 if (sata_scr_valid(ap)) {
5136 ap->ops->scr_write(ap, reg, val);
5143 * sata_scr_write_flush - write SCR register of the specified port and flush
5144 * @ap: ATA port to write SCR for
5145 * @reg: SCR to write
5146 * @val: value to write
5148 * This function is identical to sata_scr_write() except that this
5149 * function performs flush after writing to the register.
5155 * 0 on success, negative errno on failure.
5157 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5159 if (sata_scr_valid(ap)) {
5160 ap->ops->scr_write(ap, reg, val);
5161 ap->ops->scr_read(ap, reg);
5168 * ata_port_online - test whether the given port is online
5169 * @ap: ATA port to test
5171 * Test whether @ap is online. Note that this function returns 0
5172 * if online status of @ap cannot be obtained, so
5173 * ata_port_online(ap) != !ata_port_offline(ap).
5179 * 1 if the port online status is available and online.
5181 int ata_port_online(struct ata_port *ap)
5185 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
5191 * ata_port_offline - test whether the given port is offline
5192 * @ap: ATA port to test
5194 * Test whether @ap is offline. Note that this function returns
5195 * 0 if offline status of @ap cannot be obtained, so
5196 * ata_port_online(ap) != !ata_port_offline(ap).
5202 * 1 if the port offline status is available and offline.
5204 int ata_port_offline(struct ata_port *ap)
5208 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
5213 int ata_flush_cache(struct ata_device *dev)
5215 unsigned int err_mask;
5218 if (!ata_try_flush_cache(dev))
5221 if (dev->flags & ATA_DFLAG_FLUSH_EXT)
5222 cmd = ATA_CMD_FLUSH_EXT;
5224 cmd = ATA_CMD_FLUSH;
5226 err_mask = ata_do_simple_cmd(dev, cmd);
5228 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5235 static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg,
5236 unsigned int action, unsigned int ehi_flags,
5239 unsigned long flags;
5242 for (i = 0; i < host->n_ports; i++) {
5243 struct ata_port *ap = host->ports[i];
5245 /* Previous resume operation might still be in
5246 * progress. Wait for PM_PENDING to clear.
5248 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5249 ata_port_wait_eh(ap);
5250 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5253 /* request PM ops to EH */
5254 spin_lock_irqsave(ap->lock, flags);
5259 ap->pm_result = &rc;
5262 ap->pflags |= ATA_PFLAG_PM_PENDING;
5263 ap->eh_info.action |= action;
5264 ap->eh_info.flags |= ehi_flags;
5266 ata_port_schedule_eh(ap);
5268 spin_unlock_irqrestore(ap->lock, flags);
5270 /* wait and check result */
5272 ata_port_wait_eh(ap);
5273 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5283 * ata_host_suspend - suspend host
5284 * @host: host to suspend
5287 * Suspend @host. Actual operation is performed by EH. This
5288 * function requests EH to perform PM operations and waits for EH
5292 * Kernel thread context (may sleep).
5295 * 0 on success, -errno on failure.
5297 int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
5301 rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1);
5305 /* EH is quiescent now. Fail if we have any ready device.
5306 * This happens if hotplug occurs between completion of device
5307 * suspension and here.
5309 for (i = 0; i < host->n_ports; i++) {
5310 struct ata_port *ap = host->ports[i];
5312 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5313 struct ata_device *dev = &ap->device[j];
5315 if (ata_dev_ready(dev)) {
5316 ata_port_printk(ap, KERN_WARNING,
5317 "suspend failed, device %d "
5318 "still active\n", dev->devno);
5325 host->dev->power.power_state = mesg;
5329 ata_host_resume(host);
5334 * ata_host_resume - resume host
5335 * @host: host to resume
5337 * Resume @host. Actual operation is performed by EH. This
5338 * function requests EH to perform PM operations and returns.
5339 * Note that all resume operations are performed parallely.
5342 * Kernel thread context (may sleep).
5344 void ata_host_resume(struct ata_host *host)
5346 ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET,
5347 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5348 host->dev->power.power_state = PMSG_ON;
5352 * ata_port_start - Set port up for dma.
5353 * @ap: Port to initialize
5355 * Called just after data structures for each port are
5356 * initialized. Allocates space for PRD table.
5358 * May be used as the port_start() entry in ata_port_operations.
5361 * Inherited from caller.
5363 int ata_port_start(struct ata_port *ap)
5365 struct device *dev = ap->dev;
5368 ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma,
5373 rc = ata_pad_alloc(ap, dev);
5377 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd,
5378 (unsigned long long)ap->prd_dma);
5383 * ata_dev_init - Initialize an ata_device structure
5384 * @dev: Device structure to initialize
5386 * Initialize @dev in preparation for probing.
5389 * Inherited from caller.
5391 void ata_dev_init(struct ata_device *dev)
5393 struct ata_port *ap = dev->ap;
5394 unsigned long flags;
5396 /* SATA spd limit is bound to the first device */
5397 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5399 /* High bits of dev->flags are used to record warm plug
5400 * requests which occur asynchronously. Synchronize using
5403 spin_lock_irqsave(ap->lock, flags);
5404 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5405 spin_unlock_irqrestore(ap->lock, flags);
5407 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5408 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5409 dev->pio_mask = UINT_MAX;
5410 dev->mwdma_mask = UINT_MAX;
5411 dev->udma_mask = UINT_MAX;
5415 * ata_port_init - Initialize an ata_port structure
5416 * @ap: Structure to initialize
5417 * @host: Collection of hosts to which @ap belongs
5418 * @ent: Probe information provided by low-level driver
5419 * @port_no: Port number associated with this ata_port
5421 * Initialize a new ata_port structure.
5424 * Inherited from caller.
5426 void ata_port_init(struct ata_port *ap, struct ata_host *host,
5427 const struct ata_probe_ent *ent, unsigned int port_no)
5431 ap->lock = &host->lock;
5432 ap->flags = ATA_FLAG_DISABLED;
5433 ap->id = ata_unique_id++;
5434 ap->ctl = ATA_DEVCTL_OBS;
5437 ap->port_no = port_no;
5438 if (port_no == 1 && ent->pinfo2) {
5439 ap->pio_mask = ent->pinfo2->pio_mask;
5440 ap->mwdma_mask = ent->pinfo2->mwdma_mask;
5441 ap->udma_mask = ent->pinfo2->udma_mask;
5442 ap->flags |= ent->pinfo2->flags;
5443 ap->ops = ent->pinfo2->port_ops;
5445 ap->pio_mask = ent->pio_mask;
5446 ap->mwdma_mask = ent->mwdma_mask;
5447 ap->udma_mask = ent->udma_mask;
5448 ap->flags |= ent->port_flags;
5449 ap->ops = ent->port_ops;
5451 ap->hw_sata_spd_limit = UINT_MAX;
5452 ap->active_tag = ATA_TAG_POISON;
5453 ap->last_ctl = 0xFF;
5455 #if defined(ATA_VERBOSE_DEBUG)
5456 /* turn on all debugging levels */
5457 ap->msg_enable = 0x00FF;
5458 #elif defined(ATA_DEBUG)
5459 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5461 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5464 INIT_DELAYED_WORK(&ap->port_task, NULL);
5465 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5466 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
5467 INIT_LIST_HEAD(&ap->eh_done_q);
5468 init_waitqueue_head(&ap->eh_wait_q);
5470 /* set cable type */
5471 ap->cbl = ATA_CBL_NONE;
5472 if (ap->flags & ATA_FLAG_SATA)
5473 ap->cbl = ATA_CBL_SATA;
5475 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5476 struct ata_device *dev = &ap->device[i];
5483 ap->stats.unhandled_irq = 1;
5484 ap->stats.idle_irq = 1;
5487 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5491 * ata_port_init_shost - Initialize SCSI host associated with ATA port
5492 * @ap: ATA port to initialize SCSI host for
5493 * @shost: SCSI host associated with @ap
5495 * Initialize SCSI host @shost associated with ATA port @ap.
5498 * Inherited from caller.
5500 static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost)
5502 ap->scsi_host = shost;
5504 shost->unique_id = ap->id;
5507 shost->max_channel = 1;
5508 shost->max_cmd_len = 12;
5512 * ata_port_add - Attach low-level ATA driver to system
5513 * @ent: Information provided by low-level driver
5514 * @host: Collections of ports to which we add
5515 * @port_no: Port number associated with this host
5517 * Attach low-level ATA driver to system.
5520 * PCI/etc. bus probe sem.
5523 * New ata_port on success, for NULL on error.
5525 static struct ata_port * ata_port_add(const struct ata_probe_ent *ent,
5526 struct ata_host *host,
5527 unsigned int port_no)
5529 struct Scsi_Host *shost;
5530 struct ata_port *ap;
5534 if (!ent->port_ops->error_handler &&
5535 !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5536 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5541 shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5545 shost->transportt = &ata_scsi_transport_template;
5547 ap = ata_shost_to_port(shost);
5549 ata_port_init(ap, host, ent, port_no);
5550 ata_port_init_shost(ap, shost);
5555 static void ata_host_release(struct device *gendev, void *res)
5557 struct ata_host *host = dev_get_drvdata(gendev);
5560 for (i = 0; i < host->n_ports; i++) {
5561 struct ata_port *ap = host->ports[i];
5566 if (ap->ops->port_stop)
5567 ap->ops->port_stop(ap);
5569 scsi_host_put(ap->scsi_host);
5572 if (host->ops->host_stop)
5573 host->ops->host_stop(host);
5577 * ata_sas_host_init - Initialize a host struct
5578 * @host: host to initialize
5579 * @dev: device host is attached to
5580 * @flags: host flags
5584 * PCI/etc. bus probe sem.
5588 void ata_host_init(struct ata_host *host, struct device *dev,
5589 unsigned long flags, const struct ata_port_operations *ops)
5591 spin_lock_init(&host->lock);
5593 host->flags = flags;
5598 * ata_device_add - Register hardware device with ATA and SCSI layers
5599 * @ent: Probe information describing hardware device to be registered
5601 * This function processes the information provided in the probe
5602 * information struct @ent, allocates the necessary ATA and SCSI
5603 * host information structures, initializes them, and registers
5604 * everything with requisite kernel subsystems.
5606 * This function requests irqs, probes the ATA bus, and probes
5610 * PCI/etc. bus probe sem.
5613 * Number of ports registered. Zero on error (no ports registered).
5615 int ata_device_add(const struct ata_probe_ent *ent)
5618 struct device *dev = ent->dev;
5619 struct ata_host *host;
5624 if (ent->irq == 0) {
5625 dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n");
5629 if (!devres_open_group(dev, ata_device_add, GFP_KERNEL))
5632 /* alloc a container for our list of ATA ports (buses) */
5633 host = devres_alloc(ata_host_release, sizeof(struct ata_host) +
5634 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5637 devres_add(dev, host);
5638 dev_set_drvdata(dev, host);
5640 ata_host_init(host, dev, ent->_host_flags, ent->port_ops);
5641 host->n_ports = ent->n_ports;
5642 host->irq = ent->irq;
5643 host->irq2 = ent->irq2;
5644 host->iomap = ent->iomap;
5645 host->private_data = ent->private_data;
5647 /* register each port bound to this device */
5648 for (i = 0; i < host->n_ports; i++) {
5649 struct ata_port *ap;
5650 unsigned long xfer_mode_mask;
5651 int irq_line = ent->irq;
5653 ap = ata_port_add(ent, host, i);
5654 host->ports[i] = ap;
5659 if (ent->dummy_port_mask & (1 << i)) {
5660 ata_port_printk(ap, KERN_INFO, "DUMMY\n");
5661 ap->ops = &ata_dummy_port_ops;
5666 rc = ap->ops->port_start(ap);
5668 host->ports[i] = NULL;
5669 scsi_host_put(ap->scsi_host);
5673 /* Report the secondary IRQ for second channel legacy */
5674 if (i == 1 && ent->irq2)
5675 irq_line = ent->irq2;
5677 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5678 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5679 (ap->pio_mask << ATA_SHIFT_PIO);
5681 /* print per-port info to dmesg */
5682 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "
5683 "ctl 0x%p bmdma 0x%p irq %d\n",
5684 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5685 ata_mode_string(xfer_mode_mask),
5686 ap->ioaddr.cmd_addr,
5687 ap->ioaddr.ctl_addr,
5688 ap->ioaddr.bmdma_addr,
5691 /* freeze port before requesting IRQ */
5692 ata_eh_freeze_port(ap);
5695 /* obtain irq, that may be shared between channels */
5696 rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler,
5697 ent->irq_flags, DRV_NAME, host);
5699 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5704 /* do we have a second IRQ for the other channel, eg legacy mode */
5706 /* We will get weird core code crashes later if this is true
5708 BUG_ON(ent->irq == ent->irq2);
5710 rc = devm_request_irq(dev, ent->irq2,
5711 ent->port_ops->irq_handler, ent->irq_flags,
5714 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5720 /* resource acquisition complete */
5721 devres_remove_group(dev, ata_device_add);
5723 /* perform each probe synchronously */
5724 DPRINTK("probe begin\n");
5725 for (i = 0; i < host->n_ports; i++) {
5726 struct ata_port *ap = host->ports[i];
5730 /* init sata_spd_limit to the current value */
5731 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5732 int spd = (scontrol >> 4) & 0xf;
5733 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5735 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5737 rc = scsi_add_host(ap->scsi_host, dev);
5739 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5740 /* FIXME: do something useful here */
5741 /* FIXME: handle unconditional calls to
5742 * scsi_scan_host and ata_host_remove, below,
5747 if (ap->ops->error_handler) {
5748 struct ata_eh_info *ehi = &ap->eh_info;
5749 unsigned long flags;
5753 /* kick EH for boot probing */
5754 spin_lock_irqsave(ap->lock, flags);
5756 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5757 ehi->action |= ATA_EH_SOFTRESET;
5758 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5760 ap->pflags |= ATA_PFLAG_LOADING;
5761 ata_port_schedule_eh(ap);
5763 spin_unlock_irqrestore(ap->lock, flags);
5765 /* wait for EH to finish */
5766 ata_port_wait_eh(ap);
5768 DPRINTK("ata%u: bus probe begin\n", ap->id);
5769 rc = ata_bus_probe(ap);
5770 DPRINTK("ata%u: bus probe end\n", ap->id);
5773 /* FIXME: do something useful here?
5774 * Current libata behavior will
5775 * tear down everything when
5776 * the module is removed
5777 * or the h/w is unplugged.
5783 /* probes are done, now scan each port's disk(s) */
5784 DPRINTK("host probe begin\n");
5785 for (i = 0; i < host->n_ports; i++) {
5786 struct ata_port *ap = host->ports[i];
5788 ata_scsi_scan_host(ap);
5791 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5792 return ent->n_ports; /* success */
5795 devres_release_group(dev, ata_device_add);
5796 dev_set_drvdata(dev, NULL);
5797 VPRINTK("EXIT, returning %d\n", rc);
5802 * ata_port_detach - Detach ATA port in prepration of device removal
5803 * @ap: ATA port to be detached
5805 * Detach all ATA devices and the associated SCSI devices of @ap;
5806 * then, remove the associated SCSI host. @ap is guaranteed to
5807 * be quiescent on return from this function.
5810 * Kernel thread context (may sleep).
5812 void ata_port_detach(struct ata_port *ap)
5814 unsigned long flags;
5817 if (!ap->ops->error_handler)
5820 /* tell EH we're leaving & flush EH */
5821 spin_lock_irqsave(ap->lock, flags);
5822 ap->pflags |= ATA_PFLAG_UNLOADING;
5823 spin_unlock_irqrestore(ap->lock, flags);
5825 ata_port_wait_eh(ap);
5827 /* EH is now guaranteed to see UNLOADING, so no new device
5828 * will be attached. Disable all existing devices.
5830 spin_lock_irqsave(ap->lock, flags);
5832 for (i = 0; i < ATA_MAX_DEVICES; i++)
5833 ata_dev_disable(&ap->device[i]);
5835 spin_unlock_irqrestore(ap->lock, flags);
5837 /* Final freeze & EH. All in-flight commands are aborted. EH
5838 * will be skipped and retrials will be terminated with bad
5841 spin_lock_irqsave(ap->lock, flags);
5842 ata_port_freeze(ap); /* won't be thawed */
5843 spin_unlock_irqrestore(ap->lock, flags);
5845 ata_port_wait_eh(ap);
5847 /* Flush hotplug task. The sequence is similar to
5848 * ata_port_flush_task().
5850 flush_workqueue(ata_aux_wq);
5851 cancel_delayed_work(&ap->hotplug_task);
5852 flush_workqueue(ata_aux_wq);
5855 /* remove the associated SCSI host */
5856 scsi_remove_host(ap->scsi_host);
5860 * ata_host_detach - Detach all ports of an ATA host
5861 * @host: Host to detach
5863 * Detach all ports of @host.
5866 * Kernel thread context (may sleep).
5868 void ata_host_detach(struct ata_host *host)
5872 for (i = 0; i < host->n_ports; i++)
5873 ata_port_detach(host->ports[i]);
5876 struct ata_probe_ent *
5877 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5879 struct ata_probe_ent *probe_ent;
5881 /* XXX - the following if can go away once all LLDs are managed */
5882 if (!list_empty(&dev->devres_head))
5883 probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
5885 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5887 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5888 kobject_name(&(dev->kobj)));
5892 INIT_LIST_HEAD(&probe_ent->node);
5893 probe_ent->dev = dev;
5895 probe_ent->sht = port->sht;
5896 probe_ent->port_flags = port->flags;
5897 probe_ent->pio_mask = port->pio_mask;
5898 probe_ent->mwdma_mask = port->mwdma_mask;
5899 probe_ent->udma_mask = port->udma_mask;
5900 probe_ent->port_ops = port->port_ops;
5901 probe_ent->private_data = port->private_data;
5907 * ata_std_ports - initialize ioaddr with standard port offsets.
5908 * @ioaddr: IO address structure to be initialized
5910 * Utility function which initializes data_addr, error_addr,
5911 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5912 * device_addr, status_addr, and command_addr to standard offsets
5913 * relative to cmd_addr.
5915 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5918 void ata_std_ports(struct ata_ioports *ioaddr)
5920 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5921 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5922 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5923 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5924 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5925 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5926 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5927 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5928 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5929 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5936 * ata_pci_remove_one - PCI layer callback for device removal
5937 * @pdev: PCI device that was removed
5939 * PCI layer indicates to libata via this hook that hot-unplug or
5940 * module unload event has occurred. Detach all ports. Resource
5941 * release is handled via devres.
5944 * Inherited from PCI layer (may sleep).
5946 void ata_pci_remove_one(struct pci_dev *pdev)
5948 struct device *dev = pci_dev_to_dev(pdev);
5949 struct ata_host *host = dev_get_drvdata(dev);
5951 ata_host_detach(host);
5954 /* move to PCI subsystem */
5955 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5957 unsigned long tmp = 0;
5959 switch (bits->width) {
5962 pci_read_config_byte(pdev, bits->reg, &tmp8);
5968 pci_read_config_word(pdev, bits->reg, &tmp16);
5974 pci_read_config_dword(pdev, bits->reg, &tmp32);
5985 return (tmp == bits->val) ? 1 : 0;
5988 void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
5990 pci_save_state(pdev);
5992 if (mesg.event == PM_EVENT_SUSPEND) {
5993 pci_disable_device(pdev);
5994 pci_set_power_state(pdev, PCI_D3hot);
5998 int ata_pci_device_do_resume(struct pci_dev *pdev)
6002 pci_set_power_state(pdev, PCI_D0);
6003 pci_restore_state(pdev);
6005 rc = pcim_enable_device(pdev);
6007 dev_printk(KERN_ERR, &pdev->dev,
6008 "failed to enable device after resume (%d)\n", rc);
6012 pci_set_master(pdev);
6016 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
6018 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6021 rc = ata_host_suspend(host, mesg);
6025 ata_pci_device_do_suspend(pdev, mesg);
6030 int ata_pci_device_resume(struct pci_dev *pdev)
6032 struct ata_host *host = dev_get_drvdata(&pdev->dev);
6035 rc = ata_pci_device_do_resume(pdev);
6037 ata_host_resume(host);
6040 #endif /* CONFIG_PCI */
6043 static int __init ata_init(void)
6045 ata_probe_timeout *= HZ;
6046 ata_wq = create_workqueue("ata");
6050 ata_aux_wq = create_singlethread_workqueue("ata_aux");
6052 destroy_workqueue(ata_wq);
6056 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6060 static void __exit ata_exit(void)
6062 destroy_workqueue(ata_wq);
6063 destroy_workqueue(ata_aux_wq);
6066 subsys_initcall(ata_init);
6067 module_exit(ata_exit);
6069 static unsigned long ratelimit_time;
6070 static DEFINE_SPINLOCK(ata_ratelimit_lock);
6072 int ata_ratelimit(void)
6075 unsigned long flags;
6077 spin_lock_irqsave(&ata_ratelimit_lock, flags);
6079 if (time_after(jiffies, ratelimit_time)) {
6081 ratelimit_time = jiffies + (HZ/5);
6085 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
6091 * ata_wait_register - wait until register value changes
6092 * @reg: IO-mapped register
6093 * @mask: Mask to apply to read register value
6094 * @val: Wait condition
6095 * @interval_msec: polling interval in milliseconds
6096 * @timeout_msec: timeout in milliseconds
6098 * Waiting for some bits of register to change is a common
6099 * operation for ATA controllers. This function reads 32bit LE
6100 * IO-mapped register @reg and tests for the following condition.
6102 * (*@reg & mask) != val
6104 * If the condition is met, it returns; otherwise, the process is
6105 * repeated after @interval_msec until timeout.
6108 * Kernel thread context (may sleep)
6111 * The final register value.
6113 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
6114 unsigned long interval_msec,
6115 unsigned long timeout_msec)
6117 unsigned long timeout;
6120 tmp = ioread32(reg);
6122 /* Calculate timeout _after_ the first read to make sure
6123 * preceding writes reach the controller before starting to
6124 * eat away the timeout.
6126 timeout = jiffies + (timeout_msec * HZ) / 1000;
6128 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
6129 msleep(interval_msec);
6130 tmp = ioread32(reg);
6139 static void ata_dummy_noret(struct ata_port *ap) { }
6140 static int ata_dummy_ret0(struct ata_port *ap) { return 0; }
6141 static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { }
6143 static u8 ata_dummy_check_status(struct ata_port *ap)
6148 static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
6150 return AC_ERR_SYSTEM;
6153 const struct ata_port_operations ata_dummy_port_ops = {
6154 .port_disable = ata_port_disable,
6155 .check_status = ata_dummy_check_status,
6156 .check_altstatus = ata_dummy_check_status,
6157 .dev_select = ata_noop_dev_select,
6158 .qc_prep = ata_noop_qc_prep,
6159 .qc_issue = ata_dummy_qc_issue,
6160 .freeze = ata_dummy_noret,
6161 .thaw = ata_dummy_noret,
6162 .error_handler = ata_dummy_noret,
6163 .post_internal_cmd = ata_dummy_qc_noret,
6164 .irq_clear = ata_dummy_noret,
6165 .port_start = ata_dummy_ret0,
6166 .port_stop = ata_dummy_noret,
6170 * libata is essentially a library of internal helper functions for
6171 * low-level ATA host controller drivers. As such, the API/ABI is
6172 * likely to change as new drivers are added and updated.
6173 * Do not depend on ABI/API stability.
6176 EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6177 EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6178 EXPORT_SYMBOL_GPL(sata_deb_timing_long);
6179 EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
6180 EXPORT_SYMBOL_GPL(ata_std_bios_param);
6181 EXPORT_SYMBOL_GPL(ata_std_ports);
6182 EXPORT_SYMBOL_GPL(ata_host_init);
6183 EXPORT_SYMBOL_GPL(ata_device_add);
6184 EXPORT_SYMBOL_GPL(ata_host_detach);
6185 EXPORT_SYMBOL_GPL(ata_sg_init);
6186 EXPORT_SYMBOL_GPL(ata_sg_init_one);
6187 EXPORT_SYMBOL_GPL(ata_hsm_move);
6188 EXPORT_SYMBOL_GPL(ata_qc_complete);
6189 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
6190 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
6191 EXPORT_SYMBOL_GPL(ata_tf_load);
6192 EXPORT_SYMBOL_GPL(ata_tf_read);
6193 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
6194 EXPORT_SYMBOL_GPL(ata_std_dev_select);
6195 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6196 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6197 EXPORT_SYMBOL_GPL(ata_check_status);
6198 EXPORT_SYMBOL_GPL(ata_altstatus);
6199 EXPORT_SYMBOL_GPL(ata_exec_command);
6200 EXPORT_SYMBOL_GPL(ata_port_start);
6201 EXPORT_SYMBOL_GPL(ata_interrupt);
6202 EXPORT_SYMBOL_GPL(ata_data_xfer);
6203 EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);
6204 EXPORT_SYMBOL_GPL(ata_qc_prep);
6205 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
6206 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
6207 EXPORT_SYMBOL_GPL(ata_bmdma_start);
6208 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
6209 EXPORT_SYMBOL_GPL(ata_bmdma_status);
6210 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
6211 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
6212 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
6213 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
6214 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
6215 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
6216 EXPORT_SYMBOL_GPL(ata_port_probe);
6217 EXPORT_SYMBOL_GPL(sata_set_spd);
6218 EXPORT_SYMBOL_GPL(sata_phy_debounce);
6219 EXPORT_SYMBOL_GPL(sata_phy_resume);
6220 EXPORT_SYMBOL_GPL(sata_phy_reset);
6221 EXPORT_SYMBOL_GPL(__sata_phy_reset);
6222 EXPORT_SYMBOL_GPL(ata_bus_reset);
6223 EXPORT_SYMBOL_GPL(ata_std_prereset);
6224 EXPORT_SYMBOL_GPL(ata_std_softreset);
6225 EXPORT_SYMBOL_GPL(sata_port_hardreset);
6226 EXPORT_SYMBOL_GPL(sata_std_hardreset);
6227 EXPORT_SYMBOL_GPL(ata_std_postreset);
6228 EXPORT_SYMBOL_GPL(ata_dev_classify);
6229 EXPORT_SYMBOL_GPL(ata_dev_pair);
6230 EXPORT_SYMBOL_GPL(ata_port_disable);
6231 EXPORT_SYMBOL_GPL(ata_ratelimit);
6232 EXPORT_SYMBOL_GPL(ata_wait_register);
6233 EXPORT_SYMBOL_GPL(ata_busy_sleep);
6234 EXPORT_SYMBOL_GPL(ata_port_queue_task);
6235 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
6236 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
6237 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
6238 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
6239 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
6240 EXPORT_SYMBOL_GPL(ata_host_intr);
6241 EXPORT_SYMBOL_GPL(sata_scr_valid);
6242 EXPORT_SYMBOL_GPL(sata_scr_read);
6243 EXPORT_SYMBOL_GPL(sata_scr_write);
6244 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
6245 EXPORT_SYMBOL_GPL(ata_port_online);
6246 EXPORT_SYMBOL_GPL(ata_port_offline);
6247 EXPORT_SYMBOL_GPL(ata_host_suspend);
6248 EXPORT_SYMBOL_GPL(ata_host_resume);
6249 EXPORT_SYMBOL_GPL(ata_id_string);
6250 EXPORT_SYMBOL_GPL(ata_id_c_string);
6251 EXPORT_SYMBOL_GPL(ata_device_blacklisted);
6252 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6254 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6255 EXPORT_SYMBOL_GPL(ata_timing_compute);
6256 EXPORT_SYMBOL_GPL(ata_timing_merge);
6259 EXPORT_SYMBOL_GPL(pci_test_config_bits);
6260 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6261 EXPORT_SYMBOL_GPL(ata_pci_init_one);
6262 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6263 EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6264 EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6265 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6266 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6267 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6268 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6269 #endif /* CONFIG_PCI */
6271 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6272 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6274 EXPORT_SYMBOL_GPL(ata_eng_timeout);
6275 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6276 EXPORT_SYMBOL_GPL(ata_port_abort);
6277 EXPORT_SYMBOL_GPL(ata_port_freeze);
6278 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6279 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6280 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6281 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6282 EXPORT_SYMBOL_GPL(ata_do_eh);
6283 EXPORT_SYMBOL_GPL(ata_irq_on);
6284 EXPORT_SYMBOL_GPL(ata_dummy_irq_on);
6285 EXPORT_SYMBOL_GPL(ata_irq_ack);
6286 EXPORT_SYMBOL_GPL(ata_dummy_irq_ack);