2 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
4 * This is an 64bit optimized version that always keeps the full mmconfig
5 * space mapped. This allows lockless config space operation.
9 #include <linux/init.h>
10 #include <linux/acpi.h>
11 #include <linux/bitmap.h>
16 #define MMCONFIG_APER_SIZE (256*1024*1024)
17 /* Verify the first 16 busses. We assume that systems with more busses
19 #define MAX_CHECK_BUS 16
21 static DECLARE_BITMAP(fallback_slots, 32*MAX_CHECK_BUS);
23 /* Static virtual mapping of the MMCONFIG aperture */
25 struct acpi_table_mcfg_config *cfg;
28 static struct mmcfg_virt *pci_mmcfg_virt;
30 static char __iomem *get_virt(unsigned int seg, unsigned bus)
33 struct acpi_table_mcfg_config *cfg;
37 if (cfg_num >= pci_mmcfg_config_num)
39 cfg = pci_mmcfg_virt[cfg_num].cfg;
40 if (cfg->pci_segment_group_number != seg)
42 if ((cfg->start_bus_number <= bus) &&
43 (cfg->end_bus_number >= bus))
44 return pci_mmcfg_virt[cfg_num].virt;
47 /* Handle more broken MCFG tables on Asus etc.
48 They only contain a single entry for bus 0-0. Assume
49 this applies to all busses. */
50 cfg = &pci_mmcfg_config[0];
51 if (pci_mmcfg_config_num == 1 &&
52 cfg->pci_segment_group_number == 0 &&
53 (cfg->start_bus_number | cfg->end_bus_number) == 0)
54 return pci_mmcfg_virt[0].virt;
56 /* Fall back to type 0 */
60 static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
63 if (seg == 0 && bus < MAX_CHECK_BUS &&
64 test_bit(32*bus + PCI_SLOT(devfn), fallback_slots))
66 addr = get_virt(seg, bus);
69 return addr + ((bus << 20) | (devfn << 12));
72 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
73 unsigned int devfn, int reg, int len, u32 *value)
77 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
78 if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095)))
81 addr = pci_dev_base(seg, bus, devfn);
83 return pci_conf1_read(seg,bus,devfn,reg,len,value);
87 *value = readb(addr + reg);
90 *value = readw(addr + reg);
93 *value = readl(addr + reg);
100 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
101 unsigned int devfn, int reg, int len, u32 value)
105 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
106 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
109 addr = pci_dev_base(seg, bus, devfn);
111 return pci_conf1_write(seg,bus,devfn,reg,len,value);
115 writeb(value, addr + reg);
118 writew(value, addr + reg);
121 writel(value, addr + reg);
128 static struct pci_raw_ops pci_mmcfg = {
129 .read = pci_mmcfg_read,
130 .write = pci_mmcfg_write,
133 /* K8 systems have some devices (typically in the builtin northbridge)
134 that are only accessible using type1
135 Normally this can be expressed in the MCFG by not listing them
136 and assigning suitable _SEGs, but this isn't implemented in some BIOS.
137 Instead try to discover all devices on bus 0 that are unreachable using MM
138 and fallback for them. */
139 static __init void unreachable_devices(void)
142 /* Use the max bus number from ACPI here? */
143 for (k = 0; i < MAX_CHECK_BUS; k++) {
144 for (i = 0; i < 32; i++) {
148 pci_conf1_read(0, k, PCI_DEVFN(i,0), 0, 4, &val1);
149 if (val1 == 0xffffffff)
151 addr = pci_dev_base(0, k, PCI_DEVFN(i, 0));
152 if (addr == NULL|| readl(addr) != val1) {
153 set_bit(i + 32*k, fallback_slots);
155 "PCI: No mmconfig possible on device %x:%x\n",
162 void __init pci_mmcfg_init(void)
166 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
169 acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
170 if ((pci_mmcfg_config_num == 0) ||
171 (pci_mmcfg_config == NULL) ||
172 (pci_mmcfg_config[0].base_address == 0))
175 if (!e820_all_mapped(pci_mmcfg_config[0].base_address,
176 pci_mmcfg_config[0].base_address + MMCONFIG_APER_SIZE,
178 printk(KERN_ERR "PCI: BIOS Bug: MCFG area is not E820-reserved\n");
179 printk(KERN_ERR "PCI: Not using MMCONFIG.\n");
183 /* RED-PEN i386 doesn't do _nocache right now */
184 pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL);
185 if (pci_mmcfg_virt == NULL) {
186 printk("PCI: Can not allocate memory for mmconfig structures\n");
189 for (i = 0; i < pci_mmcfg_config_num; ++i) {
190 pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
191 pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, MMCONFIG_APER_SIZE);
192 if (!pci_mmcfg_virt[i].virt) {
193 printk("PCI: Cannot map mmconfig aperture for segment %d\n",
194 pci_mmcfg_config[i].pci_segment_group_number);
197 printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address);
200 unreachable_devices();
202 raw_pci_ops = &pci_mmcfg;
203 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;