arch/x86/mm/pageattr.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/slab.h>
  10 #include <linux/mm.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/debugfs.h>
  14 #include <linux/pfn.h>
  15 #include <linux/percpu.h>
  16
  17 #include <asm/e820.h>
  18 #include <asm/processor.h>
  19 #include <asm/tlbflush.h>
  20 #include <asm/sections.h>
  21 #include <asm/setup.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/pgalloc.h>
  24 #include <asm/proto.h>
  25 #include <asm/pat.h>
  26
  27 /*
  28  * The current flushing context - we pass it instead of 5 arguments:
  29  */
  30 struct cpa_data {
  31         unsigned long   *vaddr;
  32         pgprot_t        mask_set;
  33         pgprot_t        mask_clr;
  34         int             numpages;
  35         int             flags;
  36         unsigned long   pfn;
  37         unsigned        force_split : 1;
  38         int             curpage;
  39         struct page     **pages;
  40 };
  41
  42 /*
  43  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  44  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  45  * entries change the page attribute in parallel to some other cpu
  46  * splitting a large page entry along with changing the attribute.
  47  */
  48 static DEFINE_SPINLOCK(cpa_lock);
  49
  50 #define CPA_FLUSHTLB 1
  51 #define CPA_ARRAY 2
  52 #define CPA_PAGES_ARRAY 4
  53
  54 #ifdef CONFIG_PROC_FS
  55 static unsigned long direct_pages_count[PG_LEVEL_NUM];
  56
  57 void update_page_count(int level, unsigned long pages)
  58 {
  59         unsigned long flags;
  60
  61         /* Protect against CPA */
  62         spin_lock_irqsave(&pgd_lock, flags);
  63         direct_pages_count[level] += pages;
  64         spin_unlock_irqrestore(&pgd_lock, flags);
  65 }
  66
  67 static void split_page_count(int level)
  68 {
  69         direct_pages_count[level]--;
  70         direct_pages_count[level - 1] += PTRS_PER_PTE;
  71 }
  72
  73 void arch_report_meminfo(struct seq_file *m)
  74 {
  75         seq_printf(m, "DirectMap4k:    %8lu kB\n",
  76                         direct_pages_count[PG_LEVEL_4K] << 2);
  77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  78         seq_printf(m, "DirectMap2M:    %8lu kB\n",
  79                         direct_pages_count[PG_LEVEL_2M] << 11);
  80 #else
  81         seq_printf(m, "DirectMap4M:    %8lu kB\n",
  82                         direct_pages_count[PG_LEVEL_2M] << 12);
  83 #endif
  84 #ifdef CONFIG_X86_64
  85         if (direct_gbpages)
  86                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
  87                         direct_pages_count[PG_LEVEL_1G] << 20);
  88 #endif
  89 }
  90 #else
  91 static inline void split_page_count(int level) { }
  92 #endif
  93
  94 #ifdef CONFIG_X86_64
  95
  96 static inline unsigned long highmap_start_pfn(void)
  97 {
  98         return __pa(_text) >> PAGE_SHIFT;
  99 }
 100
 101 static inline unsigned long highmap_end_pfn(void)
 102 {
 103         return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
 104 }
 105
 106 #endif
 107
 108 #ifdef CONFIG_DEBUG_PAGEALLOC
 109 # define debug_pagealloc 1
 110 #else
 111 # define debug_pagealloc 0
 112 #endif
 113
 114 static inline int
 115 within(unsigned long addr, unsigned long start, unsigned long end)
 116 {
 117         return addr >= start && addr < end;
 118 }
 119
 120 /*
 121  * Flushing functions
 122  */
 123
 124 /**
 125  * clflush_cache_range - flush a cache range with clflush
 126  * @addr:       virtual start address
 127  * @size:       number of bytes to flush
 128  *
 129  * clflush is an unordered instruction which needs fencing with mfence
 130  * to avoid ordering issues.
 131  */
 132 void clflush_cache_range(void *vaddr, unsigned int size)
 133 {
 134         void *vend = vaddr + size - 1;
 135
 136         mb();
 137
 138         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
 139                 clflush(vaddr);
 140         /*
 141          * Flush any possible final partial cacheline:
 142          */
 143         clflush(vend);
 144
 145         mb();
 146 }
 147
 148 static void __cpa_flush_all(void *arg)
 149 {
 150         unsigned long cache = (unsigned long)arg;
 151
 152         /*
 153          * Flush all to work around Errata in early athlons regarding
 154          * large page flushing.
 155          */
 156         __flush_tlb_all();
 157
 158         if (cache && boot_cpu_data.x86 >= 4)
 159                 wbinvd();
 160 }
 161
 162 static void cpa_flush_all(unsigned long cache)
 163 {
 164         BUG_ON(irqs_disabled());
 165
 166         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 167 }
 168
 169 static void __cpa_flush_range(void *arg)
 170 {
 171         /*
 172          * We could optimize that further and do individual per page
 173          * tlb invalidates for a low number of pages. Caveat: we must
 174          * flush the high aliases on 64bit as well.
 175          */
 176         __flush_tlb_all();
 177 }
 178
 179 static void cpa_flush_range(unsigned long start, int numpages, int cache)
 180 {
 181         unsigned int i, level;
 182         unsigned long addr;
 183
 184         BUG_ON(irqs_disabled());
 185         WARN_ON(PAGE_ALIGN(start) != start);
 186
 187         on_each_cpu(__cpa_flush_range, NULL, 1);
 188
 189         if (!cache)
 190                 return;
 191
 192         /*
 193          * We only need to flush on one CPU,
 194          * clflush is a MESI-coherent instruction that
 195          * will cause all other CPUs to flush the same
 196          * cachelines:
 197          */
 198         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 199                 pte_t *pte = lookup_address(addr, &level);
 200
 201                 /*
 202                  * Only flush present addresses:
 203                  */
 204                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 205                         clflush_cache_range((void *) addr, PAGE_SIZE);
 206         }
 207 }
 208
 209 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
 210                             int in_flags, struct page **pages)
 211 {
 212         unsigned int i, level;
 213         unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
 214
 215         BUG_ON(irqs_disabled());
 216
 217         on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
 218
 219         if (!cache || do_wbinvd)
 220                 return;
 221
 222         /*
 223          * We only need to flush on one CPU,
 224          * clflush is a MESI-coherent instruction that
 225          * will cause all other CPUs to flush the same
 226          * cachelines:
 227          */
 228         for (i = 0; i < numpages; i++) {
 229                 unsigned long addr;
 230                 pte_t *pte;
 231
 232                 if (in_flags & CPA_PAGES_ARRAY)
 233                         addr = (unsigned long)page_address(pages[i]);
 234                 else
 235                         addr = start[i];
 236
 237                 pte = lookup_address(addr, &level);
 238
 239                 /*
 240                  * Only flush present addresses:
 241                  */
 242                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 243                         clflush_cache_range((void *)addr, PAGE_SIZE);
 244         }
 245 }
 246
 247 /*
 248  * Certain areas of memory on x86 require very specific protection flags,
 249  * for example the BIOS area or kernel text. Callers don't always get this
 250  * right (again, ioremap() on BIOS memory is not uncommon) so this function
 251  * checks and fixes these known static required protection bits.
 252  */
 253 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
 254                                    unsigned long pfn)
 255 {
 256         pgprot_t forbidden = __pgprot(0);
 257
 258         /*
 259          * The BIOS area between 640k and 1Mb needs to be executable for
 260          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 261          */
 262         if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
 263                 pgprot_val(forbidden) |= _PAGE_NX;
 264
 265         /*
 266          * The kernel text needs to be executable for obvious reasons
 267          * Does not cover __inittext since that is gone later on. On
 268          * 64bit we do not enforce !NX on the low mapping
 269          */
 270         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 271                 pgprot_val(forbidden) |= _PAGE_NX;
 272
 273         /*
 274          * The .rodata section needs to be read-only. Using the pfn
 275          * catches all aliases.
 276          */
 277         if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
 278                    __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
 279                 pgprot_val(forbidden) |= _PAGE_RW;
 280
 281         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 282
 283         return prot;
 284 }
 285
 286 /*
 287  * Lookup the page table entry for a virtual address. Return a pointer
 288  * to the entry and the level of the mapping.
 289  *
 290  * Note: We return pud and pmd either when the entry is marked large
 291  * or when the present bit is not set. Otherwise we would return a
 292  * pointer to a nonexisting mapping.
 293  */
 294 pte_t *lookup_address(unsigned long address, unsigned int *level)
 295 {
 296         pgd_t *pgd = pgd_offset_k(address);
 297         pud_t *pud;
 298         pmd_t *pmd;
 299
 300         *level = PG_LEVEL_NONE;
 301
 302         if (pgd_none(*pgd))
 303                 return NULL;
 304
 305         pud = pud_offset(pgd, address);
 306         if (pud_none(*pud))
 307                 return NULL;
 308
 309         *level = PG_LEVEL_1G;
 310         if (pud_large(*pud) || !pud_present(*pud))
 311                 return (pte_t *)pud;
 312
 313         pmd = pmd_offset(pud, address);
 314         if (pmd_none(*pmd))
 315                 return NULL;
 316
 317         *level = PG_LEVEL_2M;
 318         if (pmd_large(*pmd) || !pmd_present(*pmd))
 319                 return (pte_t *)pmd;
 320
 321         *level = PG_LEVEL_4K;
 322
 323         return pte_offset_kernel(pmd, address);
 324 }
 325 EXPORT_SYMBOL_GPL(lookup_address);
 326
 327 /*
 328  * Set the new pmd in all the pgds we know about:
 329  */
 330 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 331 {
 332         /* change init_mm */
 333         set_pte_atomic(kpte, pte);
 334 #ifdef CONFIG_X86_32
 335         if (!SHARED_KERNEL_PMD) {
 336                 struct page *page;
 337
 338                 list_for_each_entry(page, &pgd_list, lru) {
 339                         pgd_t *pgd;
 340                         pud_t *pud;
 341                         pmd_t *pmd;
 342
 343                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 344                         pud = pud_offset(pgd, address);
 345                         pmd = pmd_offset(pud, address);
 346                         set_pte_atomic((pte_t *)pmd, pte);
 347                 }
 348         }
 349 #endif
 350 }
 351
 352 static int
 353 try_preserve_large_page(pte_t *kpte, unsigned long address,
 354                         struct cpa_data *cpa)
 355 {
 356         unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
 357         pte_t new_pte, old_pte, *tmp;
 358         pgprot_t old_prot, new_prot;
 359         int i, do_split = 1;
 360         unsigned int level;
 361
 362         if (cpa->force_split)
 363                 return 1;
 364
 365         spin_lock_irqsave(&pgd_lock, flags);
 366         /*
 367          * Check for races, another CPU might have split this page
 368          * up already:
 369          */
 370         tmp = lookup_address(address, &level);
 371         if (tmp != kpte)
 372                 goto out_unlock;
 373
 374         switch (level) {
 375         case PG_LEVEL_2M:
 376                 psize = PMD_PAGE_SIZE;
 377                 pmask = PMD_PAGE_MASK;
 378                 break;
 379 #ifdef CONFIG_X86_64
 380         case PG_LEVEL_1G:
 381                 psize = PUD_PAGE_SIZE;
 382                 pmask = PUD_PAGE_MASK;
 383                 break;
 384 #endif
 385         default:
 386                 do_split = -EINVAL;
 387                 goto out_unlock;
 388         }
 389
 390         /*
 391          * Calculate the number of pages, which fit into this large
 392          * page starting at address:
 393          */
 394         nextpage_addr = (address + psize) & pmask;
 395         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
 396         if (numpages < cpa->numpages)
 397                 cpa->numpages = numpages;
 398
 399         /*
 400          * We are safe now. Check whether the new pgprot is the same:
 401          */
 402         old_pte = *kpte;
 403         old_prot = new_prot = pte_pgprot(old_pte);
 404
 405         pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
 406         pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
 407
 408         /*
 409          * old_pte points to the large page base address. So we need
 410          * to add the offset of the virtual address:
 411          */
 412         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
 413         cpa->pfn = pfn;
 414
 415         new_prot = static_protections(new_prot, address, pfn);
 416
 417         /*
 418          * We need to check the full range, whether
 419          * static_protection() requires a different pgprot for one of
 420          * the pages in the range we try to preserve:
 421          */
 422         addr = address + PAGE_SIZE;
 423         pfn++;
 424         for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
 425                 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
 426
 427                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
 428                         goto out_unlock;
 429         }
 430
 431         /*
 432          * If there are no changes, return. maxpages has been updated
 433          * above:
 434          */
 435         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
 436                 do_split = 0;
 437                 goto out_unlock;
 438         }
 439
 440         /*
 441          * We need to change the attributes. Check, whether we can
 442          * change the large page in one go. We request a split, when
 443          * the address is not aligned and the number of pages is
 444          * smaller than the number of pages in the large page. Note
 445          * that we limited the number of possible pages already to
 446          * the number of pages in the large page.
 447          */
 448         if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
 449                 /*
 450                  * The address is aligned and the number of pages
 451                  * covers the full page.
 452                  */
 453                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
 454                 __set_pmd_pte(kpte, address, new_pte);
 455                 cpa->flags |= CPA_FLUSHTLB;
 456                 do_split = 0;
 457         }
 458
 459 out_unlock:
 460         spin_unlock_irqrestore(&pgd_lock, flags);
 461
 462         return do_split;
 463 }
 464
 465 static int split_large_page(pte_t *kpte, unsigned long address)
 466 {
 467         unsigned long flags, pfn, pfninc = 1;
 468         unsigned int i, level;
 469         pte_t *pbase, *tmp;
 470         pgprot_t ref_prot;
 471         struct page *base;
 472
 473         if (!debug_pagealloc)
 474                 spin_unlock(&cpa_lock);
 475         base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
 476         if (!debug_pagealloc)
 477                 spin_lock(&cpa_lock);
 478         if (!base)
 479                 return -ENOMEM;
 480
 481         spin_lock_irqsave(&pgd_lock, flags);
 482         /*
 483          * Check for races, another CPU might have split this page
 484          * up for us already:
 485          */
 486         tmp = lookup_address(address, &level);
 487         if (tmp != kpte)
 488                 goto out_unlock;
 489
 490         pbase = (pte_t *)page_address(base);
 491         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
 492         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 493         /*
 494          * If we ever want to utilize the PAT bit, we need to
 495          * update this function to make sure it's converted from
 496          * bit 12 to bit 7 when we cross from the 2MB level to
 497          * the 4K level:
 498          */
 499         WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
 500
 501 #ifdef CONFIG_X86_64
 502         if (level == PG_LEVEL_1G) {
 503                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
 504                 pgprot_val(ref_prot) |= _PAGE_PSE;
 505         }
 506 #endif
 507
 508         /*
 509          * Get the target pfn from the original entry:
 510          */
 511         pfn = pte_pfn(*kpte);
 512         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
 513                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
 514
 515         if (address >= (unsigned long)__va(0) &&
 516                 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
 517                 split_page_count(level);
 518
 519 #ifdef CONFIG_X86_64
 520         if (address >= (unsigned long)__va(1UL<<32) &&
 521                 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
 522                 split_page_count(level);
 523 #endif
 524
 525         /*
 526          * Install the new, split up pagetable.
 527          *
 528          * We use the standard kernel pagetable protections for the new
 529          * pagetable protections, the actual ptes set above control the
 530          * primary protection behavior:
 531          */
 532         __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
 533
 534         /*
 535          * Intel Atom errata AAH41 workaround.
 536          *
 537          * The real fix should be in hw or in a microcode update, but
 538          * we also probabilistically try to reduce the window of having
 539          * a large TLB mixed with 4K TLBs while instruction fetches are
 540          * going on.
 541          */
 542         __flush_tlb_all();
 543
 544         base = NULL;
 545
 546 out_unlock:
 547         /*
 548          * If we dropped out via the lookup_address check under
 549          * pgd_lock then stick the page back into the pool:
 550          */
 551         if (base)
 552                 __free_page(base);
 553         spin_unlock_irqrestore(&pgd_lock, flags);
 554
 555         return 0;
 556 }
 557
 558 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
 559                                int primary)
 560 {
 561         /*
 562          * Ignore all non primary paths.
 563          */
 564         if (!primary)
 565                 return 0;
 566
 567         /*
 568          * Ignore the NULL PTE for kernel identity mapping, as it is expected
 569          * to have holes.
 570          * Also set numpages to '1' indicating that we processed cpa req for
 571          * one virtual address page and its pfn. TBD: numpages can be set based
 572          * on the initial value and the level returned by lookup_address().
 573          */
 574         if (within(vaddr, PAGE_OFFSET,
 575                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
 576                 cpa->numpages = 1;
 577                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
 578                 return 0;
 579         } else {
 580                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
 581                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
 582                         *cpa->vaddr);
 583
 584                 return -EFAULT;
 585         }
 586 }
 587
 588 static int __change_page_attr(struct cpa_data *cpa, int primary)
 589 {
 590         unsigned long address;
 591         int do_split, err;
 592         unsigned int level;
 593         pte_t *kpte, old_pte;
 594
 595         if (cpa->flags & CPA_PAGES_ARRAY) {
 596                 struct page *page = cpa->pages[cpa->curpage];
 597                 if (unlikely(PageHighMem(page)))
 598                         return 0;
 599                 address = (unsigned long)page_address(page);
 600         } else if (cpa->flags & CPA_ARRAY)
 601                 address = cpa->vaddr[cpa->curpage];
 602         else
 603                 address = *cpa->vaddr;
 604 repeat:
 605         kpte = lookup_address(address, &level);
 606         if (!kpte)
 607                 return __cpa_process_fault(cpa, address, primary);
 608
 609         old_pte = *kpte;
 610         if (!pte_val(old_pte))
 611                 return __cpa_process_fault(cpa, address, primary);
 612
 613         if (level == PG_LEVEL_4K) {
 614                 pte_t new_pte;
 615                 pgprot_t new_prot = pte_pgprot(old_pte);
 616                 unsigned long pfn = pte_pfn(old_pte);
 617
 618                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
 619                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
 620
 621                 new_prot = static_protections(new_prot, address, pfn);
 622
 623                 /*
 624                  * We need to keep the pfn from the existing PTE,
 625                  * after all we're only going to change it's attributes
 626                  * not the memory it points to
 627                  */
 628                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
 629                 cpa->pfn = pfn;
 630                 /*
 631                  * Do we really change anything ?
 632                  */
 633                 if (pte_val(old_pte) != pte_val(new_pte)) {
 634                         set_pte_atomic(kpte, new_pte);
 635                         cpa->flags |= CPA_FLUSHTLB;
 636                 }
 637                 cpa->numpages = 1;
 638                 return 0;
 639         }
 640
 641         /*
 642          * Check, whether we can keep the large page intact
 643          * and just change the pte:
 644          */
 645         do_split = try_preserve_large_page(kpte, address, cpa);
 646         /*
 647          * When the range fits into the existing large page,
 648          * return. cp->numpages and cpa->tlbflush have been updated in
 649          * try_large_page:
 650          */
 651         if (do_split <= 0)
 652                 return do_split;
 653
 654         /*
 655          * We have to split the large page:
 656          */
 657         err = split_large_page(kpte, address);
 658         if (!err) {
 659                 /*
 660                  * Do a global flush tlb after splitting the large page
 661                  * and before we do the actual change page attribute in the PTE.
 662                  *
 663                  * With out this, we violate the TLB application note, that says
 664                  * "The TLBs may contain both ordinary and large-page
 665                  *  translations for a 4-KByte range of linear addresses. This
 666                  *  may occur if software modifies the paging structures so that
 667                  *  the page size used for the address range changes. If the two
 668                  *  translations differ with respect to page frame or attributes
 669                  *  (e.g., permissions), processor behavior is undefined and may
 670                  *  be implementation-specific."
 671                  *
 672                  * We do this global tlb flush inside the cpa_lock, so that we
 673                  * don't allow any other cpu, with stale tlb entries change the
 674                  * page attribute in parallel, that also falls into the
 675                  * just split large page entry.
 676                  */
 677                 flush_tlb_all();
 678                 goto repeat;
 679         }
 680
 681         return err;
 682 }
 683
 684 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
 685
 686 static int cpa_process_alias(struct cpa_data *cpa)
 687 {
 688         struct cpa_data alias_cpa;
 689         unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
 690         unsigned long vaddr;
 691         int ret;
 692
 693         if (cpa->pfn >= max_pfn_mapped)
 694                 return 0;
 695
 696 #ifdef CONFIG_X86_64
 697         if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
 698                 return 0;
 699 #endif
 700         /*
 701          * No need to redo, when the primary call touched the direct
 702          * mapping already:
 703          */
 704         if (cpa->flags & CPA_PAGES_ARRAY) {
 705                 struct page *page = cpa->pages[cpa->curpage];
 706                 if (unlikely(PageHighMem(page)))
 707                         return 0;
 708                 vaddr = (unsigned long)page_address(page);
 709         } else if (cpa->flags & CPA_ARRAY)
 710                 vaddr = cpa->vaddr[cpa->curpage];
 711         else
 712                 vaddr = *cpa->vaddr;
 713
 714         if (!(within(vaddr, PAGE_OFFSET,
 715                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
 716
 717                 alias_cpa = *cpa;
 718                 alias_cpa.vaddr = &laddr;
 719                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 720
 721                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
 722                 if (ret)
 723                         return ret;
 724         }
 725
 726 #ifdef CONFIG_X86_64
 727         /*
 728          * If the primary call didn't touch the high mapping already
 729          * and the physical address is inside the kernel map, we need
 730          * to touch the high mapped kernel as well:
 731          */
 732         if (!within(vaddr, (unsigned long)_text, _brk_end) &&
 733             within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
 734                 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
 735                                                __START_KERNEL_map - phys_base;
 736                 alias_cpa = *cpa;
 737                 alias_cpa.vaddr = &temp_cpa_vaddr;
 738                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 739
 740                 /*
 741                  * The high mapping range is imprecise, so ignore the
 742                  * return value.
 743                  */
 744                 __change_page_attr_set_clr(&alias_cpa, 0);
 745         }
 746 #endif
 747
 748         return 0;
 749 }
 750
 751 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
 752 {
 753         int ret, numpages = cpa->numpages;
 754
 755         while (numpages) {
 756                 /*
 757                  * Store the remaining nr of pages for the large page
 758                  * preservation check.
 759                  */
 760                 cpa->numpages = numpages;
 761                 /* for array changes, we can't use large page */
 762                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
 763                         cpa->numpages = 1;
 764
 765                 if (!debug_pagealloc)
 766                         spin_lock(&cpa_lock);
 767                 ret = __change_page_attr(cpa, checkalias);
 768                 if (!debug_pagealloc)
 769                         spin_unlock(&cpa_lock);
 770                 if (ret)
 771                         return ret;
 772
 773                 if (checkalias) {
 774                         ret = cpa_process_alias(cpa);
 775                         if (ret)
 776                                 return ret;
 777                 }
 778
 779                 /*
 780                  * Adjust the number of pages with the result of the
 781                  * CPA operation. Either a large page has been
 782                  * preserved or a single page update happened.
 783                  */
 784                 BUG_ON(cpa->numpages > numpages);
 785                 numpages -= cpa->numpages;
 786                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
 787                         cpa->curpage++;
 788                 else
 789                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
 790
 791         }
 792         return 0;
 793 }
 794
 795 static inline int cache_attr(pgprot_t attr)
 796 {
 797         return pgprot_val(attr) &
 798                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
 799 }
 800
 801 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 802                                     pgprot_t mask_set, pgprot_t mask_clr,
 803                                     int force_split, int in_flag,
 804                                     struct page **pages)
 805 {
 806         struct cpa_data cpa;
 807         int ret, cache, checkalias;
 808         unsigned long baddr = 0;
 809
 810         /*
 811          * Check, if we are requested to change a not supported
 812          * feature:
 813          */
 814         mask_set = canon_pgprot(mask_set);
 815         mask_clr = canon_pgprot(mask_clr);
 816         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
 817                 return 0;
 818
 819         /* Ensure we are PAGE_SIZE aligned */
 820         if (in_flag & CPA_ARRAY) {
 821                 int i;
 822                 for (i = 0; i < numpages; i++) {
 823                         if (addr[i] & ~PAGE_MASK) {
 824                                 addr[i] &= PAGE_MASK;
 825                                 WARN_ON_ONCE(1);
 826                         }
 827                 }
 828         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
 829                 /*
 830                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
 831                  * No need to cehck in that case
 832                  */
 833                 if (*addr & ~PAGE_MASK) {
 834                         *addr &= PAGE_MASK;
 835                         /*
 836                          * People should not be passing in unaligned addresses:
 837                          */
 838                         WARN_ON_ONCE(1);
 839                 }
 840                 /*
 841                  * Save address for cache flush. *addr is modified in the call
 842                  * to __change_page_attr_set_clr() below.
 843                  */
 844                 baddr = *addr;
 845         }
 846
 847         /* Must avoid aliasing mappings in the highmem code */
 848         kmap_flush_unused();
 849
 850         vm_unmap_aliases();
 851
 852         cpa.vaddr = addr;
 853         cpa.pages = pages;
 854         cpa.numpages = numpages;
 855         cpa.mask_set = mask_set;
 856         cpa.mask_clr = mask_clr;
 857         cpa.flags = 0;
 858         cpa.curpage = 0;
 859         cpa.force_split = force_split;
 860
 861         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
 862                 cpa.flags |= in_flag;
 863
 864         /* No alias checking for _NX bit modifications */
 865         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
 866
 867         ret = __change_page_attr_set_clr(&cpa, checkalias);
 868
 869         /*
 870          * Check whether we really changed something:
 871          */
 872         if (!(cpa.flags & CPA_FLUSHTLB))
 873                 goto out;
 874
 875         /*
 876          * No need to flush, when we did not set any of the caching
 877          * attributes:
 878          */
 879         cache = cache_attr(mask_set);
 880
 881         /*
 882          * On success we use clflush, when the CPU supports it to
 883          * avoid the wbindv. If the CPU does not support it and in the
 884          * error case we fall back to cpa_flush_all (which uses
 885          * wbindv):
 886          */
 887         if (!ret && cpu_has_clflush) {
 888                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
 889                         cpa_flush_array(addr, numpages, cache,
 890                                         cpa.flags, pages);
 891                 } else
 892                         cpa_flush_range(baddr, numpages, cache);
 893         } else
 894                 cpa_flush_all(cache);
 895
 896 out:
 897         return ret;
 898 }
 899
 900 static inline int change_page_attr_set(unsigned long *addr, int numpages,
 901                                        pgprot_t mask, int array)
 902 {
 903         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
 904                 (array ? CPA_ARRAY : 0), NULL);
 905 }
 906
 907 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
 908                                          pgprot_t mask, int array)
 909 {
 910         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
 911                 (array ? CPA_ARRAY : 0), NULL);
 912 }
 913
 914 static inline int cpa_set_pages_array(struct page **pages, int numpages,
 915                                        pgprot_t mask)
 916 {
 917         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
 918                 CPA_PAGES_ARRAY, pages);
 919 }
 920
 921 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
 922                                          pgprot_t mask)
 923 {
 924         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
 925                 CPA_PAGES_ARRAY, pages);
 926 }
 927
 928 int _set_memory_uc(unsigned long addr, int numpages)
 929 {
 930         /*
 931          * for now UC MINUS. see comments in ioremap_nocache()
 932          */
 933         return change_page_attr_set(&addr, numpages,
 934                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
 935 }
 936
 937 int set_memory_uc(unsigned long addr, int numpages)
 938 {
 939         int ret;
 940
 941         /*
 942          * for now UC MINUS. see comments in ioremap_nocache()
 943          */
 944         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
 945                             _PAGE_CACHE_UC_MINUS, NULL);
 946         if (ret)
 947                 goto out_err;
 948
 949         ret = _set_memory_uc(addr, numpages);
 950         if (ret)
 951                 goto out_free;
 952
 953         return 0;
 954
 955 out_free:
 956         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
 957 out_err:
 958         return ret;
 959 }
 960 EXPORT_SYMBOL(set_memory_uc);
 961
 962 int set_memory_array_uc(unsigned long *addr, int addrinarray)
 963 {
 964         int i, j;
 965         int ret;
 966
 967         /*
 968          * for now UC MINUS. see comments in ioremap_nocache()
 969          */
 970         for (i = 0; i < addrinarray; i++) {
 971                 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
 972                                         _PAGE_CACHE_UC_MINUS, NULL);
 973                 if (ret)
 974                         goto out_free;
 975         }
 976
 977         ret = change_page_attr_set(addr, addrinarray,
 978                                     __pgprot(_PAGE_CACHE_UC_MINUS), 1);
 979         if (ret)
 980                 goto out_free;
 981
 982         return 0;
 983
 984 out_free:
 985         for (j = 0; j < i; j++)
 986                 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
 987
 988         return ret;
 989 }
 990 EXPORT_SYMBOL(set_memory_array_uc);
 991
 992 int _set_memory_wc(unsigned long addr, int numpages)
 993 {
 994         int ret;
 995         unsigned long addr_copy = addr;
 996
 997         ret = change_page_attr_set(&addr, numpages,
 998                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
 999         if (!ret) {
1000                 ret = change_page_attr_set_clr(&addr_copy, numpages,
1001                                                __pgprot(_PAGE_CACHE_WC),
1002                                                __pgprot(_PAGE_CACHE_MASK),
1003                                                0, 0, NULL);
1004         }
1005         return ret;
1006 }
1007
1008 int set_memory_wc(unsigned long addr, int numpages)
1009 {
1010         int ret;
1011
1012         if (!pat_enabled)
1013                 return set_memory_uc(addr, numpages);
1014
1015         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1016                 _PAGE_CACHE_WC, NULL);
1017         if (ret)
1018                 goto out_err;
1019
1020         ret = _set_memory_wc(addr, numpages);
1021         if (ret)
1022                 goto out_free;
1023
1024         return 0;
1025
1026 out_free:
1027         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1028 out_err:
1029         return ret;
1030 }
1031 EXPORT_SYMBOL(set_memory_wc);
1032
1033 int _set_memory_wb(unsigned long addr, int numpages)
1034 {
1035         return change_page_attr_clear(&addr, numpages,
1036                                       __pgprot(_PAGE_CACHE_MASK), 0);
1037 }
1038
1039 int set_memory_wb(unsigned long addr, int numpages)
1040 {
1041         int ret;
1042
1043         ret = _set_memory_wb(addr, numpages);
1044         if (ret)
1045                 return ret;
1046
1047         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1048         return 0;
1049 }
1050 EXPORT_SYMBOL(set_memory_wb);
1051
1052 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1053 {
1054         int i;
1055         int ret;
1056
1057         ret = change_page_attr_clear(addr, addrinarray,
1058                                       __pgprot(_PAGE_CACHE_MASK), 1);
1059         if (ret)
1060                 return ret;
1061
1062         for (i = 0; i < addrinarray; i++)
1063                 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1064
1065         return 0;
1066 }
1067 EXPORT_SYMBOL(set_memory_array_wb);
1068
1069 int set_memory_x(unsigned long addr, int numpages)
1070 {
1071         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1072 }
1073 EXPORT_SYMBOL(set_memory_x);
1074
1075 int set_memory_nx(unsigned long addr, int numpages)
1076 {
1077         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1078 }
1079 EXPORT_SYMBOL(set_memory_nx);
1080
1081 int set_memory_ro(unsigned long addr, int numpages)
1082 {
1083         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1084 }
1085 EXPORT_SYMBOL_GPL(set_memory_ro);
1086
1087 int set_memory_rw(unsigned long addr, int numpages)
1088 {
1089         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1090 }
1091 EXPORT_SYMBOL_GPL(set_memory_rw);
1092
1093 int set_memory_np(unsigned long addr, int numpages)
1094 {
1095         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1096 }
1097
1098 int set_memory_4k(unsigned long addr, int numpages)
1099 {
1100         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1101                                         __pgprot(0), 1, 0, NULL);
1102 }
1103
1104 int set_pages_uc(struct page *page, int numpages)
1105 {
1106         unsigned long addr = (unsigned long)page_address(page);
1107
1108         return set_memory_uc(addr, numpages);
1109 }
1110 EXPORT_SYMBOL(set_pages_uc);
1111
1112 int set_pages_array_uc(struct page **pages, int addrinarray)
1113 {
1114         unsigned long start;
1115         unsigned long end;
1116         int i;
1117         int free_idx;
1118
1119         for (i = 0; i < addrinarray; i++) {
1120                 if (PageHighMem(pages[i]))
1121                         continue;
1122                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1123                 end = start + PAGE_SIZE;
1124                 if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
1125                         goto err_out;
1126         }
1127
1128         if (cpa_set_pages_array(pages, addrinarray,
1129                         __pgprot(_PAGE_CACHE_UC_MINUS)) == 0) {
1130                 return 0; /* Success */
1131         }
1132 err_out:
1133         free_idx = i;
1134         for (i = 0; i < free_idx; i++) {
1135                 if (PageHighMem(pages[i]))
1136                         continue;
1137                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1138                 end = start + PAGE_SIZE;
1139                 free_memtype(start, end);
1140         }
1141         return -EINVAL;
1142 }
1143 EXPORT_SYMBOL(set_pages_array_uc);
1144
1145 int set_pages_wb(struct page *page, int numpages)
1146 {
1147         unsigned long addr = (unsigned long)page_address(page);
1148
1149         return set_memory_wb(addr, numpages);
1150 }
1151 EXPORT_SYMBOL(set_pages_wb);
1152
1153 int set_pages_array_wb(struct page **pages, int addrinarray)
1154 {
1155         int retval;
1156         unsigned long start;
1157         unsigned long end;
1158         int i;
1159
1160         retval = cpa_clear_pages_array(pages, addrinarray,
1161                         __pgprot(_PAGE_CACHE_MASK));
1162         if (retval)
1163                 return retval;
1164
1165         for (i = 0; i < addrinarray; i++) {
1166                 if (PageHighMem(pages[i]))
1167                         continue;
1168                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1169                 end = start + PAGE_SIZE;
1170                 free_memtype(start, end);
1171         }
1172
1173         return 0;
1174 }
1175 EXPORT_SYMBOL(set_pages_array_wb);
1176
1177 int set_pages_x(struct page *page, int numpages)
1178 {
1179         unsigned long addr = (unsigned long)page_address(page);
1180
1181         return set_memory_x(addr, numpages);
1182 }
1183 EXPORT_SYMBOL(set_pages_x);
1184
1185 int set_pages_nx(struct page *page, int numpages)
1186 {
1187         unsigned long addr = (unsigned long)page_address(page);
1188
1189         return set_memory_nx(addr, numpages);
1190 }
1191 EXPORT_SYMBOL(set_pages_nx);
1192
1193 int set_pages_ro(struct page *page, int numpages)
1194 {
1195         unsigned long addr = (unsigned long)page_address(page);
1196
1197         return set_memory_ro(addr, numpages);
1198 }
1199
1200 int set_pages_rw(struct page *page, int numpages)
1201 {
1202         unsigned long addr = (unsigned long)page_address(page);
1203
1204         return set_memory_rw(addr, numpages);
1205 }
1206
1207 #ifdef CONFIG_DEBUG_PAGEALLOC
1208
1209 static int __set_pages_p(struct page *page, int numpages)
1210 {
1211         unsigned long tempaddr = (unsigned long) page_address(page);
1212         struct cpa_data cpa = { .vaddr = &tempaddr,
1213                                 .numpages = numpages,
1214                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1215                                 .mask_clr = __pgprot(0),
1216                                 .flags = 0};
1217
1218         /*
1219          * No alias checking needed for setting present flag. otherwise,
1220          * we may need to break large pages for 64-bit kernel text
1221          * mappings (this adds to complexity if we want to do this from
1222          * atomic context especially). Let's keep it simple!
1223          */
1224         return __change_page_attr_set_clr(&cpa, 0);
1225 }
1226
1227 static int __set_pages_np(struct page *page, int numpages)
1228 {
1229         unsigned long tempaddr = (unsigned long) page_address(page);
1230         struct cpa_data cpa = { .vaddr = &tempaddr,
1231                                 .numpages = numpages,
1232                                 .mask_set = __pgprot(0),
1233                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1234                                 .flags = 0};
1235
1236         /*
1237          * No alias checking needed for setting not present flag. otherwise,
1238          * we may need to break large pages for 64-bit kernel text
1239          * mappings (this adds to complexity if we want to do this from
1240          * atomic context especially). Let's keep it simple!
1241          */
1242         return __change_page_attr_set_clr(&cpa, 0);
1243 }
1244
1245 void kernel_map_pages(struct page *page, int numpages, int enable)
1246 {
1247         if (PageHighMem(page))
1248                 return;
1249         if (!enable) {
1250                 debug_check_no_locks_freed(page_address(page),
1251                                            numpages * PAGE_SIZE);
1252         }
1253
1254         /*
1255          * If page allocator is not up yet then do not call c_p_a():
1256          */
1257         if (!debug_pagealloc_enabled)
1258                 return;
1259
1260         /*
1261          * The return value is ignored as the calls cannot fail.
1262          * Large pages for identity mappings are not used at boot time
1263          * and hence no memory allocations during large page split.
1264          */
1265         if (enable)
1266                 __set_pages_p(page, numpages);
1267         else
1268                 __set_pages_np(page, numpages);
1269
1270         /*
1271          * We should perform an IPI and flush all tlbs,
1272          * but that can deadlock->flush only current cpu:
1273          */
1274         __flush_tlb_all();
1275 }
1276
1277 #ifdef CONFIG_HIBERNATION
1278
1279 bool kernel_page_present(struct page *page)
1280 {
1281         unsigned int level;
1282         pte_t *pte;
1283
1284         if (PageHighMem(page))
1285                 return false;
1286
1287         pte = lookup_address((unsigned long)page_address(page), &level);
1288         return (pte_val(*pte) & _PAGE_PRESENT);
1289 }
1290
1291 #endif /* CONFIG_HIBERNATION */
1292
1293 #endif /* CONFIG_DEBUG_PAGEALLOC */
1294
1295 /*
1296  * The testcases use internal knowledge of the implementation that shouldn't
1297  * be exposed to the rest of the kernel. Include these directly here.
1298  */
1299 #ifdef CONFIG_CPA_DEBUG
1300 #include "pageattr-test.c"
1301 #endif