arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58
  59 #define MAX_IO_MSRS 256
  60 #define CR0_RESERVED_BITS                                               \
  61         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  62                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  63                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  64 #define CR4_RESERVED_BITS                                               \
  65         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  66                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  67                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  68                           | X86_CR4_OSXSAVE \
  69                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  70
  71 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  72
  73 #define KVM_MAX_MCE_BANKS 32
  74 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  75
  76 /* EFER defaults:
  77  * - enable syscall per default because its emulated by KVM
  78  * - enable LME and LMA per default on 64 bit KVM
  79  */
  80 #ifdef CONFIG_X86_64
  81 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  91                                     struct kvm_cpuid_entry2 __user *entries);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 int ignore_msrs = 0;
  97 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 #define KVM_NR_SHARED_MSRS 16
 100
 101 struct kvm_shared_msrs_global {
 102         int nr;
 103         u32 msrs[KVM_NR_SHARED_MSRS];
 104 };
 105
 106 struct kvm_shared_msrs {
 107         struct user_return_notifier urn;
 108         bool registered;
 109         struct kvm_shared_msr_values {
 110                 u64 host;
 111                 u64 curr;
 112         } values[KVM_NR_SHARED_MSRS];
 113 };
 114
 115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 117
 118 struct kvm_stats_debugfs_item debugfs_entries[] = {
 119         { "pf_fixed", VCPU_STAT(pf_fixed) },
 120         { "pf_guest", VCPU_STAT(pf_guest) },
 121         { "tlb_flush", VCPU_STAT(tlb_flush) },
 122         { "invlpg", VCPU_STAT(invlpg) },
 123         { "exits", VCPU_STAT(exits) },
 124         { "io_exits", VCPU_STAT(io_exits) },
 125         { "mmio_exits", VCPU_STAT(mmio_exits) },
 126         { "signal_exits", VCPU_STAT(signal_exits) },
 127         { "irq_window", VCPU_STAT(irq_window_exits) },
 128         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 129         { "halt_exits", VCPU_STAT(halt_exits) },
 130         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 131         { "hypercalls", VCPU_STAT(hypercalls) },
 132         { "request_irq", VCPU_STAT(request_irq_exits) },
 133         { "irq_exits", VCPU_STAT(irq_exits) },
 134         { "host_state_reload", VCPU_STAT(host_state_reload) },
 135         { "efer_reload", VCPU_STAT(efer_reload) },
 136         { "fpu_reload", VCPU_STAT(fpu_reload) },
 137         { "insn_emulation", VCPU_STAT(insn_emulation) },
 138         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 139         { "irq_injections", VCPU_STAT(irq_injections) },
 140         { "nmi_injections", VCPU_STAT(nmi_injections) },
 141         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 142         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 143         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 144         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 145         { "mmu_flooded", VM_STAT(mmu_flooded) },
 146         { "mmu_recycled", VM_STAT(mmu_recycled) },
 147         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 148         { "mmu_unsync", VM_STAT(mmu_unsync) },
 149         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 150         { "largepages", VM_STAT(lpages) },
 151         { NULL }
 152 };
 153
 154 u64 __read_mostly host_xcr0;
 155
 156 static inline u32 bit(int bitno)
 157 {
 158         return 1 << (bitno & 31);
 159 }
 160
 161 static void kvm_on_user_return(struct user_return_notifier *urn)
 162 {
 163         unsigned slot;
 164         struct kvm_shared_msrs *locals
 165                 = container_of(urn, struct kvm_shared_msrs, urn);
 166         struct kvm_shared_msr_values *values;
 167
 168         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 169                 values = &locals->values[slot];
 170                 if (values->host != values->curr) {
 171                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 172                         values->curr = values->host;
 173                 }
 174         }
 175         locals->registered = false;
 176         user_return_notifier_unregister(urn);
 177 }
 178
 179 static void shared_msr_update(unsigned slot, u32 msr)
 180 {
 181         struct kvm_shared_msrs *smsr;
 182         u64 value;
 183
 184         smsr = &__get_cpu_var(shared_msrs);
 185         /* only read, and nobody should modify it at this time,
 186          * so don't need lock */
 187         if (slot >= shared_msrs_global.nr) {
 188                 printk(KERN_ERR "kvm: invalid MSR slot!");
 189                 return;
 190         }
 191         rdmsrl_safe(msr, &value);
 192         smsr->values[slot].host = value;
 193         smsr->values[slot].curr = value;
 194 }
 195
 196 void kvm_define_shared_msr(unsigned slot, u32 msr)
 197 {
 198         if (slot >= shared_msrs_global.nr)
 199                 shared_msrs_global.nr = slot + 1;
 200         shared_msrs_global.msrs[slot] = msr;
 201         /* we need ensured the shared_msr_global have been updated */
 202         smp_wmb();
 203 }
 204 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 205
 206 static void kvm_shared_msr_cpu_online(void)
 207 {
 208         unsigned i;
 209
 210         for (i = 0; i < shared_msrs_global.nr; ++i)
 211                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 212 }
 213
 214 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 215 {
 216         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 217
 218         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 219                 return;
 220         smsr->values[slot].curr = value;
 221         wrmsrl(shared_msrs_global.msrs[slot], value);
 222         if (!smsr->registered) {
 223                 smsr->urn.on_user_return = kvm_on_user_return;
 224                 user_return_notifier_register(&smsr->urn);
 225                 smsr->registered = true;
 226         }
 227 }
 228 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 229
 230 static void drop_user_return_notifiers(void *ignore)
 231 {
 232         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 233
 234         if (smsr->registered)
 235                 kvm_on_user_return(&smsr->urn);
 236 }
 237
 238 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 239 {
 240         if (irqchip_in_kernel(vcpu->kvm))
 241                 return vcpu->arch.apic_base;
 242         else
 243                 return vcpu->arch.apic_base;
 244 }
 245 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 246
 247 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 248 {
 249         /* TODO: reserve bits check */
 250         if (irqchip_in_kernel(vcpu->kvm))
 251                 kvm_lapic_set_base(vcpu, data);
 252         else
 253                 vcpu->arch.apic_base = data;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 256
 257 #define EXCPT_BENIGN            0
 258 #define EXCPT_CONTRIBUTORY      1
 259 #define EXCPT_PF                2
 260
 261 static int exception_class(int vector)
 262 {
 263         switch (vector) {
 264         case PF_VECTOR:
 265                 return EXCPT_PF;
 266         case DE_VECTOR:
 267         case TS_VECTOR:
 268         case NP_VECTOR:
 269         case SS_VECTOR:
 270         case GP_VECTOR:
 271                 return EXCPT_CONTRIBUTORY;
 272         default:
 273                 break;
 274         }
 275         return EXCPT_BENIGN;
 276 }
 277
 278 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 279                 unsigned nr, bool has_error, u32 error_code,
 280                 bool reinject)
 281 {
 282         u32 prev_nr;
 283         int class1, class2;
 284
 285         if (!vcpu->arch.exception.pending) {
 286         queue:
 287                 vcpu->arch.exception.pending = true;
 288                 vcpu->arch.exception.has_error_code = has_error;
 289                 vcpu->arch.exception.nr = nr;
 290                 vcpu->arch.exception.error_code = error_code;
 291                 vcpu->arch.exception.reinject = reinject;
 292                 return;
 293         }
 294
 295         /* to check exception */
 296         prev_nr = vcpu->arch.exception.nr;
 297         if (prev_nr == DF_VECTOR) {
 298                 /* triple fault -> shutdown */
 299                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 300                 return;
 301         }
 302         class1 = exception_class(prev_nr);
 303         class2 = exception_class(nr);
 304         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 305                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 306                 /* generate double fault per SDM Table 5-5 */
 307                 vcpu->arch.exception.pending = true;
 308                 vcpu->arch.exception.has_error_code = true;
 309                 vcpu->arch.exception.nr = DF_VECTOR;
 310                 vcpu->arch.exception.error_code = 0;
 311         } else
 312                 /* replace previous exception with a new one in a hope
 313                    that instruction re-execution will regenerate lost
 314                    exception */
 315                 goto queue;
 316 }
 317
 318 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 319 {
 320         kvm_multiple_exception(vcpu, nr, false, 0, false);
 321 }
 322 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 323
 324 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 325 {
 326         kvm_multiple_exception(vcpu, nr, false, 0, true);
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 329
 330 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
 331                            u32 error_code)
 332 {
 333         ++vcpu->stat.pf_guest;
 334         vcpu->arch.cr2 = addr;
 335         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 336 }
 337
 338 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 339 {
 340         vcpu->arch.nmi_pending = 1;
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 343
 344 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 345 {
 346         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 349
 350 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 351 {
 352         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 353 }
 354 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 355
 356 /*
 357  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 358  * a #GP and return false.
 359  */
 360 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 361 {
 362         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 363                 return true;
 364         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 365         return false;
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 368
 369 /*
 370  * Load the pae pdptrs.  Return true is they are all valid.
 371  */
 372 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 373 {
 374         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 375         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 376         int i;
 377         int ret;
 378         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 379
 380         ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
 381                                   offset * sizeof(u64), sizeof(pdpte));
 382         if (ret < 0) {
 383                 ret = 0;
 384                 goto out;
 385         }
 386         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 387                 if (is_present_gpte(pdpte[i]) &&
 388                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 389                         ret = 0;
 390                         goto out;
 391                 }
 392         }
 393         ret = 1;
 394
 395         memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
 396         __set_bit(VCPU_EXREG_PDPTR,
 397                   (unsigned long *)&vcpu->arch.regs_avail);
 398         __set_bit(VCPU_EXREG_PDPTR,
 399                   (unsigned long *)&vcpu->arch.regs_dirty);
 400 out:
 401
 402         return ret;
 403 }
 404 EXPORT_SYMBOL_GPL(load_pdptrs);
 405
 406 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 407 {
 408         u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
 409         bool changed = true;
 410         int r;
 411
 412         if (is_long_mode(vcpu) || !is_pae(vcpu))
 413                 return false;
 414
 415         if (!test_bit(VCPU_EXREG_PDPTR,
 416                       (unsigned long *)&vcpu->arch.regs_avail))
 417                 return true;
 418
 419         r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
 420         if (r < 0)
 421                 goto out;
 422         changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
 423 out:
 424
 425         return changed;
 426 }
 427
 428 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 429 {
 430         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 431         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 432                                     X86_CR0_CD | X86_CR0_NW;
 433
 434         cr0 |= X86_CR0_ET;
 435
 436 #ifdef CONFIG_X86_64
 437         if (cr0 & 0xffffffff00000000UL)
 438                 return 1;
 439 #endif
 440
 441         cr0 &= ~CR0_RESERVED_BITS;
 442
 443         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 444                 return 1;
 445
 446         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 447                 return 1;
 448
 449         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 450 #ifdef CONFIG_X86_64
 451                 if ((vcpu->arch.efer & EFER_LME)) {
 452                         int cs_db, cs_l;
 453
 454                         if (!is_pae(vcpu))
 455                                 return 1;
 456                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 457                         if (cs_l)
 458                                 return 1;
 459                 } else
 460 #endif
 461                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3))
 462                         return 1;
 463         }
 464
 465         kvm_x86_ops->set_cr0(vcpu, cr0);
 466
 467         if ((cr0 ^ old_cr0) & update_bits)
 468                 kvm_mmu_reset_context(vcpu);
 469         return 0;
 470 }
 471 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 472
 473 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 474 {
 475         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_lmsw);
 478
 479 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 480 {
 481         u64 xcr0;
 482
 483         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 484         if (index != XCR_XFEATURE_ENABLED_MASK)
 485                 return 1;
 486         xcr0 = xcr;
 487         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 488                 return 1;
 489         if (!(xcr0 & XSTATE_FP))
 490                 return 1;
 491         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 492                 return 1;
 493         if (xcr0 & ~host_xcr0)
 494                 return 1;
 495         vcpu->arch.xcr0 = xcr0;
 496         vcpu->guest_xcr0_loaded = 0;
 497         return 0;
 498 }
 499
 500 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 501 {
 502         if (__kvm_set_xcr(vcpu, index, xcr)) {
 503                 kvm_inject_gp(vcpu, 0);
 504                 return 1;
 505         }
 506         return 0;
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 509
 510 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 511 {
 512         struct kvm_cpuid_entry2 *best;
 513
 514         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 515         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 516 }
 517
 518 static void update_cpuid(struct kvm_vcpu *vcpu)
 519 {
 520         struct kvm_cpuid_entry2 *best;
 521
 522         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 523         if (!best)
 524                 return;
 525
 526         /* Update OSXSAVE bit */
 527         if (cpu_has_xsave && best->function == 0x1) {
 528                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 529                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 530                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 531         }
 532 }
 533
 534 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 535 {
 536         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 537         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 538
 539         if (cr4 & CR4_RESERVED_BITS)
 540                 return 1;
 541
 542         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 543                 return 1;
 544
 545         if (is_long_mode(vcpu)) {
 546                 if (!(cr4 & X86_CR4_PAE))
 547                         return 1;
 548         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 549                    && ((cr4 ^ old_cr4) & pdptr_bits)
 550                    && !load_pdptrs(vcpu, vcpu->arch.cr3))
 551                 return 1;
 552
 553         if (cr4 & X86_CR4_VMXE)
 554                 return 1;
 555
 556         kvm_x86_ops->set_cr4(vcpu, cr4);
 557
 558         if ((cr4 ^ old_cr4) & pdptr_bits)
 559                 kvm_mmu_reset_context(vcpu);
 560
 561         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 562                 update_cpuid(vcpu);
 563
 564         return 0;
 565 }
 566 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 567
 568 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 569 {
 570         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 571                 kvm_mmu_sync_roots(vcpu);
 572                 kvm_mmu_flush_tlb(vcpu);
 573                 return 0;
 574         }
 575
 576         if (is_long_mode(vcpu)) {
 577                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 578                         return 1;
 579         } else {
 580                 if (is_pae(vcpu)) {
 581                         if (cr3 & CR3_PAE_RESERVED_BITS)
 582                                 return 1;
 583                         if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3))
 584                                 return 1;
 585                 }
 586                 /*
 587                  * We don't check reserved bits in nonpae mode, because
 588                  * this isn't enforced, and VMware depends on this.
 589                  */
 590         }
 591
 592         /*
 593          * Does the new cr3 value map to physical memory? (Note, we
 594          * catch an invalid cr3 even in real-mode, because it would
 595          * cause trouble later on when we turn on paging anyway.)
 596          *
 597          * A real CPU would silently accept an invalid cr3 and would
 598          * attempt to use it - with largely undefined (and often hard
 599          * to debug) behavior on the guest side.
 600          */
 601         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 602                 return 1;
 603         vcpu->arch.cr3 = cr3;
 604         vcpu->arch.mmu.new_cr3(vcpu);
 605         return 0;
 606 }
 607 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 608
 609 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 610 {
 611         if (cr8 & CR8_RESERVED_BITS)
 612                 return 1;
 613         if (irqchip_in_kernel(vcpu->kvm))
 614                 kvm_lapic_set_tpr(vcpu, cr8);
 615         else
 616                 vcpu->arch.cr8 = cr8;
 617         return 0;
 618 }
 619
 620 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 621 {
 622         if (__kvm_set_cr8(vcpu, cr8))
 623                 kvm_inject_gp(vcpu, 0);
 624 }
 625 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 626
 627 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 628 {
 629         if (irqchip_in_kernel(vcpu->kvm))
 630                 return kvm_lapic_get_cr8(vcpu);
 631         else
 632                 return vcpu->arch.cr8;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 635
 636 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 637 {
 638         switch (dr) {
 639         case 0 ... 3:
 640                 vcpu->arch.db[dr] = val;
 641                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 642                         vcpu->arch.eff_db[dr] = val;
 643                 break;
 644         case 4:
 645                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 646                         return 1; /* #UD */
 647                 /* fall through */
 648         case 6:
 649                 if (val & 0xffffffff00000000ULL)
 650                         return -1; /* #GP */
 651                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 652                 break;
 653         case 5:
 654                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 655                         return 1; /* #UD */
 656                 /* fall through */
 657         default: /* 7 */
 658                 if (val & 0xffffffff00000000ULL)
 659                         return -1; /* #GP */
 660                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 661                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 662                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 663                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 664                 }
 665                 break;
 666         }
 667
 668         return 0;
 669 }
 670
 671 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 672 {
 673         int res;
 674
 675         res = __kvm_set_dr(vcpu, dr, val);
 676         if (res > 0)
 677                 kvm_queue_exception(vcpu, UD_VECTOR);
 678         else if (res < 0)
 679                 kvm_inject_gp(vcpu, 0);
 680
 681         return res;
 682 }
 683 EXPORT_SYMBOL_GPL(kvm_set_dr);
 684
 685 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 686 {
 687         switch (dr) {
 688         case 0 ... 3:
 689                 *val = vcpu->arch.db[dr];
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1;
 694                 /* fall through */
 695         case 6:
 696                 *val = vcpu->arch.dr6;
 697                 break;
 698         case 5:
 699                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 700                         return 1;
 701                 /* fall through */
 702         default: /* 7 */
 703                 *val = vcpu->arch.dr7;
 704                 break;
 705         }
 706
 707         return 0;
 708 }
 709
 710 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 711 {
 712         if (_kvm_get_dr(vcpu, dr, val)) {
 713                 kvm_queue_exception(vcpu, UD_VECTOR);
 714                 return 1;
 715         }
 716         return 0;
 717 }
 718 EXPORT_SYMBOL_GPL(kvm_get_dr);
 719
 720 /*
 721  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 722  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 723  *
 724  * This list is modified at module load time to reflect the
 725  * capabilities of the host cpu. This capabilities test skips MSRs that are
 726  * kvm-specific. Those are put in the beginning of the list.
 727  */
 728
 729 #define KVM_SAVE_MSRS_BEGIN     7
 730 static u32 msrs_to_save[] = {
 731         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 732         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 733         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 734         HV_X64_MSR_APIC_ASSIST_PAGE,
 735         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 736         MSR_STAR,
 737 #ifdef CONFIG_X86_64
 738         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 739 #endif
 740         MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 741 };
 742
 743 static unsigned num_msrs_to_save;
 744
 745 static u32 emulated_msrs[] = {
 746         MSR_IA32_MISC_ENABLE,
 747         MSR_IA32_MCG_STATUS,
 748         MSR_IA32_MCG_CTL,
 749 };
 750
 751 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 752 {
 753         u64 old_efer = vcpu->arch.efer;
 754
 755         if (efer & efer_reserved_bits)
 756                 return 1;
 757
 758         if (is_paging(vcpu)
 759             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 760                 return 1;
 761
 762         if (efer & EFER_FFXSR) {
 763                 struct kvm_cpuid_entry2 *feat;
 764
 765                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 766                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 767                         return 1;
 768         }
 769
 770         if (efer & EFER_SVME) {
 771                 struct kvm_cpuid_entry2 *feat;
 772
 773                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 774                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 775                         return 1;
 776         }
 777
 778         efer &= ~EFER_LMA;
 779         efer |= vcpu->arch.efer & EFER_LMA;
 780
 781         kvm_x86_ops->set_efer(vcpu, efer);
 782
 783         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 784         kvm_mmu_reset_context(vcpu);
 785
 786         /* Update reserved bits */
 787         if ((efer ^ old_efer) & EFER_NX)
 788                 kvm_mmu_reset_context(vcpu);
 789
 790         return 0;
 791 }
 792
 793 void kvm_enable_efer_bits(u64 mask)
 794 {
 795        efer_reserved_bits &= ~mask;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 798
 799
 800 /*
 801  * Writes msr value into into the appropriate "register".
 802  * Returns 0 on success, non-0 otherwise.
 803  * Assumes vcpu_load() was already called.
 804  */
 805 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 806 {
 807         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 808 }
 809
 810 /*
 811  * Adapt set_msr() to msr_io()'s calling convention
 812  */
 813 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 814 {
 815         return kvm_set_msr(vcpu, index, *data);
 816 }
 817
 818 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 819 {
 820         int version;
 821         int r;
 822         struct pvclock_wall_clock wc;
 823         struct timespec boot;
 824
 825         if (!wall_clock)
 826                 return;
 827
 828         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 829         if (r)
 830                 return;
 831
 832         if (version & 1)
 833                 ++version;  /* first time write, random junk */
 834
 835         ++version;
 836
 837         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 838
 839         /*
 840          * The guest calculates current wall clock time by adding
 841          * system time (updated by kvm_write_guest_time below) to the
 842          * wall clock specified here.  guest system time equals host
 843          * system time for us, thus we must fill in host boot time here.
 844          */
 845         getboottime(&boot);
 846
 847         wc.sec = boot.tv_sec;
 848         wc.nsec = boot.tv_nsec;
 849         wc.version = version;
 850
 851         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 852
 853         version++;
 854         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 855 }
 856
 857 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 858 {
 859         uint32_t quotient, remainder;
 860
 861         /* Don't try to replace with do_div(), this one calculates
 862          * "(dividend << 32) / divisor" */
 863         __asm__ ( "divl %4"
 864                   : "=a" (quotient), "=d" (remainder)
 865                   : "0" (0), "1" (dividend), "r" (divisor) );
 866         return quotient;
 867 }
 868
 869 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 870 {
 871         uint64_t nsecs = 1000000000LL;
 872         int32_t  shift = 0;
 873         uint64_t tps64;
 874         uint32_t tps32;
 875
 876         tps64 = tsc_khz * 1000LL;
 877         while (tps64 > nsecs*2) {
 878                 tps64 >>= 1;
 879                 shift--;
 880         }
 881
 882         tps32 = (uint32_t)tps64;
 883         while (tps32 <= (uint32_t)nsecs) {
 884                 tps32 <<= 1;
 885                 shift++;
 886         }
 887
 888         hv_clock->tsc_shift = shift;
 889         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 890
 891         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 892                  __func__, tsc_khz, hv_clock->tsc_shift,
 893                  hv_clock->tsc_to_system_mul);
 894 }
 895
 896 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 897
 898 static inline int kvm_tsc_changes_freq(void)
 899 {
 900         int cpu = get_cpu();
 901         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 902                   cpufreq_quick_get(cpu) != 0;
 903         put_cpu();
 904         return ret;
 905 }
 906
 907 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
 908 {
 909         struct kvm *kvm = vcpu->kvm;
 910         u64 offset, ns, elapsed;
 911         unsigned long flags;
 912         struct timespec ts;
 913
 914         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
 915         offset = data - native_read_tsc();
 916         ktime_get_ts(&ts);
 917         monotonic_to_bootbased(&ts);
 918         ns = timespec_to_ns(&ts);
 919         elapsed = ns - kvm->arch.last_tsc_nsec;
 920
 921         /*
 922          * Special case: identical write to TSC within 5 seconds of
 923          * another CPU is interpreted as an attempt to synchronize
 924          * (the 5 seconds is to accomodate host load / swapping).
 925          *
 926          * In that case, for a reliable TSC, we can match TSC offsets,
 927          * or make a best guest using kernel_ns value.
 928          */
 929         if (data == kvm->arch.last_tsc_write && elapsed < 5ULL * NSEC_PER_SEC) {
 930                 if (!check_tsc_unstable()) {
 931                         offset = kvm->arch.last_tsc_offset;
 932                         pr_debug("kvm: matched tsc offset for %llu\n", data);
 933                 } else {
 934                         u64 tsc_delta = elapsed * __get_cpu_var(cpu_tsc_khz);
 935                         tsc_delta = tsc_delta / USEC_PER_SEC;
 936                         offset += tsc_delta;
 937                         pr_debug("kvm: adjusted tsc offset by %llu\n", tsc_delta);
 938                 }
 939                 ns = kvm->arch.last_tsc_nsec;
 940         }
 941         kvm->arch.last_tsc_nsec = ns;
 942         kvm->arch.last_tsc_write = data;
 943         kvm->arch.last_tsc_offset = offset;
 944         kvm_x86_ops->write_tsc_offset(vcpu, offset);
 945         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
 946
 947         /* Reset of TSC must disable overshoot protection below */
 948         vcpu->arch.hv_clock.tsc_timestamp = 0;
 949 }
 950 EXPORT_SYMBOL_GPL(kvm_write_tsc);
 951
 952 static int kvm_write_guest_time(struct kvm_vcpu *v)
 953 {
 954         struct timespec ts;
 955         unsigned long flags;
 956         struct kvm_vcpu_arch *vcpu = &v->arch;
 957         void *shared_kaddr;
 958         unsigned long this_tsc_khz;
 959
 960         if ((!vcpu->time_page))
 961                 return 0;
 962
 963         /* Keep irq disabled to prevent changes to the clock */
 964         local_irq_save(flags);
 965         kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
 966         ktime_get_ts(&ts);
 967         monotonic_to_bootbased(&ts);
 968         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
 969         local_irq_restore(flags);
 970
 971         if (unlikely(this_tsc_khz == 0)) {
 972                 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
 973                 return 1;
 974         }
 975
 976         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
 977                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
 978                 vcpu->hw_tsc_khz = this_tsc_khz;
 979         }
 980
 981         /* With all the info we got, fill in the values */
 982         vcpu->hv_clock.system_time = ts.tv_nsec +
 983                                      (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
 984
 985         vcpu->hv_clock.flags = 0;
 986
 987         /*
 988          * The interface expects us to write an even number signaling that the
 989          * update is finished. Since the guest won't see the intermediate
 990          * state, we just increase by 2 at the end.
 991          */
 992         vcpu->hv_clock.version += 2;
 993
 994         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 995
 996         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
 997                sizeof(vcpu->hv_clock));
 998
 999         kunmap_atomic(shared_kaddr, KM_USER0);
1000
1001         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1002         return 0;
1003 }
1004
1005 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1006 {
1007         struct kvm_vcpu_arch *vcpu = &v->arch;
1008
1009         if (!vcpu->time_page)
1010                 return 0;
1011         kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1012         return 1;
1013 }
1014
1015 static bool msr_mtrr_valid(unsigned msr)
1016 {
1017         switch (msr) {
1018         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1019         case MSR_MTRRfix64K_00000:
1020         case MSR_MTRRfix16K_80000:
1021         case MSR_MTRRfix16K_A0000:
1022         case MSR_MTRRfix4K_C0000:
1023         case MSR_MTRRfix4K_C8000:
1024         case MSR_MTRRfix4K_D0000:
1025         case MSR_MTRRfix4K_D8000:
1026         case MSR_MTRRfix4K_E0000:
1027         case MSR_MTRRfix4K_E8000:
1028         case MSR_MTRRfix4K_F0000:
1029         case MSR_MTRRfix4K_F8000:
1030         case MSR_MTRRdefType:
1031         case MSR_IA32_CR_PAT:
1032                 return true;
1033         case 0x2f8:
1034                 return true;
1035         }
1036         return false;
1037 }
1038
1039 static bool valid_pat_type(unsigned t)
1040 {
1041         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1042 }
1043
1044 static bool valid_mtrr_type(unsigned t)
1045 {
1046         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1047 }
1048
1049 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1050 {
1051         int i;
1052
1053         if (!msr_mtrr_valid(msr))
1054                 return false;
1055
1056         if (msr == MSR_IA32_CR_PAT) {
1057                 for (i = 0; i < 8; i++)
1058                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1059                                 return false;
1060                 return true;
1061         } else if (msr == MSR_MTRRdefType) {
1062                 if (data & ~0xcff)
1063                         return false;
1064                 return valid_mtrr_type(data & 0xff);
1065         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1066                 for (i = 0; i < 8 ; i++)
1067                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1068                                 return false;
1069                 return true;
1070         }
1071
1072         /* variable MTRRs */
1073         return valid_mtrr_type(data & 0xff);
1074 }
1075
1076 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1077 {
1078         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1079
1080         if (!mtrr_valid(vcpu, msr, data))
1081                 return 1;
1082
1083         if (msr == MSR_MTRRdefType) {
1084                 vcpu->arch.mtrr_state.def_type = data;
1085                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1086         } else if (msr == MSR_MTRRfix64K_00000)
1087                 p[0] = data;
1088         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1089                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1090         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1091                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1092         else if (msr == MSR_IA32_CR_PAT)
1093                 vcpu->arch.pat = data;
1094         else {  /* Variable MTRRs */
1095                 int idx, is_mtrr_mask;
1096                 u64 *pt;
1097
1098                 idx = (msr - 0x200) / 2;
1099                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1100                 if (!is_mtrr_mask)
1101                         pt =
1102                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1103                 else
1104                         pt =
1105                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1106                 *pt = data;
1107         }
1108
1109         kvm_mmu_reset_context(vcpu);
1110         return 0;
1111 }
1112
1113 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1114 {
1115         u64 mcg_cap = vcpu->arch.mcg_cap;
1116         unsigned bank_num = mcg_cap & 0xff;
1117
1118         switch (msr) {
1119         case MSR_IA32_MCG_STATUS:
1120                 vcpu->arch.mcg_status = data;
1121                 break;
1122         case MSR_IA32_MCG_CTL:
1123                 if (!(mcg_cap & MCG_CTL_P))
1124                         return 1;
1125                 if (data != 0 && data != ~(u64)0)
1126                         return -1;
1127                 vcpu->arch.mcg_ctl = data;
1128                 break;
1129         default:
1130                 if (msr >= MSR_IA32_MC0_CTL &&
1131                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1132                         u32 offset = msr - MSR_IA32_MC0_CTL;
1133                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1134                          * some Linux kernels though clear bit 10 in bank 4 to
1135                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1136                          * this to avoid an uncatched #GP in the guest
1137                          */
1138                         if ((offset & 0x3) == 0 &&
1139                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1140                                 return -1;
1141                         vcpu->arch.mce_banks[offset] = data;
1142                         break;
1143                 }
1144                 return 1;
1145         }
1146         return 0;
1147 }
1148
1149 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1150 {
1151         struct kvm *kvm = vcpu->kvm;
1152         int lm = is_long_mode(vcpu);
1153         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1154                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1155         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1156                 : kvm->arch.xen_hvm_config.blob_size_32;
1157         u32 page_num = data & ~PAGE_MASK;
1158         u64 page_addr = data & PAGE_MASK;
1159         u8 *page;
1160         int r;
1161
1162         r = -E2BIG;
1163         if (page_num >= blob_size)
1164                 goto out;
1165         r = -ENOMEM;
1166         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1167         if (!page)
1168                 goto out;
1169         r = -EFAULT;
1170         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1171                 goto out_free;
1172         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1173                 goto out_free;
1174         r = 0;
1175 out_free:
1176         kfree(page);
1177 out:
1178         return r;
1179 }
1180
1181 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1182 {
1183         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1184 }
1185
1186 static bool kvm_hv_msr_partition_wide(u32 msr)
1187 {
1188         bool r = false;
1189         switch (msr) {
1190         case HV_X64_MSR_GUEST_OS_ID:
1191         case HV_X64_MSR_HYPERCALL:
1192                 r = true;
1193                 break;
1194         }
1195
1196         return r;
1197 }
1198
1199 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1200 {
1201         struct kvm *kvm = vcpu->kvm;
1202
1203         switch (msr) {
1204         case HV_X64_MSR_GUEST_OS_ID:
1205                 kvm->arch.hv_guest_os_id = data;
1206                 /* setting guest os id to zero disables hypercall page */
1207                 if (!kvm->arch.hv_guest_os_id)
1208                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1209                 break;
1210         case HV_X64_MSR_HYPERCALL: {
1211                 u64 gfn;
1212                 unsigned long addr;
1213                 u8 instructions[4];
1214
1215                 /* if guest os id is not set hypercall should remain disabled */
1216                 if (!kvm->arch.hv_guest_os_id)
1217                         break;
1218                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1219                         kvm->arch.hv_hypercall = data;
1220                         break;
1221                 }
1222                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1223                 addr = gfn_to_hva(kvm, gfn);
1224                 if (kvm_is_error_hva(addr))
1225                         return 1;
1226                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1227                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1228                 if (copy_to_user((void __user *)addr, instructions, 4))
1229                         return 1;
1230                 kvm->arch.hv_hypercall = data;
1231                 break;
1232         }
1233         default:
1234                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1235                           "data 0x%llx\n", msr, data);
1236                 return 1;
1237         }
1238         return 0;
1239 }
1240
1241 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1242 {
1243         switch (msr) {
1244         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1245                 unsigned long addr;
1246
1247                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1248                         vcpu->arch.hv_vapic = data;
1249                         break;
1250                 }
1251                 addr = gfn_to_hva(vcpu->kvm, data >>
1252                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1253                 if (kvm_is_error_hva(addr))
1254                         return 1;
1255                 if (clear_user((void __user *)addr, PAGE_SIZE))
1256                         return 1;
1257                 vcpu->arch.hv_vapic = data;
1258                 break;
1259         }
1260         case HV_X64_MSR_EOI:
1261                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1262         case HV_X64_MSR_ICR:
1263                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1264         case HV_X64_MSR_TPR:
1265                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1266         default:
1267                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1268                           "data 0x%llx\n", msr, data);
1269                 return 1;
1270         }
1271
1272         return 0;
1273 }
1274
1275 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1276 {
1277         switch (msr) {
1278         case MSR_EFER:
1279                 return set_efer(vcpu, data);
1280         case MSR_K7_HWCR:
1281                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1282                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1283                 if (data != 0) {
1284                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1285                                 data);
1286                         return 1;
1287                 }
1288                 break;
1289         case MSR_FAM10H_MMIO_CONF_BASE:
1290                 if (data != 0) {
1291                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1292                                 "0x%llx\n", data);
1293                         return 1;
1294                 }
1295                 break;
1296         case MSR_AMD64_NB_CFG:
1297                 break;
1298         case MSR_IA32_DEBUGCTLMSR:
1299                 if (!data) {
1300                         /* We support the non-activated case already */
1301                         break;
1302                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1303                         /* Values other than LBR and BTF are vendor-specific,
1304                            thus reserved and should throw a #GP */
1305                         return 1;
1306                 }
1307                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1308                         __func__, data);
1309                 break;
1310         case MSR_IA32_UCODE_REV:
1311         case MSR_IA32_UCODE_WRITE:
1312         case MSR_VM_HSAVE_PA:
1313         case MSR_AMD64_PATCH_LOADER:
1314                 break;
1315         case 0x200 ... 0x2ff:
1316                 return set_msr_mtrr(vcpu, msr, data);
1317         case MSR_IA32_APICBASE:
1318                 kvm_set_apic_base(vcpu, data);
1319                 break;
1320         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1321                 return kvm_x2apic_msr_write(vcpu, msr, data);
1322         case MSR_IA32_MISC_ENABLE:
1323                 vcpu->arch.ia32_misc_enable_msr = data;
1324                 break;
1325         case MSR_KVM_WALL_CLOCK_NEW:
1326         case MSR_KVM_WALL_CLOCK:
1327                 vcpu->kvm->arch.wall_clock = data;
1328                 kvm_write_wall_clock(vcpu->kvm, data);
1329                 break;
1330         case MSR_KVM_SYSTEM_TIME_NEW:
1331         case MSR_KVM_SYSTEM_TIME: {
1332                 if (vcpu->arch.time_page) {
1333                         kvm_release_page_dirty(vcpu->arch.time_page);
1334                         vcpu->arch.time_page = NULL;
1335                 }
1336
1337                 vcpu->arch.time = data;
1338
1339                 /* we verify if the enable bit is set... */
1340                 if (!(data & 1))
1341                         break;
1342
1343                 /* ...but clean it before doing the actual write */
1344                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1345
1346                 vcpu->arch.time_page =
1347                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1348
1349                 if (is_error_page(vcpu->arch.time_page)) {
1350                         kvm_release_page_clean(vcpu->arch.time_page);
1351                         vcpu->arch.time_page = NULL;
1352                 }
1353
1354                 kvm_request_guest_time_update(vcpu);
1355                 break;
1356         }
1357         case MSR_IA32_MCG_CTL:
1358         case MSR_IA32_MCG_STATUS:
1359         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1360                 return set_msr_mce(vcpu, msr, data);
1361
1362         /* Performance counters are not protected by a CPUID bit,
1363          * so we should check all of them in the generic path for the sake of
1364          * cross vendor migration.
1365          * Writing a zero into the event select MSRs disables them,
1366          * which we perfectly emulate ;-). Any other value should be at least
1367          * reported, some guests depend on them.
1368          */
1369         case MSR_P6_EVNTSEL0:
1370         case MSR_P6_EVNTSEL1:
1371         case MSR_K7_EVNTSEL0:
1372         case MSR_K7_EVNTSEL1:
1373         case MSR_K7_EVNTSEL2:
1374         case MSR_K7_EVNTSEL3:
1375                 if (data != 0)
1376                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1377                                 "0x%x data 0x%llx\n", msr, data);
1378                 break;
1379         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1380          * so we ignore writes to make it happy.
1381          */
1382         case MSR_P6_PERFCTR0:
1383         case MSR_P6_PERFCTR1:
1384         case MSR_K7_PERFCTR0:
1385         case MSR_K7_PERFCTR1:
1386         case MSR_K7_PERFCTR2:
1387         case MSR_K7_PERFCTR3:
1388                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1389                         "0x%x data 0x%llx\n", msr, data);
1390                 break;
1391         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1392                 if (kvm_hv_msr_partition_wide(msr)) {
1393                         int r;
1394                         mutex_lock(&vcpu->kvm->lock);
1395                         r = set_msr_hyperv_pw(vcpu, msr, data);
1396                         mutex_unlock(&vcpu->kvm->lock);
1397                         return r;
1398                 } else
1399                         return set_msr_hyperv(vcpu, msr, data);
1400                 break;
1401         default:
1402                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1403                         return xen_hvm_config(vcpu, data);
1404                 if (!ignore_msrs) {
1405                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1406                                 msr, data);
1407                         return 1;
1408                 } else {
1409                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1410                                 msr, data);
1411                         break;
1412                 }
1413         }
1414         return 0;
1415 }
1416 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1417
1418
1419 /*
1420  * Reads an msr value (of 'msr_index') into 'pdata'.
1421  * Returns 0 on success, non-0 otherwise.
1422  * Assumes vcpu_load() was already called.
1423  */
1424 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1425 {
1426         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1427 }
1428
1429 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1430 {
1431         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1432
1433         if (!msr_mtrr_valid(msr))
1434                 return 1;
1435
1436         if (msr == MSR_MTRRdefType)
1437                 *pdata = vcpu->arch.mtrr_state.def_type +
1438                          (vcpu->arch.mtrr_state.enabled << 10);
1439         else if (msr == MSR_MTRRfix64K_00000)
1440                 *pdata = p[0];
1441         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1442                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1443         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1444                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1445         else if (msr == MSR_IA32_CR_PAT)
1446                 *pdata = vcpu->arch.pat;
1447         else {  /* Variable MTRRs */
1448                 int idx, is_mtrr_mask;
1449                 u64 *pt;
1450
1451                 idx = (msr - 0x200) / 2;
1452                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1453                 if (!is_mtrr_mask)
1454                         pt =
1455                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1456                 else
1457                         pt =
1458                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1459                 *pdata = *pt;
1460         }
1461
1462         return 0;
1463 }
1464
1465 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1466 {
1467         u64 data;
1468         u64 mcg_cap = vcpu->arch.mcg_cap;
1469         unsigned bank_num = mcg_cap & 0xff;
1470
1471         switch (msr) {
1472         case MSR_IA32_P5_MC_ADDR:
1473         case MSR_IA32_P5_MC_TYPE:
1474                 data = 0;
1475                 break;
1476         case MSR_IA32_MCG_CAP:
1477                 data = vcpu->arch.mcg_cap;
1478                 break;
1479         case MSR_IA32_MCG_CTL:
1480                 if (!(mcg_cap & MCG_CTL_P))
1481                         return 1;
1482                 data = vcpu->arch.mcg_ctl;
1483                 break;
1484         case MSR_IA32_MCG_STATUS:
1485                 data = vcpu->arch.mcg_status;
1486                 break;
1487         default:
1488                 if (msr >= MSR_IA32_MC0_CTL &&
1489                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1490                         u32 offset = msr - MSR_IA32_MC0_CTL;
1491                         data = vcpu->arch.mce_banks[offset];
1492                         break;
1493                 }
1494                 return 1;
1495         }
1496         *pdata = data;
1497         return 0;
1498 }
1499
1500 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1501 {
1502         u64 data = 0;
1503         struct kvm *kvm = vcpu->kvm;
1504
1505         switch (msr) {
1506         case HV_X64_MSR_GUEST_OS_ID:
1507                 data = kvm->arch.hv_guest_os_id;
1508                 break;
1509         case HV_X64_MSR_HYPERCALL:
1510                 data = kvm->arch.hv_hypercall;
1511                 break;
1512         default:
1513                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1514                 return 1;
1515         }
1516
1517         *pdata = data;
1518         return 0;
1519 }
1520
1521 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1522 {
1523         u64 data = 0;
1524
1525         switch (msr) {
1526         case HV_X64_MSR_VP_INDEX: {
1527                 int r;
1528                 struct kvm_vcpu *v;
1529                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1530                         if (v == vcpu)
1531                                 data = r;
1532                 break;
1533         }
1534         case HV_X64_MSR_EOI:
1535                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1536         case HV_X64_MSR_ICR:
1537                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1538         case HV_X64_MSR_TPR:
1539                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1540         default:
1541                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1542                 return 1;
1543         }
1544         *pdata = data;
1545         return 0;
1546 }
1547
1548 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1549 {
1550         u64 data;
1551
1552         switch (msr) {
1553         case MSR_IA32_PLATFORM_ID:
1554         case MSR_IA32_UCODE_REV:
1555         case MSR_IA32_EBL_CR_POWERON:
1556         case MSR_IA32_DEBUGCTLMSR:
1557         case MSR_IA32_LASTBRANCHFROMIP:
1558         case MSR_IA32_LASTBRANCHTOIP:
1559         case MSR_IA32_LASTINTFROMIP:
1560         case MSR_IA32_LASTINTTOIP:
1561         case MSR_K8_SYSCFG:
1562         case MSR_K7_HWCR:
1563         case MSR_VM_HSAVE_PA:
1564         case MSR_P6_PERFCTR0:
1565         case MSR_P6_PERFCTR1:
1566         case MSR_P6_EVNTSEL0:
1567         case MSR_P6_EVNTSEL1:
1568         case MSR_K7_EVNTSEL0:
1569         case MSR_K7_PERFCTR0:
1570         case MSR_K8_INT_PENDING_MSG:
1571         case MSR_AMD64_NB_CFG:
1572         case MSR_FAM10H_MMIO_CONF_BASE:
1573                 data = 0;
1574                 break;
1575         case MSR_MTRRcap:
1576                 data = 0x500 | KVM_NR_VAR_MTRR;
1577                 break;
1578         case 0x200 ... 0x2ff:
1579                 return get_msr_mtrr(vcpu, msr, pdata);
1580         case 0xcd: /* fsb frequency */
1581                 data = 3;
1582                 break;
1583         case MSR_IA32_APICBASE:
1584                 data = kvm_get_apic_base(vcpu);
1585                 break;
1586         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1587                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1588                 break;
1589         case MSR_IA32_MISC_ENABLE:
1590                 data = vcpu->arch.ia32_misc_enable_msr;
1591                 break;
1592         case MSR_IA32_PERF_STATUS:
1593                 /* TSC increment by tick */
1594                 data = 1000ULL;
1595                 /* CPU multiplier */
1596                 data |= (((uint64_t)4ULL) << 40);
1597                 break;
1598         case MSR_EFER:
1599                 data = vcpu->arch.efer;
1600                 break;
1601         case MSR_KVM_WALL_CLOCK:
1602         case MSR_KVM_WALL_CLOCK_NEW:
1603                 data = vcpu->kvm->arch.wall_clock;
1604                 break;
1605         case MSR_KVM_SYSTEM_TIME:
1606         case MSR_KVM_SYSTEM_TIME_NEW:
1607                 data = vcpu->arch.time;
1608                 break;
1609         case MSR_IA32_P5_MC_ADDR:
1610         case MSR_IA32_P5_MC_TYPE:
1611         case MSR_IA32_MCG_CAP:
1612         case MSR_IA32_MCG_CTL:
1613         case MSR_IA32_MCG_STATUS:
1614         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1615                 return get_msr_mce(vcpu, msr, pdata);
1616         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1617                 if (kvm_hv_msr_partition_wide(msr)) {
1618                         int r;
1619                         mutex_lock(&vcpu->kvm->lock);
1620                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1621                         mutex_unlock(&vcpu->kvm->lock);
1622                         return r;
1623                 } else
1624                         return get_msr_hyperv(vcpu, msr, pdata);
1625                 break;
1626         default:
1627                 if (!ignore_msrs) {
1628                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1629                         return 1;
1630                 } else {
1631                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1632                         data = 0;
1633                 }
1634                 break;
1635         }
1636         *pdata = data;
1637         return 0;
1638 }
1639 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1640
1641 /*
1642  * Read or write a bunch of msrs. All parameters are kernel addresses.
1643  *
1644  * @return number of msrs set successfully.
1645  */
1646 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1647                     struct kvm_msr_entry *entries,
1648                     int (*do_msr)(struct kvm_vcpu *vcpu,
1649                                   unsigned index, u64 *data))
1650 {
1651         int i, idx;
1652
1653         idx = srcu_read_lock(&vcpu->kvm->srcu);
1654         for (i = 0; i < msrs->nmsrs; ++i)
1655                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1656                         break;
1657         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1658
1659         return i;
1660 }
1661
1662 /*
1663  * Read or write a bunch of msrs. Parameters are user addresses.
1664  *
1665  * @return number of msrs set successfully.
1666  */
1667 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1668                   int (*do_msr)(struct kvm_vcpu *vcpu,
1669                                 unsigned index, u64 *data),
1670                   int writeback)
1671 {
1672         struct kvm_msrs msrs;
1673         struct kvm_msr_entry *entries;
1674         int r, n;
1675         unsigned size;
1676
1677         r = -EFAULT;
1678         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1679                 goto out;
1680
1681         r = -E2BIG;
1682         if (msrs.nmsrs >= MAX_IO_MSRS)
1683                 goto out;
1684
1685         r = -ENOMEM;
1686         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1687         entries = kmalloc(size, GFP_KERNEL);
1688         if (!entries)
1689                 goto out;
1690
1691         r = -EFAULT;
1692         if (copy_from_user(entries, user_msrs->entries, size))
1693                 goto out_free;
1694
1695         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1696         if (r < 0)
1697                 goto out_free;
1698
1699         r = -EFAULT;
1700         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1701                 goto out_free;
1702
1703         r = n;
1704
1705 out_free:
1706         kfree(entries);
1707 out:
1708         return r;
1709 }
1710
1711 int kvm_dev_ioctl_check_extension(long ext)
1712 {
1713         int r;
1714
1715         switch (ext) {
1716         case KVM_CAP_IRQCHIP:
1717         case KVM_CAP_HLT:
1718         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1719         case KVM_CAP_SET_TSS_ADDR:
1720         case KVM_CAP_EXT_CPUID:
1721         case KVM_CAP_CLOCKSOURCE:
1722         case KVM_CAP_PIT:
1723         case KVM_CAP_NOP_IO_DELAY:
1724         case KVM_CAP_MP_STATE:
1725         case KVM_CAP_SYNC_MMU:
1726         case KVM_CAP_REINJECT_CONTROL:
1727         case KVM_CAP_IRQ_INJECT_STATUS:
1728         case KVM_CAP_ASSIGN_DEV_IRQ:
1729         case KVM_CAP_IRQFD:
1730         case KVM_CAP_IOEVENTFD:
1731         case KVM_CAP_PIT2:
1732         case KVM_CAP_PIT_STATE2:
1733         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1734         case KVM_CAP_XEN_HVM:
1735         case KVM_CAP_ADJUST_CLOCK:
1736         case KVM_CAP_VCPU_EVENTS:
1737         case KVM_CAP_HYPERV:
1738         case KVM_CAP_HYPERV_VAPIC:
1739         case KVM_CAP_HYPERV_SPIN:
1740         case KVM_CAP_PCI_SEGMENT:
1741         case KVM_CAP_DEBUGREGS:
1742         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1743         case KVM_CAP_XSAVE:
1744                 r = 1;
1745                 break;
1746         case KVM_CAP_COALESCED_MMIO:
1747                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1748                 break;
1749         case KVM_CAP_VAPIC:
1750                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1751                 break;
1752         case KVM_CAP_NR_VCPUS:
1753                 r = KVM_MAX_VCPUS;
1754                 break;
1755         case KVM_CAP_NR_MEMSLOTS:
1756                 r = KVM_MEMORY_SLOTS;
1757                 break;
1758         case KVM_CAP_PV_MMU:    /* obsolete */
1759                 r = 0;
1760                 break;
1761         case KVM_CAP_IOMMU:
1762                 r = iommu_found();
1763                 break;
1764         case KVM_CAP_MCE:
1765                 r = KVM_MAX_MCE_BANKS;
1766                 break;
1767         case KVM_CAP_XCRS:
1768                 r = cpu_has_xsave;
1769                 break;
1770         default:
1771                 r = 0;
1772                 break;
1773         }
1774         return r;
1775
1776 }
1777
1778 long kvm_arch_dev_ioctl(struct file *filp,
1779                         unsigned int ioctl, unsigned long arg)
1780 {
1781         void __user *argp = (void __user *)arg;
1782         long r;
1783
1784         switch (ioctl) {
1785         case KVM_GET_MSR_INDEX_LIST: {
1786                 struct kvm_msr_list __user *user_msr_list = argp;
1787                 struct kvm_msr_list msr_list;
1788                 unsigned n;
1789
1790                 r = -EFAULT;
1791                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1792                         goto out;
1793                 n = msr_list.nmsrs;
1794                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1795                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1796                         goto out;
1797                 r = -E2BIG;
1798                 if (n < msr_list.nmsrs)
1799                         goto out;
1800                 r = -EFAULT;
1801                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1802                                  num_msrs_to_save * sizeof(u32)))
1803                         goto out;
1804                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1805                                  &emulated_msrs,
1806                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1807                         goto out;
1808                 r = 0;
1809                 break;
1810         }
1811         case KVM_GET_SUPPORTED_CPUID: {
1812                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1813                 struct kvm_cpuid2 cpuid;
1814
1815                 r = -EFAULT;
1816                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1817                         goto out;
1818                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1819                                                       cpuid_arg->entries);
1820                 if (r)
1821                         goto out;
1822
1823                 r = -EFAULT;
1824                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1825                         goto out;
1826                 r = 0;
1827                 break;
1828         }
1829         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1830                 u64 mce_cap;
1831
1832                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1833                 r = -EFAULT;
1834                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1835                         goto out;
1836                 r = 0;
1837                 break;
1838         }
1839         default:
1840                 r = -EINVAL;
1841         }
1842 out:
1843         return r;
1844 }
1845
1846 static void wbinvd_ipi(void *garbage)
1847 {
1848         wbinvd();
1849 }
1850
1851 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
1852 {
1853         return vcpu->kvm->arch.iommu_domain &&
1854                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
1855 }
1856
1857 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1858 {
1859         /* Address WBINVD may be executed by guest */
1860         if (need_emulate_wbinvd(vcpu)) {
1861                 if (kvm_x86_ops->has_wbinvd_exit())
1862                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
1863                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
1864                         smp_call_function_single(vcpu->cpu,
1865                                         wbinvd_ipi, NULL, 1);
1866         }
1867
1868         kvm_x86_ops->vcpu_load(vcpu, cpu);
1869         if (unlikely(vcpu->cpu != cpu)) {
1870                 /* Make sure TSC doesn't go backwards */
1871                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
1872                                 native_read_tsc() - vcpu->arch.last_host_tsc;
1873                 if (tsc_delta < 0)
1874                         mark_tsc_unstable("KVM discovered backwards TSC");
1875                 if (check_tsc_unstable())
1876                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
1877                 kvm_migrate_timers(vcpu);
1878                 vcpu->cpu = cpu;
1879         }
1880 }
1881
1882 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1883 {
1884         kvm_x86_ops->vcpu_put(vcpu);
1885         kvm_put_guest_fpu(vcpu);
1886         vcpu->arch.last_host_tsc = native_read_tsc();
1887 }
1888
1889 static int is_efer_nx(void)
1890 {
1891         unsigned long long efer = 0;
1892
1893         rdmsrl_safe(MSR_EFER, &efer);
1894         return efer & EFER_NX;
1895 }
1896
1897 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1898 {
1899         int i;
1900         struct kvm_cpuid_entry2 *e, *entry;
1901
1902         entry = NULL;
1903         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1904                 e = &vcpu->arch.cpuid_entries[i];
1905                 if (e->function == 0x80000001) {
1906                         entry = e;
1907                         break;
1908                 }
1909         }
1910         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1911                 entry->edx &= ~(1 << 20);
1912                 printk(KERN_INFO "kvm: guest NX capability removed\n");
1913         }
1914 }
1915
1916 /* when an old userspace process fills a new kernel module */
1917 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1918                                     struct kvm_cpuid *cpuid,
1919                                     struct kvm_cpuid_entry __user *entries)
1920 {
1921         int r, i;
1922         struct kvm_cpuid_entry *cpuid_entries;
1923
1924         r = -E2BIG;
1925         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1926                 goto out;
1927         r = -ENOMEM;
1928         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1929         if (!cpuid_entries)
1930                 goto out;
1931         r = -EFAULT;
1932         if (copy_from_user(cpuid_entries, entries,
1933                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1934                 goto out_free;
1935         for (i = 0; i < cpuid->nent; i++) {
1936                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1937                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1938                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1939                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1940                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1941                 vcpu->arch.cpuid_entries[i].index = 0;
1942                 vcpu->arch.cpuid_entries[i].flags = 0;
1943                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1944                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1945                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1946         }
1947         vcpu->arch.cpuid_nent = cpuid->nent;
1948         cpuid_fix_nx_cap(vcpu);
1949         r = 0;
1950         kvm_apic_set_version(vcpu);
1951         kvm_x86_ops->cpuid_update(vcpu);
1952         update_cpuid(vcpu);
1953
1954 out_free:
1955         vfree(cpuid_entries);
1956 out:
1957         return r;
1958 }
1959
1960 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1961                                      struct kvm_cpuid2 *cpuid,
1962                                      struct kvm_cpuid_entry2 __user *entries)
1963 {
1964         int r;
1965
1966         r = -E2BIG;
1967         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1968                 goto out;
1969         r = -EFAULT;
1970         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1971                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1972                 goto out;
1973         vcpu->arch.cpuid_nent = cpuid->nent;
1974         kvm_apic_set_version(vcpu);
1975         kvm_x86_ops->cpuid_update(vcpu);
1976         update_cpuid(vcpu);
1977         return 0;
1978
1979 out:
1980         return r;
1981 }
1982
1983 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1984                                      struct kvm_cpuid2 *cpuid,
1985                                      struct kvm_cpuid_entry2 __user *entries)
1986 {
1987         int r;
1988
1989         r = -E2BIG;
1990         if (cpuid->nent < vcpu->arch.cpuid_nent)
1991                 goto out;
1992         r = -EFAULT;
1993         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1994                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1995                 goto out;
1996         return 0;
1997
1998 out:
1999         cpuid->nent = vcpu->arch.cpuid_nent;
2000         return r;
2001 }
2002
2003 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2004                            u32 index)
2005 {
2006         entry->function = function;
2007         entry->index = index;
2008         cpuid_count(entry->function, entry->index,
2009                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2010         entry->flags = 0;
2011 }
2012
2013 #define F(x) bit(X86_FEATURE_##x)
2014
2015 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2016                          u32 index, int *nent, int maxnent)
2017 {
2018         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2019 #ifdef CONFIG_X86_64
2020         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2021                                 ? F(GBPAGES) : 0;
2022         unsigned f_lm = F(LM);
2023 #else
2024         unsigned f_gbpages = 0;
2025         unsigned f_lm = 0;
2026 #endif
2027         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2028
2029         /* cpuid 1.edx */
2030         const u32 kvm_supported_word0_x86_features =
2031                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2032                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2033                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2034                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2035                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2036                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2037                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2038                 0 /* HTT, TM, Reserved, PBE */;
2039         /* cpuid 0x80000001.edx */
2040         const u32 kvm_supported_word1_x86_features =
2041                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2042                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2043                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2044                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2045                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2046                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2047                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2048                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2049         /* cpuid 1.ecx */
2050         const u32 kvm_supported_word4_x86_features =
2051                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2052                 0 /* DS-CPL, VMX, SMX, EST */ |
2053                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2054                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2055                 0 /* Reserved, DCA */ | F(XMM4_1) |
2056                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2057                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2058         /* cpuid 0x80000001.ecx */
2059         const u32 kvm_supported_word6_x86_features =
2060                 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
2061                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2062                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2063                 0 /* SKINIT */ | 0 /* WDT */;
2064
2065         /* all calls to cpuid_count() should be made on the same cpu */
2066         get_cpu();
2067         do_cpuid_1_ent(entry, function, index);
2068         ++*nent;
2069
2070         switch (function) {
2071         case 0:
2072                 entry->eax = min(entry->eax, (u32)0xd);
2073                 break;
2074         case 1:
2075                 entry->edx &= kvm_supported_word0_x86_features;
2076                 entry->ecx &= kvm_supported_word4_x86_features;
2077                 /* we support x2apic emulation even if host does not support
2078                  * it since we emulate x2apic in software */
2079                 entry->ecx |= F(X2APIC);
2080                 break;
2081         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2082          * may return different values. This forces us to get_cpu() before
2083          * issuing the first command, and also to emulate this annoying behavior
2084          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2085         case 2: {
2086                 int t, times = entry->eax & 0xff;
2087
2088                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2089                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2090                 for (t = 1; t < times && *nent < maxnent; ++t) {
2091                         do_cpuid_1_ent(&entry[t], function, 0);
2092                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2093                         ++*nent;
2094                 }
2095                 break;
2096         }
2097         /* function 4 and 0xb have additional index. */
2098         case 4: {
2099                 int i, cache_type;
2100
2101                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2102                 /* read more entries until cache_type is zero */
2103                 for (i = 1; *nent < maxnent; ++i) {
2104                         cache_type = entry[i - 1].eax & 0x1f;
2105                         if (!cache_type)
2106                                 break;
2107                         do_cpuid_1_ent(&entry[i], function, i);
2108                         entry[i].flags |=
2109                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2110                         ++*nent;
2111                 }
2112                 break;
2113         }
2114         case 0xb: {
2115                 int i, level_type;
2116
2117                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2118                 /* read more entries until level_type is zero */
2119                 for (i = 1; *nent < maxnent; ++i) {
2120                         level_type = entry[i - 1].ecx & 0xff00;
2121                         if (!level_type)
2122                                 break;
2123                         do_cpuid_1_ent(&entry[i], function, i);
2124                         entry[i].flags |=
2125                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2126                         ++*nent;
2127                 }
2128                 break;
2129         }
2130         case 0xd: {
2131                 int i;
2132
2133                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2134                 for (i = 1; *nent < maxnent; ++i) {
2135                         if (entry[i - 1].eax == 0 && i != 2)
2136                                 break;
2137                         do_cpuid_1_ent(&entry[i], function, i);
2138                         entry[i].flags |=
2139                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2140                         ++*nent;
2141                 }
2142                 break;
2143         }
2144         case KVM_CPUID_SIGNATURE: {
2145                 char signature[12] = "KVMKVMKVM\0\0";
2146                 u32 *sigptr = (u32 *)signature;
2147                 entry->eax = 0;
2148                 entry->ebx = sigptr[0];
2149                 entry->ecx = sigptr[1];
2150                 entry->edx = sigptr[2];
2151                 break;
2152         }
2153         case KVM_CPUID_FEATURES:
2154                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2155                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2156                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2157                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2158                 entry->ebx = 0;
2159                 entry->ecx = 0;
2160                 entry->edx = 0;
2161                 break;
2162         case 0x80000000:
2163                 entry->eax = min(entry->eax, 0x8000001a);
2164                 break;
2165         case 0x80000001:
2166                 entry->edx &= kvm_supported_word1_x86_features;
2167                 entry->ecx &= kvm_supported_word6_x86_features;
2168                 break;
2169         }
2170
2171         kvm_x86_ops->set_supported_cpuid(function, entry);
2172
2173         put_cpu();
2174 }
2175
2176 #undef F
2177
2178 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2179                                      struct kvm_cpuid_entry2 __user *entries)
2180 {
2181         struct kvm_cpuid_entry2 *cpuid_entries;
2182         int limit, nent = 0, r = -E2BIG;
2183         u32 func;
2184
2185         if (cpuid->nent < 1)
2186                 goto out;
2187         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2188                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2189         r = -ENOMEM;
2190         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2191         if (!cpuid_entries)
2192                 goto out;
2193
2194         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2195         limit = cpuid_entries[0].eax;
2196         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2197                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2198                              &nent, cpuid->nent);
2199         r = -E2BIG;
2200         if (nent >= cpuid->nent)
2201                 goto out_free;
2202
2203         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2204         limit = cpuid_entries[nent - 1].eax;
2205         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2206                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2207                              &nent, cpuid->nent);
2208
2209
2210
2211         r = -E2BIG;
2212         if (nent >= cpuid->nent)
2213                 goto out_free;
2214
2215         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2216                      cpuid->nent);
2217
2218         r = -E2BIG;
2219         if (nent >= cpuid->nent)
2220                 goto out_free;
2221
2222         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2223                      cpuid->nent);
2224
2225         r = -E2BIG;
2226         if (nent >= cpuid->nent)
2227                 goto out_free;
2228
2229         r = -EFAULT;
2230         if (copy_to_user(entries, cpuid_entries,
2231                          nent * sizeof(struct kvm_cpuid_entry2)))
2232                 goto out_free;
2233         cpuid->nent = nent;
2234         r = 0;
2235
2236 out_free:
2237         vfree(cpuid_entries);
2238 out:
2239         return r;
2240 }
2241
2242 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2243                                     struct kvm_lapic_state *s)
2244 {
2245         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2246
2247         return 0;
2248 }
2249
2250 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2251                                     struct kvm_lapic_state *s)
2252 {
2253         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2254         kvm_apic_post_state_restore(vcpu);
2255         update_cr8_intercept(vcpu);
2256
2257         return 0;
2258 }
2259
2260 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2261                                     struct kvm_interrupt *irq)
2262 {
2263         if (irq->irq < 0 || irq->irq >= 256)
2264                 return -EINVAL;
2265         if (irqchip_in_kernel(vcpu->kvm))
2266                 return -ENXIO;
2267
2268         kvm_queue_interrupt(vcpu, irq->irq, false);
2269
2270         return 0;
2271 }
2272
2273 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2274 {
2275         kvm_inject_nmi(vcpu);
2276
2277         return 0;
2278 }
2279
2280 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2281                                            struct kvm_tpr_access_ctl *tac)
2282 {
2283         if (tac->flags)
2284                 return -EINVAL;
2285         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2286         return 0;
2287 }
2288
2289 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2290                                         u64 mcg_cap)
2291 {
2292         int r;
2293         unsigned bank_num = mcg_cap & 0xff, bank;
2294
2295         r = -EINVAL;
2296         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2297                 goto out;
2298         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2299                 goto out;
2300         r = 0;
2301         vcpu->arch.mcg_cap = mcg_cap;
2302         /* Init IA32_MCG_CTL to all 1s */
2303         if (mcg_cap & MCG_CTL_P)
2304                 vcpu->arch.mcg_ctl = ~(u64)0;
2305         /* Init IA32_MCi_CTL to all 1s */
2306         for (bank = 0; bank < bank_num; bank++)
2307                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2308 out:
2309         return r;
2310 }
2311
2312 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2313                                       struct kvm_x86_mce *mce)
2314 {
2315         u64 mcg_cap = vcpu->arch.mcg_cap;
2316         unsigned bank_num = mcg_cap & 0xff;
2317         u64 *banks = vcpu->arch.mce_banks;
2318
2319         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2320                 return -EINVAL;
2321         /*
2322          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2323          * reporting is disabled
2324          */
2325         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2326             vcpu->arch.mcg_ctl != ~(u64)0)
2327                 return 0;
2328         banks += 4 * mce->bank;
2329         /*
2330          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2331          * reporting is disabled for the bank
2332          */
2333         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2334                 return 0;
2335         if (mce->status & MCI_STATUS_UC) {
2336                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2337                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2338                         printk(KERN_DEBUG "kvm: set_mce: "
2339                                "injects mce exception while "
2340                                "previous one is in progress!\n");
2341                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2342                         return 0;
2343                 }
2344                 if (banks[1] & MCI_STATUS_VAL)
2345                         mce->status |= MCI_STATUS_OVER;
2346                 banks[2] = mce->addr;
2347                 banks[3] = mce->misc;
2348                 vcpu->arch.mcg_status = mce->mcg_status;
2349                 banks[1] = mce->status;
2350                 kvm_queue_exception(vcpu, MC_VECTOR);
2351         } else if (!(banks[1] & MCI_STATUS_VAL)
2352                    || !(banks[1] & MCI_STATUS_UC)) {
2353                 if (banks[1] & MCI_STATUS_VAL)
2354                         mce->status |= MCI_STATUS_OVER;
2355                 banks[2] = mce->addr;
2356                 banks[3] = mce->misc;
2357                 banks[1] = mce->status;
2358         } else
2359                 banks[1] |= MCI_STATUS_OVER;
2360         return 0;
2361 }
2362
2363 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2364                                                struct kvm_vcpu_events *events)
2365 {
2366         events->exception.injected =
2367                 vcpu->arch.exception.pending &&
2368                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2369         events->exception.nr = vcpu->arch.exception.nr;
2370         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2371         events->exception.error_code = vcpu->arch.exception.error_code;
2372
2373         events->interrupt.injected =
2374                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2375         events->interrupt.nr = vcpu->arch.interrupt.nr;
2376         events->interrupt.soft = 0;
2377         events->interrupt.shadow =
2378                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2379                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2380
2381         events->nmi.injected = vcpu->arch.nmi_injected;
2382         events->nmi.pending = vcpu->arch.nmi_pending;
2383         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2384
2385         events->sipi_vector = vcpu->arch.sipi_vector;
2386
2387         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2388                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2389                          | KVM_VCPUEVENT_VALID_SHADOW);
2390 }
2391
2392 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2393                                               struct kvm_vcpu_events *events)
2394 {
2395         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2396                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2397                               | KVM_VCPUEVENT_VALID_SHADOW))
2398                 return -EINVAL;
2399
2400         vcpu->arch.exception.pending = events->exception.injected;
2401         vcpu->arch.exception.nr = events->exception.nr;
2402         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2403         vcpu->arch.exception.error_code = events->exception.error_code;
2404
2405         vcpu->arch.interrupt.pending = events->interrupt.injected;
2406         vcpu->arch.interrupt.nr = events->interrupt.nr;
2407         vcpu->arch.interrupt.soft = events->interrupt.soft;
2408         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2409                 kvm_pic_clear_isr_ack(vcpu->kvm);
2410         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2411                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2412                                                   events->interrupt.shadow);
2413
2414         vcpu->arch.nmi_injected = events->nmi.injected;
2415         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2416                 vcpu->arch.nmi_pending = events->nmi.pending;
2417         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2418
2419         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2420                 vcpu->arch.sipi_vector = events->sipi_vector;
2421
2422         return 0;
2423 }
2424
2425 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2426                                              struct kvm_debugregs *dbgregs)
2427 {
2428         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2429         dbgregs->dr6 = vcpu->arch.dr6;
2430         dbgregs->dr7 = vcpu->arch.dr7;
2431         dbgregs->flags = 0;
2432 }
2433
2434 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2435                                             struct kvm_debugregs *dbgregs)
2436 {
2437         if (dbgregs->flags)
2438                 return -EINVAL;
2439
2440         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2441         vcpu->arch.dr6 = dbgregs->dr6;
2442         vcpu->arch.dr7 = dbgregs->dr7;
2443
2444         return 0;
2445 }
2446
2447 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2448                                          struct kvm_xsave *guest_xsave)
2449 {
2450         if (cpu_has_xsave)
2451                 memcpy(guest_xsave->region,
2452                         &vcpu->arch.guest_fpu.state->xsave,
2453                         xstate_size);
2454         else {
2455                 memcpy(guest_xsave->region,
2456                         &vcpu->arch.guest_fpu.state->fxsave,
2457                         sizeof(struct i387_fxsave_struct));
2458                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2459                         XSTATE_FPSSE;
2460         }
2461 }
2462
2463 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2464                                         struct kvm_xsave *guest_xsave)
2465 {
2466         u64 xstate_bv =
2467                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2468
2469         if (cpu_has_xsave)
2470                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2471                         guest_xsave->region, xstate_size);
2472         else {
2473                 if (xstate_bv & ~XSTATE_FPSSE)
2474                         return -EINVAL;
2475                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2476                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2477         }
2478         return 0;
2479 }
2480
2481 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2482                                         struct kvm_xcrs *guest_xcrs)
2483 {
2484         if (!cpu_has_xsave) {
2485                 guest_xcrs->nr_xcrs = 0;
2486                 return;
2487         }
2488
2489         guest_xcrs->nr_xcrs = 1;
2490         guest_xcrs->flags = 0;
2491         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2492         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2493 }
2494
2495 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2496                                        struct kvm_xcrs *guest_xcrs)
2497 {
2498         int i, r = 0;
2499
2500         if (!cpu_has_xsave)
2501                 return -EINVAL;
2502
2503         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2504                 return -EINVAL;
2505
2506         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2507                 /* Only support XCR0 currently */
2508                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2509                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2510                                 guest_xcrs->xcrs[0].value);
2511                         break;
2512                 }
2513         if (r)
2514                 r = -EINVAL;
2515         return r;
2516 }
2517
2518 long kvm_arch_vcpu_ioctl(struct file *filp,
2519                          unsigned int ioctl, unsigned long arg)
2520 {
2521         struct kvm_vcpu *vcpu = filp->private_data;
2522         void __user *argp = (void __user *)arg;
2523         int r;
2524         union {
2525                 struct kvm_lapic_state *lapic;
2526                 struct kvm_xsave *xsave;
2527                 struct kvm_xcrs *xcrs;
2528                 void *buffer;
2529         } u;
2530
2531         u.buffer = NULL;
2532         switch (ioctl) {
2533         case KVM_GET_LAPIC: {
2534                 r = -EINVAL;
2535                 if (!vcpu->arch.apic)
2536                         goto out;
2537                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2538
2539                 r = -ENOMEM;
2540                 if (!u.lapic)
2541                         goto out;
2542                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2543                 if (r)
2544                         goto out;
2545                 r = -EFAULT;
2546                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2547                         goto out;
2548                 r = 0;
2549                 break;
2550         }
2551         case KVM_SET_LAPIC: {
2552                 r = -EINVAL;
2553                 if (!vcpu->arch.apic)
2554                         goto out;
2555                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2556                 r = -ENOMEM;
2557                 if (!u.lapic)
2558                         goto out;
2559                 r = -EFAULT;
2560                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2561                         goto out;
2562                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2563                 if (r)
2564                         goto out;
2565                 r = 0;
2566                 break;
2567         }
2568         case KVM_INTERRUPT: {
2569                 struct kvm_interrupt irq;
2570
2571                 r = -EFAULT;
2572                 if (copy_from_user(&irq, argp, sizeof irq))
2573                         goto out;
2574                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2575                 if (r)
2576                         goto out;
2577                 r = 0;
2578                 break;
2579         }
2580         case KVM_NMI: {
2581                 r = kvm_vcpu_ioctl_nmi(vcpu);
2582                 if (r)
2583                         goto out;
2584                 r = 0;
2585                 break;
2586         }
2587         case KVM_SET_CPUID: {
2588                 struct kvm_cpuid __user *cpuid_arg = argp;
2589                 struct kvm_cpuid cpuid;
2590
2591                 r = -EFAULT;
2592                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2593                         goto out;
2594                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2595                 if (r)
2596                         goto out;
2597                 break;
2598         }
2599         case KVM_SET_CPUID2: {
2600                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2601                 struct kvm_cpuid2 cpuid;
2602
2603                 r = -EFAULT;
2604                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2605                         goto out;
2606                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2607                                               cpuid_arg->entries);
2608                 if (r)
2609                         goto out;
2610                 break;
2611         }
2612         case KVM_GET_CPUID2: {
2613                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2614                 struct kvm_cpuid2 cpuid;
2615
2616                 r = -EFAULT;
2617                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2618                         goto out;
2619                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2620                                               cpuid_arg->entries);
2621                 if (r)
2622                         goto out;
2623                 r = -EFAULT;
2624                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2625                         goto out;
2626                 r = 0;
2627                 break;
2628         }
2629         case KVM_GET_MSRS:
2630                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2631                 break;
2632         case KVM_SET_MSRS:
2633                 r = msr_io(vcpu, argp, do_set_msr, 0);
2634                 break;
2635         case KVM_TPR_ACCESS_REPORTING: {
2636                 struct kvm_tpr_access_ctl tac;
2637
2638                 r = -EFAULT;
2639                 if (copy_from_user(&tac, argp, sizeof tac))
2640                         goto out;
2641                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2642                 if (r)
2643                         goto out;
2644                 r = -EFAULT;
2645                 if (copy_to_user(argp, &tac, sizeof tac))
2646                         goto out;
2647                 r = 0;
2648                 break;
2649         };
2650         case KVM_SET_VAPIC_ADDR: {
2651                 struct kvm_vapic_addr va;
2652
2653                 r = -EINVAL;
2654                 if (!irqchip_in_kernel(vcpu->kvm))
2655                         goto out;
2656                 r = -EFAULT;
2657                 if (copy_from_user(&va, argp, sizeof va))
2658                         goto out;
2659                 r = 0;
2660                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2661                 break;
2662         }
2663         case KVM_X86_SETUP_MCE: {
2664                 u64 mcg_cap;
2665
2666                 r = -EFAULT;
2667                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2668                         goto out;
2669                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2670                 break;
2671         }
2672         case KVM_X86_SET_MCE: {
2673                 struct kvm_x86_mce mce;
2674
2675                 r = -EFAULT;
2676                 if (copy_from_user(&mce, argp, sizeof mce))
2677                         goto out;
2678                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2679                 break;
2680         }
2681         case KVM_GET_VCPU_EVENTS: {
2682                 struct kvm_vcpu_events events;
2683
2684                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2685
2686                 r = -EFAULT;
2687                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2688                         break;
2689                 r = 0;
2690                 break;
2691         }
2692         case KVM_SET_VCPU_EVENTS: {
2693                 struct kvm_vcpu_events events;
2694
2695                 r = -EFAULT;
2696                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2697                         break;
2698
2699                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2700                 break;
2701         }
2702         case KVM_GET_DEBUGREGS: {
2703                 struct kvm_debugregs dbgregs;
2704
2705                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2706
2707                 r = -EFAULT;
2708                 if (copy_to_user(argp, &dbgregs,
2709                                  sizeof(struct kvm_debugregs)))
2710                         break;
2711                 r = 0;
2712                 break;
2713         }
2714         case KVM_SET_DEBUGREGS: {
2715                 struct kvm_debugregs dbgregs;
2716
2717                 r = -EFAULT;
2718                 if (copy_from_user(&dbgregs, argp,
2719                                    sizeof(struct kvm_debugregs)))
2720                         break;
2721
2722                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2723                 break;
2724         }
2725         case KVM_GET_XSAVE: {
2726                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2727                 r = -ENOMEM;
2728                 if (!u.xsave)
2729                         break;
2730
2731                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2732
2733                 r = -EFAULT;
2734                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2735                         break;
2736                 r = 0;
2737                 break;
2738         }
2739         case KVM_SET_XSAVE: {
2740                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2741                 r = -ENOMEM;
2742                 if (!u.xsave)
2743                         break;
2744
2745                 r = -EFAULT;
2746                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2747                         break;
2748
2749                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2750                 break;
2751         }
2752         case KVM_GET_XCRS: {
2753                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2754                 r = -ENOMEM;
2755                 if (!u.xcrs)
2756                         break;
2757
2758                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2759
2760                 r = -EFAULT;
2761                 if (copy_to_user(argp, u.xcrs,
2762                                  sizeof(struct kvm_xcrs)))
2763                         break;
2764                 r = 0;
2765                 break;
2766         }
2767         case KVM_SET_XCRS: {
2768                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2769                 r = -ENOMEM;
2770                 if (!u.xcrs)
2771                         break;
2772
2773                 r = -EFAULT;
2774                 if (copy_from_user(u.xcrs, argp,
2775                                    sizeof(struct kvm_xcrs)))
2776                         break;
2777
2778                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2779                 break;
2780         }
2781         default:
2782                 r = -EINVAL;
2783         }
2784 out:
2785         kfree(u.buffer);
2786         return r;
2787 }
2788
2789 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2790 {
2791         int ret;
2792
2793         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2794                 return -1;
2795         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2796         return ret;
2797 }
2798
2799 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2800                                               u64 ident_addr)
2801 {
2802         kvm->arch.ept_identity_map_addr = ident_addr;
2803         return 0;
2804 }
2805
2806 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2807                                           u32 kvm_nr_mmu_pages)
2808 {
2809         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2810                 return -EINVAL;
2811
2812         mutex_lock(&kvm->slots_lock);
2813         spin_lock(&kvm->mmu_lock);
2814
2815         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2816         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2817
2818         spin_unlock(&kvm->mmu_lock);
2819         mutex_unlock(&kvm->slots_lock);
2820         return 0;
2821 }
2822
2823 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2824 {
2825         return kvm->arch.n_max_mmu_pages;
2826 }
2827
2828 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2829 {
2830         int r;
2831
2832         r = 0;
2833         switch (chip->chip_id) {
2834         case KVM_IRQCHIP_PIC_MASTER:
2835                 memcpy(&chip->chip.pic,
2836                         &pic_irqchip(kvm)->pics[0],
2837                         sizeof(struct kvm_pic_state));
2838                 break;
2839         case KVM_IRQCHIP_PIC_SLAVE:
2840                 memcpy(&chip->chip.pic,
2841                         &pic_irqchip(kvm)->pics[1],
2842                         sizeof(struct kvm_pic_state));
2843                 break;
2844         case KVM_IRQCHIP_IOAPIC:
2845                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2846                 break;
2847         default:
2848                 r = -EINVAL;
2849                 break;
2850         }
2851         return r;
2852 }
2853
2854 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2855 {
2856         int r;
2857
2858         r = 0;
2859         switch (chip->chip_id) {
2860         case KVM_IRQCHIP_PIC_MASTER:
2861                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2862                 memcpy(&pic_irqchip(kvm)->pics[0],
2863                         &chip->chip.pic,
2864                         sizeof(struct kvm_pic_state));
2865                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2866                 break;
2867         case KVM_IRQCHIP_PIC_SLAVE:
2868                 raw_spin_lock(&pic_irqchip(kvm)->lock);
2869                 memcpy(&pic_irqchip(kvm)->pics[1],
2870                         &chip->chip.pic,
2871                         sizeof(struct kvm_pic_state));
2872                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
2873                 break;
2874         case KVM_IRQCHIP_IOAPIC:
2875                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2876                 break;
2877         default:
2878                 r = -EINVAL;
2879                 break;
2880         }
2881         kvm_pic_update_irq(pic_irqchip(kvm));
2882         return r;
2883 }
2884
2885 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2886 {
2887         int r = 0;
2888
2889         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2890         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2891         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2892         return r;
2893 }
2894
2895 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2896 {
2897         int r = 0;
2898
2899         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2900         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2901         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2902         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2903         return r;
2904 }
2905
2906 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2907 {
2908         int r = 0;
2909
2910         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2911         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2912                 sizeof(ps->channels));
2913         ps->flags = kvm->arch.vpit->pit_state.flags;
2914         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2915         return r;
2916 }
2917
2918 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2919 {
2920         int r = 0, start = 0;
2921         u32 prev_legacy, cur_legacy;
2922         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2923         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2924         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2925         if (!prev_legacy && cur_legacy)
2926                 start = 1;
2927         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2928                sizeof(kvm->arch.vpit->pit_state.channels));
2929         kvm->arch.vpit->pit_state.flags = ps->flags;
2930         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2931         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2932         return r;
2933 }
2934
2935 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2936                                  struct kvm_reinject_control *control)
2937 {
2938         if (!kvm->arch.vpit)
2939                 return -ENXIO;
2940         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2941         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2942         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2943         return 0;
2944 }
2945
2946 /*
2947  * Get (and clear) the dirty memory log for a memory slot.
2948  */
2949 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2950                                       struct kvm_dirty_log *log)
2951 {
2952         int r, i;
2953         struct kvm_memory_slot *memslot;
2954         unsigned long n;
2955         unsigned long is_dirty = 0;
2956
2957         mutex_lock(&kvm->slots_lock);
2958
2959         r = -EINVAL;
2960         if (log->slot >= KVM_MEMORY_SLOTS)
2961                 goto out;
2962
2963         memslot = &kvm->memslots->memslots[log->slot];
2964         r = -ENOENT;
2965         if (!memslot->dirty_bitmap)
2966                 goto out;
2967
2968         n = kvm_dirty_bitmap_bytes(memslot);
2969
2970         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
2971                 is_dirty = memslot->dirty_bitmap[i];
2972
2973         /* If nothing is dirty, don't bother messing with page tables. */
2974         if (is_dirty) {
2975                 struct kvm_memslots *slots, *old_slots;
2976                 unsigned long *dirty_bitmap;
2977
2978                 spin_lock(&kvm->mmu_lock);
2979                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2980                 spin_unlock(&kvm->mmu_lock);
2981
2982                 r = -ENOMEM;
2983                 dirty_bitmap = vmalloc(n);
2984                 if (!dirty_bitmap)
2985                         goto out;
2986                 memset(dirty_bitmap, 0, n);
2987
2988                 r = -ENOMEM;
2989                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
2990                 if (!slots) {
2991                         vfree(dirty_bitmap);
2992                         goto out;
2993                 }
2994                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
2995                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
2996
2997                 old_slots = kvm->memslots;
2998                 rcu_assign_pointer(kvm->memslots, slots);
2999                 synchronize_srcu_expedited(&kvm->srcu);
3000                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3001                 kfree(old_slots);
3002
3003                 r = -EFAULT;
3004                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3005                         vfree(dirty_bitmap);
3006                         goto out;
3007                 }
3008                 vfree(dirty_bitmap);
3009         } else {
3010                 r = -EFAULT;
3011                 if (clear_user(log->dirty_bitmap, n))
3012                         goto out;
3013         }
3014
3015         r = 0;
3016 out:
3017         mutex_unlock(&kvm->slots_lock);
3018         return r;
3019 }
3020
3021 long kvm_arch_vm_ioctl(struct file *filp,
3022                        unsigned int ioctl, unsigned long arg)
3023 {
3024         struct kvm *kvm = filp->private_data;
3025         void __user *argp = (void __user *)arg;
3026         int r = -ENOTTY;
3027         /*
3028          * This union makes it completely explicit to gcc-3.x
3029          * that these two variables' stack usage should be
3030          * combined, not added together.
3031          */
3032         union {
3033                 struct kvm_pit_state ps;
3034                 struct kvm_pit_state2 ps2;
3035                 struct kvm_pit_config pit_config;
3036         } u;
3037
3038         switch (ioctl) {
3039         case KVM_SET_TSS_ADDR:
3040                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3041                 if (r < 0)
3042                         goto out;
3043                 break;
3044         case KVM_SET_IDENTITY_MAP_ADDR: {
3045                 u64 ident_addr;
3046
3047                 r = -EFAULT;
3048                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3049                         goto out;
3050                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3051                 if (r < 0)
3052                         goto out;
3053                 break;
3054         }
3055         case KVM_SET_NR_MMU_PAGES:
3056                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3057                 if (r)
3058                         goto out;
3059                 break;
3060         case KVM_GET_NR_MMU_PAGES:
3061                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3062                 break;
3063         case KVM_CREATE_IRQCHIP: {
3064                 struct kvm_pic *vpic;
3065
3066                 mutex_lock(&kvm->lock);
3067                 r = -EEXIST;
3068                 if (kvm->arch.vpic)
3069                         goto create_irqchip_unlock;
3070                 r = -ENOMEM;
3071                 vpic = kvm_create_pic(kvm);
3072                 if (vpic) {
3073                         r = kvm_ioapic_init(kvm);
3074                         if (r) {
3075                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3076                                                           &vpic->dev);
3077                                 kfree(vpic);
3078                                 goto create_irqchip_unlock;
3079                         }
3080                 } else
3081                         goto create_irqchip_unlock;
3082                 smp_wmb();
3083                 kvm->arch.vpic = vpic;
3084                 smp_wmb();
3085                 r = kvm_setup_default_irq_routing(kvm);
3086                 if (r) {
3087                         mutex_lock(&kvm->irq_lock);
3088                         kvm_ioapic_destroy(kvm);
3089                         kvm_destroy_pic(kvm);
3090                         mutex_unlock(&kvm->irq_lock);
3091                 }
3092         create_irqchip_unlock:
3093                 mutex_unlock(&kvm->lock);
3094                 break;
3095         }
3096         case KVM_CREATE_PIT:
3097                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3098                 goto create_pit;
3099         case KVM_CREATE_PIT2:
3100                 r = -EFAULT;
3101                 if (copy_from_user(&u.pit_config, argp,
3102                                    sizeof(struct kvm_pit_config)))
3103                         goto out;
3104         create_pit:
3105                 mutex_lock(&kvm->slots_lock);
3106                 r = -EEXIST;
3107                 if (kvm->arch.vpit)
3108                         goto create_pit_unlock;
3109                 r = -ENOMEM;
3110                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3111                 if (kvm->arch.vpit)
3112                         r = 0;
3113         create_pit_unlock:
3114                 mutex_unlock(&kvm->slots_lock);
3115                 break;
3116         case KVM_IRQ_LINE_STATUS:
3117         case KVM_IRQ_LINE: {
3118                 struct kvm_irq_level irq_event;
3119
3120                 r = -EFAULT;
3121                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3122                         goto out;
3123                 r = -ENXIO;
3124                 if (irqchip_in_kernel(kvm)) {
3125                         __s32 status;
3126                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3127                                         irq_event.irq, irq_event.level);
3128                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3129                                 r = -EFAULT;
3130                                 irq_event.status = status;
3131                                 if (copy_to_user(argp, &irq_event,
3132                                                         sizeof irq_event))
3133                                         goto out;
3134                         }
3135                         r = 0;
3136                 }
3137                 break;
3138         }
3139         case KVM_GET_IRQCHIP: {
3140                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3141                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3142
3143                 r = -ENOMEM;
3144                 if (!chip)
3145                         goto out;
3146                 r = -EFAULT;
3147                 if (copy_from_user(chip, argp, sizeof *chip))
3148                         goto get_irqchip_out;
3149                 r = -ENXIO;
3150                 if (!irqchip_in_kernel(kvm))
3151                         goto get_irqchip_out;
3152                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3153                 if (r)
3154                         goto get_irqchip_out;
3155                 r = -EFAULT;
3156                 if (copy_to_user(argp, chip, sizeof *chip))
3157                         goto get_irqchip_out;
3158                 r = 0;
3159         get_irqchip_out:
3160                 kfree(chip);
3161                 if (r)
3162                         goto out;
3163                 break;
3164         }
3165         case KVM_SET_IRQCHIP: {
3166                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3167                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3168
3169                 r = -ENOMEM;
3170                 if (!chip)
3171                         goto out;
3172                 r = -EFAULT;
3173                 if (copy_from_user(chip, argp, sizeof *chip))
3174                         goto set_irqchip_out;
3175                 r = -ENXIO;
3176                 if (!irqchip_in_kernel(kvm))
3177                         goto set_irqchip_out;
3178                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3179                 if (r)
3180                         goto set_irqchip_out;
3181                 r = 0;
3182         set_irqchip_out:
3183                 kfree(chip);
3184                 if (r)
3185                         goto out;
3186                 break;
3187         }
3188         case KVM_GET_PIT: {
3189                 r = -EFAULT;
3190                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3191                         goto out;
3192                 r = -ENXIO;
3193                 if (!kvm->arch.vpit)
3194                         goto out;
3195                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3196                 if (r)
3197                         goto out;
3198                 r = -EFAULT;
3199                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3200                         goto out;
3201                 r = 0;
3202                 break;
3203         }
3204         case KVM_SET_PIT: {
3205                 r = -EFAULT;
3206                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3207                         goto out;
3208                 r = -ENXIO;
3209                 if (!kvm->arch.vpit)
3210                         goto out;
3211                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3212                 if (r)
3213                         goto out;
3214                 r = 0;
3215                 break;
3216         }
3217         case KVM_GET_PIT2: {
3218                 r = -ENXIO;
3219                 if (!kvm->arch.vpit)
3220                         goto out;
3221                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3222                 if (r)
3223                         goto out;
3224                 r = -EFAULT;
3225                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3226                         goto out;
3227                 r = 0;
3228                 break;
3229         }
3230         case KVM_SET_PIT2: {
3231                 r = -EFAULT;
3232                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3233                         goto out;
3234                 r = -ENXIO;
3235                 if (!kvm->arch.vpit)
3236                         goto out;
3237                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3238                 if (r)
3239                         goto out;
3240                 r = 0;
3241                 break;
3242         }
3243         case KVM_REINJECT_CONTROL: {
3244                 struct kvm_reinject_control control;
3245                 r =  -EFAULT;
3246                 if (copy_from_user(&control, argp, sizeof(control)))
3247                         goto out;
3248                 r = kvm_vm_ioctl_reinject(kvm, &control);
3249                 if (r)
3250                         goto out;
3251                 r = 0;
3252                 break;
3253         }
3254         case KVM_XEN_HVM_CONFIG: {
3255                 r = -EFAULT;
3256                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3257                                    sizeof(struct kvm_xen_hvm_config)))
3258                         goto out;
3259                 r = -EINVAL;
3260                 if (kvm->arch.xen_hvm_config.flags)
3261                         goto out;
3262                 r = 0;
3263                 break;
3264         }
3265         case KVM_SET_CLOCK: {
3266                 struct timespec now;
3267                 struct kvm_clock_data user_ns;
3268                 u64 now_ns;
3269                 s64 delta;
3270
3271                 r = -EFAULT;
3272                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3273                         goto out;
3274
3275                 r = -EINVAL;
3276                 if (user_ns.flags)
3277                         goto out;
3278
3279                 r = 0;
3280                 ktime_get_ts(&now);
3281                 now_ns = timespec_to_ns(&now);
3282                 delta = user_ns.clock - now_ns;
3283                 kvm->arch.kvmclock_offset = delta;
3284                 break;
3285         }
3286         case KVM_GET_CLOCK: {
3287                 struct timespec now;
3288                 struct kvm_clock_data user_ns;
3289                 u64 now_ns;
3290
3291                 ktime_get_ts(&now);
3292                 now_ns = timespec_to_ns(&now);
3293                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3294                 user_ns.flags = 0;
3295
3296                 r = -EFAULT;
3297                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3298                         goto out;
3299                 r = 0;
3300                 break;
3301         }
3302
3303         default:
3304                 ;
3305         }
3306 out:
3307         return r;
3308 }
3309
3310 static void kvm_init_msr_list(void)
3311 {
3312         u32 dummy[2];
3313         unsigned i, j;
3314
3315         /* skip the first msrs in the list. KVM-specific */
3316         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3317                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3318                         continue;
3319                 if (j < i)
3320                         msrs_to_save[j] = msrs_to_save[i];
3321                 j++;
3322         }
3323         num_msrs_to_save = j;
3324 }
3325
3326 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3327                            const void *v)
3328 {
3329         if (vcpu->arch.apic &&
3330             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3331                 return 0;
3332
3333         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3334 }
3335
3336 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3337 {
3338         if (vcpu->arch.apic &&
3339             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3340                 return 0;
3341
3342         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3343 }
3344
3345 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3346                         struct kvm_segment *var, int seg)
3347 {
3348         kvm_x86_ops->set_segment(vcpu, var, seg);
3349 }
3350
3351 void kvm_get_segment(struct kvm_vcpu *vcpu,
3352                      struct kvm_segment *var, int seg)
3353 {
3354         kvm_x86_ops->get_segment(vcpu, var, seg);
3355 }
3356
3357 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3358 {
3359         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3360         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3361 }
3362
3363  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3364 {
3365         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3366         access |= PFERR_FETCH_MASK;
3367         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3368 }
3369
3370 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3371 {
3372         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3373         access |= PFERR_WRITE_MASK;
3374         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, access, error);
3375 }
3376
3377 /* uses this to access any guest's mapped memory without checking CPL */
3378 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3379 {
3380         return vcpu->arch.mmu.gva_to_gpa(vcpu, gva, 0, error);
3381 }
3382
3383 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3384                                       struct kvm_vcpu *vcpu, u32 access,
3385                                       u32 *error)
3386 {
3387         void *data = val;
3388         int r = X86EMUL_CONTINUE;
3389
3390         while (bytes) {
3391                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr, access, error);
3392                 unsigned offset = addr & (PAGE_SIZE-1);
3393                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3394                 int ret;
3395
3396                 if (gpa == UNMAPPED_GVA) {
3397                         r = X86EMUL_PROPAGATE_FAULT;
3398                         goto out;
3399                 }
3400                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3401                 if (ret < 0) {
3402                         r = X86EMUL_IO_NEEDED;
3403                         goto out;
3404                 }
3405
3406                 bytes -= toread;
3407                 data += toread;
3408                 addr += toread;
3409         }
3410 out:
3411         return r;
3412 }
3413
3414 /* used for instruction fetching */
3415 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3416                                 struct kvm_vcpu *vcpu, u32 *error)
3417 {
3418         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3419         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3420                                           access | PFERR_FETCH_MASK, error);
3421 }
3422
3423 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3424                                struct kvm_vcpu *vcpu, u32 *error)
3425 {
3426         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3427         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3428                                           error);
3429 }
3430
3431 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3432                                struct kvm_vcpu *vcpu, u32 *error)
3433 {
3434         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3435 }
3436
3437 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3438                                        unsigned int bytes,
3439                                        struct kvm_vcpu *vcpu,
3440                                        u32 *error)
3441 {
3442         void *data = val;
3443         int r = X86EMUL_CONTINUE;
3444
3445         while (bytes) {
3446                 gpa_t gpa =  vcpu->arch.mmu.gva_to_gpa(vcpu, addr,
3447                                                        PFERR_WRITE_MASK, error);
3448                 unsigned offset = addr & (PAGE_SIZE-1);
3449                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3450                 int ret;
3451
3452                 if (gpa == UNMAPPED_GVA) {
3453                         r = X86EMUL_PROPAGATE_FAULT;
3454                         goto out;
3455                 }
3456                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3457                 if (ret < 0) {
3458                         r = X86EMUL_IO_NEEDED;
3459                         goto out;
3460                 }
3461
3462                 bytes -= towrite;
3463                 data += towrite;
3464                 addr += towrite;
3465         }
3466 out:
3467         return r;
3468 }
3469
3470 static int emulator_read_emulated(unsigned long addr,
3471                                   void *val,
3472                                   unsigned int bytes,
3473                                   unsigned int *error_code,
3474                                   struct kvm_vcpu *vcpu)
3475 {
3476         gpa_t                 gpa;
3477
3478         if (vcpu->mmio_read_completed) {
3479                 memcpy(val, vcpu->mmio_data, bytes);
3480                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3481                                vcpu->mmio_phys_addr, *(u64 *)val);
3482                 vcpu->mmio_read_completed = 0;
3483                 return X86EMUL_CONTINUE;
3484         }
3485
3486         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3487
3488         if (gpa == UNMAPPED_GVA)
3489                 return X86EMUL_PROPAGATE_FAULT;
3490
3491         /* For APIC access vmexit */
3492         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3493                 goto mmio;
3494
3495         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3496                                 == X86EMUL_CONTINUE)
3497                 return X86EMUL_CONTINUE;
3498
3499 mmio:
3500         /*
3501          * Is this MMIO handled locally?
3502          */
3503         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3504                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3505                 return X86EMUL_CONTINUE;
3506         }
3507
3508         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3509
3510         vcpu->mmio_needed = 1;
3511         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3512         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3513         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3514         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3515
3516         return X86EMUL_IO_NEEDED;
3517 }
3518
3519 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3520                           const void *val, int bytes)
3521 {
3522         int ret;
3523
3524         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3525         if (ret < 0)
3526                 return 0;
3527         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3528         return 1;
3529 }
3530
3531 static int emulator_write_emulated_onepage(unsigned long addr,
3532                                            const void *val,
3533                                            unsigned int bytes,
3534                                            unsigned int *error_code,
3535                                            struct kvm_vcpu *vcpu)
3536 {
3537         gpa_t                 gpa;
3538
3539         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3540
3541         if (gpa == UNMAPPED_GVA)
3542                 return X86EMUL_PROPAGATE_FAULT;
3543
3544         /* For APIC access vmexit */
3545         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3546                 goto mmio;
3547
3548         if (emulator_write_phys(vcpu, gpa, val, bytes))
3549                 return X86EMUL_CONTINUE;
3550
3551 mmio:
3552         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3553         /*
3554          * Is this MMIO handled locally?
3555          */
3556         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3557                 return X86EMUL_CONTINUE;
3558
3559         vcpu->mmio_needed = 1;
3560         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3561         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3562         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3563         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3564         memcpy(vcpu->run->mmio.data, val, bytes);
3565
3566         return X86EMUL_CONTINUE;
3567 }
3568
3569 int emulator_write_emulated(unsigned long addr,
3570                             const void *val,
3571                             unsigned int bytes,
3572                             unsigned int *error_code,
3573                             struct kvm_vcpu *vcpu)
3574 {
3575         /* Crossing a page boundary? */
3576         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3577                 int rc, now;
3578
3579                 now = -addr & ~PAGE_MASK;
3580                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3581                                                      vcpu);
3582                 if (rc != X86EMUL_CONTINUE)
3583                         return rc;
3584                 addr += now;
3585                 val += now;
3586                 bytes -= now;
3587         }
3588         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3589                                                vcpu);
3590 }
3591
3592 #define CMPXCHG_TYPE(t, ptr, old, new) \
3593         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3594
3595 #ifdef CONFIG_X86_64
3596 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3597 #else
3598 #  define CMPXCHG64(ptr, old, new) \
3599         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3600 #endif
3601
3602 static int emulator_cmpxchg_emulated(unsigned long addr,
3603                                      const void *old,
3604                                      const void *new,
3605                                      unsigned int bytes,
3606                                      unsigned int *error_code,
3607                                      struct kvm_vcpu *vcpu)
3608 {
3609         gpa_t gpa;
3610         struct page *page;
3611         char *kaddr;
3612         bool exchanged;
3613
3614         /* guests cmpxchg8b have to be emulated atomically */
3615         if (bytes > 8 || (bytes & (bytes - 1)))
3616                 goto emul_write;
3617
3618         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3619
3620         if (gpa == UNMAPPED_GVA ||
3621             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3622                 goto emul_write;
3623
3624         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3625                 goto emul_write;
3626
3627         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3628         if (is_error_page(page)) {
3629                 kvm_release_page_clean(page);
3630                 goto emul_write;
3631         }
3632
3633         kaddr = kmap_atomic(page, KM_USER0);
3634         kaddr += offset_in_page(gpa);
3635         switch (bytes) {
3636         case 1:
3637                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3638                 break;
3639         case 2:
3640                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3641                 break;
3642         case 4:
3643                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3644                 break;
3645         case 8:
3646                 exchanged = CMPXCHG64(kaddr, old, new);
3647                 break;
3648         default:
3649                 BUG();
3650         }
3651         kunmap_atomic(kaddr, KM_USER0);
3652         kvm_release_page_dirty(page);
3653
3654         if (!exchanged)
3655                 return X86EMUL_CMPXCHG_FAILED;
3656
3657         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3658
3659         return X86EMUL_CONTINUE;
3660
3661 emul_write:
3662         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3663
3664         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3665 }
3666
3667 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3668 {
3669         /* TODO: String I/O for in kernel device */
3670         int r;
3671
3672         if (vcpu->arch.pio.in)
3673                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3674                                     vcpu->arch.pio.size, pd);
3675         else
3676                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3677                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3678                                      pd);
3679         return r;
3680 }
3681
3682
3683 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3684                              unsigned int count, struct kvm_vcpu *vcpu)
3685 {
3686         if (vcpu->arch.pio.count)
3687                 goto data_avail;
3688
3689         trace_kvm_pio(1, port, size, 1);
3690
3691         vcpu->arch.pio.port = port;
3692         vcpu->arch.pio.in = 1;
3693         vcpu->arch.pio.count  = count;
3694         vcpu->arch.pio.size = size;
3695
3696         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3697         data_avail:
3698                 memcpy(val, vcpu->arch.pio_data, size * count);
3699                 vcpu->arch.pio.count = 0;
3700                 return 1;
3701         }
3702
3703         vcpu->run->exit_reason = KVM_EXIT_IO;
3704         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3705         vcpu->run->io.size = size;
3706         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3707         vcpu->run->io.count = count;
3708         vcpu->run->io.port = port;
3709
3710         return 0;
3711 }
3712
3713 static int emulator_pio_out_emulated(int size, unsigned short port,
3714                               const void *val, unsigned int count,
3715                               struct kvm_vcpu *vcpu)
3716 {
3717         trace_kvm_pio(0, port, size, 1);
3718
3719         vcpu->arch.pio.port = port;
3720         vcpu->arch.pio.in = 0;
3721         vcpu->arch.pio.count = count;
3722         vcpu->arch.pio.size = size;
3723
3724         memcpy(vcpu->arch.pio_data, val, size * count);
3725
3726         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3727                 vcpu->arch.pio.count = 0;
3728                 return 1;
3729         }
3730
3731         vcpu->run->exit_reason = KVM_EXIT_IO;
3732         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3733         vcpu->run->io.size = size;
3734         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3735         vcpu->run->io.count = count;
3736         vcpu->run->io.port = port;
3737
3738         return 0;
3739 }
3740
3741 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3742 {
3743         return kvm_x86_ops->get_segment_base(vcpu, seg);
3744 }
3745
3746 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3747 {
3748         kvm_mmu_invlpg(vcpu, address);
3749         return X86EMUL_CONTINUE;
3750 }
3751
3752 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3753 {
3754         if (!need_emulate_wbinvd(vcpu))
3755                 return X86EMUL_CONTINUE;
3756
3757         if (kvm_x86_ops->has_wbinvd_exit()) {
3758                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3759                                 wbinvd_ipi, NULL, 1);
3760                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3761         }
3762         wbinvd();
3763         return X86EMUL_CONTINUE;
3764 }
3765 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3766
3767 int emulate_clts(struct kvm_vcpu *vcpu)
3768 {
3769         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3770         kvm_x86_ops->fpu_activate(vcpu);
3771         return X86EMUL_CONTINUE;
3772 }
3773
3774 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3775 {
3776         return _kvm_get_dr(vcpu, dr, dest);
3777 }
3778
3779 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3780 {
3781
3782         return __kvm_set_dr(vcpu, dr, value);
3783 }
3784
3785 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3786 {
3787         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3788 }
3789
3790 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3791 {
3792         unsigned long value;
3793
3794         switch (cr) {
3795         case 0:
3796                 value = kvm_read_cr0(vcpu);
3797                 break;
3798         case 2:
3799                 value = vcpu->arch.cr2;
3800                 break;
3801         case 3:
3802                 value = vcpu->arch.cr3;
3803                 break;
3804         case 4:
3805                 value = kvm_read_cr4(vcpu);
3806                 break;
3807         case 8:
3808                 value = kvm_get_cr8(vcpu);
3809                 break;
3810         default:
3811                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3812                 return 0;
3813         }
3814
3815         return value;
3816 }
3817
3818 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3819 {
3820         int res = 0;
3821
3822         switch (cr) {
3823         case 0:
3824                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3825                 break;
3826         case 2:
3827                 vcpu->arch.cr2 = val;
3828                 break;
3829         case 3:
3830                 res = kvm_set_cr3(vcpu, val);
3831                 break;
3832         case 4:
3833                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
3834                 break;
3835         case 8:
3836                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
3837                 break;
3838         default:
3839                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3840                 res = -1;
3841         }
3842
3843         return res;
3844 }
3845
3846 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
3847 {
3848         return kvm_x86_ops->get_cpl(vcpu);
3849 }
3850
3851 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3852 {
3853         kvm_x86_ops->get_gdt(vcpu, dt);
3854 }
3855
3856 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
3857 {
3858         kvm_x86_ops->get_idt(vcpu, dt);
3859 }
3860
3861 static unsigned long emulator_get_cached_segment_base(int seg,
3862                                                       struct kvm_vcpu *vcpu)
3863 {
3864         return get_segment_base(vcpu, seg);
3865 }
3866
3867 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
3868                                            struct kvm_vcpu *vcpu)
3869 {
3870         struct kvm_segment var;
3871
3872         kvm_get_segment(vcpu, &var, seg);
3873
3874         if (var.unusable)
3875                 return false;
3876
3877         if (var.g)
3878                 var.limit >>= 12;
3879         set_desc_limit(desc, var.limit);
3880         set_desc_base(desc, (unsigned long)var.base);
3881         desc->type = var.type;
3882         desc->s = var.s;
3883         desc->dpl = var.dpl;
3884         desc->p = var.present;
3885         desc->avl = var.avl;
3886         desc->l = var.l;
3887         desc->d = var.db;
3888         desc->g = var.g;
3889
3890         return true;
3891 }
3892
3893 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
3894                                            struct kvm_vcpu *vcpu)
3895 {
3896         struct kvm_segment var;
3897
3898         /* needed to preserve selector */
3899         kvm_get_segment(vcpu, &var, seg);
3900
3901         var.base = get_desc_base(desc);
3902         var.limit = get_desc_limit(desc);
3903         if (desc->g)
3904                 var.limit = (var.limit << 12) | 0xfff;
3905         var.type = desc->type;
3906         var.present = desc->p;
3907         var.dpl = desc->dpl;
3908         var.db = desc->d;
3909         var.s = desc->s;
3910         var.l = desc->l;
3911         var.g = desc->g;
3912         var.avl = desc->avl;
3913         var.present = desc->p;
3914         var.unusable = !var.present;
3915         var.padding = 0;
3916
3917         kvm_set_segment(vcpu, &var, seg);
3918         return;
3919 }
3920
3921 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
3922 {
3923         struct kvm_segment kvm_seg;
3924
3925         kvm_get_segment(vcpu, &kvm_seg, seg);
3926         return kvm_seg.selector;
3927 }
3928
3929 static void emulator_set_segment_selector(u16 sel, int seg,
3930                                           struct kvm_vcpu *vcpu)
3931 {
3932         struct kvm_segment kvm_seg;
3933
3934         kvm_get_segment(vcpu, &kvm_seg, seg);
3935         kvm_seg.selector = sel;
3936         kvm_set_segment(vcpu, &kvm_seg, seg);
3937 }
3938
3939 static struct x86_emulate_ops emulate_ops = {
3940         .read_std            = kvm_read_guest_virt_system,
3941         .write_std           = kvm_write_guest_virt_system,
3942         .fetch               = kvm_fetch_guest_virt,
3943         .read_emulated       = emulator_read_emulated,
3944         .write_emulated      = emulator_write_emulated,
3945         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
3946         .pio_in_emulated     = emulator_pio_in_emulated,
3947         .pio_out_emulated    = emulator_pio_out_emulated,
3948         .get_cached_descriptor = emulator_get_cached_descriptor,
3949         .set_cached_descriptor = emulator_set_cached_descriptor,
3950         .get_segment_selector = emulator_get_segment_selector,
3951         .set_segment_selector = emulator_set_segment_selector,
3952         .get_cached_segment_base = emulator_get_cached_segment_base,
3953         .get_gdt             = emulator_get_gdt,
3954         .get_idt             = emulator_get_idt,
3955         .get_cr              = emulator_get_cr,
3956         .set_cr              = emulator_set_cr,
3957         .cpl                 = emulator_get_cpl,
3958         .get_dr              = emulator_get_dr,
3959         .set_dr              = emulator_set_dr,
3960         .set_msr             = kvm_set_msr,
3961         .get_msr             = kvm_get_msr,
3962 };
3963
3964 static void cache_all_regs(struct kvm_vcpu *vcpu)
3965 {
3966         kvm_register_read(vcpu, VCPU_REGS_RAX);
3967         kvm_register_read(vcpu, VCPU_REGS_RSP);
3968         kvm_register_read(vcpu, VCPU_REGS_RIP);
3969         vcpu->arch.regs_dirty = ~0;
3970 }
3971
3972 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
3973 {
3974         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
3975         /*
3976          * an sti; sti; sequence only disable interrupts for the first
3977          * instruction. So, if the last instruction, be it emulated or
3978          * not, left the system with the INT_STI flag enabled, it
3979          * means that the last instruction is an sti. We should not
3980          * leave the flag on in this case. The same goes for mov ss
3981          */
3982         if (!(int_shadow & mask))
3983                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
3984 }
3985
3986 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
3987 {
3988         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
3989         if (ctxt->exception == PF_VECTOR)
3990                 kvm_inject_page_fault(vcpu, ctxt->cr2, ctxt->error_code);
3991         else if (ctxt->error_code_valid)
3992                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
3993         else
3994                 kvm_queue_exception(vcpu, ctxt->exception);
3995 }
3996
3997 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
3998 {
3999         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4000         int cs_db, cs_l;
4001
4002         cache_all_regs(vcpu);
4003
4004         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4005
4006         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4007         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4008         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4009         vcpu->arch.emulate_ctxt.mode =
4010                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4011                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4012                 ? X86EMUL_MODE_VM86 : cs_l
4013                 ? X86EMUL_MODE_PROT64 : cs_db
4014                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4015         memset(c, 0, sizeof(struct decode_cache));
4016         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4017 }
4018
4019 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4020 {
4021         ++vcpu->stat.insn_emulation_fail;
4022         trace_kvm_emulate_insn_failed(vcpu);
4023         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4024         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4025         vcpu->run->internal.ndata = 0;
4026         kvm_queue_exception(vcpu, UD_VECTOR);
4027         return EMULATE_FAIL;
4028 }
4029
4030 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4031 {
4032         gpa_t gpa;
4033
4034         if (tdp_enabled)
4035                 return false;
4036
4037         /*
4038          * if emulation was due to access to shadowed page table
4039          * and it failed try to unshadow page and re-entetr the
4040          * guest to let CPU execute the instruction.
4041          */
4042         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4043                 return true;
4044
4045         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4046
4047         if (gpa == UNMAPPED_GVA)
4048                 return true; /* let cpu generate fault */
4049
4050         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4051                 return true;
4052
4053         return false;
4054 }
4055
4056 int emulate_instruction(struct kvm_vcpu *vcpu,
4057                         unsigned long cr2,
4058                         u16 error_code,
4059                         int emulation_type)
4060 {
4061         int r;
4062         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4063
4064         kvm_clear_exception_queue(vcpu);
4065         vcpu->arch.mmio_fault_cr2 = cr2;
4066         /*
4067          * TODO: fix emulate.c to use guest_read/write_register
4068          * instead of direct ->regs accesses, can save hundred cycles
4069          * on Intel for instructions that don't read/change RSP, for
4070          * for example.
4071          */
4072         cache_all_regs(vcpu);
4073
4074         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4075                 init_emulate_ctxt(vcpu);
4076                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4077                 vcpu->arch.emulate_ctxt.exception = -1;
4078                 vcpu->arch.emulate_ctxt.perm_ok = false;
4079
4080                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4081                 trace_kvm_emulate_insn_start(vcpu);
4082
4083                 /* Only allow emulation of specific instructions on #UD
4084                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4085                 if (emulation_type & EMULTYPE_TRAP_UD) {
4086                         if (!c->twobyte)
4087                                 return EMULATE_FAIL;
4088                         switch (c->b) {
4089                         case 0x01: /* VMMCALL */
4090                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4091                                         return EMULATE_FAIL;
4092                                 break;
4093                         case 0x34: /* sysenter */
4094                         case 0x35: /* sysexit */
4095                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4096                                         return EMULATE_FAIL;
4097                                 break;
4098                         case 0x05: /* syscall */
4099                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4100                                         return EMULATE_FAIL;
4101                                 break;
4102                         default:
4103                                 return EMULATE_FAIL;
4104                         }
4105
4106                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4107                                 return EMULATE_FAIL;
4108                 }
4109
4110                 ++vcpu->stat.insn_emulation;
4111                 if (r)  {
4112                         if (reexecute_instruction(vcpu, cr2))
4113                                 return EMULATE_DONE;
4114                         if (emulation_type & EMULTYPE_SKIP)
4115                                 return EMULATE_FAIL;
4116                         return handle_emulation_failure(vcpu);
4117                 }
4118         }
4119
4120         if (emulation_type & EMULTYPE_SKIP) {
4121                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4122                 return EMULATE_DONE;
4123         }
4124
4125         /* this is needed for vmware backdor interface to work since it
4126            changes registers values  during IO operation */
4127         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4128
4129 restart:
4130         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4131
4132         if (r) { /* emulation failed */
4133                 if (reexecute_instruction(vcpu, cr2))
4134                         return EMULATE_DONE;
4135
4136                 return handle_emulation_failure(vcpu);
4137         }
4138
4139         r = EMULATE_DONE;
4140
4141         if (vcpu->arch.emulate_ctxt.exception >= 0)
4142                 inject_emulated_exception(vcpu);
4143         else if (vcpu->arch.pio.count) {
4144                 if (!vcpu->arch.pio.in)
4145                         vcpu->arch.pio.count = 0;
4146                 r = EMULATE_DO_MMIO;
4147         } else if (vcpu->mmio_needed) {
4148                 if (vcpu->mmio_is_write)
4149                         vcpu->mmio_needed = 0;
4150                 r = EMULATE_DO_MMIO;
4151         } else if (vcpu->arch.emulate_ctxt.restart)
4152                 goto restart;
4153
4154         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4155         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4156         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4157         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4158
4159         return r;
4160 }
4161 EXPORT_SYMBOL_GPL(emulate_instruction);
4162
4163 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4164 {
4165         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4166         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4167         /* do not return to emulator after return from userspace */
4168         vcpu->arch.pio.count = 0;
4169         return ret;
4170 }
4171 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4172
4173 static void tsc_bad(void *info)
4174 {
4175         __get_cpu_var(cpu_tsc_khz) = 0;
4176 }
4177
4178 static void tsc_khz_changed(void *data)
4179 {
4180         struct cpufreq_freqs *freq = data;
4181         unsigned long khz = 0;
4182
4183         if (data)
4184                 khz = freq->new;
4185         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4186                 khz = cpufreq_quick_get(raw_smp_processor_id());
4187         if (!khz)
4188                 khz = tsc_khz;
4189         __get_cpu_var(cpu_tsc_khz) = khz;
4190 }
4191
4192 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4193                                      void *data)
4194 {
4195         struct cpufreq_freqs *freq = data;
4196         struct kvm *kvm;
4197         struct kvm_vcpu *vcpu;
4198         int i, send_ipi = 0;
4199
4200         /*
4201          * We allow guests to temporarily run on slowing clocks,
4202          * provided we notify them after, or to run on accelerating
4203          * clocks, provided we notify them before.  Thus time never
4204          * goes backwards.
4205          *
4206          * However, we have a problem.  We can't atomically update
4207          * the frequency of a given CPU from this function; it is
4208          * merely a notifier, which can be called from any CPU.
4209          * Changing the TSC frequency at arbitrary points in time
4210          * requires a recomputation of local variables related to
4211          * the TSC for each VCPU.  We must flag these local variables
4212          * to be updated and be sure the update takes place with the
4213          * new frequency before any guests proceed.
4214          *
4215          * Unfortunately, the combination of hotplug CPU and frequency
4216          * change creates an intractable locking scenario; the order
4217          * of when these callouts happen is undefined with respect to
4218          * CPU hotplug, and they can race with each other.  As such,
4219          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4220          * undefined; you can actually have a CPU frequency change take
4221          * place in between the computation of X and the setting of the
4222          * variable.  To protect against this problem, all updates of
4223          * the per_cpu tsc_khz variable are done in an interrupt
4224          * protected IPI, and all callers wishing to update the value
4225          * must wait for a synchronous IPI to complete (which is trivial
4226          * if the caller is on the CPU already).  This establishes the
4227          * necessary total order on variable updates.
4228          *
4229          * Note that because a guest time update may take place
4230          * anytime after the setting of the VCPU's request bit, the
4231          * correct TSC value must be set before the request.  However,
4232          * to ensure the update actually makes it to any guest which
4233          * starts running in hardware virtualization between the set
4234          * and the acquisition of the spinlock, we must also ping the
4235          * CPU after setting the request bit.
4236          *
4237          */
4238
4239         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4240                 return 0;
4241         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4242                 return 0;
4243
4244         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4245
4246         spin_lock(&kvm_lock);
4247         list_for_each_entry(kvm, &vm_list, vm_list) {
4248                 kvm_for_each_vcpu(i, vcpu, kvm) {
4249                         if (vcpu->cpu != freq->cpu)
4250                                 continue;
4251                         if (!kvm_request_guest_time_update(vcpu))
4252                                 continue;
4253                         if (vcpu->cpu != smp_processor_id())
4254                                 send_ipi = 1;
4255                 }
4256         }
4257         spin_unlock(&kvm_lock);
4258
4259         if (freq->old < freq->new && send_ipi) {
4260                 /*
4261                  * We upscale the frequency.  Must make the guest
4262                  * doesn't see old kvmclock values while running with
4263                  * the new frequency, otherwise we risk the guest sees
4264                  * time go backwards.
4265                  *
4266                  * In case we update the frequency for another cpu
4267                  * (which might be in guest context) send an interrupt
4268                  * to kick the cpu out of guest context.  Next time
4269                  * guest context is entered kvmclock will be updated,
4270                  * so the guest will not see stale values.
4271                  */
4272                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4273         }
4274         return 0;
4275 }
4276
4277 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4278         .notifier_call  = kvmclock_cpufreq_notifier
4279 };
4280
4281 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4282                                         unsigned long action, void *hcpu)
4283 {
4284         unsigned int cpu = (unsigned long)hcpu;
4285
4286         switch (action) {
4287                 case CPU_ONLINE:
4288                 case CPU_DOWN_FAILED:
4289                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4290                         break;
4291                 case CPU_DOWN_PREPARE:
4292                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4293                         break;
4294         }
4295         return NOTIFY_OK;
4296 }
4297
4298 static struct notifier_block kvmclock_cpu_notifier_block = {
4299         .notifier_call  = kvmclock_cpu_notifier,
4300         .priority = -INT_MAX
4301 };
4302
4303 static void kvm_timer_init(void)
4304 {
4305         int cpu;
4306
4307         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4308         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4309                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4310                                           CPUFREQ_TRANSITION_NOTIFIER);
4311         }
4312         for_each_online_cpu(cpu)
4313                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4314 }
4315
4316 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4317
4318 static int kvm_is_in_guest(void)
4319 {
4320         return percpu_read(current_vcpu) != NULL;
4321 }
4322
4323 static int kvm_is_user_mode(void)
4324 {
4325         int user_mode = 3;
4326
4327         if (percpu_read(current_vcpu))
4328                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4329
4330         return user_mode != 0;
4331 }
4332
4333 static unsigned long kvm_get_guest_ip(void)
4334 {
4335         unsigned long ip = 0;
4336
4337         if (percpu_read(current_vcpu))
4338                 ip = kvm_rip_read(percpu_read(current_vcpu));
4339
4340         return ip;
4341 }
4342
4343 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4344         .is_in_guest            = kvm_is_in_guest,
4345         .is_user_mode           = kvm_is_user_mode,
4346         .get_guest_ip           = kvm_get_guest_ip,
4347 };
4348
4349 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4350 {
4351         percpu_write(current_vcpu, vcpu);
4352 }
4353 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4354
4355 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4356 {
4357         percpu_write(current_vcpu, NULL);
4358 }
4359 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4360
4361 int kvm_arch_init(void *opaque)
4362 {
4363         int r;
4364         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4365
4366         if (kvm_x86_ops) {
4367                 printk(KERN_ERR "kvm: already loaded the other module\n");
4368                 r = -EEXIST;
4369                 goto out;
4370         }
4371
4372         if (!ops->cpu_has_kvm_support()) {
4373                 printk(KERN_ERR "kvm: no hardware support\n");
4374                 r = -EOPNOTSUPP;
4375                 goto out;
4376         }
4377         if (ops->disabled_by_bios()) {
4378                 printk(KERN_ERR "kvm: disabled by bios\n");
4379                 r = -EOPNOTSUPP;
4380                 goto out;
4381         }
4382
4383         r = kvm_mmu_module_init();
4384         if (r)
4385                 goto out;
4386
4387         kvm_init_msr_list();
4388
4389         kvm_x86_ops = ops;
4390         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4391         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4392         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4393                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4394
4395         kvm_timer_init();
4396
4397         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4398
4399         if (cpu_has_xsave)
4400                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4401
4402         return 0;
4403
4404 out:
4405         return r;
4406 }
4407
4408 void kvm_arch_exit(void)
4409 {
4410         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4411
4412         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4413                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4414                                             CPUFREQ_TRANSITION_NOTIFIER);
4415         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4416         kvm_x86_ops = NULL;
4417         kvm_mmu_module_exit();
4418 }
4419
4420 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4421 {
4422         ++vcpu->stat.halt_exits;
4423         if (irqchip_in_kernel(vcpu->kvm)) {
4424                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4425                 return 1;
4426         } else {
4427                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4428                 return 0;
4429         }
4430 }
4431 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4432
4433 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4434                            unsigned long a1)
4435 {
4436         if (is_long_mode(vcpu))
4437                 return a0;
4438         else
4439                 return a0 | ((gpa_t)a1 << 32);
4440 }
4441
4442 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4443 {
4444         u64 param, ingpa, outgpa, ret;
4445         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4446         bool fast, longmode;
4447         int cs_db, cs_l;
4448
4449         /*
4450          * hypercall generates UD from non zero cpl and real mode
4451          * per HYPER-V spec
4452          */
4453         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4454                 kvm_queue_exception(vcpu, UD_VECTOR);
4455                 return 0;
4456         }
4457
4458         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4459         longmode = is_long_mode(vcpu) && cs_l == 1;
4460
4461         if (!longmode) {
4462                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4463                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4464                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4465                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4466                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4467                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4468         }
4469 #ifdef CONFIG_X86_64
4470         else {
4471                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4472                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4473                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4474         }
4475 #endif
4476
4477         code = param & 0xffff;
4478         fast = (param >> 16) & 0x1;
4479         rep_cnt = (param >> 32) & 0xfff;
4480         rep_idx = (param >> 48) & 0xfff;
4481
4482         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4483
4484         switch (code) {
4485         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4486                 kvm_vcpu_on_spin(vcpu);
4487                 break;
4488         default:
4489                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4490                 break;
4491         }
4492
4493         ret = res | (((u64)rep_done & 0xfff) << 32);
4494         if (longmode) {
4495                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4496         } else {
4497                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4498                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4499         }
4500
4501         return 1;
4502 }
4503
4504 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4505 {
4506         unsigned long nr, a0, a1, a2, a3, ret;
4507         int r = 1;
4508
4509         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4510                 return kvm_hv_hypercall(vcpu);
4511
4512         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4513         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4514         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4515         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4516         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4517
4518         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4519
4520         if (!is_long_mode(vcpu)) {
4521                 nr &= 0xFFFFFFFF;
4522                 a0 &= 0xFFFFFFFF;
4523                 a1 &= 0xFFFFFFFF;
4524                 a2 &= 0xFFFFFFFF;
4525                 a3 &= 0xFFFFFFFF;
4526         }
4527
4528         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4529                 ret = -KVM_EPERM;
4530                 goto out;
4531         }
4532
4533         switch (nr) {
4534         case KVM_HC_VAPIC_POLL_IRQ:
4535                 ret = 0;
4536                 break;
4537         case KVM_HC_MMU_OP:
4538                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4539                 break;
4540         default:
4541                 ret = -KVM_ENOSYS;
4542                 break;
4543         }
4544 out:
4545         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4546         ++vcpu->stat.hypercalls;
4547         return r;
4548 }
4549 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4550
4551 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4552 {
4553         char instruction[3];
4554         unsigned long rip = kvm_rip_read(vcpu);
4555
4556         /*
4557          * Blow out the MMU to ensure that no other VCPU has an active mapping
4558          * to ensure that the updated hypercall appears atomically across all
4559          * VCPUs.
4560          */
4561         kvm_mmu_zap_all(vcpu->kvm);
4562
4563         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4564
4565         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4566 }
4567
4568 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4569 {
4570         struct desc_ptr dt = { limit, base };
4571
4572         kvm_x86_ops->set_gdt(vcpu, &dt);
4573 }
4574
4575 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4576 {
4577         struct desc_ptr dt = { limit, base };
4578
4579         kvm_x86_ops->set_idt(vcpu, &dt);
4580 }
4581
4582 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4583 {
4584         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4585         int j, nent = vcpu->arch.cpuid_nent;
4586
4587         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4588         /* when no next entry is found, the current entry[i] is reselected */
4589         for (j = i + 1; ; j = (j + 1) % nent) {
4590                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4591                 if (ej->function == e->function) {
4592                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4593                         return j;
4594                 }
4595         }
4596         return 0; /* silence gcc, even though control never reaches here */
4597 }
4598
4599 /* find an entry with matching function, matching index (if needed), and that
4600  * should be read next (if it's stateful) */
4601 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4602         u32 function, u32 index)
4603 {
4604         if (e->function != function)
4605                 return 0;
4606         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4607                 return 0;
4608         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4609             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4610                 return 0;
4611         return 1;
4612 }
4613
4614 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4615                                               u32 function, u32 index)
4616 {
4617         int i;
4618         struct kvm_cpuid_entry2 *best = NULL;
4619
4620         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4621                 struct kvm_cpuid_entry2 *e;
4622
4623                 e = &vcpu->arch.cpuid_entries[i];
4624                 if (is_matching_cpuid_entry(e, function, index)) {
4625                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4626                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4627                         best = e;
4628                         break;
4629                 }
4630                 /*
4631                  * Both basic or both extended?
4632                  */
4633                 if (((e->function ^ function) & 0x80000000) == 0)
4634                         if (!best || e->function > best->function)
4635                                 best = e;
4636         }
4637         return best;
4638 }
4639 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4640
4641 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4642 {
4643         struct kvm_cpuid_entry2 *best;
4644
4645         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4646         if (!best || best->eax < 0x80000008)
4647                 goto not_found;
4648         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4649         if (best)
4650                 return best->eax & 0xff;
4651 not_found:
4652         return 36;
4653 }
4654
4655 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4656 {
4657         u32 function, index;
4658         struct kvm_cpuid_entry2 *best;
4659
4660         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4661         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4662         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4663         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4664         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4665         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4666         best = kvm_find_cpuid_entry(vcpu, function, index);
4667         if (best) {
4668                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4669                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4670                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4671                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4672         }
4673         kvm_x86_ops->skip_emulated_instruction(vcpu);
4674         trace_kvm_cpuid(function,
4675                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4676                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4677                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4678                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4679 }
4680 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4681
4682 /*
4683  * Check if userspace requested an interrupt window, and that the
4684  * interrupt window is open.
4685  *
4686  * No need to exit to userspace if we already have an interrupt queued.
4687  */
4688 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4689 {
4690         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4691                 vcpu->run->request_interrupt_window &&
4692                 kvm_arch_interrupt_allowed(vcpu));
4693 }
4694
4695 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4696 {
4697         struct kvm_run *kvm_run = vcpu->run;
4698
4699         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4700         kvm_run->cr8 = kvm_get_cr8(vcpu);
4701         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4702         if (irqchip_in_kernel(vcpu->kvm))
4703                 kvm_run->ready_for_interrupt_injection = 1;
4704         else
4705                 kvm_run->ready_for_interrupt_injection =
4706                         kvm_arch_interrupt_allowed(vcpu) &&
4707                         !kvm_cpu_has_interrupt(vcpu) &&
4708                         !kvm_event_needs_reinjection(vcpu);
4709 }
4710
4711 static void vapic_enter(struct kvm_vcpu *vcpu)
4712 {
4713         struct kvm_lapic *apic = vcpu->arch.apic;
4714         struct page *page;
4715
4716         if (!apic || !apic->vapic_addr)
4717                 return;
4718
4719         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4720
4721         vcpu->arch.apic->vapic_page = page;
4722 }
4723
4724 static void vapic_exit(struct kvm_vcpu *vcpu)
4725 {
4726         struct kvm_lapic *apic = vcpu->arch.apic;
4727         int idx;
4728
4729         if (!apic || !apic->vapic_addr)
4730                 return;
4731
4732         idx = srcu_read_lock(&vcpu->kvm->srcu);
4733         kvm_release_page_dirty(apic->vapic_page);
4734         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4735         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4736 }
4737
4738 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4739 {
4740         int max_irr, tpr;
4741
4742         if (!kvm_x86_ops->update_cr8_intercept)
4743                 return;
4744
4745         if (!vcpu->arch.apic)
4746                 return;
4747
4748         if (!vcpu->arch.apic->vapic_addr)
4749                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4750         else
4751                 max_irr = -1;
4752
4753         if (max_irr != -1)
4754                 max_irr >>= 4;
4755
4756         tpr = kvm_lapic_get_cr8(vcpu);
4757
4758         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4759 }
4760
4761 static void inject_pending_event(struct kvm_vcpu *vcpu)
4762 {
4763         /* try to reinject previous events if any */
4764         if (vcpu->arch.exception.pending) {
4765                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4766                                         vcpu->arch.exception.has_error_code,
4767                                         vcpu->arch.exception.error_code);
4768                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4769                                           vcpu->arch.exception.has_error_code,
4770                                           vcpu->arch.exception.error_code,
4771                                           vcpu->arch.exception.reinject);
4772                 return;
4773         }
4774
4775         if (vcpu->arch.nmi_injected) {
4776                 kvm_x86_ops->set_nmi(vcpu);
4777                 return;
4778         }
4779
4780         if (vcpu->arch.interrupt.pending) {
4781                 kvm_x86_ops->set_irq(vcpu);
4782                 return;
4783         }
4784
4785         /* try to inject new event if pending */
4786         if (vcpu->arch.nmi_pending) {
4787                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4788                         vcpu->arch.nmi_pending = false;
4789                         vcpu->arch.nmi_injected = true;
4790                         kvm_x86_ops->set_nmi(vcpu);
4791                 }
4792         } else if (kvm_cpu_has_interrupt(vcpu)) {
4793                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4794                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4795                                             false);
4796                         kvm_x86_ops->set_irq(vcpu);
4797                 }
4798         }
4799 }
4800
4801 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4802 {
4803         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4804                         !vcpu->guest_xcr0_loaded) {
4805                 /* kvm_set_xcr() also depends on this */
4806                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4807                 vcpu->guest_xcr0_loaded = 1;
4808         }
4809 }
4810
4811 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4812 {
4813         if (vcpu->guest_xcr0_loaded) {
4814                 if (vcpu->arch.xcr0 != host_xcr0)
4815                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4816                 vcpu->guest_xcr0_loaded = 0;
4817         }
4818 }
4819
4820 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4821 {
4822         int r;
4823         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
4824                 vcpu->run->request_interrupt_window;
4825
4826         if (vcpu->requests) {
4827                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
4828                         kvm_mmu_unload(vcpu);
4829                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
4830                         __kvm_migrate_timers(vcpu);
4831                 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
4832                         r = kvm_write_guest_time(vcpu);
4833                         if (unlikely(r))
4834                                 goto out;
4835                 }
4836                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
4837                         kvm_mmu_sync_roots(vcpu);
4838                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
4839                         kvm_x86_ops->tlb_flush(vcpu);
4840                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
4841                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
4842                         r = 0;
4843                         goto out;
4844                 }
4845                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
4846                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
4847                         r = 0;
4848                         goto out;
4849                 }
4850                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
4851                         vcpu->fpu_active = 0;
4852                         kvm_x86_ops->fpu_deactivate(vcpu);
4853                 }
4854         }
4855
4856         r = kvm_mmu_reload(vcpu);
4857         if (unlikely(r))
4858                 goto out;
4859
4860         preempt_disable();
4861
4862         kvm_x86_ops->prepare_guest_switch(vcpu);
4863         if (vcpu->fpu_active)
4864                 kvm_load_guest_fpu(vcpu);
4865         kvm_load_guest_xcr0(vcpu);
4866
4867         atomic_set(&vcpu->guest_mode, 1);
4868         smp_wmb();
4869
4870         local_irq_disable();
4871
4872         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
4873             || need_resched() || signal_pending(current)) {
4874                 atomic_set(&vcpu->guest_mode, 0);
4875                 smp_wmb();
4876                 local_irq_enable();
4877                 preempt_enable();
4878                 r = 1;
4879                 goto out;
4880         }
4881
4882         inject_pending_event(vcpu);
4883
4884         /* enable NMI/IRQ window open exits if needed */
4885         if (vcpu->arch.nmi_pending)
4886                 kvm_x86_ops->enable_nmi_window(vcpu);
4887         else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
4888                 kvm_x86_ops->enable_irq_window(vcpu);
4889
4890         if (kvm_lapic_enabled(vcpu)) {
4891                 update_cr8_intercept(vcpu);
4892                 kvm_lapic_sync_to_vapic(vcpu);
4893         }
4894
4895         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
4896
4897         kvm_guest_enter();
4898
4899         if (unlikely(vcpu->arch.switch_db_regs)) {
4900                 set_debugreg(0, 7);
4901                 set_debugreg(vcpu->arch.eff_db[0], 0);
4902                 set_debugreg(vcpu->arch.eff_db[1], 1);
4903                 set_debugreg(vcpu->arch.eff_db[2], 2);
4904                 set_debugreg(vcpu->arch.eff_db[3], 3);
4905         }
4906
4907         trace_kvm_entry(vcpu->vcpu_id);
4908         kvm_x86_ops->run(vcpu);
4909
4910         /*
4911          * If the guest has used debug registers, at least dr7
4912          * will be disabled while returning to the host.
4913          * If we don't have active breakpoints in the host, we don't
4914          * care about the messed up debug address registers. But if
4915          * we have some of them active, restore the old state.
4916          */
4917         if (hw_breakpoint_active())
4918                 hw_breakpoint_restore();
4919
4920         atomic_set(&vcpu->guest_mode, 0);
4921         smp_wmb();
4922         local_irq_enable();
4923
4924         ++vcpu->stat.exits;
4925
4926         /*
4927          * We must have an instruction between local_irq_enable() and
4928          * kvm_guest_exit(), so the timer interrupt isn't delayed by
4929          * the interrupt shadow.  The stat.exits increment will do nicely.
4930          * But we need to prevent reordering, hence this barrier():
4931          */
4932         barrier();
4933
4934         kvm_guest_exit();
4935
4936         preempt_enable();
4937
4938         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
4939
4940         /*
4941          * Profile KVM exit RIPs:
4942          */
4943         if (unlikely(prof_on == KVM_PROFILING)) {
4944                 unsigned long rip = kvm_rip_read(vcpu);
4945                 profile_hit(KVM_PROFILING, (void *)rip);
4946         }
4947
4948
4949         kvm_lapic_sync_from_vapic(vcpu);
4950
4951         r = kvm_x86_ops->handle_exit(vcpu);
4952 out:
4953         return r;
4954 }
4955
4956
4957 static int __vcpu_run(struct kvm_vcpu *vcpu)
4958 {
4959         int r;
4960         struct kvm *kvm = vcpu->kvm;
4961
4962         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
4963                 pr_debug("vcpu %d received sipi with vector # %x\n",
4964                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
4965                 kvm_lapic_reset(vcpu);
4966                 r = kvm_arch_vcpu_reset(vcpu);
4967                 if (r)
4968                         return r;
4969                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4970         }
4971
4972         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4973         vapic_enter(vcpu);
4974
4975         r = 1;
4976         while (r > 0) {
4977                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
4978                         r = vcpu_enter_guest(vcpu);
4979                 else {
4980                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
4981                         kvm_vcpu_block(vcpu);
4982                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
4983                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
4984                         {
4985                                 switch(vcpu->arch.mp_state) {
4986                                 case KVM_MP_STATE_HALTED:
4987                                         vcpu->arch.mp_state =
4988                                                 KVM_MP_STATE_RUNNABLE;
4989                                 case KVM_MP_STATE_RUNNABLE:
4990                                         break;
4991                                 case KVM_MP_STATE_SIPI_RECEIVED:
4992                                 default:
4993                                         r = -EINTR;
4994                                         break;
4995                                 }
4996                         }
4997                 }
4998
4999                 if (r <= 0)
5000                         break;
5001
5002                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5003                 if (kvm_cpu_has_pending_timer(vcpu))
5004                         kvm_inject_pending_timer_irqs(vcpu);
5005
5006                 if (dm_request_for_irq_injection(vcpu)) {
5007                         r = -EINTR;
5008                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5009                         ++vcpu->stat.request_irq_exits;
5010                 }
5011                 if (signal_pending(current)) {
5012                         r = -EINTR;
5013                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5014                         ++vcpu->stat.signal_exits;
5015                 }
5016                 if (need_resched()) {
5017                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5018                         kvm_resched(vcpu);
5019                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5020                 }
5021         }
5022
5023         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5024
5025         vapic_exit(vcpu);
5026
5027         return r;
5028 }
5029
5030 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5031 {
5032         int r;
5033         sigset_t sigsaved;
5034
5035         if (vcpu->sigset_active)
5036                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5037
5038         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5039                 kvm_vcpu_block(vcpu);
5040                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5041                 r = -EAGAIN;
5042                 goto out;
5043         }
5044
5045         /* re-sync apic's tpr */
5046         if (!irqchip_in_kernel(vcpu->kvm))
5047                 kvm_set_cr8(vcpu, kvm_run->cr8);
5048
5049         if (vcpu->arch.pio.count || vcpu->mmio_needed ||
5050             vcpu->arch.emulate_ctxt.restart) {
5051                 if (vcpu->mmio_needed) {
5052                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5053                         vcpu->mmio_read_completed = 1;
5054                         vcpu->mmio_needed = 0;
5055                 }
5056                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5057                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5058                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5059                 if (r != EMULATE_DONE) {
5060                         r = 0;
5061                         goto out;
5062                 }
5063         }
5064         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5065                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5066                                      kvm_run->hypercall.ret);
5067
5068         r = __vcpu_run(vcpu);
5069
5070 out:
5071         post_kvm_run_save(vcpu);
5072         if (vcpu->sigset_active)
5073                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5074
5075         return r;
5076 }
5077
5078 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5079 {
5080         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5081         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5082         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5083         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5084         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5085         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5086         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5087         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5088 #ifdef CONFIG_X86_64
5089         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5090         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5091         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5092         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5093         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5094         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5095         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5096         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5097 #endif
5098
5099         regs->rip = kvm_rip_read(vcpu);
5100         regs->rflags = kvm_get_rflags(vcpu);
5101
5102         return 0;
5103 }
5104
5105 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5106 {
5107         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5108         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5109         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5110         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5111         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5112         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5113         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5114         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5115 #ifdef CONFIG_X86_64
5116         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5117         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5118         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5119         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5120         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5121         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5122         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5123         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5124 #endif
5125
5126         kvm_rip_write(vcpu, regs->rip);
5127         kvm_set_rflags(vcpu, regs->rflags);
5128
5129         vcpu->arch.exception.pending = false;
5130
5131         return 0;
5132 }
5133
5134 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5135 {
5136         struct kvm_segment cs;
5137
5138         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5139         *db = cs.db;
5140         *l = cs.l;
5141 }
5142 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5143
5144 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5145                                   struct kvm_sregs *sregs)
5146 {
5147         struct desc_ptr dt;
5148
5149         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5150         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5151         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5152         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5153         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5154         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5155
5156         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5157         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5158
5159         kvm_x86_ops->get_idt(vcpu, &dt);
5160         sregs->idt.limit = dt.size;
5161         sregs->idt.base = dt.address;
5162         kvm_x86_ops->get_gdt(vcpu, &dt);
5163         sregs->gdt.limit = dt.size;
5164         sregs->gdt.base = dt.address;
5165
5166         sregs->cr0 = kvm_read_cr0(vcpu);
5167         sregs->cr2 = vcpu->arch.cr2;
5168         sregs->cr3 = vcpu->arch.cr3;
5169         sregs->cr4 = kvm_read_cr4(vcpu);
5170         sregs->cr8 = kvm_get_cr8(vcpu);
5171         sregs->efer = vcpu->arch.efer;
5172         sregs->apic_base = kvm_get_apic_base(vcpu);
5173
5174         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5175
5176         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5177                 set_bit(vcpu->arch.interrupt.nr,
5178                         (unsigned long *)sregs->interrupt_bitmap);
5179
5180         return 0;
5181 }
5182
5183 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5184                                     struct kvm_mp_state *mp_state)
5185 {
5186         mp_state->mp_state = vcpu->arch.mp_state;
5187         return 0;
5188 }
5189
5190 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5191                                     struct kvm_mp_state *mp_state)
5192 {
5193         vcpu->arch.mp_state = mp_state->mp_state;
5194         return 0;
5195 }
5196
5197 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5198                     bool has_error_code, u32 error_code)
5199 {
5200         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5201         int ret;
5202
5203         init_emulate_ctxt(vcpu);
5204
5205         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5206                                    tss_selector, reason, has_error_code,
5207                                    error_code);
5208
5209         if (ret)
5210                 return EMULATE_FAIL;
5211
5212         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5213         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5214         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5215         return EMULATE_DONE;
5216 }
5217 EXPORT_SYMBOL_GPL(kvm_task_switch);
5218
5219 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5220                                   struct kvm_sregs *sregs)
5221 {
5222         int mmu_reset_needed = 0;
5223         int pending_vec, max_bits;
5224         struct desc_ptr dt;
5225
5226         dt.size = sregs->idt.limit;
5227         dt.address = sregs->idt.base;
5228         kvm_x86_ops->set_idt(vcpu, &dt);
5229         dt.size = sregs->gdt.limit;
5230         dt.address = sregs->gdt.base;
5231         kvm_x86_ops->set_gdt(vcpu, &dt);
5232
5233         vcpu->arch.cr2 = sregs->cr2;
5234         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5235         vcpu->arch.cr3 = sregs->cr3;
5236
5237         kvm_set_cr8(vcpu, sregs->cr8);
5238
5239         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5240         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5241         kvm_set_apic_base(vcpu, sregs->apic_base);
5242
5243         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5244         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5245         vcpu->arch.cr0 = sregs->cr0;
5246
5247         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5248         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5249         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5250                 load_pdptrs(vcpu, vcpu->arch.cr3);
5251                 mmu_reset_needed = 1;
5252         }
5253
5254         if (mmu_reset_needed)
5255                 kvm_mmu_reset_context(vcpu);
5256
5257         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5258         pending_vec = find_first_bit(
5259                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5260         if (pending_vec < max_bits) {
5261                 kvm_queue_interrupt(vcpu, pending_vec, false);
5262                 pr_debug("Set back pending irq %d\n", pending_vec);
5263                 if (irqchip_in_kernel(vcpu->kvm))
5264                         kvm_pic_clear_isr_ack(vcpu->kvm);
5265         }
5266
5267         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5268         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5269         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5270         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5271         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5272         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5273
5274         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5275         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5276
5277         update_cr8_intercept(vcpu);
5278
5279         /* Older userspace won't unhalt the vcpu on reset. */
5280         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5281             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5282             !is_protmode(vcpu))
5283                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5284
5285         return 0;
5286 }
5287
5288 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5289                                         struct kvm_guest_debug *dbg)
5290 {
5291         unsigned long rflags;
5292         int i, r;
5293
5294         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5295                 r = -EBUSY;
5296                 if (vcpu->arch.exception.pending)
5297                         goto out;
5298                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5299                         kvm_queue_exception(vcpu, DB_VECTOR);
5300                 else
5301                         kvm_queue_exception(vcpu, BP_VECTOR);
5302         }
5303
5304         /*
5305          * Read rflags as long as potentially injected trace flags are still
5306          * filtered out.
5307          */
5308         rflags = kvm_get_rflags(vcpu);
5309
5310         vcpu->guest_debug = dbg->control;
5311         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5312                 vcpu->guest_debug = 0;
5313
5314         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5315                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5316                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5317                 vcpu->arch.switch_db_regs =
5318                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5319         } else {
5320                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5321                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5322                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5323         }
5324
5325         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5326                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5327                         get_segment_base(vcpu, VCPU_SREG_CS);
5328
5329         /*
5330          * Trigger an rflags update that will inject or remove the trace
5331          * flags.
5332          */
5333         kvm_set_rflags(vcpu, rflags);
5334
5335         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5336
5337         r = 0;
5338
5339 out:
5340
5341         return r;
5342 }
5343
5344 /*
5345  * Translate a guest virtual address to a guest physical address.
5346  */
5347 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5348                                     struct kvm_translation *tr)
5349 {
5350         unsigned long vaddr = tr->linear_address;
5351         gpa_t gpa;
5352         int idx;
5353
5354         idx = srcu_read_lock(&vcpu->kvm->srcu);
5355         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5356         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5357         tr->physical_address = gpa;
5358         tr->valid = gpa != UNMAPPED_GVA;
5359         tr->writeable = 1;
5360         tr->usermode = 0;
5361
5362         return 0;
5363 }
5364
5365 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5366 {
5367         struct i387_fxsave_struct *fxsave =
5368                         &vcpu->arch.guest_fpu.state->fxsave;
5369
5370         memcpy(fpu->fpr, fxsave->st_space, 128);
5371         fpu->fcw = fxsave->cwd;
5372         fpu->fsw = fxsave->swd;
5373         fpu->ftwx = fxsave->twd;
5374         fpu->last_opcode = fxsave->fop;
5375         fpu->last_ip = fxsave->rip;
5376         fpu->last_dp = fxsave->rdp;
5377         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5378
5379         return 0;
5380 }
5381
5382 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5383 {
5384         struct i387_fxsave_struct *fxsave =
5385                         &vcpu->arch.guest_fpu.state->fxsave;
5386
5387         memcpy(fxsave->st_space, fpu->fpr, 128);
5388         fxsave->cwd = fpu->fcw;
5389         fxsave->swd = fpu->fsw;
5390         fxsave->twd = fpu->ftwx;
5391         fxsave->fop = fpu->last_opcode;
5392         fxsave->rip = fpu->last_ip;
5393         fxsave->rdp = fpu->last_dp;
5394         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5395
5396         return 0;
5397 }
5398
5399 int fx_init(struct kvm_vcpu *vcpu)
5400 {
5401         int err;
5402
5403         err = fpu_alloc(&vcpu->arch.guest_fpu);
5404         if (err)
5405                 return err;
5406
5407         fpu_finit(&vcpu->arch.guest_fpu);
5408
5409         /*
5410          * Ensure guest xcr0 is valid for loading
5411          */
5412         vcpu->arch.xcr0 = XSTATE_FP;
5413
5414         vcpu->arch.cr0 |= X86_CR0_ET;
5415
5416         return 0;
5417 }
5418 EXPORT_SYMBOL_GPL(fx_init);
5419
5420 static void fx_free(struct kvm_vcpu *vcpu)
5421 {
5422         fpu_free(&vcpu->arch.guest_fpu);
5423 }
5424
5425 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5426 {
5427         if (vcpu->guest_fpu_loaded)
5428                 return;
5429
5430         /*
5431          * Restore all possible states in the guest,
5432          * and assume host would use all available bits.
5433          * Guest xcr0 would be loaded later.
5434          */
5435         kvm_put_guest_xcr0(vcpu);
5436         vcpu->guest_fpu_loaded = 1;
5437         unlazy_fpu(current);
5438         fpu_restore_checking(&vcpu->arch.guest_fpu);
5439         trace_kvm_fpu(1);
5440 }
5441
5442 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5443 {
5444         kvm_put_guest_xcr0(vcpu);
5445
5446         if (!vcpu->guest_fpu_loaded)
5447                 return;
5448
5449         vcpu->guest_fpu_loaded = 0;
5450         fpu_save_init(&vcpu->arch.guest_fpu);
5451         ++vcpu->stat.fpu_reload;
5452         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5453         trace_kvm_fpu(0);
5454 }
5455
5456 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5457 {
5458         if (vcpu->arch.time_page) {
5459                 kvm_release_page_dirty(vcpu->arch.time_page);
5460                 vcpu->arch.time_page = NULL;
5461         }
5462
5463         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5464         fx_free(vcpu);
5465         kvm_x86_ops->vcpu_free(vcpu);
5466 }
5467
5468 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5469                                                 unsigned int id)
5470 {
5471         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5472                 printk_once(KERN_WARNING
5473                 "kvm: SMP vm created on host with unstable TSC; "
5474                 "guest TSC will not be reliable\n");
5475         return kvm_x86_ops->vcpu_create(kvm, id);
5476 }
5477
5478 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5479 {
5480         int r;
5481
5482         vcpu->arch.mtrr_state.have_fixed = 1;
5483         vcpu_load(vcpu);
5484         r = kvm_arch_vcpu_reset(vcpu);
5485         if (r == 0)
5486                 r = kvm_mmu_setup(vcpu);
5487         vcpu_put(vcpu);
5488         if (r < 0)
5489                 goto free_vcpu;
5490
5491         return 0;
5492 free_vcpu:
5493         kvm_x86_ops->vcpu_free(vcpu);
5494         return r;
5495 }
5496
5497 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5498 {
5499         vcpu_load(vcpu);
5500         kvm_mmu_unload(vcpu);
5501         vcpu_put(vcpu);
5502
5503         fx_free(vcpu);
5504         kvm_x86_ops->vcpu_free(vcpu);
5505 }
5506
5507 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5508 {
5509         vcpu->arch.nmi_pending = false;
5510         vcpu->arch.nmi_injected = false;
5511
5512         vcpu->arch.switch_db_regs = 0;
5513         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5514         vcpu->arch.dr6 = DR6_FIXED_1;
5515         vcpu->arch.dr7 = DR7_FIXED_1;
5516
5517         return kvm_x86_ops->vcpu_reset(vcpu);
5518 }
5519
5520 int kvm_arch_hardware_enable(void *garbage)
5521 {
5522         kvm_shared_msr_cpu_online();
5523         return kvm_x86_ops->hardware_enable(garbage);
5524 }
5525
5526 void kvm_arch_hardware_disable(void *garbage)
5527 {
5528         kvm_x86_ops->hardware_disable(garbage);
5529         drop_user_return_notifiers(garbage);
5530 }
5531
5532 int kvm_arch_hardware_setup(void)
5533 {
5534         return kvm_x86_ops->hardware_setup();
5535 }
5536
5537 void kvm_arch_hardware_unsetup(void)
5538 {
5539         kvm_x86_ops->hardware_unsetup();
5540 }
5541
5542 void kvm_arch_check_processor_compat(void *rtn)
5543 {
5544         kvm_x86_ops->check_processor_compatibility(rtn);
5545 }
5546
5547 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5548 {
5549         struct page *page;
5550         struct kvm *kvm;
5551         int r;
5552
5553         BUG_ON(vcpu->kvm == NULL);
5554         kvm = vcpu->kvm;
5555
5556         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5557         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5558         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5559                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5560         else
5561                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5562
5563         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5564         if (!page) {
5565                 r = -ENOMEM;
5566                 goto fail;
5567         }
5568         vcpu->arch.pio_data = page_address(page);
5569
5570         r = kvm_mmu_create(vcpu);
5571         if (r < 0)
5572                 goto fail_free_pio_data;
5573
5574         if (irqchip_in_kernel(kvm)) {
5575                 r = kvm_create_lapic(vcpu);
5576                 if (r < 0)
5577                         goto fail_mmu_destroy;
5578         }
5579
5580         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5581                                        GFP_KERNEL);
5582         if (!vcpu->arch.mce_banks) {
5583                 r = -ENOMEM;
5584                 goto fail_free_lapic;
5585         }
5586         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5587
5588         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5589                 goto fail_free_mce_banks;
5590
5591         return 0;
5592 fail_free_mce_banks:
5593         kfree(vcpu->arch.mce_banks);
5594 fail_free_lapic:
5595         kvm_free_lapic(vcpu);
5596 fail_mmu_destroy:
5597         kvm_mmu_destroy(vcpu);
5598 fail_free_pio_data:
5599         free_page((unsigned long)vcpu->arch.pio_data);
5600 fail:
5601         return r;
5602 }
5603
5604 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5605 {
5606         int idx;
5607
5608         kfree(vcpu->arch.mce_banks);
5609         kvm_free_lapic(vcpu);
5610         idx = srcu_read_lock(&vcpu->kvm->srcu);
5611         kvm_mmu_destroy(vcpu);
5612         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5613         free_page((unsigned long)vcpu->arch.pio_data);
5614 }
5615
5616 struct  kvm *kvm_arch_create_vm(void)
5617 {
5618         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5619
5620         if (!kvm)
5621                 return ERR_PTR(-ENOMEM);
5622
5623         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5624         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5625
5626         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5627         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5628
5629         spin_lock_init(&kvm->arch.tsc_write_lock);
5630
5631         return kvm;
5632 }
5633
5634 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5635 {
5636         vcpu_load(vcpu);
5637         kvm_mmu_unload(vcpu);
5638         vcpu_put(vcpu);
5639 }
5640
5641 static void kvm_free_vcpus(struct kvm *kvm)
5642 {
5643         unsigned int i;
5644         struct kvm_vcpu *vcpu;
5645
5646         /*
5647          * Unpin any mmu pages first.
5648          */
5649         kvm_for_each_vcpu(i, vcpu, kvm)
5650                 kvm_unload_vcpu_mmu(vcpu);
5651         kvm_for_each_vcpu(i, vcpu, kvm)
5652                 kvm_arch_vcpu_free(vcpu);
5653
5654         mutex_lock(&kvm->lock);
5655         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5656                 kvm->vcpus[i] = NULL;
5657
5658         atomic_set(&kvm->online_vcpus, 0);
5659         mutex_unlock(&kvm->lock);
5660 }
5661
5662 void kvm_arch_sync_events(struct kvm *kvm)
5663 {
5664         kvm_free_all_assigned_devices(kvm);
5665         kvm_free_pit(kvm);
5666 }
5667
5668 void kvm_arch_destroy_vm(struct kvm *kvm)
5669 {
5670         kvm_iommu_unmap_guest(kvm);
5671         kfree(kvm->arch.vpic);
5672         kfree(kvm->arch.vioapic);
5673         kvm_free_vcpus(kvm);
5674         kvm_free_physmem(kvm);
5675         if (kvm->arch.apic_access_page)
5676                 put_page(kvm->arch.apic_access_page);
5677         if (kvm->arch.ept_identity_pagetable)
5678                 put_page(kvm->arch.ept_identity_pagetable);
5679         cleanup_srcu_struct(&kvm->srcu);
5680         kfree(kvm);
5681 }
5682
5683 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5684                                 struct kvm_memory_slot *memslot,
5685                                 struct kvm_memory_slot old,
5686                                 struct kvm_userspace_memory_region *mem,
5687                                 int user_alloc)
5688 {
5689         int npages = memslot->npages;
5690         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5691
5692         /* Prevent internal slot pages from being moved by fork()/COW. */
5693         if (memslot->id >= KVM_MEMORY_SLOTS)
5694                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5695
5696         /*To keep backward compatibility with older userspace,
5697          *x86 needs to hanlde !user_alloc case.
5698          */
5699         if (!user_alloc) {
5700                 if (npages && !old.rmap) {
5701                         unsigned long userspace_addr;
5702
5703                         down_write(&current->mm->mmap_sem);
5704                         userspace_addr = do_mmap(NULL, 0,
5705                                                  npages * PAGE_SIZE,
5706                                                  PROT_READ | PROT_WRITE,
5707                                                  map_flags,
5708                                                  0);
5709                         up_write(&current->mm->mmap_sem);
5710
5711                         if (IS_ERR((void *)userspace_addr))
5712                                 return PTR_ERR((void *)userspace_addr);
5713
5714                         memslot->userspace_addr = userspace_addr;
5715                 }
5716         }
5717
5718
5719         return 0;
5720 }
5721
5722 void kvm_arch_commit_memory_region(struct kvm *kvm,
5723                                 struct kvm_userspace_memory_region *mem,
5724                                 struct kvm_memory_slot old,
5725                                 int user_alloc)
5726 {
5727
5728         int npages = mem->memory_size >> PAGE_SHIFT;
5729
5730         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5731                 int ret;
5732
5733                 down_write(&current->mm->mmap_sem);
5734                 ret = do_munmap(current->mm, old.userspace_addr,
5735                                 old.npages * PAGE_SIZE);
5736                 up_write(&current->mm->mmap_sem);
5737                 if (ret < 0)
5738                         printk(KERN_WARNING
5739                                "kvm_vm_ioctl_set_memory_region: "
5740                                "failed to munmap memory\n");
5741         }
5742
5743         spin_lock(&kvm->mmu_lock);
5744         if (!kvm->arch.n_requested_mmu_pages) {
5745                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5746                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5747         }
5748
5749         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5750         spin_unlock(&kvm->mmu_lock);
5751 }
5752
5753 void kvm_arch_flush_shadow(struct kvm *kvm)
5754 {
5755         kvm_mmu_zap_all(kvm);
5756         kvm_reload_remote_mmus(kvm);
5757 }
5758
5759 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5760 {
5761         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5762                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5763                 || vcpu->arch.nmi_pending ||
5764                 (kvm_arch_interrupt_allowed(vcpu) &&
5765                  kvm_cpu_has_interrupt(vcpu));
5766 }
5767
5768 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5769 {
5770         int me;
5771         int cpu = vcpu->cpu;
5772
5773         if (waitqueue_active(&vcpu->wq)) {
5774                 wake_up_interruptible(&vcpu->wq);
5775                 ++vcpu->stat.halt_wakeup;
5776         }
5777
5778         me = get_cpu();
5779         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5780                 if (atomic_xchg(&vcpu->guest_mode, 0))
5781                         smp_send_reschedule(cpu);
5782         put_cpu();
5783 }
5784
5785 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5786 {
5787         return kvm_x86_ops->interrupt_allowed(vcpu);
5788 }
5789
5790 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5791 {
5792         unsigned long current_rip = kvm_rip_read(vcpu) +
5793                 get_segment_base(vcpu, VCPU_SREG_CS);
5794
5795         return current_rip == linear_rip;
5796 }
5797 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5798
5799 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5800 {
5801         unsigned long rflags;
5802
5803         rflags = kvm_x86_ops->get_rflags(vcpu);
5804         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5805                 rflags &= ~X86_EFLAGS_TF;
5806         return rflags;
5807 }
5808 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5809
5810 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5811 {
5812         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5813             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
5814                 rflags |= X86_EFLAGS_TF;
5815         kvm_x86_ops->set_rflags(vcpu, rflags);
5816 }
5817 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5818
5819 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5820 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5821 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5822 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5823 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5824 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5825 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5826 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5827 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5828 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5829 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
5830 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);