arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 #define KVM_NR_SHARED_MSRS 16
 101
 102 struct kvm_shared_msrs_global {
 103         int nr;
 104         u32 msrs[KVM_NR_SHARED_MSRS];
 105 };
 106
 107 struct kvm_shared_msrs {
 108         struct user_return_notifier urn;
 109         bool registered;
 110         struct kvm_shared_msr_values {
 111                 u64 host;
 112                 u64 curr;
 113         } values[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 117 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 118
 119 struct kvm_stats_debugfs_item debugfs_entries[] = {
 120         { "pf_fixed", VCPU_STAT(pf_fixed) },
 121         { "pf_guest", VCPU_STAT(pf_guest) },
 122         { "tlb_flush", VCPU_STAT(tlb_flush) },
 123         { "invlpg", VCPU_STAT(invlpg) },
 124         { "exits", VCPU_STAT(exits) },
 125         { "io_exits", VCPU_STAT(io_exits) },
 126         { "mmio_exits", VCPU_STAT(mmio_exits) },
 127         { "signal_exits", VCPU_STAT(signal_exits) },
 128         { "irq_window", VCPU_STAT(irq_window_exits) },
 129         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 130         { "halt_exits", VCPU_STAT(halt_exits) },
 131         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 132         { "hypercalls", VCPU_STAT(hypercalls) },
 133         { "request_irq", VCPU_STAT(request_irq_exits) },
 134         { "irq_exits", VCPU_STAT(irq_exits) },
 135         { "host_state_reload", VCPU_STAT(host_state_reload) },
 136         { "efer_reload", VCPU_STAT(efer_reload) },
 137         { "fpu_reload", VCPU_STAT(fpu_reload) },
 138         { "insn_emulation", VCPU_STAT(insn_emulation) },
 139         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 140         { "irq_injections", VCPU_STAT(irq_injections) },
 141         { "nmi_injections", VCPU_STAT(nmi_injections) },
 142         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 143         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 144         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 145         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 146         { "mmu_flooded", VM_STAT(mmu_flooded) },
 147         { "mmu_recycled", VM_STAT(mmu_recycled) },
 148         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 149         { "mmu_unsync", VM_STAT(mmu_unsync) },
 150         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 151         { "largepages", VM_STAT(lpages) },
 152         { NULL }
 153 };
 154
 155 u64 __read_mostly host_xcr0;
 156
 157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         atomic_inc(&vcpu->arch.nmi_queued);
 365         kvm_make_request(KVM_REQ_NMI, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (!(xcr0 & XSTATE_FP))
 555                 return 1;
 556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 557                 return 1;
 558         if (xcr0 & ~host_xcr0)
 559                 return 1;
 560         vcpu->arch.xcr0 = xcr0;
 561         vcpu->guest_xcr0_loaded = 0;
 562         return 0;
 563 }
 564
 565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 566 {
 567         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 568             __kvm_set_xcr(vcpu, index, xcr)) {
 569                 kvm_inject_gp(vcpu, 0);
 570                 return 1;
 571         }
 572         return 0;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 575
 576 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 577 {
 578         struct kvm_cpuid_entry2 *best;
 579
 580         if (!static_cpu_has(X86_FEATURE_XSAVE))
 581                 return 0;
 582
 583         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 584         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 585 }
 586
 587 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 588 {
 589         struct kvm_cpuid_entry2 *best;
 590
 591         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 592         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 593 }
 594
 595 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 596 {
 597         struct kvm_cpuid_entry2 *best;
 598
 599         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 600         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 601 }
 602
 603 static void update_cpuid(struct kvm_vcpu *vcpu)
 604 {
 605         struct kvm_cpuid_entry2 *best;
 606         struct kvm_lapic *apic = vcpu->arch.apic;
 607
 608         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 609         if (!best)
 610                 return;
 611
 612         /* Update OSXSAVE bit */
 613         if (cpu_has_xsave && best->function == 0x1) {
 614                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 615                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 616                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 617         }
 618
 619         if (apic) {
 620                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 621                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 622                 else
 623                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 624         }
 625 }
 626
 627 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 628 {
 629         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 630         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 631                                    X86_CR4_PAE | X86_CR4_SMEP;
 632         if (cr4 & CR4_RESERVED_BITS)
 633                 return 1;
 634
 635         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 636                 return 1;
 637
 638         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 639                 return 1;
 640
 641         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 642                 return 1;
 643
 644         if (is_long_mode(vcpu)) {
 645                 if (!(cr4 & X86_CR4_PAE))
 646                         return 1;
 647         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 648                    && ((cr4 ^ old_cr4) & pdptr_bits)
 649                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 650                                    kvm_read_cr3(vcpu)))
 651                 return 1;
 652
 653         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 654                 return 1;
 655
 656         if ((cr4 ^ old_cr4) & pdptr_bits)
 657                 kvm_mmu_reset_context(vcpu);
 658
 659         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 660                 update_cpuid(vcpu);
 661
 662         return 0;
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 665
 666 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 667 {
 668         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 669                 kvm_mmu_sync_roots(vcpu);
 670                 kvm_mmu_flush_tlb(vcpu);
 671                 return 0;
 672         }
 673
 674         if (is_long_mode(vcpu)) {
 675                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 676                         return 1;
 677         } else {
 678                 if (is_pae(vcpu)) {
 679                         if (cr3 & CR3_PAE_RESERVED_BITS)
 680                                 return 1;
 681                         if (is_paging(vcpu) &&
 682                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 683                                 return 1;
 684                 }
 685                 /*
 686                  * We don't check reserved bits in nonpae mode, because
 687                  * this isn't enforced, and VMware depends on this.
 688                  */
 689         }
 690
 691         /*
 692          * Does the new cr3 value map to physical memory? (Note, we
 693          * catch an invalid cr3 even in real-mode, because it would
 694          * cause trouble later on when we turn on paging anyway.)
 695          *
 696          * A real CPU would silently accept an invalid cr3 and would
 697          * attempt to use it - with largely undefined (and often hard
 698          * to debug) behavior on the guest side.
 699          */
 700         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 701                 return 1;
 702         vcpu->arch.cr3 = cr3;
 703         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 704         vcpu->arch.mmu.new_cr3(vcpu);
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 708
 709 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 710 {
 711         if (cr8 & CR8_RESERVED_BITS)
 712                 return 1;
 713         if (irqchip_in_kernel(vcpu->kvm))
 714                 kvm_lapic_set_tpr(vcpu, cr8);
 715         else
 716                 vcpu->arch.cr8 = cr8;
 717         return 0;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 720
 721 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 722 {
 723         if (irqchip_in_kernel(vcpu->kvm))
 724                 return kvm_lapic_get_cr8(vcpu);
 725         else
 726                 return vcpu->arch.cr8;
 727 }
 728 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 729
 730 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 731 {
 732         switch (dr) {
 733         case 0 ... 3:
 734                 vcpu->arch.db[dr] = val;
 735                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 736                         vcpu->arch.eff_db[dr] = val;
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1; /* #UD */
 741                 /* fall through */
 742         case 6:
 743                 if (val & 0xffffffff00000000ULL)
 744                         return -1; /* #GP */
 745                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 746                 break;
 747         case 5:
 748                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 749                         return 1; /* #UD */
 750                 /* fall through */
 751         default: /* 7 */
 752                 if (val & 0xffffffff00000000ULL)
 753                         return -1; /* #GP */
 754                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 755                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 756                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 757                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 758                 }
 759                 break;
 760         }
 761
 762         return 0;
 763 }
 764
 765 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 766 {
 767         int res;
 768
 769         res = __kvm_set_dr(vcpu, dr, val);
 770         if (res > 0)
 771                 kvm_queue_exception(vcpu, UD_VECTOR);
 772         else if (res < 0)
 773                 kvm_inject_gp(vcpu, 0);
 774
 775         return res;
 776 }
 777 EXPORT_SYMBOL_GPL(kvm_set_dr);
 778
 779 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 780 {
 781         switch (dr) {
 782         case 0 ... 3:
 783                 *val = vcpu->arch.db[dr];
 784                 break;
 785         case 4:
 786                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 787                         return 1;
 788                 /* fall through */
 789         case 6:
 790                 *val = vcpu->arch.dr6;
 791                 break;
 792         case 5:
 793                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 794                         return 1;
 795                 /* fall through */
 796         default: /* 7 */
 797                 *val = vcpu->arch.dr7;
 798                 break;
 799         }
 800
 801         return 0;
 802 }
 803
 804 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 805 {
 806         if (_kvm_get_dr(vcpu, dr, val)) {
 807                 kvm_queue_exception(vcpu, UD_VECTOR);
 808                 return 1;
 809         }
 810         return 0;
 811 }
 812 EXPORT_SYMBOL_GPL(kvm_get_dr);
 813
 814 /*
 815  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 816  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 817  *
 818  * This list is modified at module load time to reflect the
 819  * capabilities of the host cpu. This capabilities test skips MSRs that are
 820  * kvm-specific. Those are put in the beginning of the list.
 821  */
 822
 823 #define KVM_SAVE_MSRS_BEGIN     9
 824 static u32 msrs_to_save[] = {
 825         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 826         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 827         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 828         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 829         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 830         MSR_STAR,
 831 #ifdef CONFIG_X86_64
 832         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 833 #endif
 834         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 835 };
 836
 837 static unsigned num_msrs_to_save;
 838
 839 static u32 emulated_msrs[] = {
 840         MSR_IA32_TSCDEADLINE,
 841         MSR_IA32_MISC_ENABLE,
 842         MSR_IA32_MCG_STATUS,
 843         MSR_IA32_MCG_CTL,
 844 };
 845
 846 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 847 {
 848         u64 old_efer = vcpu->arch.efer;
 849
 850         if (efer & efer_reserved_bits)
 851                 return 1;
 852
 853         if (is_paging(vcpu)
 854             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 855                 return 1;
 856
 857         if (efer & EFER_FFXSR) {
 858                 struct kvm_cpuid_entry2 *feat;
 859
 860                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 861                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 862                         return 1;
 863         }
 864
 865         if (efer & EFER_SVME) {
 866                 struct kvm_cpuid_entry2 *feat;
 867
 868                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 869                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 870                         return 1;
 871         }
 872
 873         efer &= ~EFER_LMA;
 874         efer |= vcpu->arch.efer & EFER_LMA;
 875
 876         kvm_x86_ops->set_efer(vcpu, efer);
 877
 878         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 879
 880         /* Update reserved bits */
 881         if ((efer ^ old_efer) & EFER_NX)
 882                 kvm_mmu_reset_context(vcpu);
 883
 884         return 0;
 885 }
 886
 887 void kvm_enable_efer_bits(u64 mask)
 888 {
 889        efer_reserved_bits &= ~mask;
 890 }
 891 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 892
 893
 894 /*
 895  * Writes msr value into into the appropriate "register".
 896  * Returns 0 on success, non-0 otherwise.
 897  * Assumes vcpu_load() was already called.
 898  */
 899 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 900 {
 901         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 902 }
 903
 904 /*
 905  * Adapt set_msr() to msr_io()'s calling convention
 906  */
 907 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 908 {
 909         return kvm_set_msr(vcpu, index, *data);
 910 }
 911
 912 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 913 {
 914         int version;
 915         int r;
 916         struct pvclock_wall_clock wc;
 917         struct timespec boot;
 918
 919         if (!wall_clock)
 920                 return;
 921
 922         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 923         if (r)
 924                 return;
 925
 926         if (version & 1)
 927                 ++version;  /* first time write, random junk */
 928
 929         ++version;
 930
 931         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 932
 933         /*
 934          * The guest calculates current wall clock time by adding
 935          * system time (updated by kvm_guest_time_update below) to the
 936          * wall clock specified here.  guest system time equals host
 937          * system time for us, thus we must fill in host boot time here.
 938          */
 939         getboottime(&boot);
 940
 941         wc.sec = boot.tv_sec;
 942         wc.nsec = boot.tv_nsec;
 943         wc.version = version;
 944
 945         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 946
 947         version++;
 948         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 949 }
 950
 951 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 952 {
 953         uint32_t quotient, remainder;
 954
 955         /* Don't try to replace with do_div(), this one calculates
 956          * "(dividend << 32) / divisor" */
 957         __asm__ ( "divl %4"
 958                   : "=a" (quotient), "=d" (remainder)
 959                   : "0" (0), "1" (dividend), "r" (divisor) );
 960         return quotient;
 961 }
 962
 963 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 964                                s8 *pshift, u32 *pmultiplier)
 965 {
 966         uint64_t scaled64;
 967         int32_t  shift = 0;
 968         uint64_t tps64;
 969         uint32_t tps32;
 970
 971         tps64 = base_khz * 1000LL;
 972         scaled64 = scaled_khz * 1000LL;
 973         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 974                 tps64 >>= 1;
 975                 shift--;
 976         }
 977
 978         tps32 = (uint32_t)tps64;
 979         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 980                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 981                         scaled64 >>= 1;
 982                 else
 983                         tps32 <<= 1;
 984                 shift++;
 985         }
 986
 987         *pshift = shift;
 988         *pmultiplier = div_frac(scaled64, tps32);
 989
 990         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 991                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 992 }
 993
 994 static inline u64 get_kernel_ns(void)
 995 {
 996         struct timespec ts;
 997
 998         WARN_ON(preemptible());
 999         ktime_get_ts(&ts);
1000         monotonic_to_bootbased(&ts);
1001         return timespec_to_ns(&ts);
1002 }
1003
1004 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1005 unsigned long max_tsc_khz;
1006
1007 static inline int kvm_tsc_changes_freq(void)
1008 {
1009         int cpu = get_cpu();
1010         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1011                   cpufreq_quick_get(cpu) != 0;
1012         put_cpu();
1013         return ret;
1014 }
1015
1016 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1017 {
1018         if (vcpu->arch.virtual_tsc_khz)
1019                 return vcpu->arch.virtual_tsc_khz;
1020         else
1021                 return __this_cpu_read(cpu_tsc_khz);
1022 }
1023
1024 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1025 {
1026         u64 ret;
1027
1028         WARN_ON(preemptible());
1029         if (kvm_tsc_changes_freq())
1030                 printk_once(KERN_WARNING
1031                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1032         ret = nsec * vcpu_tsc_khz(vcpu);
1033         do_div(ret, USEC_PER_SEC);
1034         return ret;
1035 }
1036
1037 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1038 {
1039         /* Compute a scale to convert nanoseconds in TSC cycles */
1040         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1041                            &vcpu->arch.tsc_catchup_shift,
1042                            &vcpu->arch.tsc_catchup_mult);
1043 }
1044
1045 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1046 {
1047         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1048                                       vcpu->arch.tsc_catchup_mult,
1049                                       vcpu->arch.tsc_catchup_shift);
1050         tsc += vcpu->arch.last_tsc_write;
1051         return tsc;
1052 }
1053
1054 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1055 {
1056         struct kvm *kvm = vcpu->kvm;
1057         u64 offset, ns, elapsed;
1058         unsigned long flags;
1059         s64 sdiff;
1060
1061         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1062         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1063         ns = get_kernel_ns();
1064         elapsed = ns - kvm->arch.last_tsc_nsec;
1065         sdiff = data - kvm->arch.last_tsc_write;
1066         if (sdiff < 0)
1067                 sdiff = -sdiff;
1068
1069         /*
1070          * Special case: close write to TSC within 5 seconds of
1071          * another CPU is interpreted as an attempt to synchronize
1072          * The 5 seconds is to accommodate host load / swapping as
1073          * well as any reset of TSC during the boot process.
1074          *
1075          * In that case, for a reliable TSC, we can match TSC offsets,
1076          * or make a best guest using elapsed value.
1077          */
1078         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1079             elapsed < 5ULL * NSEC_PER_SEC) {
1080                 if (!check_tsc_unstable()) {
1081                         offset = kvm->arch.last_tsc_offset;
1082                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1083                 } else {
1084                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1085                         offset += delta;
1086                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1087                 }
1088                 ns = kvm->arch.last_tsc_nsec;
1089         }
1090         kvm->arch.last_tsc_nsec = ns;
1091         kvm->arch.last_tsc_write = data;
1092         kvm->arch.last_tsc_offset = offset;
1093         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1094         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1095
1096         /* Reset of TSC must disable overshoot protection below */
1097         vcpu->arch.hv_clock.tsc_timestamp = 0;
1098         vcpu->arch.last_tsc_write = data;
1099         vcpu->arch.last_tsc_nsec = ns;
1100 }
1101 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1102
1103 static int kvm_guest_time_update(struct kvm_vcpu *v)
1104 {
1105         unsigned long flags;
1106         struct kvm_vcpu_arch *vcpu = &v->arch;
1107         unsigned long this_tsc_khz;
1108         s64 kernel_ns, max_kernel_ns;
1109         u64 tsc_timestamp;
1110
1111         /* Keep irq disabled to prevent changes to the clock */
1112         local_irq_save(flags);
1113         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1114         kernel_ns = get_kernel_ns();
1115         this_tsc_khz = vcpu_tsc_khz(v);
1116         if (unlikely(this_tsc_khz == 0)) {
1117                 local_irq_restore(flags);
1118                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1119                 return 1;
1120         }
1121
1122         /*
1123          * We may have to catch up the TSC to match elapsed wall clock
1124          * time for two reasons, even if kvmclock is used.
1125          *   1) CPU could have been running below the maximum TSC rate
1126          *   2) Broken TSC compensation resets the base at each VCPU
1127          *      entry to avoid unknown leaps of TSC even when running
1128          *      again on the same CPU.  This may cause apparent elapsed
1129          *      time to disappear, and the guest to stand still or run
1130          *      very slowly.
1131          */
1132         if (vcpu->tsc_catchup) {
1133                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1134                 if (tsc > tsc_timestamp) {
1135                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1136                         tsc_timestamp = tsc;
1137                 }
1138         }
1139
1140         local_irq_restore(flags);
1141
1142         if (!vcpu->pv_time_enabled)
1143                 return 0;
1144
1145         /*
1146          * Time as measured by the TSC may go backwards when resetting the base
1147          * tsc_timestamp.  The reason for this is that the TSC resolution is
1148          * higher than the resolution of the other clock scales.  Thus, many
1149          * possible measurments of the TSC correspond to one measurement of any
1150          * other clock, and so a spread of values is possible.  This is not a
1151          * problem for the computation of the nanosecond clock; with TSC rates
1152          * around 1GHZ, there can only be a few cycles which correspond to one
1153          * nanosecond value, and any path through this code will inevitably
1154          * take longer than that.  However, with the kernel_ns value itself,
1155          * the precision may be much lower, down to HZ granularity.  If the
1156          * first sampling of TSC against kernel_ns ends in the low part of the
1157          * range, and the second in the high end of the range, we can get:
1158          *
1159          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1160          *
1161          * As the sampling errors potentially range in the thousands of cycles,
1162          * it is possible such a time value has already been observed by the
1163          * guest.  To protect against this, we must compute the system time as
1164          * observed by the guest and ensure the new system time is greater.
1165          */
1166         max_kernel_ns = 0;
1167         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1168                 max_kernel_ns = vcpu->last_guest_tsc -
1169                                 vcpu->hv_clock.tsc_timestamp;
1170                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1171                                     vcpu->hv_clock.tsc_to_system_mul,
1172                                     vcpu->hv_clock.tsc_shift);
1173                 max_kernel_ns += vcpu->last_kernel_ns;
1174         }
1175
1176         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1177                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1178                                    &vcpu->hv_clock.tsc_shift,
1179                                    &vcpu->hv_clock.tsc_to_system_mul);
1180                 vcpu->hw_tsc_khz = this_tsc_khz;
1181         }
1182
1183         if (max_kernel_ns > kernel_ns)
1184                 kernel_ns = max_kernel_ns;
1185
1186         /* With all the info we got, fill in the values */
1187         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1188         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1189         vcpu->last_kernel_ns = kernel_ns;
1190         vcpu->last_guest_tsc = tsc_timestamp;
1191         vcpu->hv_clock.flags = 0;
1192
1193         /*
1194          * The interface expects us to write an even number signaling that the
1195          * update is finished. Since the guest won't see the intermediate
1196          * state, we just increase by 2 at the end.
1197          */
1198         vcpu->hv_clock.version += 2;
1199
1200         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1201                                 &vcpu->hv_clock,
1202                                 sizeof(vcpu->hv_clock));
1203         return 0;
1204 }
1205
1206 static bool msr_mtrr_valid(unsigned msr)
1207 {
1208         switch (msr) {
1209         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1210         case MSR_MTRRfix64K_00000:
1211         case MSR_MTRRfix16K_80000:
1212         case MSR_MTRRfix16K_A0000:
1213         case MSR_MTRRfix4K_C0000:
1214         case MSR_MTRRfix4K_C8000:
1215         case MSR_MTRRfix4K_D0000:
1216         case MSR_MTRRfix4K_D8000:
1217         case MSR_MTRRfix4K_E0000:
1218         case MSR_MTRRfix4K_E8000:
1219         case MSR_MTRRfix4K_F0000:
1220         case MSR_MTRRfix4K_F8000:
1221         case MSR_MTRRdefType:
1222         case MSR_IA32_CR_PAT:
1223                 return true;
1224         case 0x2f8:
1225                 return true;
1226         }
1227         return false;
1228 }
1229
1230 static bool valid_pat_type(unsigned t)
1231 {
1232         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1233 }
1234
1235 static bool valid_mtrr_type(unsigned t)
1236 {
1237         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1238 }
1239
1240 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1241 {
1242         int i;
1243
1244         if (!msr_mtrr_valid(msr))
1245                 return false;
1246
1247         if (msr == MSR_IA32_CR_PAT) {
1248                 for (i = 0; i < 8; i++)
1249                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1250                                 return false;
1251                 return true;
1252         } else if (msr == MSR_MTRRdefType) {
1253                 if (data & ~0xcff)
1254                         return false;
1255                 return valid_mtrr_type(data & 0xff);
1256         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1257                 for (i = 0; i < 8 ; i++)
1258                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1259                                 return false;
1260                 return true;
1261         }
1262
1263         /* variable MTRRs */
1264         return valid_mtrr_type(data & 0xff);
1265 }
1266
1267 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1268 {
1269         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1270
1271         if (!mtrr_valid(vcpu, msr, data))
1272                 return 1;
1273
1274         if (msr == MSR_MTRRdefType) {
1275                 vcpu->arch.mtrr_state.def_type = data;
1276                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1277         } else if (msr == MSR_MTRRfix64K_00000)
1278                 p[0] = data;
1279         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1280                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1281         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1282                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1283         else if (msr == MSR_IA32_CR_PAT)
1284                 vcpu->arch.pat = data;
1285         else {  /* Variable MTRRs */
1286                 int idx, is_mtrr_mask;
1287                 u64 *pt;
1288
1289                 idx = (msr - 0x200) / 2;
1290                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1291                 if (!is_mtrr_mask)
1292                         pt =
1293                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1294                 else
1295                         pt =
1296                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1297                 *pt = data;
1298         }
1299
1300         kvm_mmu_reset_context(vcpu);
1301         return 0;
1302 }
1303
1304 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1305 {
1306         u64 mcg_cap = vcpu->arch.mcg_cap;
1307         unsigned bank_num = mcg_cap & 0xff;
1308
1309         switch (msr) {
1310         case MSR_IA32_MCG_STATUS:
1311                 vcpu->arch.mcg_status = data;
1312                 break;
1313         case MSR_IA32_MCG_CTL:
1314                 if (!(mcg_cap & MCG_CTL_P))
1315                         return 1;
1316                 if (data != 0 && data != ~(u64)0)
1317                         return -1;
1318                 vcpu->arch.mcg_ctl = data;
1319                 break;
1320         default:
1321                 if (msr >= MSR_IA32_MC0_CTL &&
1322                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1323                         u32 offset = msr - MSR_IA32_MC0_CTL;
1324                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1325                          * some Linux kernels though clear bit 10 in bank 4 to
1326                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1327                          * this to avoid an uncatched #GP in the guest
1328                          */
1329                         if ((offset & 0x3) == 0 &&
1330                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1331                                 return -1;
1332                         vcpu->arch.mce_banks[offset] = data;
1333                         break;
1334                 }
1335                 return 1;
1336         }
1337         return 0;
1338 }
1339
1340 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1341 {
1342         struct kvm *kvm = vcpu->kvm;
1343         int lm = is_long_mode(vcpu);
1344         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1345                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1346         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1347                 : kvm->arch.xen_hvm_config.blob_size_32;
1348         u32 page_num = data & ~PAGE_MASK;
1349         u64 page_addr = data & PAGE_MASK;
1350         u8 *page;
1351         int r;
1352
1353         r = -E2BIG;
1354         if (page_num >= blob_size)
1355                 goto out;
1356         r = -ENOMEM;
1357         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1358         if (!page)
1359                 goto out;
1360         r = -EFAULT;
1361         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1362                 goto out_free;
1363         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1364                 goto out_free;
1365         r = 0;
1366 out_free:
1367         kfree(page);
1368 out:
1369         return r;
1370 }
1371
1372 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1373 {
1374         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1375 }
1376
1377 static bool kvm_hv_msr_partition_wide(u32 msr)
1378 {
1379         bool r = false;
1380         switch (msr) {
1381         case HV_X64_MSR_GUEST_OS_ID:
1382         case HV_X64_MSR_HYPERCALL:
1383                 r = true;
1384                 break;
1385         }
1386
1387         return r;
1388 }
1389
1390 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1391 {
1392         struct kvm *kvm = vcpu->kvm;
1393
1394         switch (msr) {
1395         case HV_X64_MSR_GUEST_OS_ID:
1396                 kvm->arch.hv_guest_os_id = data;
1397                 /* setting guest os id to zero disables hypercall page */
1398                 if (!kvm->arch.hv_guest_os_id)
1399                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1400                 break;
1401         case HV_X64_MSR_HYPERCALL: {
1402                 u64 gfn;
1403                 unsigned long addr;
1404                 u8 instructions[4];
1405
1406                 /* if guest os id is not set hypercall should remain disabled */
1407                 if (!kvm->arch.hv_guest_os_id)
1408                         break;
1409                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1410                         kvm->arch.hv_hypercall = data;
1411                         break;
1412                 }
1413                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1414                 addr = gfn_to_hva(kvm, gfn);
1415                 if (kvm_is_error_hva(addr))
1416                         return 1;
1417                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1418                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1419                 if (__copy_to_user((void __user *)addr, instructions, 4))
1420                         return 1;
1421                 kvm->arch.hv_hypercall = data;
1422                 break;
1423         }
1424         default:
1425                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1426                           "data 0x%llx\n", msr, data);
1427                 return 1;
1428         }
1429         return 0;
1430 }
1431
1432 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1433 {
1434         switch (msr) {
1435         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1436                 unsigned long addr;
1437
1438                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1439                         vcpu->arch.hv_vapic = data;
1440                         break;
1441                 }
1442                 addr = gfn_to_hva(vcpu->kvm, data >>
1443                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1444                 if (kvm_is_error_hva(addr))
1445                         return 1;
1446                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1447                         return 1;
1448                 vcpu->arch.hv_vapic = data;
1449                 break;
1450         }
1451         case HV_X64_MSR_EOI:
1452                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1453         case HV_X64_MSR_ICR:
1454                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1455         case HV_X64_MSR_TPR:
1456                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1457         default:
1458                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1459                           "data 0x%llx\n", msr, data);
1460                 return 1;
1461         }
1462
1463         return 0;
1464 }
1465
1466 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1467 {
1468         gpa_t gpa = data & ~0x3f;
1469
1470         /* Bits 2:5 are resrved, Should be zero */
1471         if (data & 0x3c)
1472                 return 1;
1473
1474         vcpu->arch.apf.msr_val = data;
1475
1476         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1477                 kvm_clear_async_pf_completion_queue(vcpu);
1478                 kvm_async_pf_hash_reset(vcpu);
1479                 return 0;
1480         }
1481
1482         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1483                                         sizeof(u32)))
1484                 return 1;
1485
1486         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1487         kvm_async_pf_wakeup_all(vcpu);
1488         return 0;
1489 }
1490
1491 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1492 {
1493         vcpu->arch.pv_time_enabled = false;
1494 }
1495
1496 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1497 {
1498         u64 delta;
1499
1500         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1501                 return;
1502
1503         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1504         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1505         vcpu->arch.st.accum_steal = delta;
1506 }
1507
1508 static void record_steal_time(struct kvm_vcpu *vcpu)
1509 {
1510         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1511                 return;
1512
1513         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1514                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1515                 return;
1516
1517         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1518         vcpu->arch.st.steal.version += 2;
1519         vcpu->arch.st.accum_steal = 0;
1520
1521         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1522                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1523 }
1524
1525 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1526 {
1527         switch (msr) {
1528         case MSR_EFER:
1529                 return set_efer(vcpu, data);
1530         case MSR_K7_HWCR:
1531                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1532                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1533                 if (data != 0) {
1534                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1535                                 data);
1536                         return 1;
1537                 }
1538                 break;
1539         case MSR_FAM10H_MMIO_CONF_BASE:
1540                 if (data != 0) {
1541                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1542                                 "0x%llx\n", data);
1543                         return 1;
1544                 }
1545                 break;
1546         case MSR_AMD64_NB_CFG:
1547                 break;
1548         case MSR_IA32_DEBUGCTLMSR:
1549                 if (!data) {
1550                         /* We support the non-activated case already */
1551                         break;
1552                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1553                         /* Values other than LBR and BTF are vendor-specific,
1554                            thus reserved and should throw a #GP */
1555                         return 1;
1556                 }
1557                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1558                         __func__, data);
1559                 break;
1560         case MSR_IA32_UCODE_REV:
1561         case MSR_IA32_UCODE_WRITE:
1562         case MSR_VM_HSAVE_PA:
1563         case MSR_AMD64_PATCH_LOADER:
1564                 break;
1565         case 0x200 ... 0x2ff:
1566                 return set_msr_mtrr(vcpu, msr, data);
1567         case MSR_IA32_APICBASE:
1568                 kvm_set_apic_base(vcpu, data);
1569                 break;
1570         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1571                 return kvm_x2apic_msr_write(vcpu, msr, data);
1572         case MSR_IA32_TSCDEADLINE:
1573                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1574                 break;
1575         case MSR_IA32_MISC_ENABLE:
1576                 vcpu->arch.ia32_misc_enable_msr = data;
1577                 break;
1578         case MSR_KVM_WALL_CLOCK_NEW:
1579         case MSR_KVM_WALL_CLOCK:
1580                 vcpu->kvm->arch.wall_clock = data;
1581                 kvm_write_wall_clock(vcpu->kvm, data);
1582                 break;
1583         case MSR_KVM_SYSTEM_TIME_NEW:
1584         case MSR_KVM_SYSTEM_TIME: {
1585                 u64 gpa_offset;
1586                 kvmclock_reset(vcpu);
1587
1588                 vcpu->arch.time = data;
1589                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1590
1591                 /* we verify if the enable bit is set... */
1592                 if (!(data & 1))
1593                         break;
1594
1595                 gpa_offset = data & ~(PAGE_MASK | 1);
1596
1597                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1598                      &vcpu->arch.pv_time, data & ~1ULL,
1599                      sizeof(struct pvclock_vcpu_time_info)))
1600                         vcpu->arch.pv_time_enabled = false;
1601                 else
1602                         vcpu->arch.pv_time_enabled = true;
1603                 break;
1604         }
1605         case MSR_KVM_ASYNC_PF_EN:
1606                 if (kvm_pv_enable_async_pf(vcpu, data))
1607                         return 1;
1608                 break;
1609         case MSR_KVM_STEAL_TIME:
1610
1611                 if (unlikely(!sched_info_on()))
1612                         return 1;
1613
1614                 if (data & KVM_STEAL_RESERVED_MASK)
1615                         return 1;
1616
1617                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1618                                                 data & KVM_STEAL_VALID_BITS,
1619                                                 sizeof(struct kvm_steal_time)))
1620                         return 1;
1621
1622                 vcpu->arch.st.msr_val = data;
1623
1624                 if (!(data & KVM_MSR_ENABLED))
1625                         break;
1626
1627                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1628
1629                 preempt_disable();
1630                 accumulate_steal_time(vcpu);
1631                 preempt_enable();
1632
1633                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1634
1635                 break;
1636
1637         case MSR_IA32_MCG_CTL:
1638         case MSR_IA32_MCG_STATUS:
1639         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1640                 return set_msr_mce(vcpu, msr, data);
1641
1642         /* Performance counters are not protected by a CPUID bit,
1643          * so we should check all of them in the generic path for the sake of
1644          * cross vendor migration.
1645          * Writing a zero into the event select MSRs disables them,
1646          * which we perfectly emulate ;-). Any other value should be at least
1647          * reported, some guests depend on them.
1648          */
1649         case MSR_P6_EVNTSEL0:
1650         case MSR_P6_EVNTSEL1:
1651         case MSR_K7_EVNTSEL0:
1652         case MSR_K7_EVNTSEL1:
1653         case MSR_K7_EVNTSEL2:
1654         case MSR_K7_EVNTSEL3:
1655                 if (data != 0)
1656                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1657                                 "0x%x data 0x%llx\n", msr, data);
1658                 break;
1659         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1660          * so we ignore writes to make it happy.
1661          */
1662         case MSR_P6_PERFCTR0:
1663         case MSR_P6_PERFCTR1:
1664         case MSR_K7_PERFCTR0:
1665         case MSR_K7_PERFCTR1:
1666         case MSR_K7_PERFCTR2:
1667         case MSR_K7_PERFCTR3:
1668                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1669                         "0x%x data 0x%llx\n", msr, data);
1670                 break;
1671         case MSR_K7_CLK_CTL:
1672                 /*
1673                  * Ignore all writes to this no longer documented MSR.
1674                  * Writes are only relevant for old K7 processors,
1675                  * all pre-dating SVM, but a recommended workaround from
1676                  * AMD for these chips. It is possible to speicify the
1677                  * affected processor models on the command line, hence
1678                  * the need to ignore the workaround.
1679                  */
1680                 break;
1681         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1682                 if (kvm_hv_msr_partition_wide(msr)) {
1683                         int r;
1684                         mutex_lock(&vcpu->kvm->lock);
1685                         r = set_msr_hyperv_pw(vcpu, msr, data);
1686                         mutex_unlock(&vcpu->kvm->lock);
1687                         return r;
1688                 } else
1689                         return set_msr_hyperv(vcpu, msr, data);
1690                 break;
1691         case MSR_IA32_BBL_CR_CTL3:
1692                 /* Drop writes to this legacy MSR -- see rdmsr
1693                  * counterpart for further detail.
1694                  */
1695                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1696                 break;
1697         default:
1698                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1699                         return xen_hvm_config(vcpu, data);
1700                 if (!ignore_msrs) {
1701                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1702                                 msr, data);
1703                         return 1;
1704                 } else {
1705                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1706                                 msr, data);
1707                         break;
1708                 }
1709         }
1710         return 0;
1711 }
1712 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1713
1714
1715 /*
1716  * Reads an msr value (of 'msr_index') into 'pdata'.
1717  * Returns 0 on success, non-0 otherwise.
1718  * Assumes vcpu_load() was already called.
1719  */
1720 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1721 {
1722         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1723 }
1724
1725 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1726 {
1727         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1728
1729         if (!msr_mtrr_valid(msr))
1730                 return 1;
1731
1732         if (msr == MSR_MTRRdefType)
1733                 *pdata = vcpu->arch.mtrr_state.def_type +
1734                          (vcpu->arch.mtrr_state.enabled << 10);
1735         else if (msr == MSR_MTRRfix64K_00000)
1736                 *pdata = p[0];
1737         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1738                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1739         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1740                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1741         else if (msr == MSR_IA32_CR_PAT)
1742                 *pdata = vcpu->arch.pat;
1743         else {  /* Variable MTRRs */
1744                 int idx, is_mtrr_mask;
1745                 u64 *pt;
1746
1747                 idx = (msr - 0x200) / 2;
1748                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1749                 if (!is_mtrr_mask)
1750                         pt =
1751                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1752                 else
1753                         pt =
1754                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1755                 *pdata = *pt;
1756         }
1757
1758         return 0;
1759 }
1760
1761 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1762 {
1763         u64 data;
1764         u64 mcg_cap = vcpu->arch.mcg_cap;
1765         unsigned bank_num = mcg_cap & 0xff;
1766
1767         switch (msr) {
1768         case MSR_IA32_P5_MC_ADDR:
1769         case MSR_IA32_P5_MC_TYPE:
1770                 data = 0;
1771                 break;
1772         case MSR_IA32_MCG_CAP:
1773                 data = vcpu->arch.mcg_cap;
1774                 break;
1775         case MSR_IA32_MCG_CTL:
1776                 if (!(mcg_cap & MCG_CTL_P))
1777                         return 1;
1778                 data = vcpu->arch.mcg_ctl;
1779                 break;
1780         case MSR_IA32_MCG_STATUS:
1781                 data = vcpu->arch.mcg_status;
1782                 break;
1783         default:
1784                 if (msr >= MSR_IA32_MC0_CTL &&
1785                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1786                         u32 offset = msr - MSR_IA32_MC0_CTL;
1787                         data = vcpu->arch.mce_banks[offset];
1788                         break;
1789                 }
1790                 return 1;
1791         }
1792         *pdata = data;
1793         return 0;
1794 }
1795
1796 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1797 {
1798         u64 data = 0;
1799         struct kvm *kvm = vcpu->kvm;
1800
1801         switch (msr) {
1802         case HV_X64_MSR_GUEST_OS_ID:
1803                 data = kvm->arch.hv_guest_os_id;
1804                 break;
1805         case HV_X64_MSR_HYPERCALL:
1806                 data = kvm->arch.hv_hypercall;
1807                 break;
1808         default:
1809                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1810                 return 1;
1811         }
1812
1813         *pdata = data;
1814         return 0;
1815 }
1816
1817 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1818 {
1819         u64 data = 0;
1820
1821         switch (msr) {
1822         case HV_X64_MSR_VP_INDEX: {
1823                 int r;
1824                 struct kvm_vcpu *v;
1825                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1826                         if (v == vcpu)
1827                                 data = r;
1828                 break;
1829         }
1830         case HV_X64_MSR_EOI:
1831                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1832         case HV_X64_MSR_ICR:
1833                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1834         case HV_X64_MSR_TPR:
1835                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1836         case HV_X64_MSR_APIC_ASSIST_PAGE:
1837                 data = vcpu->arch.hv_vapic;
1838                 break;
1839         default:
1840                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1841                 return 1;
1842         }
1843         *pdata = data;
1844         return 0;
1845 }
1846
1847 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1848 {
1849         u64 data;
1850
1851         switch (msr) {
1852         case MSR_IA32_PLATFORM_ID:
1853         case MSR_IA32_EBL_CR_POWERON:
1854         case MSR_IA32_DEBUGCTLMSR:
1855         case MSR_IA32_LASTBRANCHFROMIP:
1856         case MSR_IA32_LASTBRANCHTOIP:
1857         case MSR_IA32_LASTINTFROMIP:
1858         case MSR_IA32_LASTINTTOIP:
1859         case MSR_K8_SYSCFG:
1860         case MSR_K7_HWCR:
1861         case MSR_VM_HSAVE_PA:
1862         case MSR_P6_PERFCTR0:
1863         case MSR_P6_PERFCTR1:
1864         case MSR_P6_EVNTSEL0:
1865         case MSR_P6_EVNTSEL1:
1866         case MSR_K7_EVNTSEL0:
1867         case MSR_K7_PERFCTR0:
1868         case MSR_K8_INT_PENDING_MSG:
1869         case MSR_AMD64_NB_CFG:
1870         case MSR_FAM10H_MMIO_CONF_BASE:
1871                 data = 0;
1872                 break;
1873         case MSR_IA32_UCODE_REV:
1874                 data = 0x100000000ULL;
1875                 break;
1876         case MSR_MTRRcap:
1877                 data = 0x500 | KVM_NR_VAR_MTRR;
1878                 break;
1879         case 0x200 ... 0x2ff:
1880                 return get_msr_mtrr(vcpu, msr, pdata);
1881         case 0xcd: /* fsb frequency */
1882                 data = 3;
1883                 break;
1884                 /*
1885                  * MSR_EBC_FREQUENCY_ID
1886                  * Conservative value valid for even the basic CPU models.
1887                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1888                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1889                  * and 266MHz for model 3, or 4. Set Core Clock
1890                  * Frequency to System Bus Frequency Ratio to 1 (bits
1891                  * 31:24) even though these are only valid for CPU
1892                  * models > 2, however guests may end up dividing or
1893                  * multiplying by zero otherwise.
1894                  */
1895         case MSR_EBC_FREQUENCY_ID:
1896                 data = 1 << 24;
1897                 break;
1898         case MSR_IA32_APICBASE:
1899                 data = kvm_get_apic_base(vcpu);
1900                 break;
1901         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1902                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1903                 break;
1904         case MSR_IA32_TSCDEADLINE:
1905                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1906                 break;
1907         case MSR_IA32_MISC_ENABLE:
1908                 data = vcpu->arch.ia32_misc_enable_msr;
1909                 break;
1910         case MSR_IA32_PERF_STATUS:
1911                 /* TSC increment by tick */
1912                 data = 1000ULL;
1913                 /* CPU multiplier */
1914                 data |= (((uint64_t)4ULL) << 40);
1915                 break;
1916         case MSR_EFER:
1917                 data = vcpu->arch.efer;
1918                 break;
1919         case MSR_KVM_WALL_CLOCK:
1920         case MSR_KVM_WALL_CLOCK_NEW:
1921                 data = vcpu->kvm->arch.wall_clock;
1922                 break;
1923         case MSR_KVM_SYSTEM_TIME:
1924         case MSR_KVM_SYSTEM_TIME_NEW:
1925                 data = vcpu->arch.time;
1926                 break;
1927         case MSR_KVM_ASYNC_PF_EN:
1928                 data = vcpu->arch.apf.msr_val;
1929                 break;
1930         case MSR_KVM_STEAL_TIME:
1931                 data = vcpu->arch.st.msr_val;
1932                 break;
1933         case MSR_IA32_P5_MC_ADDR:
1934         case MSR_IA32_P5_MC_TYPE:
1935         case MSR_IA32_MCG_CAP:
1936         case MSR_IA32_MCG_CTL:
1937         case MSR_IA32_MCG_STATUS:
1938         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1939                 return get_msr_mce(vcpu, msr, pdata);
1940         case MSR_K7_CLK_CTL:
1941                 /*
1942                  * Provide expected ramp-up count for K7. All other
1943                  * are set to zero, indicating minimum divisors for
1944                  * every field.
1945                  *
1946                  * This prevents guest kernels on AMD host with CPU
1947                  * type 6, model 8 and higher from exploding due to
1948                  * the rdmsr failing.
1949                  */
1950                 data = 0x20000000;
1951                 break;
1952         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1953                 if (kvm_hv_msr_partition_wide(msr)) {
1954                         int r;
1955                         mutex_lock(&vcpu->kvm->lock);
1956                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1957                         mutex_unlock(&vcpu->kvm->lock);
1958                         return r;
1959                 } else
1960                         return get_msr_hyperv(vcpu, msr, pdata);
1961                 break;
1962         case MSR_IA32_BBL_CR_CTL3:
1963                 /* This legacy MSR exists but isn't fully documented in current
1964                  * silicon.  It is however accessed by winxp in very narrow
1965                  * scenarios where it sets bit #19, itself documented as
1966                  * a "reserved" bit.  Best effort attempt to source coherent
1967                  * read data here should the balance of the register be
1968                  * interpreted by the guest:
1969                  *
1970                  * L2 cache control register 3: 64GB range, 256KB size,
1971                  * enabled, latency 0x1, configured
1972                  */
1973                 data = 0xbe702111;
1974                 break;
1975         default:
1976                 if (!ignore_msrs) {
1977                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1978                         return 1;
1979                 } else {
1980                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1981                         data = 0;
1982                 }
1983                 break;
1984         }
1985         *pdata = data;
1986         return 0;
1987 }
1988 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1989
1990 /*
1991  * Read or write a bunch of msrs. All parameters are kernel addresses.
1992  *
1993  * @return number of msrs set successfully.
1994  */
1995 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1996                     struct kvm_msr_entry *entries,
1997                     int (*do_msr)(struct kvm_vcpu *vcpu,
1998                                   unsigned index, u64 *data))
1999 {
2000         int i, idx;
2001
2002         idx = srcu_read_lock(&vcpu->kvm->srcu);
2003         for (i = 0; i < msrs->nmsrs; ++i)
2004                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2005                         break;
2006         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2007
2008         return i;
2009 }
2010
2011 /*
2012  * Read or write a bunch of msrs. Parameters are user addresses.
2013  *
2014  * @return number of msrs set successfully.
2015  */
2016 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2017                   int (*do_msr)(struct kvm_vcpu *vcpu,
2018                                 unsigned index, u64 *data),
2019                   int writeback)
2020 {
2021         struct kvm_msrs msrs;
2022         struct kvm_msr_entry *entries;
2023         int r, n;
2024         unsigned size;
2025
2026         r = -EFAULT;
2027         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2028                 goto out;
2029
2030         r = -E2BIG;
2031         if (msrs.nmsrs >= MAX_IO_MSRS)
2032                 goto out;
2033
2034         r = -ENOMEM;
2035         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2036         entries = kmalloc(size, GFP_KERNEL);
2037         if (!entries)
2038                 goto out;
2039
2040         r = -EFAULT;
2041         if (copy_from_user(entries, user_msrs->entries, size))
2042                 goto out_free;
2043
2044         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2045         if (r < 0)
2046                 goto out_free;
2047
2048         r = -EFAULT;
2049         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2050                 goto out_free;
2051
2052         r = n;
2053
2054 out_free:
2055         kfree(entries);
2056 out:
2057         return r;
2058 }
2059
2060 int kvm_dev_ioctl_check_extension(long ext)
2061 {
2062         int r;
2063
2064         switch (ext) {
2065         case KVM_CAP_IRQCHIP:
2066         case KVM_CAP_HLT:
2067         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2068         case KVM_CAP_SET_TSS_ADDR:
2069         case KVM_CAP_EXT_CPUID:
2070         case KVM_CAP_CLOCKSOURCE:
2071         case KVM_CAP_PIT:
2072         case KVM_CAP_NOP_IO_DELAY:
2073         case KVM_CAP_MP_STATE:
2074         case KVM_CAP_SYNC_MMU:
2075         case KVM_CAP_USER_NMI:
2076         case KVM_CAP_REINJECT_CONTROL:
2077         case KVM_CAP_IRQ_INJECT_STATUS:
2078         case KVM_CAP_ASSIGN_DEV_IRQ:
2079         case KVM_CAP_IRQFD:
2080         case KVM_CAP_IOEVENTFD:
2081         case KVM_CAP_PIT2:
2082         case KVM_CAP_PIT_STATE2:
2083         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2084         case KVM_CAP_XEN_HVM:
2085         case KVM_CAP_ADJUST_CLOCK:
2086         case KVM_CAP_VCPU_EVENTS:
2087         case KVM_CAP_HYPERV:
2088         case KVM_CAP_HYPERV_VAPIC:
2089         case KVM_CAP_HYPERV_SPIN:
2090         case KVM_CAP_PCI_SEGMENT:
2091         case KVM_CAP_DEBUGREGS:
2092         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2093         case KVM_CAP_XSAVE:
2094         case KVM_CAP_ASYNC_PF:
2095         case KVM_CAP_GET_TSC_KHZ:
2096                 r = 1;
2097                 break;
2098         case KVM_CAP_COALESCED_MMIO:
2099                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2100                 break;
2101         case KVM_CAP_VAPIC:
2102                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2103                 break;
2104         case KVM_CAP_NR_VCPUS:
2105                 r = KVM_SOFT_MAX_VCPUS;
2106                 break;
2107         case KVM_CAP_MAX_VCPUS:
2108                 r = KVM_MAX_VCPUS;
2109                 break;
2110         case KVM_CAP_NR_MEMSLOTS:
2111                 r = KVM_MEMORY_SLOTS;
2112                 break;
2113         case KVM_CAP_PV_MMU:    /* obsolete */
2114                 r = 0;
2115                 break;
2116         case KVM_CAP_IOMMU:
2117                 r = iommu_present(&pci_bus_type);
2118                 break;
2119         case KVM_CAP_MCE:
2120                 r = KVM_MAX_MCE_BANKS;
2121                 break;
2122         case KVM_CAP_XCRS:
2123                 r = cpu_has_xsave;
2124                 break;
2125         case KVM_CAP_TSC_CONTROL:
2126                 r = kvm_has_tsc_control;
2127                 break;
2128         case KVM_CAP_TSC_DEADLINE_TIMER:
2129                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2130                 break;
2131         default:
2132                 r = 0;
2133                 break;
2134         }
2135         return r;
2136
2137 }
2138
2139 long kvm_arch_dev_ioctl(struct file *filp,
2140                         unsigned int ioctl, unsigned long arg)
2141 {
2142         void __user *argp = (void __user *)arg;
2143         long r;
2144
2145         switch (ioctl) {
2146         case KVM_GET_MSR_INDEX_LIST: {
2147                 struct kvm_msr_list __user *user_msr_list = argp;
2148                 struct kvm_msr_list msr_list;
2149                 unsigned n;
2150
2151                 r = -EFAULT;
2152                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2153                         goto out;
2154                 n = msr_list.nmsrs;
2155                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2156                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2157                         goto out;
2158                 r = -E2BIG;
2159                 if (n < msr_list.nmsrs)
2160                         goto out;
2161                 r = -EFAULT;
2162                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2163                                  num_msrs_to_save * sizeof(u32)))
2164                         goto out;
2165                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2166                                  &emulated_msrs,
2167                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2168                         goto out;
2169                 r = 0;
2170                 break;
2171         }
2172         case KVM_GET_SUPPORTED_CPUID: {
2173                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2174                 struct kvm_cpuid2 cpuid;
2175
2176                 r = -EFAULT;
2177                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2178                         goto out;
2179                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2180                                                       cpuid_arg->entries);
2181                 if (r)
2182                         goto out;
2183
2184                 r = -EFAULT;
2185                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2186                         goto out;
2187                 r = 0;
2188                 break;
2189         }
2190         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2191                 u64 mce_cap;
2192
2193                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2194                 r = -EFAULT;
2195                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2196                         goto out;
2197                 r = 0;
2198                 break;
2199         }
2200         default:
2201                 r = -EINVAL;
2202         }
2203 out:
2204         return r;
2205 }
2206
2207 static void wbinvd_ipi(void *garbage)
2208 {
2209         wbinvd();
2210 }
2211
2212 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2213 {
2214         return vcpu->kvm->arch.iommu_domain &&
2215                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2216 }
2217
2218 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2219 {
2220         /* Address WBINVD may be executed by guest */
2221         if (need_emulate_wbinvd(vcpu)) {
2222                 if (kvm_x86_ops->has_wbinvd_exit())
2223                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2224                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2225                         smp_call_function_single(vcpu->cpu,
2226                                         wbinvd_ipi, NULL, 1);
2227         }
2228
2229         kvm_x86_ops->vcpu_load(vcpu, cpu);
2230         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2231                 /* Make sure TSC doesn't go backwards */
2232                 s64 tsc_delta;
2233                 u64 tsc;
2234
2235                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2236                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2237                              tsc - vcpu->arch.last_guest_tsc;
2238
2239                 if (tsc_delta < 0)
2240                         mark_tsc_unstable("KVM discovered backwards TSC");
2241                 if (check_tsc_unstable()) {
2242                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2243                         vcpu->arch.tsc_catchup = 1;
2244                 }
2245                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2246                 if (vcpu->cpu != cpu)
2247                         kvm_migrate_timers(vcpu);
2248                 vcpu->cpu = cpu;
2249         }
2250
2251         accumulate_steal_time(vcpu);
2252         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2253 }
2254
2255 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2256 {
2257         kvm_x86_ops->vcpu_put(vcpu);
2258         kvm_put_guest_fpu(vcpu);
2259         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2260 }
2261
2262 static int is_efer_nx(void)
2263 {
2264         unsigned long long efer = 0;
2265
2266         rdmsrl_safe(MSR_EFER, &efer);
2267         return efer & EFER_NX;
2268 }
2269
2270 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2271 {
2272         int i;
2273         struct kvm_cpuid_entry2 *e, *entry;
2274
2275         entry = NULL;
2276         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2277                 e = &vcpu->arch.cpuid_entries[i];
2278                 if (e->function == 0x80000001) {
2279                         entry = e;
2280                         break;
2281                 }
2282         }
2283         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2284                 entry->edx &= ~(1 << 20);
2285                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2286         }
2287 }
2288
2289 /* when an old userspace process fills a new kernel module */
2290 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2291                                     struct kvm_cpuid *cpuid,
2292                                     struct kvm_cpuid_entry __user *entries)
2293 {
2294         int r, i;
2295         struct kvm_cpuid_entry *cpuid_entries;
2296
2297         r = -E2BIG;
2298         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2299                 goto out;
2300         r = -ENOMEM;
2301         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2302         if (!cpuid_entries)
2303                 goto out;
2304         r = -EFAULT;
2305         if (copy_from_user(cpuid_entries, entries,
2306                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2307                 goto out_free;
2308         for (i = 0; i < cpuid->nent; i++) {
2309                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2310                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2311                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2312                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2313                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2314                 vcpu->arch.cpuid_entries[i].index = 0;
2315                 vcpu->arch.cpuid_entries[i].flags = 0;
2316                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2317                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2318                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2319         }
2320         vcpu->arch.cpuid_nent = cpuid->nent;
2321         cpuid_fix_nx_cap(vcpu);
2322         r = 0;
2323         kvm_apic_set_version(vcpu);
2324         kvm_x86_ops->cpuid_update(vcpu);
2325         update_cpuid(vcpu);
2326
2327 out_free:
2328         vfree(cpuid_entries);
2329 out:
2330         return r;
2331 }
2332
2333 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2334                                      struct kvm_cpuid2 *cpuid,
2335                                      struct kvm_cpuid_entry2 __user *entries)
2336 {
2337         int r;
2338
2339         r = -E2BIG;
2340         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2341                 goto out;
2342         r = -EFAULT;
2343         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2344                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2345                 goto out;
2346         vcpu->arch.cpuid_nent = cpuid->nent;
2347         kvm_apic_set_version(vcpu);
2348         kvm_x86_ops->cpuid_update(vcpu);
2349         update_cpuid(vcpu);
2350         return 0;
2351
2352 out:
2353         return r;
2354 }
2355
2356 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2357                                      struct kvm_cpuid2 *cpuid,
2358                                      struct kvm_cpuid_entry2 __user *entries)
2359 {
2360         int r;
2361
2362         r = -E2BIG;
2363         if (cpuid->nent < vcpu->arch.cpuid_nent)
2364                 goto out;
2365         r = -EFAULT;
2366         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2367                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2368                 goto out;
2369         return 0;
2370
2371 out:
2372         cpuid->nent = vcpu->arch.cpuid_nent;
2373         return r;
2374 }
2375
2376 static void cpuid_mask(u32 *word, int wordnum)
2377 {
2378         *word &= boot_cpu_data.x86_capability[wordnum];
2379 }
2380
2381 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2382                            u32 index)
2383 {
2384         entry->function = function;
2385         entry->index = index;
2386         cpuid_count(entry->function, entry->index,
2387                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2388         entry->flags = 0;
2389 }
2390
2391 static bool supported_xcr0_bit(unsigned bit)
2392 {
2393         u64 mask = ((u64)1 << bit);
2394
2395         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2396 }
2397
2398 #define F(x) bit(X86_FEATURE_##x)
2399
2400 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2401                          u32 index, int *nent, int maxnent)
2402 {
2403         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2404 #ifdef CONFIG_X86_64
2405         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2406                                 ? F(GBPAGES) : 0;
2407         unsigned f_lm = F(LM);
2408 #else
2409         unsigned f_gbpages = 0;
2410         unsigned f_lm = 0;
2411 #endif
2412         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2413
2414         /* cpuid 1.edx */
2415         const u32 kvm_supported_word0_x86_features =
2416                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2417                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2418                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2419                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2420                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2421                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2422                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2423                 0 /* HTT, TM, Reserved, PBE */;
2424         /* cpuid 0x80000001.edx */
2425         const u32 kvm_supported_word1_x86_features =
2426                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2427                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2428                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2429                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2430                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2431                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2432                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2433                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2434         /* cpuid 1.ecx */
2435         const u32 kvm_supported_word4_x86_features =
2436                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2437                 0 /* DS-CPL, VMX, SMX, EST */ |
2438                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2439                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2440                 0 /* Reserved, DCA */ | F(XMM4_1) |
2441                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2442                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2443                 F(F16C) | F(RDRAND);
2444         /* cpuid 0x80000001.ecx */
2445         const u32 kvm_supported_word6_x86_features =
2446                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2447                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2448                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2449                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2450
2451         /* cpuid 0xC0000001.edx */
2452         const u32 kvm_supported_word5_x86_features =
2453                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2454                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2455                 F(PMM) | F(PMM_EN);
2456
2457         /* cpuid 7.0.ebx */
2458         const u32 kvm_supported_word9_x86_features =
2459                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2460
2461         /* all calls to cpuid_count() should be made on the same cpu */
2462         get_cpu();
2463         do_cpuid_1_ent(entry, function, index);
2464         ++*nent;
2465
2466         switch (function) {
2467         case 0:
2468                 entry->eax = min(entry->eax, (u32)0xd);
2469                 break;
2470         case 1:
2471                 entry->edx &= kvm_supported_word0_x86_features;
2472                 cpuid_mask(&entry->edx, 0);
2473                 entry->ecx &= kvm_supported_word4_x86_features;
2474                 cpuid_mask(&entry->ecx, 4);
2475                 /* we support x2apic emulation even if host does not support
2476                  * it since we emulate x2apic in software */
2477                 entry->ecx |= F(X2APIC);
2478                 break;
2479         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2480          * may return different values. This forces us to get_cpu() before
2481          * issuing the first command, and also to emulate this annoying behavior
2482          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2483         case 2: {
2484                 int t, times = entry->eax & 0xff;
2485
2486                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2487                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2488                 for (t = 1; t < times && *nent < maxnent; ++t) {
2489                         do_cpuid_1_ent(&entry[t], function, 0);
2490                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2491                         ++*nent;
2492                 }
2493                 break;
2494         }
2495         /* function 4 has additional index. */
2496         case 4: {
2497                 int i, cache_type;
2498
2499                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2500                 /* read more entries until cache_type is zero */
2501                 for (i = 1; *nent < maxnent; ++i) {
2502                         cache_type = entry[i - 1].eax & 0x1f;
2503                         if (!cache_type)
2504                                 break;
2505                         do_cpuid_1_ent(&entry[i], function, i);
2506                         entry[i].flags |=
2507                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2508                         ++*nent;
2509                 }
2510                 break;
2511         }
2512         case 7: {
2513                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2514                 /* Mask ebx against host capbability word 9 */
2515                 if (index == 0) {
2516                         entry->ebx &= kvm_supported_word9_x86_features;
2517                         cpuid_mask(&entry->ebx, 9);
2518                 } else
2519                         entry->ebx = 0;
2520                 entry->eax = 0;
2521                 entry->ecx = 0;
2522                 entry->edx = 0;
2523                 break;
2524         }
2525         case 9:
2526                 break;
2527         /* function 0xb has additional index. */
2528         case 0xb: {
2529                 int i, level_type;
2530
2531                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2532                 /* read more entries until level_type is zero */
2533                 for (i = 1; *nent < maxnent; ++i) {
2534                         level_type = entry[i - 1].ecx & 0xff00;
2535                         if (!level_type)
2536                                 break;
2537                         do_cpuid_1_ent(&entry[i], function, i);
2538                         entry[i].flags |=
2539                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2540                         ++*nent;
2541                 }
2542                 break;
2543         }
2544         case 0xd: {
2545                 int idx, i;
2546
2547                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2548                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2549                         do_cpuid_1_ent(&entry[i], function, idx);
2550                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2551                                 continue;
2552                         entry[i].flags |=
2553                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2554                         ++*nent;
2555                         ++i;
2556                 }
2557                 break;
2558         }
2559         case KVM_CPUID_SIGNATURE: {
2560                 char signature[12] = "KVMKVMKVM\0\0";
2561                 u32 *sigptr = (u32 *)signature;
2562                 entry->eax = 0;
2563                 entry->ebx = sigptr[0];
2564                 entry->ecx = sigptr[1];
2565                 entry->edx = sigptr[2];
2566                 break;
2567         }
2568         case KVM_CPUID_FEATURES:
2569                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2570                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2571                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2572                              (1 << KVM_FEATURE_ASYNC_PF) |
2573                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2574
2575                 if (sched_info_on())
2576                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2577
2578                 entry->ebx = 0;
2579                 entry->ecx = 0;
2580                 entry->edx = 0;
2581                 break;
2582         case 0x80000000:
2583                 entry->eax = min(entry->eax, 0x8000001a);
2584                 break;
2585         case 0x80000001:
2586                 entry->edx &= kvm_supported_word1_x86_features;
2587                 cpuid_mask(&entry->edx, 1);
2588                 entry->ecx &= kvm_supported_word6_x86_features;
2589                 cpuid_mask(&entry->ecx, 6);
2590                 break;
2591         case 0x80000008: {
2592                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2593                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2594                 unsigned phys_as = entry->eax & 0xff;
2595
2596                 if (!g_phys_as)
2597                         g_phys_as = phys_as;
2598                 entry->eax = g_phys_as | (virt_as << 8);
2599                 entry->ebx = entry->edx = 0;
2600                 break;
2601         }
2602         case 0x80000019:
2603                 entry->ecx = entry->edx = 0;
2604                 break;
2605         case 0x8000001a:
2606                 break;
2607         case 0x8000001d:
2608                 break;
2609         /*Add support for Centaur's CPUID instruction*/
2610         case 0xC0000000:
2611                 /*Just support up to 0xC0000004 now*/
2612                 entry->eax = min(entry->eax, 0xC0000004);
2613                 break;
2614         case 0xC0000001:
2615                 entry->edx &= kvm_supported_word5_x86_features;
2616                 cpuid_mask(&entry->edx, 5);
2617                 break;
2618         case 3: /* Processor serial number */
2619         case 5: /* MONITOR/MWAIT */
2620         case 6: /* Thermal management */
2621         case 0xA: /* Architectural Performance Monitoring */
2622         case 0x80000007: /* Advanced power management */
2623         case 0xC0000002:
2624         case 0xC0000003:
2625         case 0xC0000004:
2626         default:
2627                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2628                 break;
2629         }
2630
2631         kvm_x86_ops->set_supported_cpuid(function, entry);
2632
2633         put_cpu();
2634 }
2635
2636 #undef F
2637
2638 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2639                                      struct kvm_cpuid_entry2 __user *entries)
2640 {
2641         struct kvm_cpuid_entry2 *cpuid_entries;
2642         int limit, nent = 0, r = -E2BIG;
2643         u32 func;
2644
2645         if (cpuid->nent < 1)
2646                 goto out;
2647         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2648                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2649         r = -ENOMEM;
2650         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2651         if (!cpuid_entries)
2652                 goto out;
2653
2654         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2655         limit = cpuid_entries[0].eax;
2656         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2657                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2658                              &nent, cpuid->nent);
2659         r = -E2BIG;
2660         if (nent >= cpuid->nent)
2661                 goto out_free;
2662
2663         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2664         limit = cpuid_entries[nent - 1].eax;
2665         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2666                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2667                              &nent, cpuid->nent);
2668
2669
2670
2671         r = -E2BIG;
2672         if (nent >= cpuid->nent)
2673                 goto out_free;
2674
2675         /* Add support for Centaur's CPUID instruction. */
2676         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2677                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2678                                 &nent, cpuid->nent);
2679
2680                 r = -E2BIG;
2681                 if (nent >= cpuid->nent)
2682                         goto out_free;
2683
2684                 limit = cpuid_entries[nent - 1].eax;
2685                 for (func = 0xC0000001;
2686                         func <= limit && nent < cpuid->nent; ++func)
2687                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2688                                         &nent, cpuid->nent);
2689
2690                 r = -E2BIG;
2691                 if (nent >= cpuid->nent)
2692                         goto out_free;
2693         }
2694
2695         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2696                      cpuid->nent);
2697
2698         r = -E2BIG;
2699         if (nent >= cpuid->nent)
2700                 goto out_free;
2701
2702         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2703                      cpuid->nent);
2704
2705         r = -E2BIG;
2706         if (nent >= cpuid->nent)
2707                 goto out_free;
2708
2709         r = -EFAULT;
2710         if (copy_to_user(entries, cpuid_entries,
2711                          nent * sizeof(struct kvm_cpuid_entry2)))
2712                 goto out_free;
2713         cpuid->nent = nent;
2714         r = 0;
2715
2716 out_free:
2717         vfree(cpuid_entries);
2718 out:
2719         return r;
2720 }
2721
2722 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2723                                     struct kvm_lapic_state *s)
2724 {
2725         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2726
2727         return 0;
2728 }
2729
2730 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2731                                     struct kvm_lapic_state *s)
2732 {
2733         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2734         kvm_apic_post_state_restore(vcpu);
2735         update_cr8_intercept(vcpu);
2736
2737         return 0;
2738 }
2739
2740 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2741                                     struct kvm_interrupt *irq)
2742 {
2743         if (irq->irq < 0 || irq->irq >= 256)
2744                 return -EINVAL;
2745         if (irqchip_in_kernel(vcpu->kvm))
2746                 return -ENXIO;
2747
2748         kvm_queue_interrupt(vcpu, irq->irq, false);
2749         kvm_make_request(KVM_REQ_EVENT, vcpu);
2750
2751         return 0;
2752 }
2753
2754 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2755 {
2756         kvm_inject_nmi(vcpu);
2757
2758         return 0;
2759 }
2760
2761 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2762                                            struct kvm_tpr_access_ctl *tac)
2763 {
2764         if (tac->flags)
2765                 return -EINVAL;
2766         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2767         return 0;
2768 }
2769
2770 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2771                                         u64 mcg_cap)
2772 {
2773         int r;
2774         unsigned bank_num = mcg_cap & 0xff, bank;
2775
2776         r = -EINVAL;
2777         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2778                 goto out;
2779         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2780                 goto out;
2781         r = 0;
2782         vcpu->arch.mcg_cap = mcg_cap;
2783         /* Init IA32_MCG_CTL to all 1s */
2784         if (mcg_cap & MCG_CTL_P)
2785                 vcpu->arch.mcg_ctl = ~(u64)0;
2786         /* Init IA32_MCi_CTL to all 1s */
2787         for (bank = 0; bank < bank_num; bank++)
2788                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2789 out:
2790         return r;
2791 }
2792
2793 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2794                                       struct kvm_x86_mce *mce)
2795 {
2796         u64 mcg_cap = vcpu->arch.mcg_cap;
2797         unsigned bank_num = mcg_cap & 0xff;
2798         u64 *banks = vcpu->arch.mce_banks;
2799
2800         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2801                 return -EINVAL;
2802         /*
2803          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2804          * reporting is disabled
2805          */
2806         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2807             vcpu->arch.mcg_ctl != ~(u64)0)
2808                 return 0;
2809         banks += 4 * mce->bank;
2810         /*
2811          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2812          * reporting is disabled for the bank
2813          */
2814         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2815                 return 0;
2816         if (mce->status & MCI_STATUS_UC) {
2817                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2818                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2819                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2820                         return 0;
2821                 }
2822                 if (banks[1] & MCI_STATUS_VAL)
2823                         mce->status |= MCI_STATUS_OVER;
2824                 banks[2] = mce->addr;
2825                 banks[3] = mce->misc;
2826                 vcpu->arch.mcg_status = mce->mcg_status;
2827                 banks[1] = mce->status;
2828                 kvm_queue_exception(vcpu, MC_VECTOR);
2829         } else if (!(banks[1] & MCI_STATUS_VAL)
2830                    || !(banks[1] & MCI_STATUS_UC)) {
2831                 if (banks[1] & MCI_STATUS_VAL)
2832                         mce->status |= MCI_STATUS_OVER;
2833                 banks[2] = mce->addr;
2834                 banks[3] = mce->misc;
2835                 banks[1] = mce->status;
2836         } else
2837                 banks[1] |= MCI_STATUS_OVER;
2838         return 0;
2839 }
2840
2841 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2842                                                struct kvm_vcpu_events *events)
2843 {
2844         process_nmi(vcpu);
2845         events->exception.injected =
2846                 vcpu->arch.exception.pending &&
2847                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2848         events->exception.nr = vcpu->arch.exception.nr;
2849         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2850         events->exception.pad = 0;
2851         events->exception.error_code = vcpu->arch.exception.error_code;
2852
2853         events->interrupt.injected =
2854                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2855         events->interrupt.nr = vcpu->arch.interrupt.nr;
2856         events->interrupt.soft = 0;
2857         events->interrupt.shadow =
2858                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2859                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2860
2861         events->nmi.injected = vcpu->arch.nmi_injected;
2862         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2863         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2864         events->nmi.pad = 0;
2865
2866         events->sipi_vector = vcpu->arch.sipi_vector;
2867
2868         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2869                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2870                          | KVM_VCPUEVENT_VALID_SHADOW);
2871         memset(&events->reserved, 0, sizeof(events->reserved));
2872 }
2873
2874 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2875                                               struct kvm_vcpu_events *events)
2876 {
2877         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2878                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2879                               | KVM_VCPUEVENT_VALID_SHADOW))
2880                 return -EINVAL;
2881
2882         process_nmi(vcpu);
2883         vcpu->arch.exception.pending = events->exception.injected;
2884         vcpu->arch.exception.nr = events->exception.nr;
2885         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2886         vcpu->arch.exception.error_code = events->exception.error_code;
2887
2888         vcpu->arch.interrupt.pending = events->interrupt.injected;
2889         vcpu->arch.interrupt.nr = events->interrupt.nr;
2890         vcpu->arch.interrupt.soft = events->interrupt.soft;
2891         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2892                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2893                                                   events->interrupt.shadow);
2894
2895         vcpu->arch.nmi_injected = events->nmi.injected;
2896         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2897                 vcpu->arch.nmi_pending = events->nmi.pending;
2898         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2899
2900         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2901                 vcpu->arch.sipi_vector = events->sipi_vector;
2902
2903         kvm_make_request(KVM_REQ_EVENT, vcpu);
2904
2905         return 0;
2906 }
2907
2908 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2909                                              struct kvm_debugregs *dbgregs)
2910 {
2911         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2912         dbgregs->dr6 = vcpu->arch.dr6;
2913         dbgregs->dr7 = vcpu->arch.dr7;
2914         dbgregs->flags = 0;
2915         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2916 }
2917
2918 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2919                                             struct kvm_debugregs *dbgregs)
2920 {
2921         if (dbgregs->flags)
2922                 return -EINVAL;
2923
2924         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2925         vcpu->arch.dr6 = dbgregs->dr6;
2926         vcpu->arch.dr7 = dbgregs->dr7;
2927
2928         return 0;
2929 }
2930
2931 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2932                                          struct kvm_xsave *guest_xsave)
2933 {
2934         if (cpu_has_xsave)
2935                 memcpy(guest_xsave->region,
2936                         &vcpu->arch.guest_fpu.state->xsave,
2937                         xstate_size);
2938         else {
2939                 memcpy(guest_xsave->region,
2940                         &vcpu->arch.guest_fpu.state->fxsave,
2941                         sizeof(struct i387_fxsave_struct));
2942                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2943                         XSTATE_FPSSE;
2944         }
2945 }
2946
2947 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2948                                         struct kvm_xsave *guest_xsave)
2949 {
2950         u64 xstate_bv =
2951                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2952
2953         if (cpu_has_xsave)
2954                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2955                         guest_xsave->region, xstate_size);
2956         else {
2957                 if (xstate_bv & ~XSTATE_FPSSE)
2958                         return -EINVAL;
2959                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2960                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2961         }
2962         return 0;
2963 }
2964
2965 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2966                                         struct kvm_xcrs *guest_xcrs)
2967 {
2968         if (!cpu_has_xsave) {
2969                 guest_xcrs->nr_xcrs = 0;
2970                 return;
2971         }
2972
2973         guest_xcrs->nr_xcrs = 1;
2974         guest_xcrs->flags = 0;
2975         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2976         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2977 }
2978
2979 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2980                                        struct kvm_xcrs *guest_xcrs)
2981 {
2982         int i, r = 0;
2983
2984         if (!cpu_has_xsave)
2985                 return -EINVAL;
2986
2987         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2988                 return -EINVAL;
2989
2990         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2991                 /* Only support XCR0 currently */
2992                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2993                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2994                                 guest_xcrs->xcrs[0].value);
2995                         break;
2996                 }
2997         if (r)
2998                 r = -EINVAL;
2999         return r;
3000 }
3001
3002 long kvm_arch_vcpu_ioctl(struct file *filp,
3003                          unsigned int ioctl, unsigned long arg)
3004 {
3005         struct kvm_vcpu *vcpu = filp->private_data;
3006         void __user *argp = (void __user *)arg;
3007         int r;
3008         union {
3009                 struct kvm_lapic_state *lapic;
3010                 struct kvm_xsave *xsave;
3011                 struct kvm_xcrs *xcrs;
3012                 void *buffer;
3013         } u;
3014
3015         u.buffer = NULL;
3016         switch (ioctl) {
3017         case KVM_GET_LAPIC: {
3018                 r = -EINVAL;
3019                 if (!vcpu->arch.apic)
3020                         goto out;
3021                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3022
3023                 r = -ENOMEM;
3024                 if (!u.lapic)
3025                         goto out;
3026                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3027                 if (r)
3028                         goto out;
3029                 r = -EFAULT;
3030                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3031                         goto out;
3032                 r = 0;
3033                 break;
3034         }
3035         case KVM_SET_LAPIC: {
3036                 r = -EINVAL;
3037                 if (!vcpu->arch.apic)
3038                         goto out;
3039                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3040                 r = -ENOMEM;
3041                 if (!u.lapic)
3042                         goto out;
3043                 r = -EFAULT;
3044                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3045                         goto out;
3046                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3047                 if (r)
3048                         goto out;
3049                 r = 0;
3050                 break;
3051         }
3052         case KVM_INTERRUPT: {
3053                 struct kvm_interrupt irq;
3054
3055                 r = -EFAULT;
3056                 if (copy_from_user(&irq, argp, sizeof irq))
3057                         goto out;
3058                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3059                 if (r)
3060                         goto out;
3061                 r = 0;
3062                 break;
3063         }
3064         case KVM_NMI: {
3065                 r = kvm_vcpu_ioctl_nmi(vcpu);
3066                 if (r)
3067                         goto out;
3068                 r = 0;
3069                 break;
3070         }
3071         case KVM_SET_CPUID: {
3072                 struct kvm_cpuid __user *cpuid_arg = argp;
3073                 struct kvm_cpuid cpuid;
3074
3075                 r = -EFAULT;
3076                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3077                         goto out;
3078                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3079                 if (r)
3080                         goto out;
3081                 break;
3082         }
3083         case KVM_SET_CPUID2: {
3084                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3085                 struct kvm_cpuid2 cpuid;
3086
3087                 r = -EFAULT;
3088                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3089                         goto out;
3090                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3091                                               cpuid_arg->entries);
3092                 if (r)
3093                         goto out;
3094                 break;
3095         }
3096         case KVM_GET_CPUID2: {
3097                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3098                 struct kvm_cpuid2 cpuid;
3099
3100                 r = -EFAULT;
3101                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3102                         goto out;
3103                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3104                                               cpuid_arg->entries);
3105                 if (r)
3106                         goto out;
3107                 r = -EFAULT;
3108                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3109                         goto out;
3110                 r = 0;
3111                 break;
3112         }
3113         case KVM_GET_MSRS:
3114                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3115                 break;
3116         case KVM_SET_MSRS:
3117                 r = msr_io(vcpu, argp, do_set_msr, 0);
3118                 break;
3119         case KVM_TPR_ACCESS_REPORTING: {
3120                 struct kvm_tpr_access_ctl tac;
3121
3122                 r = -EFAULT;
3123                 if (copy_from_user(&tac, argp, sizeof tac))
3124                         goto out;
3125                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3126                 if (r)
3127                         goto out;
3128                 r = -EFAULT;
3129                 if (copy_to_user(argp, &tac, sizeof tac))
3130                         goto out;
3131                 r = 0;
3132                 break;
3133         };
3134         case KVM_SET_VAPIC_ADDR: {
3135                 struct kvm_vapic_addr va;
3136
3137                 r = -EINVAL;
3138                 if (!irqchip_in_kernel(vcpu->kvm))
3139                         goto out;
3140                 r = -EFAULT;
3141                 if (copy_from_user(&va, argp, sizeof va))
3142                         goto out;
3143                 r = 0;
3144                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3145                 break;
3146         }
3147         case KVM_X86_SETUP_MCE: {
3148                 u64 mcg_cap;
3149
3150                 r = -EFAULT;
3151                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3152                         goto out;
3153                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3154                 break;
3155         }
3156         case KVM_X86_SET_MCE: {
3157                 struct kvm_x86_mce mce;
3158
3159                 r = -EFAULT;
3160                 if (copy_from_user(&mce, argp, sizeof mce))
3161                         goto out;
3162                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3163                 break;
3164         }
3165         case KVM_GET_VCPU_EVENTS: {
3166                 struct kvm_vcpu_events events;
3167
3168                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3169
3170                 r = -EFAULT;
3171                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3172                         break;
3173                 r = 0;
3174                 break;
3175         }
3176         case KVM_SET_VCPU_EVENTS: {
3177                 struct kvm_vcpu_events events;
3178
3179                 r = -EFAULT;
3180                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3181                         break;
3182
3183                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3184                 break;
3185         }
3186         case KVM_GET_DEBUGREGS: {
3187                 struct kvm_debugregs dbgregs;
3188
3189                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3190
3191                 r = -EFAULT;
3192                 if (copy_to_user(argp, &dbgregs,
3193                                  sizeof(struct kvm_debugregs)))
3194                         break;
3195                 r = 0;
3196                 break;
3197         }
3198         case KVM_SET_DEBUGREGS: {
3199                 struct kvm_debugregs dbgregs;
3200
3201                 r = -EFAULT;
3202                 if (copy_from_user(&dbgregs, argp,
3203                                    sizeof(struct kvm_debugregs)))
3204                         break;
3205
3206                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3207                 break;
3208         }
3209         case KVM_GET_XSAVE: {
3210                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3211                 r = -ENOMEM;
3212                 if (!u.xsave)
3213                         break;
3214
3215                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3216
3217                 r = -EFAULT;
3218                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3219                         break;
3220                 r = 0;
3221                 break;
3222         }
3223         case KVM_SET_XSAVE: {
3224                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3225                 r = -ENOMEM;
3226                 if (!u.xsave)
3227                         break;
3228
3229                 r = -EFAULT;
3230                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3231                         break;
3232
3233                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3234                 break;
3235         }
3236         case KVM_GET_XCRS: {
3237                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3238                 r = -ENOMEM;
3239                 if (!u.xcrs)
3240                         break;
3241
3242                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3243
3244                 r = -EFAULT;
3245                 if (copy_to_user(argp, u.xcrs,
3246                                  sizeof(struct kvm_xcrs)))
3247                         break;
3248                 r = 0;
3249                 break;
3250         }
3251         case KVM_SET_XCRS: {
3252                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3253                 r = -ENOMEM;
3254                 if (!u.xcrs)
3255                         break;
3256
3257                 r = -EFAULT;
3258                 if (copy_from_user(u.xcrs, argp,
3259                                    sizeof(struct kvm_xcrs)))
3260                         break;
3261
3262                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3263                 break;
3264         }
3265         case KVM_SET_TSC_KHZ: {
3266                 u32 user_tsc_khz;
3267
3268                 r = -EINVAL;
3269                 if (!kvm_has_tsc_control)
3270                         break;
3271
3272                 user_tsc_khz = (u32)arg;
3273
3274                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3275                         goto out;
3276
3277                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3278
3279                 r = 0;
3280                 goto out;
3281         }
3282         case KVM_GET_TSC_KHZ: {
3283                 r = -EIO;
3284                 if (check_tsc_unstable())
3285                         goto out;
3286
3287                 r = vcpu_tsc_khz(vcpu);
3288
3289                 goto out;
3290         }
3291         default:
3292                 r = -EINVAL;
3293         }
3294 out:
3295         kfree(u.buffer);
3296         return r;
3297 }
3298
3299 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3300 {
3301         int ret;
3302
3303         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3304                 return -1;
3305         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3306         return ret;
3307 }
3308
3309 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3310                                               u64 ident_addr)
3311 {
3312         kvm->arch.ept_identity_map_addr = ident_addr;
3313         return 0;
3314 }
3315
3316 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3317                                           u32 kvm_nr_mmu_pages)
3318 {
3319         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3320                 return -EINVAL;
3321
3322         mutex_lock(&kvm->slots_lock);
3323         spin_lock(&kvm->mmu_lock);
3324
3325         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3326         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3327
3328         spin_unlock(&kvm->mmu_lock);
3329         mutex_unlock(&kvm->slots_lock);
3330         return 0;
3331 }
3332
3333 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3334 {
3335         return kvm->arch.n_max_mmu_pages;
3336 }
3337
3338 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3339 {
3340         int r;
3341
3342         r = 0;
3343         switch (chip->chip_id) {
3344         case KVM_IRQCHIP_PIC_MASTER:
3345                 memcpy(&chip->chip.pic,
3346                         &pic_irqchip(kvm)->pics[0],
3347                         sizeof(struct kvm_pic_state));
3348                 break;
3349         case KVM_IRQCHIP_PIC_SLAVE:
3350                 memcpy(&chip->chip.pic,
3351                         &pic_irqchip(kvm)->pics[1],
3352                         sizeof(struct kvm_pic_state));
3353                 break;
3354         case KVM_IRQCHIP_IOAPIC:
3355                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3356                 break;
3357         default:
3358                 r = -EINVAL;
3359                 break;
3360         }
3361         return r;
3362 }
3363
3364 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3365 {
3366         int r;
3367
3368         r = 0;
3369         switch (chip->chip_id) {
3370         case KVM_IRQCHIP_PIC_MASTER:
3371                 spin_lock(&pic_irqchip(kvm)->lock);
3372                 memcpy(&pic_irqchip(kvm)->pics[0],
3373                         &chip->chip.pic,
3374                         sizeof(struct kvm_pic_state));
3375                 spin_unlock(&pic_irqchip(kvm)->lock);
3376                 break;
3377         case KVM_IRQCHIP_PIC_SLAVE:
3378                 spin_lock(&pic_irqchip(kvm)->lock);
3379                 memcpy(&pic_irqchip(kvm)->pics[1],
3380                         &chip->chip.pic,
3381                         sizeof(struct kvm_pic_state));
3382                 spin_unlock(&pic_irqchip(kvm)->lock);
3383                 break;
3384         case KVM_IRQCHIP_IOAPIC:
3385                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3386                 break;
3387         default:
3388                 r = -EINVAL;
3389                 break;
3390         }
3391         kvm_pic_update_irq(pic_irqchip(kvm));
3392         return r;
3393 }
3394
3395 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3396 {
3397         int r = 0;
3398
3399         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3400         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3401         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3402         return r;
3403 }
3404
3405 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3406 {
3407         int r = 0;
3408
3409         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3410         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3411         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3412         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3413         return r;
3414 }
3415
3416 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3417 {
3418         int r = 0;
3419
3420         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3421         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3422                 sizeof(ps->channels));
3423         ps->flags = kvm->arch.vpit->pit_state.flags;
3424         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3425         memset(&ps->reserved, 0, sizeof(ps->reserved));
3426         return r;
3427 }
3428
3429 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3430 {
3431         int r = 0, start = 0;
3432         u32 prev_legacy, cur_legacy;
3433         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3434         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3435         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3436         if (!prev_legacy && cur_legacy)
3437                 start = 1;
3438         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3439                sizeof(kvm->arch.vpit->pit_state.channels));
3440         kvm->arch.vpit->pit_state.flags = ps->flags;
3441         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3442         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3443         return r;
3444 }
3445
3446 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3447                                  struct kvm_reinject_control *control)
3448 {
3449         if (!kvm->arch.vpit)
3450                 return -ENXIO;
3451         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3452         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3453         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3454         return 0;
3455 }
3456
3457 /*
3458  * Get (and clear) the dirty memory log for a memory slot.
3459  */
3460 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3461                                       struct kvm_dirty_log *log)
3462 {
3463         int r, i;
3464         struct kvm_memory_slot *memslot;
3465         unsigned long n;
3466         unsigned long is_dirty = 0;
3467
3468         mutex_lock(&kvm->slots_lock);
3469
3470         r = -EINVAL;
3471         if (log->slot >= KVM_MEMORY_SLOTS)
3472                 goto out;
3473
3474         memslot = &kvm->memslots->memslots[log->slot];
3475         r = -ENOENT;
3476         if (!memslot->dirty_bitmap)
3477                 goto out;
3478
3479         n = kvm_dirty_bitmap_bytes(memslot);
3480
3481         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3482                 is_dirty = memslot->dirty_bitmap[i];
3483
3484         /* If nothing is dirty, don't bother messing with page tables. */
3485         if (is_dirty) {
3486                 struct kvm_memslots *slots, *old_slots;
3487                 unsigned long *dirty_bitmap;
3488
3489                 dirty_bitmap = memslot->dirty_bitmap_head;
3490                 if (memslot->dirty_bitmap == dirty_bitmap)
3491                         dirty_bitmap += n / sizeof(long);
3492                 memset(dirty_bitmap, 0, n);
3493
3494                 r = -ENOMEM;
3495                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3496                 if (!slots)
3497                         goto out;
3498                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3499                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3500                 slots->generation++;
3501
3502                 old_slots = kvm->memslots;
3503                 rcu_assign_pointer(kvm->memslots, slots);
3504                 synchronize_srcu_expedited(&kvm->srcu);
3505                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3506                 kfree(old_slots);
3507
3508                 spin_lock(&kvm->mmu_lock);
3509                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3510                 spin_unlock(&kvm->mmu_lock);
3511
3512                 r = -EFAULT;
3513                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3514                         goto out;
3515         } else {
3516                 r = -EFAULT;
3517                 if (clear_user(log->dirty_bitmap, n))
3518                         goto out;
3519         }
3520
3521         r = 0;
3522 out:
3523         mutex_unlock(&kvm->slots_lock);
3524         return r;
3525 }
3526
3527 long kvm_arch_vm_ioctl(struct file *filp,
3528                        unsigned int ioctl, unsigned long arg)
3529 {
3530         struct kvm *kvm = filp->private_data;
3531         void __user *argp = (void __user *)arg;
3532         int r = -ENOTTY;
3533         /*
3534          * This union makes it completely explicit to gcc-3.x
3535          * that these two variables' stack usage should be
3536          * combined, not added together.
3537          */
3538         union {
3539                 struct kvm_pit_state ps;
3540                 struct kvm_pit_state2 ps2;
3541                 struct kvm_pit_config pit_config;
3542         } u;
3543
3544         switch (ioctl) {
3545         case KVM_SET_TSS_ADDR:
3546                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3547                 if (r < 0)
3548                         goto out;
3549                 break;
3550         case KVM_SET_IDENTITY_MAP_ADDR: {
3551                 u64 ident_addr;
3552
3553                 r = -EFAULT;
3554                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3555                         goto out;
3556                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3557                 if (r < 0)
3558                         goto out;
3559                 break;
3560         }
3561         case KVM_SET_NR_MMU_PAGES:
3562                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3563                 if (r)
3564                         goto out;
3565                 break;
3566         case KVM_GET_NR_MMU_PAGES:
3567                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3568                 break;
3569         case KVM_CREATE_IRQCHIP: {
3570                 struct kvm_pic *vpic;
3571
3572                 mutex_lock(&kvm->lock);
3573                 r = -EEXIST;
3574                 if (kvm->arch.vpic)
3575                         goto create_irqchip_unlock;
3576                 r = -EINVAL;
3577                 if (atomic_read(&kvm->online_vcpus))
3578                         goto create_irqchip_unlock;
3579                 r = -ENOMEM;
3580                 vpic = kvm_create_pic(kvm);
3581                 if (vpic) {
3582                         r = kvm_ioapic_init(kvm);
3583                         if (r) {
3584                                 mutex_lock(&kvm->slots_lock);
3585                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3586                                                           &vpic->dev_master);
3587                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3588                                                           &vpic->dev_slave);
3589                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3590                                                           &vpic->dev_eclr);
3591                                 mutex_unlock(&kvm->slots_lock);
3592                                 kfree(vpic);
3593                                 goto create_irqchip_unlock;
3594                         }
3595                 } else
3596                         goto create_irqchip_unlock;
3597                 smp_wmb();
3598                 kvm->arch.vpic = vpic;
3599                 smp_wmb();
3600                 r = kvm_setup_default_irq_routing(kvm);
3601                 if (r) {
3602                         mutex_lock(&kvm->slots_lock);
3603                         mutex_lock(&kvm->irq_lock);
3604                         kvm_ioapic_destroy(kvm);
3605                         kvm_destroy_pic(kvm);
3606                         mutex_unlock(&kvm->irq_lock);
3607                         mutex_unlock(&kvm->slots_lock);
3608                 }
3609         create_irqchip_unlock:
3610                 mutex_unlock(&kvm->lock);
3611                 break;
3612         }
3613         case KVM_CREATE_PIT:
3614                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3615                 goto create_pit;
3616         case KVM_CREATE_PIT2:
3617                 r = -EFAULT;
3618                 if (copy_from_user(&u.pit_config, argp,
3619                                    sizeof(struct kvm_pit_config)))
3620                         goto out;
3621         create_pit:
3622                 mutex_lock(&kvm->slots_lock);
3623                 r = -EEXIST;
3624                 if (kvm->arch.vpit)
3625                         goto create_pit_unlock;
3626                 r = -ENOMEM;
3627                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3628                 if (kvm->arch.vpit)
3629                         r = 0;
3630         create_pit_unlock:
3631                 mutex_unlock(&kvm->slots_lock);
3632                 break;
3633         case KVM_IRQ_LINE_STATUS:
3634         case KVM_IRQ_LINE: {
3635                 struct kvm_irq_level irq_event;
3636
3637                 r = -EFAULT;
3638                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3639                         goto out;
3640                 r = -ENXIO;
3641                 if (irqchip_in_kernel(kvm)) {
3642                         __s32 status;
3643                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3644                                         irq_event.irq, irq_event.level);
3645                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3646                                 r = -EFAULT;
3647                                 irq_event.status = status;
3648                                 if (copy_to_user(argp, &irq_event,
3649                                                         sizeof irq_event))
3650                                         goto out;
3651                         }
3652                         r = 0;
3653                 }
3654                 break;
3655         }
3656         case KVM_GET_IRQCHIP: {
3657                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3658                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3659
3660                 r = -ENOMEM;
3661                 if (!chip)
3662                         goto out;
3663                 r = -EFAULT;
3664                 if (copy_from_user(chip, argp, sizeof *chip))
3665                         goto get_irqchip_out;
3666                 r = -ENXIO;
3667                 if (!irqchip_in_kernel(kvm))
3668                         goto get_irqchip_out;
3669                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3670                 if (r)
3671                         goto get_irqchip_out;
3672                 r = -EFAULT;
3673                 if (copy_to_user(argp, chip, sizeof *chip))
3674                         goto get_irqchip_out;
3675                 r = 0;
3676         get_irqchip_out:
3677                 kfree(chip);
3678                 if (r)
3679                         goto out;
3680                 break;
3681         }
3682         case KVM_SET_IRQCHIP: {
3683                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3684                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3685
3686                 r = -ENOMEM;
3687                 if (!chip)
3688                         goto out;
3689                 r = -EFAULT;
3690                 if (copy_from_user(chip, argp, sizeof *chip))
3691                         goto set_irqchip_out;
3692                 r = -ENXIO;
3693                 if (!irqchip_in_kernel(kvm))
3694                         goto set_irqchip_out;
3695                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3696                 if (r)
3697                         goto set_irqchip_out;
3698                 r = 0;
3699         set_irqchip_out:
3700                 kfree(chip);
3701                 if (r)
3702                         goto out;
3703                 break;
3704         }
3705         case KVM_GET_PIT: {
3706                 r = -EFAULT;
3707                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3708                         goto out;
3709                 r = -ENXIO;
3710                 if (!kvm->arch.vpit)
3711                         goto out;
3712                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3713                 if (r)
3714                         goto out;
3715                 r = -EFAULT;
3716                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3717                         goto out;
3718                 r = 0;
3719                 break;
3720         }
3721         case KVM_SET_PIT: {
3722                 r = -EFAULT;
3723                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3724                         goto out;
3725                 r = -ENXIO;
3726                 if (!kvm->arch.vpit)
3727                         goto out;
3728                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3729                 if (r)
3730                         goto out;
3731                 r = 0;
3732                 break;
3733         }
3734         case KVM_GET_PIT2: {
3735                 r = -ENXIO;
3736                 if (!kvm->arch.vpit)
3737                         goto out;
3738                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3739                 if (r)
3740                         goto out;
3741                 r = -EFAULT;
3742                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3743                         goto out;
3744                 r = 0;
3745                 break;
3746         }
3747         case KVM_SET_PIT2: {
3748                 r = -EFAULT;
3749                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3750                         goto out;
3751                 r = -ENXIO;
3752                 if (!kvm->arch.vpit)
3753                         goto out;
3754                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3755                 if (r)
3756                         goto out;
3757                 r = 0;
3758                 break;
3759         }
3760         case KVM_REINJECT_CONTROL: {
3761                 struct kvm_reinject_control control;
3762                 r =  -EFAULT;
3763                 if (copy_from_user(&control, argp, sizeof(control)))
3764                         goto out;
3765                 r = kvm_vm_ioctl_reinject(kvm, &control);
3766                 if (r)
3767                         goto out;
3768                 r = 0;
3769                 break;
3770         }
3771         case KVM_XEN_HVM_CONFIG: {
3772                 r = -EFAULT;
3773                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3774                                    sizeof(struct kvm_xen_hvm_config)))
3775                         goto out;
3776                 r = -EINVAL;
3777                 if (kvm->arch.xen_hvm_config.flags)
3778                         goto out;
3779                 r = 0;
3780                 break;
3781         }
3782         case KVM_SET_CLOCK: {
3783                 struct kvm_clock_data user_ns;
3784                 u64 now_ns;
3785                 s64 delta;
3786
3787                 r = -EFAULT;
3788                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3789                         goto out;
3790
3791                 r = -EINVAL;
3792                 if (user_ns.flags)
3793                         goto out;
3794
3795                 r = 0;
3796                 local_irq_disable();
3797                 now_ns = get_kernel_ns();
3798                 delta = user_ns.clock - now_ns;
3799                 local_irq_enable();
3800                 kvm->arch.kvmclock_offset = delta;
3801                 break;
3802         }
3803         case KVM_GET_CLOCK: {
3804                 struct kvm_clock_data user_ns;
3805                 u64 now_ns;
3806
3807                 local_irq_disable();
3808                 now_ns = get_kernel_ns();
3809                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3810                 local_irq_enable();
3811                 user_ns.flags = 0;
3812                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3813
3814                 r = -EFAULT;
3815                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3816                         goto out;
3817                 r = 0;
3818                 break;
3819         }
3820
3821         default:
3822                 ;
3823         }
3824 out:
3825         return r;
3826 }
3827
3828 static void kvm_init_msr_list(void)
3829 {
3830         u32 dummy[2];
3831         unsigned i, j;
3832
3833         /* skip the first msrs in the list. KVM-specific */
3834         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3835                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3836                         continue;
3837                 if (j < i)
3838                         msrs_to_save[j] = msrs_to_save[i];
3839                 j++;
3840         }
3841         num_msrs_to_save = j;
3842 }
3843
3844 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3845                            const void *v)
3846 {
3847         int handled = 0;
3848         int n;
3849
3850         do {
3851                 n = min(len, 8);
3852                 if (!(vcpu->arch.apic &&
3853                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3854                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3855                         break;
3856                 handled += n;
3857                 addr += n;
3858                 len -= n;
3859                 v += n;
3860         } while (len);
3861
3862         return handled;
3863 }
3864
3865 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3866 {
3867         int handled = 0;
3868         int n;
3869
3870         do {
3871                 n = min(len, 8);
3872                 if (!(vcpu->arch.apic &&
3873                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3874                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3875                         break;
3876                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3877                 handled += n;
3878                 addr += n;
3879                 len -= n;
3880                 v += n;
3881         } while (len);
3882
3883         return handled;
3884 }
3885
3886 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3887                         struct kvm_segment *var, int seg)
3888 {
3889         kvm_x86_ops->set_segment(vcpu, var, seg);
3890 }
3891
3892 void kvm_get_segment(struct kvm_vcpu *vcpu,
3893                      struct kvm_segment *var, int seg)
3894 {
3895         kvm_x86_ops->get_segment(vcpu, var, seg);
3896 }
3897
3898 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3899 {
3900         return gpa;
3901 }
3902
3903 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3904 {
3905         gpa_t t_gpa;
3906         struct x86_exception exception;
3907
3908         BUG_ON(!mmu_is_nested(vcpu));
3909
3910         /* NPT walks are always user-walks */
3911         access |= PFERR_USER_MASK;
3912         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3913
3914         return t_gpa;
3915 }
3916
3917 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3918                               struct x86_exception *exception)
3919 {
3920         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3921         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3922 }
3923
3924  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3925                                 struct x86_exception *exception)
3926 {
3927         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3928         access |= PFERR_FETCH_MASK;
3929         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3930 }
3931
3932 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3933                                struct x86_exception *exception)
3934 {
3935         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3936         access |= PFERR_WRITE_MASK;
3937         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3938 }
3939
3940 /* uses this to access any guest's mapped memory without checking CPL */
3941 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3942                                 struct x86_exception *exception)
3943 {
3944         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3945 }
3946
3947 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3948                                       struct kvm_vcpu *vcpu, u32 access,
3949                                       struct x86_exception *exception)
3950 {
3951         void *data = val;
3952         int r = X86EMUL_CONTINUE;
3953
3954         while (bytes) {
3955                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3956                                                             exception);
3957                 unsigned offset = addr & (PAGE_SIZE-1);
3958                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3959                 int ret;
3960
3961                 if (gpa == UNMAPPED_GVA)
3962                         return X86EMUL_PROPAGATE_FAULT;
3963                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3964                 if (ret < 0) {
3965                         r = X86EMUL_IO_NEEDED;
3966                         goto out;
3967                 }
3968
3969                 bytes -= toread;
3970                 data += toread;
3971                 addr += toread;
3972         }
3973 out:
3974         return r;
3975 }
3976
3977 /* used for instruction fetching */
3978 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3979                                 gva_t addr, void *val, unsigned int bytes,
3980                                 struct x86_exception *exception)
3981 {
3982         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3983         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3984
3985         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3986                                           access | PFERR_FETCH_MASK,
3987                                           exception);
3988 }
3989
3990 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3991                                gva_t addr, void *val, unsigned int bytes,
3992                                struct x86_exception *exception)
3993 {
3994         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3995         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3996
3997         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3998                                           exception);
3999 }
4000 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4001
4002 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4003                                       gva_t addr, void *val, unsigned int bytes,
4004                                       struct x86_exception *exception)
4005 {
4006         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4007         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4008 }
4009
4010 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4011                                        gva_t addr, void *val,
4012                                        unsigned int bytes,
4013                                        struct x86_exception *exception)
4014 {
4015         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4016         void *data = val;
4017         int r = X86EMUL_CONTINUE;
4018
4019         while (bytes) {
4020                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4021                                                              PFERR_WRITE_MASK,
4022                                                              exception);
4023                 unsigned offset = addr & (PAGE_SIZE-1);
4024                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4025                 int ret;
4026
4027                 if (gpa == UNMAPPED_GVA)
4028                         return X86EMUL_PROPAGATE_FAULT;
4029                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4030                 if (ret < 0) {
4031                         r = X86EMUL_IO_NEEDED;
4032                         goto out;
4033                 }
4034
4035                 bytes -= towrite;
4036                 data += towrite;
4037                 addr += towrite;
4038         }
4039 out:
4040         return r;
4041 }
4042 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4043
4044 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4045                                 gpa_t *gpa, struct x86_exception *exception,
4046                                 bool write)
4047 {
4048         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4049
4050         if (vcpu_match_mmio_gva(vcpu, gva) &&
4051                   check_write_user_access(vcpu, write, access,
4052                   vcpu->arch.access)) {
4053                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4054                                         (gva & (PAGE_SIZE - 1));
4055                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4056                 return 1;
4057         }
4058
4059         if (write)
4060                 access |= PFERR_WRITE_MASK;
4061
4062         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4063
4064         if (*gpa == UNMAPPED_GVA)
4065                 return -1;
4066
4067         /* For APIC access vmexit */
4068         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4069                 return 1;
4070
4071         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4072                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4073                 return 1;
4074         }
4075
4076         return 0;
4077 }
4078
4079 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4080                         const void *val, int bytes)
4081 {
4082         int ret;
4083
4084         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4085         if (ret < 0)
4086                 return 0;
4087         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4088         return 1;
4089 }
4090
4091 struct read_write_emulator_ops {
4092         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4093                                   int bytes);
4094         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4095                                   void *val, int bytes);
4096         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097                                int bytes, void *val);
4098         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099                                     void *val, int bytes);
4100         bool write;
4101 };
4102
4103 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4104 {
4105         if (vcpu->mmio_read_completed) {
4106                 memcpy(val, vcpu->mmio_data, bytes);
4107                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4108                                vcpu->mmio_phys_addr, *(u64 *)val);
4109                 vcpu->mmio_read_completed = 0;
4110                 return 1;
4111         }
4112
4113         return 0;
4114 }
4115
4116 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4117                         void *val, int bytes)
4118 {
4119         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4120 }
4121
4122 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4123                          void *val, int bytes)
4124 {
4125         return emulator_write_phys(vcpu, gpa, val, bytes);
4126 }
4127
4128 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4129 {
4130         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4131         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4132 }
4133
4134 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4135                           void *val, int bytes)
4136 {
4137         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4138         return X86EMUL_IO_NEEDED;
4139 }
4140
4141 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4142                            void *val, int bytes)
4143 {
4144         memcpy(vcpu->mmio_data, val, bytes);
4145         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4146         return X86EMUL_CONTINUE;
4147 }
4148
4149 static struct read_write_emulator_ops read_emultor = {
4150         .read_write_prepare = read_prepare,
4151         .read_write_emulate = read_emulate,
4152         .read_write_mmio = vcpu_mmio_read,
4153         .read_write_exit_mmio = read_exit_mmio,
4154 };
4155
4156 static struct read_write_emulator_ops write_emultor = {
4157         .read_write_emulate = write_emulate,
4158         .read_write_mmio = write_mmio,
4159         .read_write_exit_mmio = write_exit_mmio,
4160         .write = true,
4161 };
4162
4163 static int emulator_read_write_onepage(unsigned long addr, void *val,
4164                                        unsigned int bytes,
4165                                        struct x86_exception *exception,
4166                                        struct kvm_vcpu *vcpu,
4167                                        struct read_write_emulator_ops *ops)
4168 {
4169         gpa_t gpa;
4170         int handled, ret;
4171         bool write = ops->write;
4172
4173         if (ops->read_write_prepare &&
4174                   ops->read_write_prepare(vcpu, val, bytes))
4175                 return X86EMUL_CONTINUE;
4176
4177         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4178
4179         if (ret < 0)
4180                 return X86EMUL_PROPAGATE_FAULT;
4181
4182         /* For APIC access vmexit */
4183         if (ret)
4184                 goto mmio;
4185
4186         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4187                 return X86EMUL_CONTINUE;
4188
4189 mmio:
4190         /*
4191          * Is this MMIO handled locally?
4192          */
4193         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4194         if (handled == bytes)
4195                 return X86EMUL_CONTINUE;
4196
4197         gpa += handled;
4198         bytes -= handled;
4199         val += handled;
4200
4201         vcpu->mmio_needed = 1;
4202         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4203         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4204         vcpu->mmio_size = bytes;
4205         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4206         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4207         vcpu->mmio_index = 0;
4208
4209         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4210 }
4211
4212 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4213                         void *val, unsigned int bytes,
4214                         struct x86_exception *exception,
4215                         struct read_write_emulator_ops *ops)
4216 {
4217         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4218
4219         /* Crossing a page boundary? */
4220         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4221                 int rc, now;
4222
4223                 now = -addr & ~PAGE_MASK;
4224                 rc = emulator_read_write_onepage(addr, val, now, exception,
4225                                                  vcpu, ops);
4226
4227                 if (rc != X86EMUL_CONTINUE)
4228                         return rc;
4229                 addr += now;
4230                 val += now;
4231                 bytes -= now;
4232         }
4233
4234         return emulator_read_write_onepage(addr, val, bytes, exception,
4235                                            vcpu, ops);
4236 }
4237
4238 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4239                                   unsigned long addr,
4240                                   void *val,
4241                                   unsigned int bytes,
4242                                   struct x86_exception *exception)
4243 {
4244         return emulator_read_write(ctxt, addr, val, bytes,
4245                                    exception, &read_emultor);
4246 }
4247
4248 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4249                             unsigned long addr,
4250                             const void *val,
4251                             unsigned int bytes,
4252                             struct x86_exception *exception)
4253 {
4254         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4255                                    exception, &write_emultor);
4256 }
4257
4258 #define CMPXCHG_TYPE(t, ptr, old, new) \
4259         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4260
4261 #ifdef CONFIG_X86_64
4262 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4263 #else
4264 #  define CMPXCHG64(ptr, old, new) \
4265         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4266 #endif
4267
4268 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4269                                      unsigned long addr,
4270                                      const void *old,
4271                                      const void *new,
4272                                      unsigned int bytes,
4273                                      struct x86_exception *exception)
4274 {
4275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4276         gpa_t gpa;
4277         struct page *page;
4278         char *kaddr;
4279         bool exchanged;
4280
4281         /* guests cmpxchg8b have to be emulated atomically */
4282         if (bytes > 8 || (bytes & (bytes - 1)))
4283                 goto emul_write;
4284
4285         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4286
4287         if (gpa == UNMAPPED_GVA ||
4288             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4289                 goto emul_write;
4290
4291         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4292                 goto emul_write;
4293
4294         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4295         if (is_error_page(page)) {
4296                 kvm_release_page_clean(page);
4297                 goto emul_write;
4298         }
4299
4300         kaddr = kmap_atomic(page, KM_USER0);
4301         kaddr += offset_in_page(gpa);
4302         switch (bytes) {
4303         case 1:
4304                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4305                 break;
4306         case 2:
4307                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4308                 break;
4309         case 4:
4310                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4311                 break;
4312         case 8:
4313                 exchanged = CMPXCHG64(kaddr, old, new);
4314                 break;
4315         default:
4316                 BUG();
4317         }
4318         kunmap_atomic(kaddr, KM_USER0);
4319         kvm_release_page_dirty(page);
4320
4321         if (!exchanged)
4322                 return X86EMUL_CMPXCHG_FAILED;
4323
4324         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4325
4326         return X86EMUL_CONTINUE;
4327
4328 emul_write:
4329         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4330
4331         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4332 }
4333
4334 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4335 {
4336         /* TODO: String I/O for in kernel device */
4337         int r;
4338
4339         if (vcpu->arch.pio.in)
4340                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4341                                     vcpu->arch.pio.size, pd);
4342         else
4343                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4344                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4345                                      pd);
4346         return r;
4347 }
4348
4349
4350 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4351                                     int size, unsigned short port, void *val,
4352                                     unsigned int count)
4353 {
4354         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4355
4356         if (vcpu->arch.pio.count)
4357                 goto data_avail;
4358
4359         trace_kvm_pio(0, port, size, count);
4360
4361         vcpu->arch.pio.port = port;
4362         vcpu->arch.pio.in = 1;
4363         vcpu->arch.pio.count  = count;
4364         vcpu->arch.pio.size = size;
4365
4366         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4367         data_avail:
4368                 memcpy(val, vcpu->arch.pio_data, size * count);
4369                 vcpu->arch.pio.count = 0;
4370                 return 1;
4371         }
4372
4373         vcpu->run->exit_reason = KVM_EXIT_IO;
4374         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4375         vcpu->run->io.size = size;
4376         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4377         vcpu->run->io.count = count;
4378         vcpu->run->io.port = port;
4379
4380         return 0;
4381 }
4382
4383 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4384                                      int size, unsigned short port,
4385                                      const void *val, unsigned int count)
4386 {
4387         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4388
4389         trace_kvm_pio(1, port, size, count);
4390
4391         vcpu->arch.pio.port = port;
4392         vcpu->arch.pio.in = 0;
4393         vcpu->arch.pio.count = count;
4394         vcpu->arch.pio.size = size;
4395
4396         memcpy(vcpu->arch.pio_data, val, size * count);
4397
4398         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4399                 vcpu->arch.pio.count = 0;
4400                 return 1;
4401         }
4402
4403         vcpu->run->exit_reason = KVM_EXIT_IO;
4404         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4405         vcpu->run->io.size = size;
4406         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4407         vcpu->run->io.count = count;
4408         vcpu->run->io.port = port;
4409
4410         return 0;
4411 }
4412
4413 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4414 {
4415         return kvm_x86_ops->get_segment_base(vcpu, seg);
4416 }
4417
4418 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4419 {
4420         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4421 }
4422
4423 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4424 {
4425         if (!need_emulate_wbinvd(vcpu))
4426                 return X86EMUL_CONTINUE;
4427
4428         if (kvm_x86_ops->has_wbinvd_exit()) {
4429                 int cpu = get_cpu();
4430
4431                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4432                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4433                                 wbinvd_ipi, NULL, 1);
4434                 put_cpu();
4435                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4436         } else
4437                 wbinvd();
4438         return X86EMUL_CONTINUE;
4439 }
4440 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4441
4442 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4443 {
4444         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4445 }
4446
4447 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4448 {
4449         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4450 }
4451
4452 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4453 {
4454
4455         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4456 }
4457
4458 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4459 {
4460         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4461 }
4462
4463 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4464 {
4465         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4466         unsigned long value;
4467
4468         switch (cr) {
4469         case 0:
4470                 value = kvm_read_cr0(vcpu);
4471                 break;
4472         case 2:
4473                 value = vcpu->arch.cr2;
4474                 break;
4475         case 3:
4476                 value = kvm_read_cr3(vcpu);
4477                 break;
4478         case 4:
4479                 value = kvm_read_cr4(vcpu);
4480                 break;
4481         case 8:
4482                 value = kvm_get_cr8(vcpu);
4483                 break;
4484         default:
4485                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4486                 return 0;
4487         }
4488
4489         return value;
4490 }
4491
4492 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4493 {
4494         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4495         int res = 0;
4496
4497         switch (cr) {
4498         case 0:
4499                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4500                 break;
4501         case 2:
4502                 vcpu->arch.cr2 = val;
4503                 break;
4504         case 3:
4505                 res = kvm_set_cr3(vcpu, val);
4506                 break;
4507         case 4:
4508                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4509                 break;
4510         case 8:
4511                 res = kvm_set_cr8(vcpu, val);
4512                 break;
4513         default:
4514                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4515                 res = -1;
4516         }
4517
4518         return res;
4519 }
4520
4521 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4522 {
4523         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4524 }
4525
4526 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4527 {
4528         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4529 }
4530
4531 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4532 {
4533         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4534 }
4535
4536 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4537 {
4538         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4539 }
4540
4541 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4542 {
4543         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4544 }
4545
4546 static unsigned long emulator_get_cached_segment_base(
4547         struct x86_emulate_ctxt *ctxt, int seg)
4548 {
4549         return get_segment_base(emul_to_vcpu(ctxt), seg);
4550 }
4551
4552 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4553                                  struct desc_struct *desc, u32 *base3,
4554                                  int seg)
4555 {
4556         struct kvm_segment var;
4557
4558         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4559         *selector = var.selector;
4560
4561         if (var.unusable)
4562                 return false;
4563
4564         if (var.g)
4565                 var.limit >>= 12;
4566         set_desc_limit(desc, var.limit);
4567         set_desc_base(desc, (unsigned long)var.base);
4568 #ifdef CONFIG_X86_64
4569         if (base3)
4570                 *base3 = var.base >> 32;
4571 #endif
4572         desc->type = var.type;
4573         desc->s = var.s;
4574         desc->dpl = var.dpl;
4575         desc->p = var.present;
4576         desc->avl = var.avl;
4577         desc->l = var.l;
4578         desc->d = var.db;
4579         desc->g = var.g;
4580
4581         return true;
4582 }
4583
4584 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4585                                  struct desc_struct *desc, u32 base3,
4586                                  int seg)
4587 {
4588         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4589         struct kvm_segment var;
4590
4591         var.selector = selector;
4592         var.base = get_desc_base(desc);
4593 #ifdef CONFIG_X86_64
4594         var.base |= ((u64)base3) << 32;
4595 #endif
4596         var.limit = get_desc_limit(desc);
4597         if (desc->g)
4598                 var.limit = (var.limit << 12) | 0xfff;
4599         var.type = desc->type;
4600         var.present = desc->p;
4601         var.dpl = desc->dpl;
4602         var.db = desc->d;
4603         var.s = desc->s;
4604         var.l = desc->l;
4605         var.g = desc->g;
4606         var.avl = desc->avl;
4607         var.present = desc->p;
4608         var.unusable = !var.present;
4609         var.padding = 0;
4610
4611         kvm_set_segment(vcpu, &var, seg);
4612         return;
4613 }
4614
4615 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4616                             u32 msr_index, u64 *pdata)
4617 {
4618         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4619 }
4620
4621 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4622                             u32 msr_index, u64 data)
4623 {
4624         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4625 }
4626
4627 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4628 {
4629         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4630 }
4631
4632 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4633 {
4634         preempt_disable();
4635         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4636         /*
4637          * CR0.TS may reference the host fpu state, not the guest fpu state,
4638          * so it may be clear at this point.
4639          */
4640         clts();
4641 }
4642
4643 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4644 {
4645         preempt_enable();
4646 }
4647
4648 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4649                               struct x86_instruction_info *info,
4650                               enum x86_intercept_stage stage)
4651 {
4652         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4653 }
4654
4655 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4656                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4657 {
4658         struct kvm_cpuid_entry2 *cpuid = NULL;
4659
4660         if (eax && ecx)
4661                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4662                                             *eax, *ecx);
4663
4664         if (cpuid) {
4665                 *eax = cpuid->eax;
4666                 *ecx = cpuid->ecx;
4667                 if (ebx)
4668                         *ebx = cpuid->ebx;
4669                 if (edx)
4670                         *edx = cpuid->edx;
4671                 return true;
4672         }
4673
4674         return false;
4675 }
4676
4677 static struct x86_emulate_ops emulate_ops = {
4678         .read_std            = kvm_read_guest_virt_system,
4679         .write_std           = kvm_write_guest_virt_system,
4680         .fetch               = kvm_fetch_guest_virt,
4681         .read_emulated       = emulator_read_emulated,
4682         .write_emulated      = emulator_write_emulated,
4683         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4684         .invlpg              = emulator_invlpg,
4685         .pio_in_emulated     = emulator_pio_in_emulated,
4686         .pio_out_emulated    = emulator_pio_out_emulated,
4687         .get_segment         = emulator_get_segment,
4688         .set_segment         = emulator_set_segment,
4689         .get_cached_segment_base = emulator_get_cached_segment_base,
4690         .get_gdt             = emulator_get_gdt,
4691         .get_idt             = emulator_get_idt,
4692         .set_gdt             = emulator_set_gdt,
4693         .set_idt             = emulator_set_idt,
4694         .get_cr              = emulator_get_cr,
4695         .set_cr              = emulator_set_cr,
4696         .cpl                 = emulator_get_cpl,
4697         .get_dr              = emulator_get_dr,
4698         .set_dr              = emulator_set_dr,
4699         .set_msr             = emulator_set_msr,
4700         .get_msr             = emulator_get_msr,
4701         .halt                = emulator_halt,
4702         .wbinvd              = emulator_wbinvd,
4703         .fix_hypercall       = emulator_fix_hypercall,
4704         .get_fpu             = emulator_get_fpu,
4705         .put_fpu             = emulator_put_fpu,
4706         .intercept           = emulator_intercept,
4707         .get_cpuid           = emulator_get_cpuid,
4708 };
4709
4710 static void cache_all_regs(struct kvm_vcpu *vcpu)
4711 {
4712         kvm_register_read(vcpu, VCPU_REGS_RAX);
4713         kvm_register_read(vcpu, VCPU_REGS_RSP);
4714         kvm_register_read(vcpu, VCPU_REGS_RIP);
4715         vcpu->arch.regs_dirty = ~0;
4716 }
4717
4718 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4719 {
4720         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4721         /*
4722          * an sti; sti; sequence only disable interrupts for the first
4723          * instruction. So, if the last instruction, be it emulated or
4724          * not, left the system with the INT_STI flag enabled, it
4725          * means that the last instruction is an sti. We should not
4726          * leave the flag on in this case. The same goes for mov ss
4727          */
4728         if (!(int_shadow & mask))
4729                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4730 }
4731
4732 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4733 {
4734         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4735         if (ctxt->exception.vector == PF_VECTOR)
4736                 kvm_propagate_fault(vcpu, &ctxt->exception);
4737         else if (ctxt->exception.error_code_valid)
4738                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4739                                       ctxt->exception.error_code);
4740         else
4741                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4742 }
4743
4744 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4745                               const unsigned long *regs)
4746 {
4747         memset(&ctxt->twobyte, 0,
4748                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4749         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4750
4751         ctxt->fetch.start = 0;
4752         ctxt->fetch.end = 0;
4753         ctxt->io_read.pos = 0;
4754         ctxt->io_read.end = 0;
4755         ctxt->mem_read.pos = 0;
4756         ctxt->mem_read.end = 0;
4757 }
4758
4759 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4760 {
4761         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4762         int cs_db, cs_l;
4763
4764         /*
4765          * TODO: fix emulate.c to use guest_read/write_register
4766          * instead of direct ->regs accesses, can save hundred cycles
4767          * on Intel for instructions that don't read/change RSP, for
4768          * for example.
4769          */
4770         cache_all_regs(vcpu);
4771
4772         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4773
4774         ctxt->eflags = kvm_get_rflags(vcpu);
4775         ctxt->eip = kvm_rip_read(vcpu);
4776         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4777                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4778                      cs_l                               ? X86EMUL_MODE_PROT64 :
4779                      cs_db                              ? X86EMUL_MODE_PROT32 :
4780                                                           X86EMUL_MODE_PROT16;
4781         ctxt->guest_mode = is_guest_mode(vcpu);
4782
4783         init_decode_cache(ctxt, vcpu->arch.regs);
4784         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4785 }
4786
4787 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4788 {
4789         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4790         int ret;
4791
4792         init_emulate_ctxt(vcpu);
4793
4794         ctxt->op_bytes = 2;
4795         ctxt->ad_bytes = 2;
4796         ctxt->_eip = ctxt->eip + inc_eip;
4797         ret = emulate_int_real(ctxt, irq);
4798
4799         if (ret != X86EMUL_CONTINUE)
4800                 return EMULATE_FAIL;
4801
4802         ctxt->eip = ctxt->_eip;
4803         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4804         kvm_rip_write(vcpu, ctxt->eip);
4805         kvm_set_rflags(vcpu, ctxt->eflags);
4806
4807         if (irq == NMI_VECTOR)
4808                 vcpu->arch.nmi_pending = 0;
4809         else
4810                 vcpu->arch.interrupt.pending = false;
4811
4812         return EMULATE_DONE;
4813 }
4814 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4815
4816 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4817 {
4818         int r = EMULATE_DONE;
4819
4820         ++vcpu->stat.insn_emulation_fail;
4821         trace_kvm_emulate_insn_failed(vcpu);
4822         if (!is_guest_mode(vcpu)) {
4823                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4824                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4825                 vcpu->run->internal.ndata = 0;
4826                 r = EMULATE_FAIL;
4827         }
4828         kvm_queue_exception(vcpu, UD_VECTOR);
4829
4830         return r;
4831 }
4832
4833 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4834 {
4835         gpa_t gpa;
4836
4837         if (tdp_enabled)
4838                 return false;
4839
4840         /*
4841          * if emulation was due to access to shadowed page table
4842          * and it failed try to unshadow page and re-entetr the
4843          * guest to let CPU execute the instruction.
4844          */
4845         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4846                 return true;
4847
4848         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4849
4850         if (gpa == UNMAPPED_GVA)
4851                 return true; /* let cpu generate fault */
4852
4853         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4854                 return true;
4855
4856         return false;
4857 }
4858
4859 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4860                             unsigned long cr2,
4861                             int emulation_type,
4862                             void *insn,
4863                             int insn_len)
4864 {
4865         int r;
4866         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4867         bool writeback = true;
4868
4869         kvm_clear_exception_queue(vcpu);
4870
4871         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4872                 init_emulate_ctxt(vcpu);
4873                 ctxt->interruptibility = 0;
4874                 ctxt->have_exception = false;
4875                 ctxt->perm_ok = false;
4876
4877                 ctxt->only_vendor_specific_insn
4878                         = emulation_type & EMULTYPE_TRAP_UD;
4879
4880                 r = x86_decode_insn(ctxt, insn, insn_len);
4881
4882                 trace_kvm_emulate_insn_start(vcpu);
4883                 ++vcpu->stat.insn_emulation;
4884                 if (r != EMULATION_OK)  {
4885                         if (emulation_type & EMULTYPE_TRAP_UD)
4886                                 return EMULATE_FAIL;
4887                         if (reexecute_instruction(vcpu, cr2))
4888                                 return EMULATE_DONE;
4889                         if (emulation_type & EMULTYPE_SKIP)
4890                                 return EMULATE_FAIL;
4891                         return handle_emulation_failure(vcpu);
4892                 }
4893         }
4894
4895         if (emulation_type & EMULTYPE_SKIP) {
4896                 kvm_rip_write(vcpu, ctxt->_eip);
4897                 return EMULATE_DONE;
4898         }
4899
4900         /* this is needed for vmware backdoor interface to work since it
4901            changes registers values  during IO operation */
4902         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4903                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4904                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4905         }
4906
4907 restart:
4908         r = x86_emulate_insn(ctxt);
4909
4910         if (r == EMULATION_INTERCEPTED)
4911                 return EMULATE_DONE;
4912
4913         if (r == EMULATION_FAILED) {
4914                 if (reexecute_instruction(vcpu, cr2))
4915                         return EMULATE_DONE;
4916
4917                 return handle_emulation_failure(vcpu);
4918         }
4919
4920         if (ctxt->have_exception) {
4921                 inject_emulated_exception(vcpu);
4922                 r = EMULATE_DONE;
4923         } else if (vcpu->arch.pio.count) {
4924                 if (!vcpu->arch.pio.in)
4925                         vcpu->arch.pio.count = 0;
4926                 else
4927                         writeback = false;
4928                 r = EMULATE_DO_MMIO;
4929         } else if (vcpu->mmio_needed) {
4930                 if (!vcpu->mmio_is_write)
4931                         writeback = false;
4932                 r = EMULATE_DO_MMIO;
4933         } else if (r == EMULATION_RESTART)
4934                 goto restart;
4935         else
4936                 r = EMULATE_DONE;
4937
4938         if (writeback) {
4939                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4940                 kvm_set_rflags(vcpu, ctxt->eflags);
4941                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4942                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4943                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4944                 kvm_rip_write(vcpu, ctxt->eip);
4945         } else
4946                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4947
4948         return r;
4949 }
4950 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4951
4952 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4953 {
4954         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4955         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4956                                             size, port, &val, 1);
4957         /* do not return to emulator after return from userspace */
4958         vcpu->arch.pio.count = 0;
4959         return ret;
4960 }
4961 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4962
4963 static void tsc_bad(void *info)
4964 {
4965         __this_cpu_write(cpu_tsc_khz, 0);
4966 }
4967
4968 static void tsc_khz_changed(void *data)
4969 {
4970         struct cpufreq_freqs *freq = data;
4971         unsigned long khz = 0;
4972
4973         if (data)
4974                 khz = freq->new;
4975         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4976                 khz = cpufreq_quick_get(raw_smp_processor_id());
4977         if (!khz)
4978                 khz = tsc_khz;
4979         __this_cpu_write(cpu_tsc_khz, khz);
4980 }
4981
4982 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4983                                      void *data)
4984 {
4985         struct cpufreq_freqs *freq = data;
4986         struct kvm *kvm;
4987         struct kvm_vcpu *vcpu;
4988         int i, send_ipi = 0;
4989
4990         /*
4991          * We allow guests to temporarily run on slowing clocks,
4992          * provided we notify them after, or to run on accelerating
4993          * clocks, provided we notify them before.  Thus time never
4994          * goes backwards.
4995          *
4996          * However, we have a problem.  We can't atomically update
4997          * the frequency of a given CPU from this function; it is
4998          * merely a notifier, which can be called from any CPU.
4999          * Changing the TSC frequency at arbitrary points in time
5000          * requires a recomputation of local variables related to
5001          * the TSC for each VCPU.  We must flag these local variables
5002          * to be updated and be sure the update takes place with the
5003          * new frequency before any guests proceed.
5004          *
5005          * Unfortunately, the combination of hotplug CPU and frequency
5006          * change creates an intractable locking scenario; the order
5007          * of when these callouts happen is undefined with respect to
5008          * CPU hotplug, and they can race with each other.  As such,
5009          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5010          * undefined; you can actually have a CPU frequency change take
5011          * place in between the computation of X and the setting of the
5012          * variable.  To protect against this problem, all updates of
5013          * the per_cpu tsc_khz variable are done in an interrupt
5014          * protected IPI, and all callers wishing to update the value
5015          * must wait for a synchronous IPI to complete (which is trivial
5016          * if the caller is on the CPU already).  This establishes the
5017          * necessary total order on variable updates.
5018          *
5019          * Note that because a guest time update may take place
5020          * anytime after the setting of the VCPU's request bit, the
5021          * correct TSC value must be set before the request.  However,
5022          * to ensure the update actually makes it to any guest which
5023          * starts running in hardware virtualization between the set
5024          * and the acquisition of the spinlock, we must also ping the
5025          * CPU after setting the request bit.
5026          *
5027          */
5028
5029         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5030                 return 0;
5031         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5032                 return 0;
5033
5034         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5035
5036         raw_spin_lock(&kvm_lock);
5037         list_for_each_entry(kvm, &vm_list, vm_list) {
5038                 kvm_for_each_vcpu(i, vcpu, kvm) {
5039                         if (vcpu->cpu != freq->cpu)
5040                                 continue;
5041                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5042                         if (vcpu->cpu != smp_processor_id())
5043                                 send_ipi = 1;
5044                 }
5045         }
5046         raw_spin_unlock(&kvm_lock);
5047
5048         if (freq->old < freq->new && send_ipi) {
5049                 /*
5050                  * We upscale the frequency.  Must make the guest
5051                  * doesn't see old kvmclock values while running with
5052                  * the new frequency, otherwise we risk the guest sees
5053                  * time go backwards.
5054                  *
5055                  * In case we update the frequency for another cpu
5056                  * (which might be in guest context) send an interrupt
5057                  * to kick the cpu out of guest context.  Next time
5058                  * guest context is entered kvmclock will be updated,
5059                  * so the guest will not see stale values.
5060                  */
5061                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5062         }
5063         return 0;
5064 }
5065
5066 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5067         .notifier_call  = kvmclock_cpufreq_notifier
5068 };
5069
5070 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5071                                         unsigned long action, void *hcpu)
5072 {
5073         unsigned int cpu = (unsigned long)hcpu;
5074
5075         switch (action) {
5076                 case CPU_ONLINE:
5077                 case CPU_DOWN_FAILED:
5078                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5079                         break;
5080                 case CPU_DOWN_PREPARE:
5081                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5082                         break;
5083         }
5084         return NOTIFY_OK;
5085 }
5086
5087 static struct notifier_block kvmclock_cpu_notifier_block = {
5088         .notifier_call  = kvmclock_cpu_notifier,
5089         .priority = -INT_MAX
5090 };
5091
5092 static void kvm_timer_init(void)
5093 {
5094         int cpu;
5095
5096         max_tsc_khz = tsc_khz;
5097         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5098         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5099 #ifdef CONFIG_CPU_FREQ
5100                 struct cpufreq_policy policy;
5101                 memset(&policy, 0, sizeof(policy));
5102                 cpu = get_cpu();
5103                 cpufreq_get_policy(&policy, cpu);
5104                 if (policy.cpuinfo.max_freq)
5105                         max_tsc_khz = policy.cpuinfo.max_freq;
5106                 put_cpu();
5107 #endif
5108                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5109                                           CPUFREQ_TRANSITION_NOTIFIER);
5110         }
5111         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5112         for_each_online_cpu(cpu)
5113                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5114 }
5115
5116 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5117
5118 static int kvm_is_in_guest(void)
5119 {
5120         return percpu_read(current_vcpu) != NULL;
5121 }
5122
5123 static int kvm_is_user_mode(void)
5124 {
5125         int user_mode = 3;
5126
5127         if (percpu_read(current_vcpu))
5128                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5129
5130         return user_mode != 0;
5131 }
5132
5133 static unsigned long kvm_get_guest_ip(void)
5134 {
5135         unsigned long ip = 0;
5136
5137         if (percpu_read(current_vcpu))
5138                 ip = kvm_rip_read(percpu_read(current_vcpu));
5139
5140         return ip;
5141 }
5142
5143 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5144         .is_in_guest            = kvm_is_in_guest,
5145         .is_user_mode           = kvm_is_user_mode,
5146         .get_guest_ip           = kvm_get_guest_ip,
5147 };
5148
5149 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5150 {
5151         percpu_write(current_vcpu, vcpu);
5152 }
5153 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5154
5155 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5156 {
5157         percpu_write(current_vcpu, NULL);
5158 }
5159 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5160
5161 static void kvm_set_mmio_spte_mask(void)
5162 {
5163         u64 mask;
5164         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5165
5166         /*
5167          * Set the reserved bits and the present bit of an paging-structure
5168          * entry to generate page fault with PFER.RSV = 1.
5169          */
5170         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5171         mask |= 1ull;
5172
5173 #ifdef CONFIG_X86_64
5174         /*
5175          * If reserved bit is not supported, clear the present bit to disable
5176          * mmio page fault.
5177          */
5178         if (maxphyaddr == 52)
5179                 mask &= ~1ull;
5180 #endif
5181
5182         kvm_mmu_set_mmio_spte_mask(mask);
5183 }
5184
5185 int kvm_arch_init(void *opaque)
5186 {
5187         int r;
5188         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5189
5190         if (kvm_x86_ops) {
5191                 printk(KERN_ERR "kvm: already loaded the other module\n");
5192                 r = -EEXIST;
5193                 goto out;
5194         }
5195
5196         if (!ops->cpu_has_kvm_support()) {
5197                 printk(KERN_ERR "kvm: no hardware support\n");
5198                 r = -EOPNOTSUPP;
5199                 goto out;
5200         }
5201         if (ops->disabled_by_bios()) {
5202                 printk(KERN_ERR "kvm: disabled by bios\n");
5203                 r = -EOPNOTSUPP;
5204                 goto out;
5205         }
5206
5207         r = kvm_mmu_module_init();
5208         if (r)
5209                 goto out;
5210
5211         kvm_set_mmio_spte_mask();
5212         kvm_init_msr_list();
5213
5214         kvm_x86_ops = ops;
5215         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5216                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5217
5218         kvm_timer_init();
5219
5220         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5221
5222         if (cpu_has_xsave)
5223                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5224
5225         return 0;
5226
5227 out:
5228         return r;
5229 }
5230
5231 void kvm_arch_exit(void)
5232 {
5233         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5234
5235         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5236                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5237                                             CPUFREQ_TRANSITION_NOTIFIER);
5238         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5239         kvm_x86_ops = NULL;
5240         kvm_mmu_module_exit();
5241 }
5242
5243 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5244 {
5245         ++vcpu->stat.halt_exits;
5246         if (irqchip_in_kernel(vcpu->kvm)) {
5247                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5248                 return 1;
5249         } else {
5250                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5251                 return 0;
5252         }
5253 }
5254 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5255
5256 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5257                            unsigned long a1)
5258 {
5259         if (is_long_mode(vcpu))
5260                 return a0;
5261         else
5262                 return a0 | ((gpa_t)a1 << 32);
5263 }
5264
5265 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5266 {
5267         u64 param, ingpa, outgpa, ret;
5268         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5269         bool fast, longmode;
5270         int cs_db, cs_l;
5271
5272         /*
5273          * hypercall generates UD from non zero cpl and real mode
5274          * per HYPER-V spec
5275          */
5276         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5277                 kvm_queue_exception(vcpu, UD_VECTOR);
5278                 return 0;
5279         }
5280
5281         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5282         longmode = is_long_mode(vcpu) && cs_l == 1;
5283
5284         if (!longmode) {
5285                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5286                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5287                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5288                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5289                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5290                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5291         }
5292 #ifdef CONFIG_X86_64
5293         else {
5294                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5295                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5296                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5297         }
5298 #endif
5299
5300         code = param & 0xffff;
5301         fast = (param >> 16) & 0x1;
5302         rep_cnt = (param >> 32) & 0xfff;
5303         rep_idx = (param >> 48) & 0xfff;
5304
5305         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5306
5307         switch (code) {
5308         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5309                 kvm_vcpu_on_spin(vcpu);
5310                 break;
5311         default:
5312                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5313                 break;
5314         }
5315
5316         ret = res | (((u64)rep_done & 0xfff) << 32);
5317         if (longmode) {
5318                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5319         } else {
5320                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5321                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5322         }
5323
5324         return 1;
5325 }
5326
5327 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5328 {
5329         unsigned long nr, a0, a1, a2, a3, ret;
5330         int r = 1;
5331
5332         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5333                 return kvm_hv_hypercall(vcpu);
5334
5335         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5336         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5337         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5338         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5339         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5340
5341         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5342
5343         if (!is_long_mode(vcpu)) {
5344                 nr &= 0xFFFFFFFF;
5345                 a0 &= 0xFFFFFFFF;
5346                 a1 &= 0xFFFFFFFF;
5347                 a2 &= 0xFFFFFFFF;
5348                 a3 &= 0xFFFFFFFF;
5349         }
5350
5351         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5352                 ret = -KVM_EPERM;
5353                 goto out;
5354         }
5355
5356         switch (nr) {
5357         case KVM_HC_VAPIC_POLL_IRQ:
5358                 ret = 0;
5359                 break;
5360         case KVM_HC_MMU_OP:
5361                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5362                 break;
5363         default:
5364                 ret = -KVM_ENOSYS;
5365                 break;
5366         }
5367 out:
5368         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5369         ++vcpu->stat.hypercalls;
5370         return r;
5371 }
5372 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5373
5374 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5375 {
5376         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5377         char instruction[3];
5378         unsigned long rip = kvm_rip_read(vcpu);
5379
5380         /*
5381          * Blow out the MMU to ensure that no other VCPU has an active mapping
5382          * to ensure that the updated hypercall appears atomically across all
5383          * VCPUs.
5384          */
5385         kvm_mmu_zap_all(vcpu->kvm);
5386
5387         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5388
5389         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5390 }
5391
5392 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5393 {
5394         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5395         int j, nent = vcpu->arch.cpuid_nent;
5396
5397         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5398         /* when no next entry is found, the current entry[i] is reselected */
5399         for (j = i + 1; ; j = (j + 1) % nent) {
5400                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5401                 if (ej->function == e->function) {
5402                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5403                         return j;
5404                 }
5405         }
5406         return 0; /* silence gcc, even though control never reaches here */
5407 }
5408
5409 /* find an entry with matching function, matching index (if needed), and that
5410  * should be read next (if it's stateful) */
5411 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5412         u32 function, u32 index)
5413 {
5414         if (e->function != function)
5415                 return 0;
5416         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5417                 return 0;
5418         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5419             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5420                 return 0;
5421         return 1;
5422 }
5423
5424 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5425                                               u32 function, u32 index)
5426 {
5427         int i;
5428         struct kvm_cpuid_entry2 *best = NULL;
5429
5430         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5431                 struct kvm_cpuid_entry2 *e;
5432
5433                 e = &vcpu->arch.cpuid_entries[i];
5434                 if (is_matching_cpuid_entry(e, function, index)) {
5435                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5436                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5437                         best = e;
5438                         break;
5439                 }
5440         }
5441         return best;
5442 }
5443 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5444
5445 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5446 {
5447         struct kvm_cpuid_entry2 *best;
5448
5449         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5450         if (!best || best->eax < 0x80000008)
5451                 goto not_found;
5452         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5453         if (best)
5454                 return best->eax & 0xff;
5455 not_found:
5456         return 36;
5457 }
5458
5459 /*
5460  * If no match is found, check whether we exceed the vCPU's limit
5461  * and return the content of the highest valid _standard_ leaf instead.
5462  * This is to satisfy the CPUID specification.
5463  */
5464 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5465                                                   u32 function, u32 index)
5466 {
5467         struct kvm_cpuid_entry2 *maxlevel;
5468
5469         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5470         if (!maxlevel || maxlevel->eax >= function)
5471                 return NULL;
5472         if (function & 0x80000000) {
5473                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5474                 if (!maxlevel)
5475                         return NULL;
5476         }
5477         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5478 }
5479
5480 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5481 {
5482         u32 function, index;
5483         struct kvm_cpuid_entry2 *best;
5484
5485         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5486         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5487         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5488         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5489         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5490         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5491         best = kvm_find_cpuid_entry(vcpu, function, index);
5492
5493         if (!best)
5494                 best = check_cpuid_limit(vcpu, function, index);
5495
5496         if (best) {
5497                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5498                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5499                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5500                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5501         }
5502         kvm_x86_ops->skip_emulated_instruction(vcpu);
5503         trace_kvm_cpuid(function,
5504                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5505                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5506                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5507                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5508 }
5509 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5510
5511 /*
5512  * Check if userspace requested an interrupt window, and that the
5513  * interrupt window is open.
5514  *
5515  * No need to exit to userspace if we already have an interrupt queued.
5516  */
5517 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5518 {
5519         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5520                 vcpu->run->request_interrupt_window &&
5521                 kvm_arch_interrupt_allowed(vcpu));
5522 }
5523
5524 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5525 {
5526         struct kvm_run *kvm_run = vcpu->run;
5527
5528         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5529         kvm_run->cr8 = kvm_get_cr8(vcpu);
5530         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5531         if (irqchip_in_kernel(vcpu->kvm))
5532                 kvm_run->ready_for_interrupt_injection = 1;
5533         else
5534                 kvm_run->ready_for_interrupt_injection =
5535                         kvm_arch_interrupt_allowed(vcpu) &&
5536                         !kvm_cpu_has_interrupt(vcpu) &&
5537                         !kvm_event_needs_reinjection(vcpu);
5538 }
5539
5540 static void vapic_enter(struct kvm_vcpu *vcpu)
5541 {
5542         struct kvm_lapic *apic = vcpu->arch.apic;
5543         struct page *page;
5544
5545         if (!apic || !apic->vapic_addr)
5546                 return;
5547
5548         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5549
5550         vcpu->arch.apic->vapic_page = page;
5551 }
5552
5553 static void vapic_exit(struct kvm_vcpu *vcpu)
5554 {
5555         struct kvm_lapic *apic = vcpu->arch.apic;
5556         int idx;
5557
5558         if (!apic || !apic->vapic_addr)
5559                 return;
5560
5561         idx = srcu_read_lock(&vcpu->kvm->srcu);
5562         kvm_release_page_dirty(apic->vapic_page);
5563         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5564         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5565 }
5566
5567 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5568 {
5569         int max_irr, tpr;
5570
5571         if (!kvm_x86_ops->update_cr8_intercept)
5572                 return;
5573
5574         if (!vcpu->arch.apic)
5575                 return;
5576
5577         if (!vcpu->arch.apic->vapic_addr)
5578                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5579         else
5580                 max_irr = -1;
5581
5582         if (max_irr != -1)
5583                 max_irr >>= 4;
5584
5585         tpr = kvm_lapic_get_cr8(vcpu);
5586
5587         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5588 }
5589
5590 static void inject_pending_event(struct kvm_vcpu *vcpu)
5591 {
5592         /* try to reinject previous events if any */
5593         if (vcpu->arch.exception.pending) {
5594                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5595                                         vcpu->arch.exception.has_error_code,
5596                                         vcpu->arch.exception.error_code);
5597                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5598                                           vcpu->arch.exception.has_error_code,
5599                                           vcpu->arch.exception.error_code,
5600                                           vcpu->arch.exception.reinject);
5601                 return;
5602         }
5603
5604         if (vcpu->arch.nmi_injected) {
5605                 kvm_x86_ops->set_nmi(vcpu);
5606                 return;
5607         }
5608
5609         if (vcpu->arch.interrupt.pending) {
5610                 kvm_x86_ops->set_irq(vcpu);
5611                 return;
5612         }
5613
5614         /* try to inject new event if pending */
5615         if (vcpu->arch.nmi_pending) {
5616                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5617                         --vcpu->arch.nmi_pending;
5618                         vcpu->arch.nmi_injected = true;
5619                         kvm_x86_ops->set_nmi(vcpu);
5620                 }
5621         } else if (kvm_cpu_has_interrupt(vcpu)) {
5622                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5623                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5624                                             false);
5625                         kvm_x86_ops->set_irq(vcpu);
5626                 }
5627         }
5628 }
5629
5630 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5631 {
5632         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5633                         !vcpu->guest_xcr0_loaded) {
5634                 /* kvm_set_xcr() also depends on this */
5635                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5636                 vcpu->guest_xcr0_loaded = 1;
5637         }
5638 }
5639
5640 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5641 {
5642         if (vcpu->guest_xcr0_loaded) {
5643                 if (vcpu->arch.xcr0 != host_xcr0)
5644                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5645                 vcpu->guest_xcr0_loaded = 0;
5646         }
5647 }
5648
5649 static void process_nmi(struct kvm_vcpu *vcpu)
5650 {
5651         unsigned limit = 2;
5652
5653         /*
5654          * x86 is limited to one NMI running, and one NMI pending after it.
5655          * If an NMI is already in progress, limit further NMIs to just one.
5656          * Otherwise, allow two (and we'll inject the first one immediately).
5657          */
5658         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5659                 limit = 1;
5660
5661         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5662         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5663         kvm_make_request(KVM_REQ_EVENT, vcpu);
5664 }
5665
5666 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5667 {
5668         int r;
5669         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5670                 vcpu->run->request_interrupt_window;
5671
5672         if (vcpu->requests) {
5673                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5674                         kvm_mmu_unload(vcpu);
5675                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5676                         __kvm_migrate_timers(vcpu);
5677                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5678                         r = kvm_guest_time_update(vcpu);
5679                         if (unlikely(r))
5680                                 goto out;
5681                 }
5682                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5683                         kvm_mmu_sync_roots(vcpu);
5684                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5685                         kvm_x86_ops->tlb_flush(vcpu);
5686                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5687                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5688                         r = 0;
5689                         goto out;
5690                 }
5691                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5692                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5693                         r = 0;
5694                         goto out;
5695                 }
5696                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5697                         vcpu->fpu_active = 0;
5698                         kvm_x86_ops->fpu_deactivate(vcpu);
5699                 }
5700                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5701                         /* Page is swapped out. Do synthetic halt */
5702                         vcpu->arch.apf.halted = true;
5703                         r = 1;
5704                         goto out;
5705                 }
5706                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5707                         record_steal_time(vcpu);
5708                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5709                         process_nmi(vcpu);
5710
5711         }
5712
5713         r = kvm_mmu_reload(vcpu);
5714         if (unlikely(r))
5715                 goto out;
5716
5717         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5718                 inject_pending_event(vcpu);
5719
5720                 /* enable NMI/IRQ window open exits if needed */
5721                 if (vcpu->arch.nmi_pending)
5722                         kvm_x86_ops->enable_nmi_window(vcpu);
5723                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5724                         kvm_x86_ops->enable_irq_window(vcpu);
5725
5726                 if (kvm_lapic_enabled(vcpu)) {
5727                         update_cr8_intercept(vcpu);
5728                         kvm_lapic_sync_to_vapic(vcpu);
5729                 }
5730         }
5731
5732         preempt_disable();
5733
5734         kvm_x86_ops->prepare_guest_switch(vcpu);
5735         if (vcpu->fpu_active)
5736                 kvm_load_guest_fpu(vcpu);
5737         kvm_load_guest_xcr0(vcpu);
5738
5739         vcpu->mode = IN_GUEST_MODE;
5740
5741         /* We should set ->mode before check ->requests,
5742          * see the comment in make_all_cpus_request.
5743          */
5744         smp_mb();
5745
5746         local_irq_disable();
5747
5748         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5749             || need_resched() || signal_pending(current)) {
5750                 vcpu->mode = OUTSIDE_GUEST_MODE;
5751                 smp_wmb();
5752                 local_irq_enable();
5753                 preempt_enable();
5754                 kvm_x86_ops->cancel_injection(vcpu);
5755                 r = 1;
5756                 goto out;
5757         }
5758
5759         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5760
5761         kvm_guest_enter();
5762
5763         if (unlikely(vcpu->arch.switch_db_regs)) {
5764                 set_debugreg(0, 7);
5765                 set_debugreg(vcpu->arch.eff_db[0], 0);
5766                 set_debugreg(vcpu->arch.eff_db[1], 1);
5767                 set_debugreg(vcpu->arch.eff_db[2], 2);
5768                 set_debugreg(vcpu->arch.eff_db[3], 3);
5769         }
5770
5771         trace_kvm_entry(vcpu->vcpu_id);
5772         kvm_x86_ops->run(vcpu);
5773
5774         /*
5775          * If the guest has used debug registers, at least dr7
5776          * will be disabled while returning to the host.
5777          * If we don't have active breakpoints in the host, we don't
5778          * care about the messed up debug address registers. But if
5779          * we have some of them active, restore the old state.
5780          */
5781         if (hw_breakpoint_active())
5782                 hw_breakpoint_restore();
5783
5784         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5785
5786         vcpu->mode = OUTSIDE_GUEST_MODE;
5787         smp_wmb();
5788         local_irq_enable();
5789
5790         ++vcpu->stat.exits;
5791
5792         /*
5793          * We must have an instruction between local_irq_enable() and
5794          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5795          * the interrupt shadow.  The stat.exits increment will do nicely.
5796          * But we need to prevent reordering, hence this barrier():
5797          */
5798         barrier();
5799
5800         kvm_guest_exit();
5801
5802         preempt_enable();
5803
5804         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5805
5806         /*
5807          * Profile KVM exit RIPs:
5808          */
5809         if (unlikely(prof_on == KVM_PROFILING)) {
5810                 unsigned long rip = kvm_rip_read(vcpu);
5811                 profile_hit(KVM_PROFILING, (void *)rip);
5812         }
5813
5814
5815         kvm_lapic_sync_from_vapic(vcpu);
5816
5817         r = kvm_x86_ops->handle_exit(vcpu);
5818 out:
5819         return r;
5820 }
5821
5822
5823 static int __vcpu_run(struct kvm_vcpu *vcpu)
5824 {
5825         int r;
5826         struct kvm *kvm = vcpu->kvm;
5827
5828         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5829                 pr_debug("vcpu %d received sipi with vector # %x\n",
5830                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5831                 kvm_lapic_reset(vcpu);
5832                 r = kvm_arch_vcpu_reset(vcpu);
5833                 if (r)
5834                         return r;
5835                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5836         }
5837
5838         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5839         vapic_enter(vcpu);
5840
5841         r = 1;
5842         while (r > 0) {
5843                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5844                     !vcpu->arch.apf.halted)
5845                         r = vcpu_enter_guest(vcpu);
5846                 else {
5847                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5848                         kvm_vcpu_block(vcpu);
5849                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5850                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5851                         {
5852                                 switch(vcpu->arch.mp_state) {
5853                                 case KVM_MP_STATE_HALTED:
5854                                         vcpu->arch.mp_state =
5855                                                 KVM_MP_STATE_RUNNABLE;
5856                                 case KVM_MP_STATE_RUNNABLE:
5857                                         vcpu->arch.apf.halted = false;
5858                                         break;
5859                                 case KVM_MP_STATE_SIPI_RECEIVED:
5860                                 default:
5861                                         r = -EINTR;
5862                                         break;
5863                                 }
5864                         }
5865                 }
5866
5867                 if (r <= 0)
5868                         break;
5869
5870                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5871                 if (kvm_cpu_has_pending_timer(vcpu))
5872                         kvm_inject_pending_timer_irqs(vcpu);
5873
5874                 if (dm_request_for_irq_injection(vcpu)) {
5875                         r = -EINTR;
5876                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5877                         ++vcpu->stat.request_irq_exits;
5878                 }
5879
5880                 kvm_check_async_pf_completion(vcpu);
5881
5882                 if (signal_pending(current)) {
5883                         r = -EINTR;
5884                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5885                         ++vcpu->stat.signal_exits;
5886                 }
5887                 if (need_resched()) {
5888                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5889                         kvm_resched(vcpu);
5890                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5891                 }
5892         }
5893
5894         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5895
5896         vapic_exit(vcpu);
5897
5898         return r;
5899 }
5900
5901 static int complete_mmio(struct kvm_vcpu *vcpu)
5902 {
5903         struct kvm_run *run = vcpu->run;
5904         int r;
5905
5906         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5907                 return 1;
5908
5909         if (vcpu->mmio_needed) {
5910                 vcpu->mmio_needed = 0;
5911                 if (!vcpu->mmio_is_write)
5912                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5913                                run->mmio.data, 8);
5914                 vcpu->mmio_index += 8;
5915                 if (vcpu->mmio_index < vcpu->mmio_size) {
5916                         run->exit_reason = KVM_EXIT_MMIO;
5917                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5918                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5919                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5920                         run->mmio.is_write = vcpu->mmio_is_write;
5921                         vcpu->mmio_needed = 1;
5922                         return 0;
5923                 }
5924                 if (vcpu->mmio_is_write)
5925                         return 1;
5926                 vcpu->mmio_read_completed = 1;
5927         }
5928         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5929         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5930         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5931         if (r != EMULATE_DONE)
5932                 return 0;
5933         return 1;
5934 }
5935
5936 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5937 {
5938         int r;
5939         sigset_t sigsaved;
5940
5941         if (!tsk_used_math(current) && init_fpu(current))
5942                 return -ENOMEM;
5943
5944         if (vcpu->sigset_active)
5945                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5946
5947         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5948                 kvm_vcpu_block(vcpu);
5949                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5950                 r = -EAGAIN;
5951                 goto out;
5952         }
5953
5954         /* re-sync apic's tpr */
5955         if (!irqchip_in_kernel(vcpu->kvm)) {
5956                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5957                         r = -EINVAL;
5958                         goto out;
5959                 }
5960         }
5961
5962         r = complete_mmio(vcpu);
5963         if (r <= 0)
5964                 goto out;
5965
5966         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5967                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5968                                      kvm_run->hypercall.ret);
5969
5970         r = __vcpu_run(vcpu);
5971
5972 out:
5973         post_kvm_run_save(vcpu);
5974         if (vcpu->sigset_active)
5975                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5976
5977         return r;
5978 }
5979
5980 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5981 {
5982         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5983                 /*
5984                  * We are here if userspace calls get_regs() in the middle of
5985                  * instruction emulation. Registers state needs to be copied
5986                  * back from emulation context to vcpu. Usrapace shouldn't do
5987                  * that usually, but some bad designed PV devices (vmware
5988                  * backdoor interface) need this to work
5989                  */
5990                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5991                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5992                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5993         }
5994         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5995         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5996         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5997         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5998         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5999         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6000         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6001         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6002 #ifdef CONFIG_X86_64
6003         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6004         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6005         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6006         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6007         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6008         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6009         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6010         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6011 #endif
6012
6013         regs->rip = kvm_rip_read(vcpu);
6014         regs->rflags = kvm_get_rflags(vcpu);
6015
6016         return 0;
6017 }
6018
6019 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6020 {
6021         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6022         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6023
6024         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6025         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6026         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6027         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6028         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6029         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6030         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6031         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6032 #ifdef CONFIG_X86_64
6033         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6034         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6035         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6036         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6037         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6038         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6039         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6040         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6041 #endif
6042
6043         kvm_rip_write(vcpu, regs->rip);
6044         kvm_set_rflags(vcpu, regs->rflags);
6045
6046         vcpu->arch.exception.pending = false;
6047
6048         kvm_make_request(KVM_REQ_EVENT, vcpu);
6049
6050         return 0;
6051 }
6052
6053 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6054 {
6055         struct kvm_segment cs;
6056
6057         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6058         *db = cs.db;
6059         *l = cs.l;
6060 }
6061 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6062
6063 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6064                                   struct kvm_sregs *sregs)
6065 {
6066         struct desc_ptr dt;
6067
6068         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6069         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6070         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6071         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6072         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6073         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6074
6075         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6076         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6077
6078         kvm_x86_ops->get_idt(vcpu, &dt);
6079         sregs->idt.limit = dt.size;
6080         sregs->idt.base = dt.address;
6081         kvm_x86_ops->get_gdt(vcpu, &dt);
6082         sregs->gdt.limit = dt.size;
6083         sregs->gdt.base = dt.address;
6084
6085         sregs->cr0 = kvm_read_cr0(vcpu);
6086         sregs->cr2 = vcpu->arch.cr2;
6087         sregs->cr3 = kvm_read_cr3(vcpu);
6088         sregs->cr4 = kvm_read_cr4(vcpu);
6089         sregs->cr8 = kvm_get_cr8(vcpu);
6090         sregs->efer = vcpu->arch.efer;
6091         sregs->apic_base = kvm_get_apic_base(vcpu);
6092
6093         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6094
6095         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6096                 set_bit(vcpu->arch.interrupt.nr,
6097                         (unsigned long *)sregs->interrupt_bitmap);
6098
6099         return 0;
6100 }
6101
6102 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6103                                     struct kvm_mp_state *mp_state)
6104 {
6105         mp_state->mp_state = vcpu->arch.mp_state;
6106         return 0;
6107 }
6108
6109 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6110                                     struct kvm_mp_state *mp_state)
6111 {
6112         vcpu->arch.mp_state = mp_state->mp_state;
6113         kvm_make_request(KVM_REQ_EVENT, vcpu);
6114         return 0;
6115 }
6116
6117 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6118                     bool has_error_code, u32 error_code)
6119 {
6120         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6121         int ret;
6122
6123         init_emulate_ctxt(vcpu);
6124
6125         ret = emulator_task_switch(ctxt, tss_selector, reason,
6126                                    has_error_code, error_code);
6127
6128         if (ret)
6129                 return EMULATE_FAIL;
6130
6131         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6132         kvm_rip_write(vcpu, ctxt->eip);
6133         kvm_set_rflags(vcpu, ctxt->eflags);
6134         kvm_make_request(KVM_REQ_EVENT, vcpu);
6135         return EMULATE_DONE;
6136 }
6137 EXPORT_SYMBOL_GPL(kvm_task_switch);
6138
6139 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6140                                   struct kvm_sregs *sregs)
6141 {
6142         int mmu_reset_needed = 0;
6143         int pending_vec, max_bits, idx;
6144         struct desc_ptr dt;
6145
6146         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6147                 return -EINVAL;
6148
6149         dt.size = sregs->idt.limit;
6150         dt.address = sregs->idt.base;
6151         kvm_x86_ops->set_idt(vcpu, &dt);
6152         dt.size = sregs->gdt.limit;
6153         dt.address = sregs->gdt.base;
6154         kvm_x86_ops->set_gdt(vcpu, &dt);
6155
6156         vcpu->arch.cr2 = sregs->cr2;
6157         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6158         vcpu->arch.cr3 = sregs->cr3;
6159         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6160
6161         kvm_set_cr8(vcpu, sregs->cr8);
6162
6163         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6164         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6165         kvm_set_apic_base(vcpu, sregs->apic_base);
6166
6167         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6168         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6169         vcpu->arch.cr0 = sregs->cr0;
6170
6171         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6172         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6173         if (sregs->cr4 & X86_CR4_OSXSAVE)
6174                 update_cpuid(vcpu);
6175
6176         idx = srcu_read_lock(&vcpu->kvm->srcu);
6177         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6178                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6179                 mmu_reset_needed = 1;
6180         }
6181         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6182
6183         if (mmu_reset_needed)
6184                 kvm_mmu_reset_context(vcpu);
6185
6186         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6187         pending_vec = find_first_bit(
6188                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6189         if (pending_vec < max_bits) {
6190                 kvm_queue_interrupt(vcpu, pending_vec, false);
6191                 pr_debug("Set back pending irq %d\n", pending_vec);
6192         }
6193
6194         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6195         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6196         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6197         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6198         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6199         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6200
6201         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6202         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6203
6204         update_cr8_intercept(vcpu);
6205
6206         /* Older userspace won't unhalt the vcpu on reset. */
6207         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6208             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6209             !is_protmode(vcpu))
6210                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6211
6212         kvm_make_request(KVM_REQ_EVENT, vcpu);
6213
6214         return 0;
6215 }
6216
6217 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6218                                         struct kvm_guest_debug *dbg)
6219 {
6220         unsigned long rflags;
6221         int i, r;
6222
6223         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6224                 r = -EBUSY;
6225                 if (vcpu->arch.exception.pending)
6226                         goto out;
6227                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6228                         kvm_queue_exception(vcpu, DB_VECTOR);
6229                 else
6230                         kvm_queue_exception(vcpu, BP_VECTOR);
6231         }
6232
6233         /*
6234          * Read rflags as long as potentially injected trace flags are still
6235          * filtered out.
6236          */
6237         rflags = kvm_get_rflags(vcpu);
6238
6239         vcpu->guest_debug = dbg->control;
6240         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6241                 vcpu->guest_debug = 0;
6242
6243         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6244                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6245                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6246                 vcpu->arch.switch_db_regs =
6247                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6248         } else {
6249                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6250                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6251                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6252         }
6253
6254         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6255                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6256                         get_segment_base(vcpu, VCPU_SREG_CS);
6257
6258         /*
6259          * Trigger an rflags update that will inject or remove the trace
6260          * flags.
6261          */
6262         kvm_set_rflags(vcpu, rflags);
6263
6264         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6265
6266         r = 0;
6267
6268 out:
6269
6270         return r;
6271 }
6272
6273 /*
6274  * Translate a guest virtual address to a guest physical address.
6275  */
6276 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6277                                     struct kvm_translation *tr)
6278 {
6279         unsigned long vaddr = tr->linear_address;
6280         gpa_t gpa;
6281         int idx;
6282
6283         idx = srcu_read_lock(&vcpu->kvm->srcu);
6284         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6285         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6286         tr->physical_address = gpa;
6287         tr->valid = gpa != UNMAPPED_GVA;
6288         tr->writeable = 1;
6289         tr->usermode = 0;
6290
6291         return 0;
6292 }
6293
6294 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6295 {
6296         struct i387_fxsave_struct *fxsave =
6297                         &vcpu->arch.guest_fpu.state->fxsave;
6298
6299         memcpy(fpu->fpr, fxsave->st_space, 128);
6300         fpu->fcw = fxsave->cwd;
6301         fpu->fsw = fxsave->swd;
6302         fpu->ftwx = fxsave->twd;
6303         fpu->last_opcode = fxsave->fop;
6304         fpu->last_ip = fxsave->rip;
6305         fpu->last_dp = fxsave->rdp;
6306         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6307
6308         return 0;
6309 }
6310
6311 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6312 {
6313         struct i387_fxsave_struct *fxsave =
6314                         &vcpu->arch.guest_fpu.state->fxsave;
6315
6316         memcpy(fxsave->st_space, fpu->fpr, 128);
6317         fxsave->cwd = fpu->fcw;
6318         fxsave->swd = fpu->fsw;
6319         fxsave->twd = fpu->ftwx;
6320         fxsave->fop = fpu->last_opcode;
6321         fxsave->rip = fpu->last_ip;
6322         fxsave->rdp = fpu->last_dp;
6323         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6324
6325         return 0;
6326 }
6327
6328 int fx_init(struct kvm_vcpu *vcpu)
6329 {
6330         int err;
6331
6332         err = fpu_alloc(&vcpu->arch.guest_fpu);
6333         if (err)
6334                 return err;
6335
6336         fpu_finit(&vcpu->arch.guest_fpu);
6337
6338         /*
6339          * Ensure guest xcr0 is valid for loading
6340          */
6341         vcpu->arch.xcr0 = XSTATE_FP;
6342
6343         vcpu->arch.cr0 |= X86_CR0_ET;
6344
6345         return 0;
6346 }
6347 EXPORT_SYMBOL_GPL(fx_init);
6348
6349 static void fx_free(struct kvm_vcpu *vcpu)
6350 {
6351         fpu_free(&vcpu->arch.guest_fpu);
6352 }
6353
6354 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6355 {
6356         if (vcpu->guest_fpu_loaded)
6357                 return;
6358
6359         /*
6360          * Restore all possible states in the guest,
6361          * and assume host would use all available bits.
6362          * Guest xcr0 would be loaded later.
6363          */
6364         kvm_put_guest_xcr0(vcpu);
6365         vcpu->guest_fpu_loaded = 1;
6366         unlazy_fpu(current);
6367         fpu_restore_checking(&vcpu->arch.guest_fpu);
6368         trace_kvm_fpu(1);
6369 }
6370
6371 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6372 {
6373         kvm_put_guest_xcr0(vcpu);
6374
6375         if (!vcpu->guest_fpu_loaded)
6376                 return;
6377
6378         vcpu->guest_fpu_loaded = 0;
6379         fpu_save_init(&vcpu->arch.guest_fpu);
6380         ++vcpu->stat.fpu_reload;
6381         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6382         trace_kvm_fpu(0);
6383 }
6384
6385 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6386 {
6387         kvmclock_reset(vcpu);
6388
6389         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6390         fx_free(vcpu);
6391         kvm_x86_ops->vcpu_free(vcpu);
6392 }
6393
6394 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6395                                                 unsigned int id)
6396 {
6397         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6398                 printk_once(KERN_WARNING
6399                 "kvm: SMP vm created on host with unstable TSC; "
6400                 "guest TSC will not be reliable\n");
6401         return kvm_x86_ops->vcpu_create(kvm, id);
6402 }
6403
6404 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6405 {
6406         int r;
6407
6408         vcpu->arch.mtrr_state.have_fixed = 1;
6409         vcpu_load(vcpu);
6410         r = kvm_arch_vcpu_reset(vcpu);
6411         if (r == 0)
6412                 r = kvm_mmu_setup(vcpu);
6413         vcpu_put(vcpu);
6414
6415         return r;
6416 }
6417
6418 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6419 {
6420         vcpu->arch.apf.msr_val = 0;
6421
6422         vcpu_load(vcpu);
6423         kvm_mmu_unload(vcpu);
6424         vcpu_put(vcpu);
6425
6426         fx_free(vcpu);
6427         kvm_x86_ops->vcpu_free(vcpu);
6428 }
6429
6430 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6431 {
6432         atomic_set(&vcpu->arch.nmi_queued, 0);
6433         vcpu->arch.nmi_pending = 0;
6434         vcpu->arch.nmi_injected = false;
6435
6436         vcpu->arch.switch_db_regs = 0;
6437         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6438         vcpu->arch.dr6 = DR6_FIXED_1;
6439         vcpu->arch.dr7 = DR7_FIXED_1;
6440
6441         kvm_make_request(KVM_REQ_EVENT, vcpu);
6442         vcpu->arch.apf.msr_val = 0;
6443         vcpu->arch.st.msr_val = 0;
6444
6445         kvmclock_reset(vcpu);
6446
6447         kvm_clear_async_pf_completion_queue(vcpu);
6448         kvm_async_pf_hash_reset(vcpu);
6449         vcpu->arch.apf.halted = false;
6450
6451         return kvm_x86_ops->vcpu_reset(vcpu);
6452 }
6453
6454 int kvm_arch_hardware_enable(void *garbage)
6455 {
6456         struct kvm *kvm;
6457         struct kvm_vcpu *vcpu;
6458         int i;
6459
6460         kvm_shared_msr_cpu_online();
6461         list_for_each_entry(kvm, &vm_list, vm_list)
6462                 kvm_for_each_vcpu(i, vcpu, kvm)
6463                         if (vcpu->cpu == smp_processor_id())
6464                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6465         return kvm_x86_ops->hardware_enable(garbage);
6466 }
6467
6468 void kvm_arch_hardware_disable(void *garbage)
6469 {
6470         kvm_x86_ops->hardware_disable(garbage);
6471         drop_user_return_notifiers(garbage);
6472 }
6473
6474 int kvm_arch_hardware_setup(void)
6475 {
6476         return kvm_x86_ops->hardware_setup();
6477 }
6478
6479 void kvm_arch_hardware_unsetup(void)
6480 {
6481         kvm_x86_ops->hardware_unsetup();
6482 }
6483
6484 void kvm_arch_check_processor_compat(void *rtn)
6485 {
6486         kvm_x86_ops->check_processor_compatibility(rtn);
6487 }
6488
6489 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6490 {
6491         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6492 }
6493
6494 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6495 {
6496         struct page *page;
6497         struct kvm *kvm;
6498         int r;
6499
6500         BUG_ON(vcpu->kvm == NULL);
6501         kvm = vcpu->kvm;
6502
6503         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6504         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6505         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6506         vcpu->arch.mmu.translate_gpa = translate_gpa;
6507         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6508         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6509                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6510         else
6511                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6512
6513         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6514         if (!page) {
6515                 r = -ENOMEM;
6516                 goto fail;
6517         }
6518         vcpu->arch.pio_data = page_address(page);
6519
6520         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6521
6522         r = kvm_mmu_create(vcpu);
6523         if (r < 0)
6524                 goto fail_free_pio_data;
6525
6526         if (irqchip_in_kernel(kvm)) {
6527                 r = kvm_create_lapic(vcpu);
6528                 if (r < 0)
6529                         goto fail_mmu_destroy;
6530         }
6531
6532         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6533                                        GFP_KERNEL);
6534         if (!vcpu->arch.mce_banks) {
6535                 r = -ENOMEM;
6536                 goto fail_free_lapic;
6537         }
6538         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6539
6540         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6541                 goto fail_free_mce_banks;
6542
6543         vcpu->arch.pv_time_enabled = false;
6544         kvm_async_pf_hash_reset(vcpu);
6545
6546         return 0;
6547 fail_free_mce_banks:
6548         kfree(vcpu->arch.mce_banks);
6549 fail_free_lapic:
6550         kvm_free_lapic(vcpu);
6551 fail_mmu_destroy:
6552         kvm_mmu_destroy(vcpu);
6553 fail_free_pio_data:
6554         free_page((unsigned long)vcpu->arch.pio_data);
6555 fail:
6556         return r;
6557 }
6558
6559 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6560 {
6561         int idx;
6562
6563         kfree(vcpu->arch.mce_banks);
6564         kvm_free_lapic(vcpu);
6565         idx = srcu_read_lock(&vcpu->kvm->srcu);
6566         kvm_mmu_destroy(vcpu);
6567         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6568         free_page((unsigned long)vcpu->arch.pio_data);
6569 }
6570
6571 int kvm_arch_init_vm(struct kvm *kvm)
6572 {
6573         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6574         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6575
6576         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6577         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6578
6579         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6580
6581         return 0;
6582 }
6583
6584 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6585 {
6586         vcpu_load(vcpu);
6587         kvm_mmu_unload(vcpu);
6588         vcpu_put(vcpu);
6589 }
6590
6591 static void kvm_free_vcpus(struct kvm *kvm)
6592 {
6593         unsigned int i;
6594         struct kvm_vcpu *vcpu;
6595
6596         /*
6597          * Unpin any mmu pages first.
6598          */
6599         kvm_for_each_vcpu(i, vcpu, kvm) {
6600                 kvm_clear_async_pf_completion_queue(vcpu);
6601                 kvm_unload_vcpu_mmu(vcpu);
6602         }
6603         kvm_for_each_vcpu(i, vcpu, kvm)
6604                 kvm_arch_vcpu_free(vcpu);
6605
6606         mutex_lock(&kvm->lock);
6607         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6608                 kvm->vcpus[i] = NULL;
6609
6610         atomic_set(&kvm->online_vcpus, 0);
6611         mutex_unlock(&kvm->lock);
6612 }
6613
6614 void kvm_arch_sync_events(struct kvm *kvm)
6615 {
6616         kvm_free_all_assigned_devices(kvm);
6617         kvm_free_pit(kvm);
6618 }
6619
6620 void kvm_arch_destroy_vm(struct kvm *kvm)
6621 {
6622         kvm_iommu_unmap_guest(kvm);
6623         kfree(kvm->arch.vpic);
6624         kfree(kvm->arch.vioapic);
6625         kvm_free_vcpus(kvm);
6626         if (kvm->arch.apic_access_page)
6627                 put_page(kvm->arch.apic_access_page);
6628         if (kvm->arch.ept_identity_pagetable)
6629                 put_page(kvm->arch.ept_identity_pagetable);
6630 }
6631
6632 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6633                                 struct kvm_memory_slot *memslot,
6634                                 struct kvm_memory_slot old,
6635                                 struct kvm_userspace_memory_region *mem,
6636                                 int user_alloc)
6637 {
6638         int npages = memslot->npages;
6639         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6640
6641         /* Prevent internal slot pages from being moved by fork()/COW. */
6642         if (memslot->id >= KVM_MEMORY_SLOTS)
6643                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6644
6645         /*To keep backward compatibility with older userspace,
6646          *x86 needs to hanlde !user_alloc case.
6647          */
6648         if (!user_alloc) {
6649                 if (npages && !old.rmap) {
6650                         unsigned long userspace_addr;
6651
6652                         down_write(&current->mm->mmap_sem);
6653                         userspace_addr = do_mmap(NULL, 0,
6654                                                  npages * PAGE_SIZE,
6655                                                  PROT_READ | PROT_WRITE,
6656                                                  map_flags,
6657                                                  0);
6658                         up_write(&current->mm->mmap_sem);
6659
6660                         if (IS_ERR((void *)userspace_addr))
6661                                 return PTR_ERR((void *)userspace_addr);
6662
6663                         memslot->userspace_addr = userspace_addr;
6664                 }
6665         }
6666
6667
6668         return 0;
6669 }
6670
6671 void kvm_arch_commit_memory_region(struct kvm *kvm,
6672                                 struct kvm_userspace_memory_region *mem,
6673                                 struct kvm_memory_slot old,
6674                                 int user_alloc)
6675 {
6676
6677         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6678
6679         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6680                 int ret;
6681
6682                 down_write(&current->mm->mmap_sem);
6683                 ret = do_munmap(current->mm, old.userspace_addr,
6684                                 old.npages * PAGE_SIZE);
6685                 up_write(&current->mm->mmap_sem);
6686                 if (ret < 0)
6687                         printk(KERN_WARNING
6688                                "kvm_vm_ioctl_set_memory_region: "
6689                                "failed to munmap memory\n");
6690         }
6691
6692         if (!kvm->arch.n_requested_mmu_pages)
6693                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6694
6695         spin_lock(&kvm->mmu_lock);
6696         if (nr_mmu_pages)
6697                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6698         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6699         spin_unlock(&kvm->mmu_lock);
6700 }
6701
6702 void kvm_arch_flush_shadow(struct kvm *kvm)
6703 {
6704         kvm_mmu_zap_all(kvm);
6705         kvm_reload_remote_mmus(kvm);
6706 }
6707
6708 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6709 {
6710         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6711                 !vcpu->arch.apf.halted)
6712                 || !list_empty_careful(&vcpu->async_pf.done)
6713                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6714                 || atomic_read(&vcpu->arch.nmi_queued) ||
6715                 (kvm_arch_interrupt_allowed(vcpu) &&
6716                  kvm_cpu_has_interrupt(vcpu));
6717 }
6718
6719 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6720 {
6721         int me;
6722         int cpu = vcpu->cpu;
6723
6724         if (waitqueue_active(&vcpu->wq)) {
6725                 wake_up_interruptible(&vcpu->wq);
6726                 ++vcpu->stat.halt_wakeup;
6727         }
6728
6729         me = get_cpu();
6730         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6731                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6732                         smp_send_reschedule(cpu);
6733         put_cpu();
6734 }
6735
6736 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6737 {
6738         return kvm_x86_ops->interrupt_allowed(vcpu);
6739 }
6740
6741 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6742 {
6743         unsigned long current_rip = kvm_rip_read(vcpu) +
6744                 get_segment_base(vcpu, VCPU_SREG_CS);
6745
6746         return current_rip == linear_rip;
6747 }
6748 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6749
6750 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6751 {
6752         unsigned long rflags;
6753
6754         rflags = kvm_x86_ops->get_rflags(vcpu);
6755         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6756                 rflags &= ~X86_EFLAGS_TF;
6757         return rflags;
6758 }
6759 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6760
6761 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6762 {
6763         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6764             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6765                 rflags |= X86_EFLAGS_TF;
6766         kvm_x86_ops->set_rflags(vcpu, rflags);
6767         kvm_make_request(KVM_REQ_EVENT, vcpu);
6768 }
6769 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6770
6771 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6772 {
6773         int r;
6774
6775         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6776               is_error_page(work->page))
6777                 return;
6778
6779         r = kvm_mmu_reload(vcpu);
6780         if (unlikely(r))
6781                 return;
6782
6783         if (!vcpu->arch.mmu.direct_map &&
6784               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6785                 return;
6786
6787         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6788 }
6789
6790 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6791 {
6792         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6793 }
6794
6795 static inline u32 kvm_async_pf_next_probe(u32 key)
6796 {
6797         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6798 }
6799
6800 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6801 {
6802         u32 key = kvm_async_pf_hash_fn(gfn);
6803
6804         while (vcpu->arch.apf.gfns[key] != ~0)
6805                 key = kvm_async_pf_next_probe(key);
6806
6807         vcpu->arch.apf.gfns[key] = gfn;
6808 }
6809
6810 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6811 {
6812         int i;
6813         u32 key = kvm_async_pf_hash_fn(gfn);
6814
6815         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6816                      (vcpu->arch.apf.gfns[key] != gfn &&
6817                       vcpu->arch.apf.gfns[key] != ~0); i++)
6818                 key = kvm_async_pf_next_probe(key);
6819
6820         return key;
6821 }
6822
6823 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6824 {
6825         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6826 }
6827
6828 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6829 {
6830         u32 i, j, k;
6831
6832         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6833         while (true) {
6834                 vcpu->arch.apf.gfns[i] = ~0;
6835                 do {
6836                         j = kvm_async_pf_next_probe(j);
6837                         if (vcpu->arch.apf.gfns[j] == ~0)
6838                                 return;
6839                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6840                         /*
6841                          * k lies cyclically in ]i,j]
6842                          * |    i.k.j |
6843                          * |....j i.k.| or  |.k..j i...|
6844                          */
6845                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6846                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6847                 i = j;
6848         }
6849 }
6850
6851 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6852 {
6853
6854         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6855                                       sizeof(val));
6856 }
6857
6858 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6859                                      struct kvm_async_pf *work)
6860 {
6861         struct x86_exception fault;
6862
6863         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6864         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6865
6866         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6867             (vcpu->arch.apf.send_user_only &&
6868              kvm_x86_ops->get_cpl(vcpu) == 0))
6869                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6870         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6871                 fault.vector = PF_VECTOR;
6872                 fault.error_code_valid = true;
6873                 fault.error_code = 0;
6874                 fault.nested_page_fault = false;
6875                 fault.address = work->arch.token;
6876                 kvm_inject_page_fault(vcpu, &fault);
6877         }
6878 }
6879
6880 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6881                                  struct kvm_async_pf *work)
6882 {
6883         struct x86_exception fault;
6884
6885         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6886         if (is_error_page(work->page))
6887                 work->arch.token = ~0; /* broadcast wakeup */
6888         else
6889                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6890
6891         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6892             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6893                 fault.vector = PF_VECTOR;
6894                 fault.error_code_valid = true;
6895                 fault.error_code = 0;
6896                 fault.nested_page_fault = false;
6897                 fault.address = work->arch.token;
6898                 kvm_inject_page_fault(vcpu, &fault);
6899         }
6900         vcpu->arch.apf.halted = false;
6901 }
6902
6903 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6904 {
6905         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6906                 return true;
6907         else
6908                 return !kvm_event_needs_reinjection(vcpu) &&
6909                         kvm_x86_ops->interrupt_allowed(vcpu);
6910 }
6911
6912 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);