arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  94                                     struct kvm_cpuid_entry2 __user *entries);
  95
  96 struct kvm_x86_ops *kvm_x86_ops;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 int ignore_msrs = 0;
 100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 #define KVM_NR_SHARED_MSRS 16
 103
 104 struct kvm_shared_msrs_global {
 105         int nr;
 106         u32 msrs[KVM_NR_SHARED_MSRS];
 107 };
 108
 109 struct kvm_shared_msrs {
 110         struct user_return_notifier urn;
 111         bool registered;
 112         struct kvm_shared_msr_values {
 113                 u64 host;
 114                 u64 curr;
 115         } values[KVM_NR_SHARED_MSRS];
 116 };
 117
 118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 120
 121 struct kvm_stats_debugfs_item debugfs_entries[] = {
 122         { "pf_fixed", VCPU_STAT(pf_fixed) },
 123         { "pf_guest", VCPU_STAT(pf_guest) },
 124         { "tlb_flush", VCPU_STAT(tlb_flush) },
 125         { "invlpg", VCPU_STAT(invlpg) },
 126         { "exits", VCPU_STAT(exits) },
 127         { "io_exits", VCPU_STAT(io_exits) },
 128         { "mmio_exits", VCPU_STAT(mmio_exits) },
 129         { "signal_exits", VCPU_STAT(signal_exits) },
 130         { "irq_window", VCPU_STAT(irq_window_exits) },
 131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 132         { "halt_exits", VCPU_STAT(halt_exits) },
 133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 134         { "hypercalls", VCPU_STAT(hypercalls) },
 135         { "request_irq", VCPU_STAT(request_irq_exits) },
 136         { "irq_exits", VCPU_STAT(irq_exits) },
 137         { "host_state_reload", VCPU_STAT(host_state_reload) },
 138         { "efer_reload", VCPU_STAT(efer_reload) },
 139         { "fpu_reload", VCPU_STAT(fpu_reload) },
 140         { "insn_emulation", VCPU_STAT(insn_emulation) },
 141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 142         { "irq_injections", VCPU_STAT(irq_injections) },
 143         { "nmi_injections", VCPU_STAT(nmi_injections) },
 144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 148         { "mmu_flooded", VM_STAT(mmu_flooded) },
 149         { "mmu_recycled", VM_STAT(mmu_recycled) },
 150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 151         { "mmu_unsync", VM_STAT(mmu_unsync) },
 152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 153         { "largepages", VM_STAT(lpages) },
 154         { NULL }
 155 };
 156
 157 u64 __read_mostly host_xcr0;
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 338 {
 339         ++vcpu->stat.pf_guest;
 340         vcpu->arch.cr2 = fault->address;
 341         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 342 }
 343
 344 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 347                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 348         else
 349                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 350 }
 351
 352 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 353 {
 354         kvm_make_request(KVM_REQ_EVENT, vcpu);
 355         vcpu->arch.nmi_pending = 1;
 356 }
 357 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 358
 359 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 360 {
 361         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 362 }
 363 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 364
 365 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 366 {
 367         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 368 }
 369 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 370
 371 /*
 372  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 373  * a #GP and return false.
 374  */
 375 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 376 {
 377         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 378                 return true;
 379         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 380         return false;
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 383
 384 /*
 385  * This function will be used to read from the physical memory of the currently
 386  * running guest. The difference to kvm_read_guest_page is that this function
 387  * can read from guest physical or from the guest's guest physical memory.
 388  */
 389 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 390                             gfn_t ngfn, void *data, int offset, int len,
 391                             u32 access)
 392 {
 393         gfn_t real_gfn;
 394         gpa_t ngpa;
 395
 396         ngpa     = gfn_to_gpa(ngfn);
 397         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 398         if (real_gfn == UNMAPPED_GVA)
 399                 return -EFAULT;
 400
 401         real_gfn = gpa_to_gfn(real_gfn);
 402
 403         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 406
 407 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 408                                void *data, int offset, int len, u32 access)
 409 {
 410         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 411                                        data, offset, len, access);
 412 }
 413
 414 /*
 415  * Load the pae pdptrs.  Return true is they are all valid.
 416  */
 417 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 418 {
 419         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 420         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 421         int i;
 422         int ret;
 423         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 424
 425         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 426                                       offset * sizeof(u64), sizeof(pdpte),
 427                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 428         if (ret < 0) {
 429                 ret = 0;
 430                 goto out;
 431         }
 432         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 433                 if (is_present_gpte(pdpte[i]) &&
 434                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 435                         ret = 0;
 436                         goto out;
 437                 }
 438         }
 439         ret = 1;
 440
 441         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 442         __set_bit(VCPU_EXREG_PDPTR,
 443                   (unsigned long *)&vcpu->arch.regs_avail);
 444         __set_bit(VCPU_EXREG_PDPTR,
 445                   (unsigned long *)&vcpu->arch.regs_dirty);
 446 out:
 447
 448         return ret;
 449 }
 450 EXPORT_SYMBOL_GPL(load_pdptrs);
 451
 452 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 453 {
 454         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 455         bool changed = true;
 456         int offset;
 457         gfn_t gfn;
 458         int r;
 459
 460         if (is_long_mode(vcpu) || !is_pae(vcpu))
 461                 return false;
 462
 463         if (!test_bit(VCPU_EXREG_PDPTR,
 464                       (unsigned long *)&vcpu->arch.regs_avail))
 465                 return true;
 466
 467         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 468         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 469         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 470                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 471         if (r < 0)
 472                 goto out;
 473         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 474 out:
 475
 476         return changed;
 477 }
 478
 479 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 480 {
 481         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 482         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 483                                     X86_CR0_CD | X86_CR0_NW;
 484
 485         cr0 |= X86_CR0_ET;
 486
 487 #ifdef CONFIG_X86_64
 488         if (cr0 & 0xffffffff00000000UL)
 489                 return 1;
 490 #endif
 491
 492         cr0 &= ~CR0_RESERVED_BITS;
 493
 494         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 495                 return 1;
 496
 497         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 498                 return 1;
 499
 500         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 501 #ifdef CONFIG_X86_64
 502                 if ((vcpu->arch.efer & EFER_LME)) {
 503                         int cs_db, cs_l;
 504
 505                         if (!is_pae(vcpu))
 506                                 return 1;
 507                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 508                         if (cs_l)
 509                                 return 1;
 510                 } else
 511 #endif
 512                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 513                                                  vcpu->arch.cr3))
 514                         return 1;
 515         }
 516
 517         kvm_x86_ops->set_cr0(vcpu, cr0);
 518
 519         if ((cr0 ^ old_cr0) & X86_CR0_PG)
 520                 kvm_clear_async_pf_completion_queue(vcpu);
 521
 522         if ((cr0 ^ old_cr0) & update_bits)
 523                 kvm_mmu_reset_context(vcpu);
 524         return 0;
 525 }
 526 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 527
 528 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 529 {
 530         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_lmsw);
 533
 534 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 535 {
 536         u64 xcr0;
 537
 538         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 539         if (index != XCR_XFEATURE_ENABLED_MASK)
 540                 return 1;
 541         xcr0 = xcr;
 542         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 543                 return 1;
 544         if (!(xcr0 & XSTATE_FP))
 545                 return 1;
 546         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 547                 return 1;
 548         if (xcr0 & ~host_xcr0)
 549                 return 1;
 550         vcpu->arch.xcr0 = xcr0;
 551         vcpu->guest_xcr0_loaded = 0;
 552         return 0;
 553 }
 554
 555 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 556 {
 557         if (__kvm_set_xcr(vcpu, index, xcr)) {
 558                 kvm_inject_gp(vcpu, 0);
 559                 return 1;
 560         }
 561         return 0;
 562 }
 563 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 564
 565 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 566 {
 567         struct kvm_cpuid_entry2 *best;
 568
 569         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 570         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 571 }
 572
 573 static void update_cpuid(struct kvm_vcpu *vcpu)
 574 {
 575         struct kvm_cpuid_entry2 *best;
 576
 577         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 578         if (!best)
 579                 return;
 580
 581         /* Update OSXSAVE bit */
 582         if (cpu_has_xsave && best->function == 0x1) {
 583                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 584                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 585                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 586         }
 587 }
 588
 589 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 590 {
 591         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 592         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 593
 594         if (cr4 & CR4_RESERVED_BITS)
 595                 return 1;
 596
 597         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 598                 return 1;
 599
 600         if (is_long_mode(vcpu)) {
 601                 if (!(cr4 & X86_CR4_PAE))
 602                         return 1;
 603         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 604                    && ((cr4 ^ old_cr4) & pdptr_bits)
 605                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 606                 return 1;
 607
 608         if (cr4 & X86_CR4_VMXE)
 609                 return 1;
 610
 611         kvm_x86_ops->set_cr4(vcpu, cr4);
 612
 613         if ((cr4 ^ old_cr4) & pdptr_bits)
 614                 kvm_mmu_reset_context(vcpu);
 615
 616         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 617                 update_cpuid(vcpu);
 618
 619         return 0;
 620 }
 621 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 622
 623 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 624 {
 625         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 626                 kvm_mmu_sync_roots(vcpu);
 627                 kvm_mmu_flush_tlb(vcpu);
 628                 return 0;
 629         }
 630
 631         if (is_long_mode(vcpu)) {
 632                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 633                         return 1;
 634         } else {
 635                 if (is_pae(vcpu)) {
 636                         if (cr3 & CR3_PAE_RESERVED_BITS)
 637                                 return 1;
 638                         if (is_paging(vcpu) &&
 639                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 640                                 return 1;
 641                 }
 642                 /*
 643                  * We don't check reserved bits in nonpae mode, because
 644                  * this isn't enforced, and VMware depends on this.
 645                  */
 646         }
 647
 648         /*
 649          * Does the new cr3 value map to physical memory? (Note, we
 650          * catch an invalid cr3 even in real-mode, because it would
 651          * cause trouble later on when we turn on paging anyway.)
 652          *
 653          * A real CPU would silently accept an invalid cr3 and would
 654          * attempt to use it - with largely undefined (and often hard
 655          * to debug) behavior on the guest side.
 656          */
 657         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 658                 return 1;
 659         vcpu->arch.cr3 = cr3;
 660         vcpu->arch.mmu.new_cr3(vcpu);
 661         return 0;
 662 }
 663 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 664
 665 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 666 {
 667         if (cr8 & CR8_RESERVED_BITS)
 668                 return 1;
 669         if (irqchip_in_kernel(vcpu->kvm))
 670                 kvm_lapic_set_tpr(vcpu, cr8);
 671         else
 672                 vcpu->arch.cr8 = cr8;
 673         return 0;
 674 }
 675
 676 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 677 {
 678         if (__kvm_set_cr8(vcpu, cr8))
 679                 kvm_inject_gp(vcpu, 0);
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 682
 683 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 684 {
 685         if (irqchip_in_kernel(vcpu->kvm))
 686                 return kvm_lapic_get_cr8(vcpu);
 687         else
 688                 return vcpu->arch.cr8;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 691
 692 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 693 {
 694         switch (dr) {
 695         case 0 ... 3:
 696                 vcpu->arch.db[dr] = val;
 697                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 698                         vcpu->arch.eff_db[dr] = val;
 699                 break;
 700         case 4:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         case 6:
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 708                 break;
 709         case 5:
 710                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 711                         return 1; /* #UD */
 712                 /* fall through */
 713         default: /* 7 */
 714                 if (val & 0xffffffff00000000ULL)
 715                         return -1; /* #GP */
 716                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 717                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 718                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 719                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 720                 }
 721                 break;
 722         }
 723
 724         return 0;
 725 }
 726
 727 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 728 {
 729         int res;
 730
 731         res = __kvm_set_dr(vcpu, dr, val);
 732         if (res > 0)
 733                 kvm_queue_exception(vcpu, UD_VECTOR);
 734         else if (res < 0)
 735                 kvm_inject_gp(vcpu, 0);
 736
 737         return res;
 738 }
 739 EXPORT_SYMBOL_GPL(kvm_set_dr);
 740
 741 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 742 {
 743         switch (dr) {
 744         case 0 ... 3:
 745                 *val = vcpu->arch.db[dr];
 746                 break;
 747         case 4:
 748                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 749                         return 1;
 750                 /* fall through */
 751         case 6:
 752                 *val = vcpu->arch.dr6;
 753                 break;
 754         case 5:
 755                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 756                         return 1;
 757                 /* fall through */
 758         default: /* 7 */
 759                 *val = vcpu->arch.dr7;
 760                 break;
 761         }
 762
 763         return 0;
 764 }
 765
 766 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 767 {
 768         if (_kvm_get_dr(vcpu, dr, val)) {
 769                 kvm_queue_exception(vcpu, UD_VECTOR);
 770                 return 1;
 771         }
 772         return 0;
 773 }
 774 EXPORT_SYMBOL_GPL(kvm_get_dr);
 775
 776 /*
 777  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 778  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 779  *
 780  * This list is modified at module load time to reflect the
 781  * capabilities of the host cpu. This capabilities test skips MSRs that are
 782  * kvm-specific. Those are put in the beginning of the list.
 783  */
 784
 785 #define KVM_SAVE_MSRS_BEGIN     8
 786 static u32 msrs_to_save[] = {
 787         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 788         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 789         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 790         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 791         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 792         MSR_STAR,
 793 #ifdef CONFIG_X86_64
 794         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 795 #endif
 796         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 797 };
 798
 799 static unsigned num_msrs_to_save;
 800
 801 static u32 emulated_msrs[] = {
 802         MSR_IA32_MISC_ENABLE,
 803         MSR_IA32_MCG_STATUS,
 804         MSR_IA32_MCG_CTL,
 805 };
 806
 807 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 808 {
 809         u64 old_efer = vcpu->arch.efer;
 810
 811         if (efer & efer_reserved_bits)
 812                 return 1;
 813
 814         if (is_paging(vcpu)
 815             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 816                 return 1;
 817
 818         if (efer & EFER_FFXSR) {
 819                 struct kvm_cpuid_entry2 *feat;
 820
 821                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 822                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 823                         return 1;
 824         }
 825
 826         if (efer & EFER_SVME) {
 827                 struct kvm_cpuid_entry2 *feat;
 828
 829                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 830                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 831                         return 1;
 832         }
 833
 834         efer &= ~EFER_LMA;
 835         efer |= vcpu->arch.efer & EFER_LMA;
 836
 837         kvm_x86_ops->set_efer(vcpu, efer);
 838
 839         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 840
 841         /* Update reserved bits */
 842         if ((efer ^ old_efer) & EFER_NX)
 843                 kvm_mmu_reset_context(vcpu);
 844
 845         return 0;
 846 }
 847
 848 void kvm_enable_efer_bits(u64 mask)
 849 {
 850        efer_reserved_bits &= ~mask;
 851 }
 852 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 853
 854
 855 /*
 856  * Writes msr value into into the appropriate "register".
 857  * Returns 0 on success, non-0 otherwise.
 858  * Assumes vcpu_load() was already called.
 859  */
 860 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 861 {
 862         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 863 }
 864
 865 /*
 866  * Adapt set_msr() to msr_io()'s calling convention
 867  */
 868 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 869 {
 870         return kvm_set_msr(vcpu, index, *data);
 871 }
 872
 873 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 874 {
 875         int version;
 876         int r;
 877         struct pvclock_wall_clock wc;
 878         struct timespec boot;
 879
 880         if (!wall_clock)
 881                 return;
 882
 883         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 884         if (r)
 885                 return;
 886
 887         if (version & 1)
 888                 ++version;  /* first time write, random junk */
 889
 890         ++version;
 891
 892         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 893
 894         /*
 895          * The guest calculates current wall clock time by adding
 896          * system time (updated by kvm_guest_time_update below) to the
 897          * wall clock specified here.  guest system time equals host
 898          * system time for us, thus we must fill in host boot time here.
 899          */
 900         getboottime(&boot);
 901
 902         wc.sec = boot.tv_sec;
 903         wc.nsec = boot.tv_nsec;
 904         wc.version = version;
 905
 906         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 907
 908         version++;
 909         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 910 }
 911
 912 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 913 {
 914         uint32_t quotient, remainder;
 915
 916         /* Don't try to replace with do_div(), this one calculates
 917          * "(dividend << 32) / divisor" */
 918         __asm__ ( "divl %4"
 919                   : "=a" (quotient), "=d" (remainder)
 920                   : "0" (0), "1" (dividend), "r" (divisor) );
 921         return quotient;
 922 }
 923
 924 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 925                                s8 *pshift, u32 *pmultiplier)
 926 {
 927         uint64_t scaled64;
 928         int32_t  shift = 0;
 929         uint64_t tps64;
 930         uint32_t tps32;
 931
 932         tps64 = base_khz * 1000LL;
 933         scaled64 = scaled_khz * 1000LL;
 934         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 935                 tps64 >>= 1;
 936                 shift--;
 937         }
 938
 939         tps32 = (uint32_t)tps64;
 940         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 941                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 942                         scaled64 >>= 1;
 943                 else
 944                         tps32 <<= 1;
 945                 shift++;
 946         }
 947
 948         *pshift = shift;
 949         *pmultiplier = div_frac(scaled64, tps32);
 950
 951         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 952                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 953 }
 954
 955 static inline u64 get_kernel_ns(void)
 956 {
 957         struct timespec ts;
 958
 959         WARN_ON(preemptible());
 960         ktime_get_ts(&ts);
 961         monotonic_to_bootbased(&ts);
 962         return timespec_to_ns(&ts);
 963 }
 964
 965 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 966 unsigned long max_tsc_khz;
 967
 968 static inline int kvm_tsc_changes_freq(void)
 969 {
 970         int cpu = get_cpu();
 971         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 972                   cpufreq_quick_get(cpu) != 0;
 973         put_cpu();
 974         return ret;
 975 }
 976
 977 static inline u64 nsec_to_cycles(u64 nsec)
 978 {
 979         u64 ret;
 980
 981         WARN_ON(preemptible());
 982         if (kvm_tsc_changes_freq())
 983                 printk_once(KERN_WARNING
 984                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 985         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 986         do_div(ret, USEC_PER_SEC);
 987         return ret;
 988 }
 989
 990 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 991 {
 992         /* Compute a scale to convert nanoseconds in TSC cycles */
 993         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 994                            &kvm->arch.virtual_tsc_shift,
 995                            &kvm->arch.virtual_tsc_mult);
 996         kvm->arch.virtual_tsc_khz = this_tsc_khz;
 997 }
 998
 999 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1000 {
1001         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1002                                       vcpu->kvm->arch.virtual_tsc_mult,
1003                                       vcpu->kvm->arch.virtual_tsc_shift);
1004         tsc += vcpu->arch.last_tsc_write;
1005         return tsc;
1006 }
1007
1008 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1009 {
1010         struct kvm *kvm = vcpu->kvm;
1011         u64 offset, ns, elapsed;
1012         unsigned long flags;
1013         s64 sdiff;
1014
1015         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1016         offset = data - native_read_tsc();
1017         ns = get_kernel_ns();
1018         elapsed = ns - kvm->arch.last_tsc_nsec;
1019         sdiff = data - kvm->arch.last_tsc_write;
1020         if (sdiff < 0)
1021                 sdiff = -sdiff;
1022
1023         /*
1024          * Special case: close write to TSC within 5 seconds of
1025          * another CPU is interpreted as an attempt to synchronize
1026          * The 5 seconds is to accomodate host load / swapping as
1027          * well as any reset of TSC during the boot process.
1028          *
1029          * In that case, for a reliable TSC, we can match TSC offsets,
1030          * or make a best guest using elapsed value.
1031          */
1032         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1033             elapsed < 5ULL * NSEC_PER_SEC) {
1034                 if (!check_tsc_unstable()) {
1035                         offset = kvm->arch.last_tsc_offset;
1036                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1037                 } else {
1038                         u64 delta = nsec_to_cycles(elapsed);
1039                         offset += delta;
1040                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1041                 }
1042                 ns = kvm->arch.last_tsc_nsec;
1043         }
1044         kvm->arch.last_tsc_nsec = ns;
1045         kvm->arch.last_tsc_write = data;
1046         kvm->arch.last_tsc_offset = offset;
1047         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1048         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1049
1050         /* Reset of TSC must disable overshoot protection below */
1051         vcpu->arch.hv_clock.tsc_timestamp = 0;
1052         vcpu->arch.last_tsc_write = data;
1053         vcpu->arch.last_tsc_nsec = ns;
1054 }
1055 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1056
1057 static int kvm_guest_time_update(struct kvm_vcpu *v)
1058 {
1059         unsigned long flags;
1060         struct kvm_vcpu_arch *vcpu = &v->arch;
1061         void *shared_kaddr;
1062         unsigned long this_tsc_khz;
1063         s64 kernel_ns, max_kernel_ns;
1064         u64 tsc_timestamp;
1065
1066         /* Keep irq disabled to prevent changes to the clock */
1067         local_irq_save(flags);
1068         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1069         kernel_ns = get_kernel_ns();
1070         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1071
1072         if (unlikely(this_tsc_khz == 0)) {
1073                 local_irq_restore(flags);
1074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1075                 return 1;
1076         }
1077
1078         /*
1079          * We may have to catch up the TSC to match elapsed wall clock
1080          * time for two reasons, even if kvmclock is used.
1081          *   1) CPU could have been running below the maximum TSC rate
1082          *   2) Broken TSC compensation resets the base at each VCPU
1083          *      entry to avoid unknown leaps of TSC even when running
1084          *      again on the same CPU.  This may cause apparent elapsed
1085          *      time to disappear, and the guest to stand still or run
1086          *      very slowly.
1087          */
1088         if (vcpu->tsc_catchup) {
1089                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1090                 if (tsc > tsc_timestamp) {
1091                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1092                         tsc_timestamp = tsc;
1093                 }
1094         }
1095
1096         local_irq_restore(flags);
1097
1098         if (!vcpu->time_page)
1099                 return 0;
1100
1101         /*
1102          * Time as measured by the TSC may go backwards when resetting the base
1103          * tsc_timestamp.  The reason for this is that the TSC resolution is
1104          * higher than the resolution of the other clock scales.  Thus, many
1105          * possible measurments of the TSC correspond to one measurement of any
1106          * other clock, and so a spread of values is possible.  This is not a
1107          * problem for the computation of the nanosecond clock; with TSC rates
1108          * around 1GHZ, there can only be a few cycles which correspond to one
1109          * nanosecond value, and any path through this code will inevitably
1110          * take longer than that.  However, with the kernel_ns value itself,
1111          * the precision may be much lower, down to HZ granularity.  If the
1112          * first sampling of TSC against kernel_ns ends in the low part of the
1113          * range, and the second in the high end of the range, we can get:
1114          *
1115          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1116          *
1117          * As the sampling errors potentially range in the thousands of cycles,
1118          * it is possible such a time value has already been observed by the
1119          * guest.  To protect against this, we must compute the system time as
1120          * observed by the guest and ensure the new system time is greater.
1121          */
1122         max_kernel_ns = 0;
1123         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1124                 max_kernel_ns = vcpu->last_guest_tsc -
1125                                 vcpu->hv_clock.tsc_timestamp;
1126                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1127                                     vcpu->hv_clock.tsc_to_system_mul,
1128                                     vcpu->hv_clock.tsc_shift);
1129                 max_kernel_ns += vcpu->last_kernel_ns;
1130         }
1131
1132         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1133                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1134                                    &vcpu->hv_clock.tsc_shift,
1135                                    &vcpu->hv_clock.tsc_to_system_mul);
1136                 vcpu->hw_tsc_khz = this_tsc_khz;
1137         }
1138
1139         if (max_kernel_ns > kernel_ns)
1140                 kernel_ns = max_kernel_ns;
1141
1142         /* With all the info we got, fill in the values */
1143         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1144         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1145         vcpu->last_kernel_ns = kernel_ns;
1146         vcpu->last_guest_tsc = tsc_timestamp;
1147         vcpu->hv_clock.flags = 0;
1148
1149         /*
1150          * The interface expects us to write an even number signaling that the
1151          * update is finished. Since the guest won't see the intermediate
1152          * state, we just increase by 2 at the end.
1153          */
1154         vcpu->hv_clock.version += 2;
1155
1156         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1157
1158         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1159                sizeof(vcpu->hv_clock));
1160
1161         kunmap_atomic(shared_kaddr, KM_USER0);
1162
1163         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1164         return 0;
1165 }
1166
1167 static bool msr_mtrr_valid(unsigned msr)
1168 {
1169         switch (msr) {
1170         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1171         case MSR_MTRRfix64K_00000:
1172         case MSR_MTRRfix16K_80000:
1173         case MSR_MTRRfix16K_A0000:
1174         case MSR_MTRRfix4K_C0000:
1175         case MSR_MTRRfix4K_C8000:
1176         case MSR_MTRRfix4K_D0000:
1177         case MSR_MTRRfix4K_D8000:
1178         case MSR_MTRRfix4K_E0000:
1179         case MSR_MTRRfix4K_E8000:
1180         case MSR_MTRRfix4K_F0000:
1181         case MSR_MTRRfix4K_F8000:
1182         case MSR_MTRRdefType:
1183         case MSR_IA32_CR_PAT:
1184                 return true;
1185         case 0x2f8:
1186                 return true;
1187         }
1188         return false;
1189 }
1190
1191 static bool valid_pat_type(unsigned t)
1192 {
1193         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1194 }
1195
1196 static bool valid_mtrr_type(unsigned t)
1197 {
1198         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1199 }
1200
1201 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1202 {
1203         int i;
1204
1205         if (!msr_mtrr_valid(msr))
1206                 return false;
1207
1208         if (msr == MSR_IA32_CR_PAT) {
1209                 for (i = 0; i < 8; i++)
1210                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1211                                 return false;
1212                 return true;
1213         } else if (msr == MSR_MTRRdefType) {
1214                 if (data & ~0xcff)
1215                         return false;
1216                 return valid_mtrr_type(data & 0xff);
1217         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1218                 for (i = 0; i < 8 ; i++)
1219                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         }
1223
1224         /* variable MTRRs */
1225         return valid_mtrr_type(data & 0xff);
1226 }
1227
1228 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1229 {
1230         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1231
1232         if (!mtrr_valid(vcpu, msr, data))
1233                 return 1;
1234
1235         if (msr == MSR_MTRRdefType) {
1236                 vcpu->arch.mtrr_state.def_type = data;
1237                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1238         } else if (msr == MSR_MTRRfix64K_00000)
1239                 p[0] = data;
1240         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1241                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1242         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1243                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1244         else if (msr == MSR_IA32_CR_PAT)
1245                 vcpu->arch.pat = data;
1246         else {  /* Variable MTRRs */
1247                 int idx, is_mtrr_mask;
1248                 u64 *pt;
1249
1250                 idx = (msr - 0x200) / 2;
1251                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1252                 if (!is_mtrr_mask)
1253                         pt =
1254                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1255                 else
1256                         pt =
1257                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1258                 *pt = data;
1259         }
1260
1261         kvm_mmu_reset_context(vcpu);
1262         return 0;
1263 }
1264
1265 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1266 {
1267         u64 mcg_cap = vcpu->arch.mcg_cap;
1268         unsigned bank_num = mcg_cap & 0xff;
1269
1270         switch (msr) {
1271         case MSR_IA32_MCG_STATUS:
1272                 vcpu->arch.mcg_status = data;
1273                 break;
1274         case MSR_IA32_MCG_CTL:
1275                 if (!(mcg_cap & MCG_CTL_P))
1276                         return 1;
1277                 if (data != 0 && data != ~(u64)0)
1278                         return -1;
1279                 vcpu->arch.mcg_ctl = data;
1280                 break;
1281         default:
1282                 if (msr >= MSR_IA32_MC0_CTL &&
1283                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1284                         u32 offset = msr - MSR_IA32_MC0_CTL;
1285                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1286                          * some Linux kernels though clear bit 10 in bank 4 to
1287                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1288                          * this to avoid an uncatched #GP in the guest
1289                          */
1290                         if ((offset & 0x3) == 0 &&
1291                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1292                                 return -1;
1293                         vcpu->arch.mce_banks[offset] = data;
1294                         break;
1295                 }
1296                 return 1;
1297         }
1298         return 0;
1299 }
1300
1301 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1302 {
1303         struct kvm *kvm = vcpu->kvm;
1304         int lm = is_long_mode(vcpu);
1305         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1306                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1307         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1308                 : kvm->arch.xen_hvm_config.blob_size_32;
1309         u32 page_num = data & ~PAGE_MASK;
1310         u64 page_addr = data & PAGE_MASK;
1311         u8 *page;
1312         int r;
1313
1314         r = -E2BIG;
1315         if (page_num >= blob_size)
1316                 goto out;
1317         r = -ENOMEM;
1318         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1319         if (!page)
1320                 goto out;
1321         r = -EFAULT;
1322         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1323                 goto out_free;
1324         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1325                 goto out_free;
1326         r = 0;
1327 out_free:
1328         kfree(page);
1329 out:
1330         return r;
1331 }
1332
1333 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1334 {
1335         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1336 }
1337
1338 static bool kvm_hv_msr_partition_wide(u32 msr)
1339 {
1340         bool r = false;
1341         switch (msr) {
1342         case HV_X64_MSR_GUEST_OS_ID:
1343         case HV_X64_MSR_HYPERCALL:
1344                 r = true;
1345                 break;
1346         }
1347
1348         return r;
1349 }
1350
1351 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1352 {
1353         struct kvm *kvm = vcpu->kvm;
1354
1355         switch (msr) {
1356         case HV_X64_MSR_GUEST_OS_ID:
1357                 kvm->arch.hv_guest_os_id = data;
1358                 /* setting guest os id to zero disables hypercall page */
1359                 if (!kvm->arch.hv_guest_os_id)
1360                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1361                 break;
1362         case HV_X64_MSR_HYPERCALL: {
1363                 u64 gfn;
1364                 unsigned long addr;
1365                 u8 instructions[4];
1366
1367                 /* if guest os id is not set hypercall should remain disabled */
1368                 if (!kvm->arch.hv_guest_os_id)
1369                         break;
1370                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1371                         kvm->arch.hv_hypercall = data;
1372                         break;
1373                 }
1374                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1375                 addr = gfn_to_hva(kvm, gfn);
1376                 if (kvm_is_error_hva(addr))
1377                         return 1;
1378                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1379                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1380                 if (copy_to_user((void __user *)addr, instructions, 4))
1381                         return 1;
1382                 kvm->arch.hv_hypercall = data;
1383                 break;
1384         }
1385         default:
1386                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1387                           "data 0x%llx\n", msr, data);
1388                 return 1;
1389         }
1390         return 0;
1391 }
1392
1393 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1394 {
1395         switch (msr) {
1396         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1397                 unsigned long addr;
1398
1399                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1400                         vcpu->arch.hv_vapic = data;
1401                         break;
1402                 }
1403                 addr = gfn_to_hva(vcpu->kvm, data >>
1404                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1405                 if (kvm_is_error_hva(addr))
1406                         return 1;
1407                 if (clear_user((void __user *)addr, PAGE_SIZE))
1408                         return 1;
1409                 vcpu->arch.hv_vapic = data;
1410                 break;
1411         }
1412         case HV_X64_MSR_EOI:
1413                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1414         case HV_X64_MSR_ICR:
1415                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1416         case HV_X64_MSR_TPR:
1417                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1418         default:
1419                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1420                           "data 0x%llx\n", msr, data);
1421                 return 1;
1422         }
1423
1424         return 0;
1425 }
1426
1427 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1428 {
1429         gpa_t gpa = data & ~0x3f;
1430
1431         /* Bits 2:5 are resrved, Should be zero */
1432         if (data & 0x3c)
1433                 return 1;
1434
1435         vcpu->arch.apf.msr_val = data;
1436
1437         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1438                 kvm_clear_async_pf_completion_queue(vcpu);
1439                 kvm_async_pf_hash_reset(vcpu);
1440                 return 0;
1441         }
1442
1443         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1444                 return 1;
1445
1446         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1447         kvm_async_pf_wakeup_all(vcpu);
1448         return 0;
1449 }
1450
1451 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1452 {
1453         switch (msr) {
1454         case MSR_EFER:
1455                 return set_efer(vcpu, data);
1456         case MSR_K7_HWCR:
1457                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1458                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1459                 if (data != 0) {
1460                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1461                                 data);
1462                         return 1;
1463                 }
1464                 break;
1465         case MSR_FAM10H_MMIO_CONF_BASE:
1466                 if (data != 0) {
1467                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1468                                 "0x%llx\n", data);
1469                         return 1;
1470                 }
1471                 break;
1472         case MSR_AMD64_NB_CFG:
1473                 break;
1474         case MSR_IA32_DEBUGCTLMSR:
1475                 if (!data) {
1476                         /* We support the non-activated case already */
1477                         break;
1478                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1479                         /* Values other than LBR and BTF are vendor-specific,
1480                            thus reserved and should throw a #GP */
1481                         return 1;
1482                 }
1483                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1484                         __func__, data);
1485                 break;
1486         case MSR_IA32_UCODE_REV:
1487         case MSR_IA32_UCODE_WRITE:
1488         case MSR_VM_HSAVE_PA:
1489         case MSR_AMD64_PATCH_LOADER:
1490                 break;
1491         case 0x200 ... 0x2ff:
1492                 return set_msr_mtrr(vcpu, msr, data);
1493         case MSR_IA32_APICBASE:
1494                 kvm_set_apic_base(vcpu, data);
1495                 break;
1496         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1497                 return kvm_x2apic_msr_write(vcpu, msr, data);
1498         case MSR_IA32_MISC_ENABLE:
1499                 vcpu->arch.ia32_misc_enable_msr = data;
1500                 break;
1501         case MSR_KVM_WALL_CLOCK_NEW:
1502         case MSR_KVM_WALL_CLOCK:
1503                 vcpu->kvm->arch.wall_clock = data;
1504                 kvm_write_wall_clock(vcpu->kvm, data);
1505                 break;
1506         case MSR_KVM_SYSTEM_TIME_NEW:
1507         case MSR_KVM_SYSTEM_TIME: {
1508                 if (vcpu->arch.time_page) {
1509                         kvm_release_page_dirty(vcpu->arch.time_page);
1510                         vcpu->arch.time_page = NULL;
1511                 }
1512
1513                 vcpu->arch.time = data;
1514                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1515
1516                 /* we verify if the enable bit is set... */
1517                 if (!(data & 1))
1518                         break;
1519
1520                 /* ...but clean it before doing the actual write */
1521                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1522
1523                 vcpu->arch.time_page =
1524                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1525
1526                 if (is_error_page(vcpu->arch.time_page)) {
1527                         kvm_release_page_clean(vcpu->arch.time_page);
1528                         vcpu->arch.time_page = NULL;
1529                 }
1530                 break;
1531         }
1532         case MSR_KVM_ASYNC_PF_EN:
1533                 if (kvm_pv_enable_async_pf(vcpu, data))
1534                         return 1;
1535                 break;
1536         case MSR_IA32_MCG_CTL:
1537         case MSR_IA32_MCG_STATUS:
1538         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1539                 return set_msr_mce(vcpu, msr, data);
1540
1541         /* Performance counters are not protected by a CPUID bit,
1542          * so we should check all of them in the generic path for the sake of
1543          * cross vendor migration.
1544          * Writing a zero into the event select MSRs disables them,
1545          * which we perfectly emulate ;-). Any other value should be at least
1546          * reported, some guests depend on them.
1547          */
1548         case MSR_P6_EVNTSEL0:
1549         case MSR_P6_EVNTSEL1:
1550         case MSR_K7_EVNTSEL0:
1551         case MSR_K7_EVNTSEL1:
1552         case MSR_K7_EVNTSEL2:
1553         case MSR_K7_EVNTSEL3:
1554                 if (data != 0)
1555                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1556                                 "0x%x data 0x%llx\n", msr, data);
1557                 break;
1558         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1559          * so we ignore writes to make it happy.
1560          */
1561         case MSR_P6_PERFCTR0:
1562         case MSR_P6_PERFCTR1:
1563         case MSR_K7_PERFCTR0:
1564         case MSR_K7_PERFCTR1:
1565         case MSR_K7_PERFCTR2:
1566         case MSR_K7_PERFCTR3:
1567                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1568                         "0x%x data 0x%llx\n", msr, data);
1569                 break;
1570         case MSR_K7_CLK_CTL:
1571                 /*
1572                  * Ignore all writes to this no longer documented MSR.
1573                  * Writes are only relevant for old K7 processors,
1574                  * all pre-dating SVM, but a recommended workaround from
1575                  * AMD for these chips. It is possible to speicify the
1576                  * affected processor models on the command line, hence
1577                  * the need to ignore the workaround.
1578                  */
1579                 break;
1580         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1581                 if (kvm_hv_msr_partition_wide(msr)) {
1582                         int r;
1583                         mutex_lock(&vcpu->kvm->lock);
1584                         r = set_msr_hyperv_pw(vcpu, msr, data);
1585                         mutex_unlock(&vcpu->kvm->lock);
1586                         return r;
1587                 } else
1588                         return set_msr_hyperv(vcpu, msr, data);
1589                 break;
1590         default:
1591                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1592                         return xen_hvm_config(vcpu, data);
1593                 if (!ignore_msrs) {
1594                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1595                                 msr, data);
1596                         return 1;
1597                 } else {
1598                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         break;
1601                 }
1602         }
1603         return 0;
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1606
1607
1608 /*
1609  * Reads an msr value (of 'msr_index') into 'pdata'.
1610  * Returns 0 on success, non-0 otherwise.
1611  * Assumes vcpu_load() was already called.
1612  */
1613 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1614 {
1615         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1616 }
1617
1618 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1619 {
1620         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1621
1622         if (!msr_mtrr_valid(msr))
1623                 return 1;
1624
1625         if (msr == MSR_MTRRdefType)
1626                 *pdata = vcpu->arch.mtrr_state.def_type +
1627                          (vcpu->arch.mtrr_state.enabled << 10);
1628         else if (msr == MSR_MTRRfix64K_00000)
1629                 *pdata = p[0];
1630         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1631                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1632         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1633                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1634         else if (msr == MSR_IA32_CR_PAT)
1635                 *pdata = vcpu->arch.pat;
1636         else {  /* Variable MTRRs */
1637                 int idx, is_mtrr_mask;
1638                 u64 *pt;
1639
1640                 idx = (msr - 0x200) / 2;
1641                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1642                 if (!is_mtrr_mask)
1643                         pt =
1644                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1645                 else
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1648                 *pdata = *pt;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1655 {
1656         u64 data;
1657         u64 mcg_cap = vcpu->arch.mcg_cap;
1658         unsigned bank_num = mcg_cap & 0xff;
1659
1660         switch (msr) {
1661         case MSR_IA32_P5_MC_ADDR:
1662         case MSR_IA32_P5_MC_TYPE:
1663                 data = 0;
1664                 break;
1665         case MSR_IA32_MCG_CAP:
1666                 data = vcpu->arch.mcg_cap;
1667                 break;
1668         case MSR_IA32_MCG_CTL:
1669                 if (!(mcg_cap & MCG_CTL_P))
1670                         return 1;
1671                 data = vcpu->arch.mcg_ctl;
1672                 break;
1673         case MSR_IA32_MCG_STATUS:
1674                 data = vcpu->arch.mcg_status;
1675                 break;
1676         default:
1677                 if (msr >= MSR_IA32_MC0_CTL &&
1678                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1679                         u32 offset = msr - MSR_IA32_MC0_CTL;
1680                         data = vcpu->arch.mce_banks[offset];
1681                         break;
1682                 }
1683                 return 1;
1684         }
1685         *pdata = data;
1686         return 0;
1687 }
1688
1689 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1690 {
1691         u64 data = 0;
1692         struct kvm *kvm = vcpu->kvm;
1693
1694         switch (msr) {
1695         case HV_X64_MSR_GUEST_OS_ID:
1696                 data = kvm->arch.hv_guest_os_id;
1697                 break;
1698         case HV_X64_MSR_HYPERCALL:
1699                 data = kvm->arch.hv_hypercall;
1700                 break;
1701         default:
1702                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1703                 return 1;
1704         }
1705
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data = 0;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_VP_INDEX: {
1716                 int r;
1717                 struct kvm_vcpu *v;
1718                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1719                         if (v == vcpu)
1720                                 data = r;
1721                 break;
1722         }
1723         case HV_X64_MSR_EOI:
1724                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1725         case HV_X64_MSR_ICR:
1726                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1727         case HV_X64_MSR_TPR:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1729         default:
1730                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1731                 return 1;
1732         }
1733         *pdata = data;
1734         return 0;
1735 }
1736
1737 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 data;
1740
1741         switch (msr) {
1742         case MSR_IA32_PLATFORM_ID:
1743         case MSR_IA32_UCODE_REV:
1744         case MSR_IA32_EBL_CR_POWERON:
1745         case MSR_IA32_DEBUGCTLMSR:
1746         case MSR_IA32_LASTBRANCHFROMIP:
1747         case MSR_IA32_LASTBRANCHTOIP:
1748         case MSR_IA32_LASTINTFROMIP:
1749         case MSR_IA32_LASTINTTOIP:
1750         case MSR_K8_SYSCFG:
1751         case MSR_K7_HWCR:
1752         case MSR_VM_HSAVE_PA:
1753         case MSR_P6_PERFCTR0:
1754         case MSR_P6_PERFCTR1:
1755         case MSR_P6_EVNTSEL0:
1756         case MSR_P6_EVNTSEL1:
1757         case MSR_K7_EVNTSEL0:
1758         case MSR_K7_PERFCTR0:
1759         case MSR_K8_INT_PENDING_MSG:
1760         case MSR_AMD64_NB_CFG:
1761         case MSR_FAM10H_MMIO_CONF_BASE:
1762                 data = 0;
1763                 break;
1764         case MSR_MTRRcap:
1765                 data = 0x500 | KVM_NR_VAR_MTRR;
1766                 break;
1767         case 0x200 ... 0x2ff:
1768                 return get_msr_mtrr(vcpu, msr, pdata);
1769         case 0xcd: /* fsb frequency */
1770                 data = 3;
1771                 break;
1772                 /*
1773                  * MSR_EBC_FREQUENCY_ID
1774                  * Conservative value valid for even the basic CPU models.
1775                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1776                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1777                  * and 266MHz for model 3, or 4. Set Core Clock
1778                  * Frequency to System Bus Frequency Ratio to 1 (bits
1779                  * 31:24) even though these are only valid for CPU
1780                  * models > 2, however guests may end up dividing or
1781                  * multiplying by zero otherwise.
1782                  */
1783         case MSR_EBC_FREQUENCY_ID:
1784                 data = 1 << 24;
1785                 break;
1786         case MSR_IA32_APICBASE:
1787                 data = kvm_get_apic_base(vcpu);
1788                 break;
1789         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1790                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1791                 break;
1792         case MSR_IA32_MISC_ENABLE:
1793                 data = vcpu->arch.ia32_misc_enable_msr;
1794                 break;
1795         case MSR_IA32_PERF_STATUS:
1796                 /* TSC increment by tick */
1797                 data = 1000ULL;
1798                 /* CPU multiplier */
1799                 data |= (((uint64_t)4ULL) << 40);
1800                 break;
1801         case MSR_EFER:
1802                 data = vcpu->arch.efer;
1803                 break;
1804         case MSR_KVM_WALL_CLOCK:
1805         case MSR_KVM_WALL_CLOCK_NEW:
1806                 data = vcpu->kvm->arch.wall_clock;
1807                 break;
1808         case MSR_KVM_SYSTEM_TIME:
1809         case MSR_KVM_SYSTEM_TIME_NEW:
1810                 data = vcpu->arch.time;
1811                 break;
1812         case MSR_KVM_ASYNC_PF_EN:
1813                 data = vcpu->arch.apf.msr_val;
1814                 break;
1815         case MSR_IA32_P5_MC_ADDR:
1816         case MSR_IA32_P5_MC_TYPE:
1817         case MSR_IA32_MCG_CAP:
1818         case MSR_IA32_MCG_CTL:
1819         case MSR_IA32_MCG_STATUS:
1820         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1821                 return get_msr_mce(vcpu, msr, pdata);
1822         case MSR_K7_CLK_CTL:
1823                 /*
1824                  * Provide expected ramp-up count for K7. All other
1825                  * are set to zero, indicating minimum divisors for
1826                  * every field.
1827                  *
1828                  * This prevents guest kernels on AMD host with CPU
1829                  * type 6, model 8 and higher from exploding due to
1830                  * the rdmsr failing.
1831                  */
1832                 data = 0x20000000;
1833                 break;
1834         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1835                 if (kvm_hv_msr_partition_wide(msr)) {
1836                         int r;
1837                         mutex_lock(&vcpu->kvm->lock);
1838                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1839                         mutex_unlock(&vcpu->kvm->lock);
1840                         return r;
1841                 } else
1842                         return get_msr_hyperv(vcpu, msr, pdata);
1843                 break;
1844         default:
1845                 if (!ignore_msrs) {
1846                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1847                         return 1;
1848                 } else {
1849                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1850                         data = 0;
1851                 }
1852                 break;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1858
1859 /*
1860  * Read or write a bunch of msrs. All parameters are kernel addresses.
1861  *
1862  * @return number of msrs set successfully.
1863  */
1864 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1865                     struct kvm_msr_entry *entries,
1866                     int (*do_msr)(struct kvm_vcpu *vcpu,
1867                                   unsigned index, u64 *data))
1868 {
1869         int i, idx;
1870
1871         idx = srcu_read_lock(&vcpu->kvm->srcu);
1872         for (i = 0; i < msrs->nmsrs; ++i)
1873                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1874                         break;
1875         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1876
1877         return i;
1878 }
1879
1880 /*
1881  * Read or write a bunch of msrs. Parameters are user addresses.
1882  *
1883  * @return number of msrs set successfully.
1884  */
1885 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1886                   int (*do_msr)(struct kvm_vcpu *vcpu,
1887                                 unsigned index, u64 *data),
1888                   int writeback)
1889 {
1890         struct kvm_msrs msrs;
1891         struct kvm_msr_entry *entries;
1892         int r, n;
1893         unsigned size;
1894
1895         r = -EFAULT;
1896         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1897                 goto out;
1898
1899         r = -E2BIG;
1900         if (msrs.nmsrs >= MAX_IO_MSRS)
1901                 goto out;
1902
1903         r = -ENOMEM;
1904         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1905         entries = kmalloc(size, GFP_KERNEL);
1906         if (!entries)
1907                 goto out;
1908
1909         r = -EFAULT;
1910         if (copy_from_user(entries, user_msrs->entries, size))
1911                 goto out_free;
1912
1913         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1914         if (r < 0)
1915                 goto out_free;
1916
1917         r = -EFAULT;
1918         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1919                 goto out_free;
1920
1921         r = n;
1922
1923 out_free:
1924         kfree(entries);
1925 out:
1926         return r;
1927 }
1928
1929 int kvm_dev_ioctl_check_extension(long ext)
1930 {
1931         int r;
1932
1933         switch (ext) {
1934         case KVM_CAP_IRQCHIP:
1935         case KVM_CAP_HLT:
1936         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1937         case KVM_CAP_SET_TSS_ADDR:
1938         case KVM_CAP_EXT_CPUID:
1939         case KVM_CAP_CLOCKSOURCE:
1940         case KVM_CAP_PIT:
1941         case KVM_CAP_NOP_IO_DELAY:
1942         case KVM_CAP_MP_STATE:
1943         case KVM_CAP_SYNC_MMU:
1944         case KVM_CAP_REINJECT_CONTROL:
1945         case KVM_CAP_IRQ_INJECT_STATUS:
1946         case KVM_CAP_ASSIGN_DEV_IRQ:
1947         case KVM_CAP_IRQFD:
1948         case KVM_CAP_IOEVENTFD:
1949         case KVM_CAP_PIT2:
1950         case KVM_CAP_PIT_STATE2:
1951         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1952         case KVM_CAP_XEN_HVM:
1953         case KVM_CAP_ADJUST_CLOCK:
1954         case KVM_CAP_VCPU_EVENTS:
1955         case KVM_CAP_HYPERV:
1956         case KVM_CAP_HYPERV_VAPIC:
1957         case KVM_CAP_HYPERV_SPIN:
1958         case KVM_CAP_PCI_SEGMENT:
1959         case KVM_CAP_DEBUGREGS:
1960         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1961         case KVM_CAP_XSAVE:
1962         case KVM_CAP_ASYNC_PF:
1963                 r = 1;
1964                 break;
1965         case KVM_CAP_COALESCED_MMIO:
1966                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1967                 break;
1968         case KVM_CAP_VAPIC:
1969                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1970                 break;
1971         case KVM_CAP_NR_VCPUS:
1972                 r = KVM_MAX_VCPUS;
1973                 break;
1974         case KVM_CAP_NR_MEMSLOTS:
1975                 r = KVM_MEMORY_SLOTS;
1976                 break;
1977         case KVM_CAP_PV_MMU:    /* obsolete */
1978                 r = 0;
1979                 break;
1980         case KVM_CAP_IOMMU:
1981                 r = iommu_found();
1982                 break;
1983         case KVM_CAP_MCE:
1984                 r = KVM_MAX_MCE_BANKS;
1985                 break;
1986         case KVM_CAP_XCRS:
1987                 r = cpu_has_xsave;
1988                 break;
1989         default:
1990                 r = 0;
1991                 break;
1992         }
1993         return r;
1994
1995 }
1996
1997 long kvm_arch_dev_ioctl(struct file *filp,
1998                         unsigned int ioctl, unsigned long arg)
1999 {
2000         void __user *argp = (void __user *)arg;
2001         long r;
2002
2003         switch (ioctl) {
2004         case KVM_GET_MSR_INDEX_LIST: {
2005                 struct kvm_msr_list __user *user_msr_list = argp;
2006                 struct kvm_msr_list msr_list;
2007                 unsigned n;
2008
2009                 r = -EFAULT;
2010                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2011                         goto out;
2012                 n = msr_list.nmsrs;
2013                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2014                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2015                         goto out;
2016                 r = -E2BIG;
2017                 if (n < msr_list.nmsrs)
2018                         goto out;
2019                 r = -EFAULT;
2020                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2021                                  num_msrs_to_save * sizeof(u32)))
2022                         goto out;
2023                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2024                                  &emulated_msrs,
2025                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2026                         goto out;
2027                 r = 0;
2028                 break;
2029         }
2030         case KVM_GET_SUPPORTED_CPUID: {
2031                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2032                 struct kvm_cpuid2 cpuid;
2033
2034                 r = -EFAULT;
2035                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2036                         goto out;
2037                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2038                                                       cpuid_arg->entries);
2039                 if (r)
2040                         goto out;
2041
2042                 r = -EFAULT;
2043                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2044                         goto out;
2045                 r = 0;
2046                 break;
2047         }
2048         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2049                 u64 mce_cap;
2050
2051                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2052                 r = -EFAULT;
2053                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2054                         goto out;
2055                 r = 0;
2056                 break;
2057         }
2058         default:
2059                 r = -EINVAL;
2060         }
2061 out:
2062         return r;
2063 }
2064
2065 static void wbinvd_ipi(void *garbage)
2066 {
2067         wbinvd();
2068 }
2069
2070 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2071 {
2072         return vcpu->kvm->arch.iommu_domain &&
2073                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2074 }
2075
2076 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2077 {
2078         /* Address WBINVD may be executed by guest */
2079         if (need_emulate_wbinvd(vcpu)) {
2080                 if (kvm_x86_ops->has_wbinvd_exit())
2081                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2082                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2083                         smp_call_function_single(vcpu->cpu,
2084                                         wbinvd_ipi, NULL, 1);
2085         }
2086
2087         kvm_x86_ops->vcpu_load(vcpu, cpu);
2088         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2089                 /* Make sure TSC doesn't go backwards */
2090                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2091                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2092                 if (tsc_delta < 0)
2093                         mark_tsc_unstable("KVM discovered backwards TSC");
2094                 if (check_tsc_unstable()) {
2095                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2096                         vcpu->arch.tsc_catchup = 1;
2097                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2098                 }
2099                 if (vcpu->cpu != cpu)
2100                         kvm_migrate_timers(vcpu);
2101                 vcpu->cpu = cpu;
2102         }
2103 }
2104
2105 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2106 {
2107         kvm_x86_ops->vcpu_put(vcpu);
2108         kvm_put_guest_fpu(vcpu);
2109         vcpu->arch.last_host_tsc = native_read_tsc();
2110 }
2111
2112 static int is_efer_nx(void)
2113 {
2114         unsigned long long efer = 0;
2115
2116         rdmsrl_safe(MSR_EFER, &efer);
2117         return efer & EFER_NX;
2118 }
2119
2120 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2121 {
2122         int i;
2123         struct kvm_cpuid_entry2 *e, *entry;
2124
2125         entry = NULL;
2126         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2127                 e = &vcpu->arch.cpuid_entries[i];
2128                 if (e->function == 0x80000001) {
2129                         entry = e;
2130                         break;
2131                 }
2132         }
2133         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2134                 entry->edx &= ~(1 << 20);
2135                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2136         }
2137 }
2138
2139 /* when an old userspace process fills a new kernel module */
2140 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2141                                     struct kvm_cpuid *cpuid,
2142                                     struct kvm_cpuid_entry __user *entries)
2143 {
2144         int r, i;
2145         struct kvm_cpuid_entry *cpuid_entries;
2146
2147         r = -E2BIG;
2148         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2149                 goto out;
2150         r = -ENOMEM;
2151         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2152         if (!cpuid_entries)
2153                 goto out;
2154         r = -EFAULT;
2155         if (copy_from_user(cpuid_entries, entries,
2156                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2157                 goto out_free;
2158         for (i = 0; i < cpuid->nent; i++) {
2159                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2160                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2161                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2162                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2163                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2164                 vcpu->arch.cpuid_entries[i].index = 0;
2165                 vcpu->arch.cpuid_entries[i].flags = 0;
2166                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2167                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2168                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2169         }
2170         vcpu->arch.cpuid_nent = cpuid->nent;
2171         cpuid_fix_nx_cap(vcpu);
2172         r = 0;
2173         kvm_apic_set_version(vcpu);
2174         kvm_x86_ops->cpuid_update(vcpu);
2175         update_cpuid(vcpu);
2176
2177 out_free:
2178         vfree(cpuid_entries);
2179 out:
2180         return r;
2181 }
2182
2183 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2184                                      struct kvm_cpuid2 *cpuid,
2185                                      struct kvm_cpuid_entry2 __user *entries)
2186 {
2187         int r;
2188
2189         r = -E2BIG;
2190         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2191                 goto out;
2192         r = -EFAULT;
2193         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2194                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2195                 goto out;
2196         vcpu->arch.cpuid_nent = cpuid->nent;
2197         kvm_apic_set_version(vcpu);
2198         kvm_x86_ops->cpuid_update(vcpu);
2199         update_cpuid(vcpu);
2200         return 0;
2201
2202 out:
2203         return r;
2204 }
2205
2206 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2207                                      struct kvm_cpuid2 *cpuid,
2208                                      struct kvm_cpuid_entry2 __user *entries)
2209 {
2210         int r;
2211
2212         r = -E2BIG;
2213         if (cpuid->nent < vcpu->arch.cpuid_nent)
2214                 goto out;
2215         r = -EFAULT;
2216         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2217                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2218                 goto out;
2219         return 0;
2220
2221 out:
2222         cpuid->nent = vcpu->arch.cpuid_nent;
2223         return r;
2224 }
2225
2226 static void cpuid_mask(u32 *word, int wordnum)
2227 {
2228         *word &= boot_cpu_data.x86_capability[wordnum];
2229 }
2230
2231 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2232                            u32 index)
2233 {
2234         entry->function = function;
2235         entry->index = index;
2236         cpuid_count(entry->function, entry->index,
2237                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2238         entry->flags = 0;
2239 }
2240
2241 #define F(x) bit(X86_FEATURE_##x)
2242
2243 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2244                          u32 index, int *nent, int maxnent)
2245 {
2246         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2247 #ifdef CONFIG_X86_64
2248         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2249                                 ? F(GBPAGES) : 0;
2250         unsigned f_lm = F(LM);
2251 #else
2252         unsigned f_gbpages = 0;
2253         unsigned f_lm = 0;
2254 #endif
2255         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2256
2257         /* cpuid 1.edx */
2258         const u32 kvm_supported_word0_x86_features =
2259                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2260                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2261                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2262                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2263                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2264                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2265                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2266                 0 /* HTT, TM, Reserved, PBE */;
2267         /* cpuid 0x80000001.edx */
2268         const u32 kvm_supported_word1_x86_features =
2269                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2270                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2271                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2272                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2273                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2274                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2275                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2276                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2277         /* cpuid 1.ecx */
2278         const u32 kvm_supported_word4_x86_features =
2279                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2280                 0 /* DS-CPL, VMX, SMX, EST */ |
2281                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2282                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2283                 0 /* Reserved, DCA */ | F(XMM4_1) |
2284                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2285                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2286                 F(F16C);
2287         /* cpuid 0x80000001.ecx */
2288         const u32 kvm_supported_word6_x86_features =
2289                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2290                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2291                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2292                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2293
2294         /* all calls to cpuid_count() should be made on the same cpu */
2295         get_cpu();
2296         do_cpuid_1_ent(entry, function, index);
2297         ++*nent;
2298
2299         switch (function) {
2300         case 0:
2301                 entry->eax = min(entry->eax, (u32)0xd);
2302                 break;
2303         case 1:
2304                 entry->edx &= kvm_supported_word0_x86_features;
2305                 cpuid_mask(&entry->edx, 0);
2306                 entry->ecx &= kvm_supported_word4_x86_features;
2307                 cpuid_mask(&entry->ecx, 4);
2308                 /* we support x2apic emulation even if host does not support
2309                  * it since we emulate x2apic in software */
2310                 entry->ecx |= F(X2APIC);
2311                 break;
2312         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2313          * may return different values. This forces us to get_cpu() before
2314          * issuing the first command, and also to emulate this annoying behavior
2315          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2316         case 2: {
2317                 int t, times = entry->eax & 0xff;
2318
2319                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2320                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2321                 for (t = 1; t < times && *nent < maxnent; ++t) {
2322                         do_cpuid_1_ent(&entry[t], function, 0);
2323                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2324                         ++*nent;
2325                 }
2326                 break;
2327         }
2328         /* function 4 and 0xb have additional index. */
2329         case 4: {
2330                 int i, cache_type;
2331
2332                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2333                 /* read more entries until cache_type is zero */
2334                 for (i = 1; *nent < maxnent; ++i) {
2335                         cache_type = entry[i - 1].eax & 0x1f;
2336                         if (!cache_type)
2337                                 break;
2338                         do_cpuid_1_ent(&entry[i], function, i);
2339                         entry[i].flags |=
2340                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2341                         ++*nent;
2342                 }
2343                 break;
2344         }
2345         case 0xb: {
2346                 int i, level_type;
2347
2348                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2349                 /* read more entries until level_type is zero */
2350                 for (i = 1; *nent < maxnent; ++i) {
2351                         level_type = entry[i - 1].ecx & 0xff00;
2352                         if (!level_type)
2353                                 break;
2354                         do_cpuid_1_ent(&entry[i], function, i);
2355                         entry[i].flags |=
2356                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2357                         ++*nent;
2358                 }
2359                 break;
2360         }
2361         case 0xd: {
2362                 int i;
2363
2364                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2365                 for (i = 1; *nent < maxnent; ++i) {
2366                         if (entry[i - 1].eax == 0 && i != 2)
2367                                 break;
2368                         do_cpuid_1_ent(&entry[i], function, i);
2369                         entry[i].flags |=
2370                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2371                         ++*nent;
2372                 }
2373                 break;
2374         }
2375         case KVM_CPUID_SIGNATURE: {
2376                 char signature[12] = "KVMKVMKVM\0\0";
2377                 u32 *sigptr = (u32 *)signature;
2378                 entry->eax = 0;
2379                 entry->ebx = sigptr[0];
2380                 entry->ecx = sigptr[1];
2381                 entry->edx = sigptr[2];
2382                 break;
2383         }
2384         case KVM_CPUID_FEATURES:
2385                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2386                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2387                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2388                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2389                 entry->ebx = 0;
2390                 entry->ecx = 0;
2391                 entry->edx = 0;
2392                 break;
2393         case 0x80000000:
2394                 entry->eax = min(entry->eax, 0x8000001a);
2395                 break;
2396         case 0x80000001:
2397                 entry->edx &= kvm_supported_word1_x86_features;
2398                 cpuid_mask(&entry->edx, 1);
2399                 entry->ecx &= kvm_supported_word6_x86_features;
2400                 cpuid_mask(&entry->ecx, 6);
2401                 break;
2402         }
2403
2404         kvm_x86_ops->set_supported_cpuid(function, entry);
2405
2406         put_cpu();
2407 }
2408
2409 #undef F
2410
2411 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2412                                      struct kvm_cpuid_entry2 __user *entries)
2413 {
2414         struct kvm_cpuid_entry2 *cpuid_entries;
2415         int limit, nent = 0, r = -E2BIG;
2416         u32 func;
2417
2418         if (cpuid->nent < 1)
2419                 goto out;
2420         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2421                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2422         r = -ENOMEM;
2423         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2424         if (!cpuid_entries)
2425                 goto out;
2426
2427         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2428         limit = cpuid_entries[0].eax;
2429         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2430                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2431                              &nent, cpuid->nent);
2432         r = -E2BIG;
2433         if (nent >= cpuid->nent)
2434                 goto out_free;
2435
2436         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2437         limit = cpuid_entries[nent - 1].eax;
2438         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2439                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2440                              &nent, cpuid->nent);
2441
2442
2443
2444         r = -E2BIG;
2445         if (nent >= cpuid->nent)
2446                 goto out_free;
2447
2448         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2449                      cpuid->nent);
2450
2451         r = -E2BIG;
2452         if (nent >= cpuid->nent)
2453                 goto out_free;
2454
2455         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2456                      cpuid->nent);
2457
2458         r = -E2BIG;
2459         if (nent >= cpuid->nent)
2460                 goto out_free;
2461
2462         r = -EFAULT;
2463         if (copy_to_user(entries, cpuid_entries,
2464                          nent * sizeof(struct kvm_cpuid_entry2)))
2465                 goto out_free;
2466         cpuid->nent = nent;
2467         r = 0;
2468
2469 out_free:
2470         vfree(cpuid_entries);
2471 out:
2472         return r;
2473 }
2474
2475 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2476                                     struct kvm_lapic_state *s)
2477 {
2478         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2479
2480         return 0;
2481 }
2482
2483 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2484                                     struct kvm_lapic_state *s)
2485 {
2486         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2487         kvm_apic_post_state_restore(vcpu);
2488         update_cr8_intercept(vcpu);
2489
2490         return 0;
2491 }
2492
2493 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2494                                     struct kvm_interrupt *irq)
2495 {
2496         if (irq->irq < 0 || irq->irq >= 256)
2497                 return -EINVAL;
2498         if (irqchip_in_kernel(vcpu->kvm))
2499                 return -ENXIO;
2500
2501         kvm_queue_interrupt(vcpu, irq->irq, false);
2502         kvm_make_request(KVM_REQ_EVENT, vcpu);
2503
2504         return 0;
2505 }
2506
2507 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2508 {
2509         kvm_inject_nmi(vcpu);
2510
2511         return 0;
2512 }
2513
2514 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2515                                            struct kvm_tpr_access_ctl *tac)
2516 {
2517         if (tac->flags)
2518                 return -EINVAL;
2519         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2520         return 0;
2521 }
2522
2523 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2524                                         u64 mcg_cap)
2525 {
2526         int r;
2527         unsigned bank_num = mcg_cap & 0xff, bank;
2528
2529         r = -EINVAL;
2530         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2531                 goto out;
2532         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2533                 goto out;
2534         r = 0;
2535         vcpu->arch.mcg_cap = mcg_cap;
2536         /* Init IA32_MCG_CTL to all 1s */
2537         if (mcg_cap & MCG_CTL_P)
2538                 vcpu->arch.mcg_ctl = ~(u64)0;
2539         /* Init IA32_MCi_CTL to all 1s */
2540         for (bank = 0; bank < bank_num; bank++)
2541                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2542 out:
2543         return r;
2544 }
2545
2546 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2547                                       struct kvm_x86_mce *mce)
2548 {
2549         u64 mcg_cap = vcpu->arch.mcg_cap;
2550         unsigned bank_num = mcg_cap & 0xff;
2551         u64 *banks = vcpu->arch.mce_banks;
2552
2553         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2554                 return -EINVAL;
2555         /*
2556          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2557          * reporting is disabled
2558          */
2559         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2560             vcpu->arch.mcg_ctl != ~(u64)0)
2561                 return 0;
2562         banks += 4 * mce->bank;
2563         /*
2564          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2565          * reporting is disabled for the bank
2566          */
2567         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2568                 return 0;
2569         if (mce->status & MCI_STATUS_UC) {
2570                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2571                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2572                         printk(KERN_DEBUG "kvm: set_mce: "
2573                                "injects mce exception while "
2574                                "previous one is in progress!\n");
2575                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2576                         return 0;
2577                 }
2578                 if (banks[1] & MCI_STATUS_VAL)
2579                         mce->status |= MCI_STATUS_OVER;
2580                 banks[2] = mce->addr;
2581                 banks[3] = mce->misc;
2582                 vcpu->arch.mcg_status = mce->mcg_status;
2583                 banks[1] = mce->status;
2584                 kvm_queue_exception(vcpu, MC_VECTOR);
2585         } else if (!(banks[1] & MCI_STATUS_VAL)
2586                    || !(banks[1] & MCI_STATUS_UC)) {
2587                 if (banks[1] & MCI_STATUS_VAL)
2588                         mce->status |= MCI_STATUS_OVER;
2589                 banks[2] = mce->addr;
2590                 banks[3] = mce->misc;
2591                 banks[1] = mce->status;
2592         } else
2593                 banks[1] |= MCI_STATUS_OVER;
2594         return 0;
2595 }
2596
2597 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2598                                                struct kvm_vcpu_events *events)
2599 {
2600         events->exception.injected =
2601                 vcpu->arch.exception.pending &&
2602                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2603         events->exception.nr = vcpu->arch.exception.nr;
2604         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2605         events->exception.pad = 0;
2606         events->exception.error_code = vcpu->arch.exception.error_code;
2607
2608         events->interrupt.injected =
2609                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2610         events->interrupt.nr = vcpu->arch.interrupt.nr;
2611         events->interrupt.soft = 0;
2612         events->interrupt.shadow =
2613                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2614                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2615
2616         events->nmi.injected = vcpu->arch.nmi_injected;
2617         events->nmi.pending = vcpu->arch.nmi_pending;
2618         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2619         events->nmi.pad = 0;
2620
2621         events->sipi_vector = vcpu->arch.sipi_vector;
2622
2623         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2624                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2625                          | KVM_VCPUEVENT_VALID_SHADOW);
2626         memset(&events->reserved, 0, sizeof(events->reserved));
2627 }
2628
2629 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2630                                               struct kvm_vcpu_events *events)
2631 {
2632         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2633                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2634                               | KVM_VCPUEVENT_VALID_SHADOW))
2635                 return -EINVAL;
2636
2637         vcpu->arch.exception.pending = events->exception.injected;
2638         vcpu->arch.exception.nr = events->exception.nr;
2639         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2640         vcpu->arch.exception.error_code = events->exception.error_code;
2641
2642         vcpu->arch.interrupt.pending = events->interrupt.injected;
2643         vcpu->arch.interrupt.nr = events->interrupt.nr;
2644         vcpu->arch.interrupt.soft = events->interrupt.soft;
2645         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2646                 kvm_pic_clear_isr_ack(vcpu->kvm);
2647         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2648                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2649                                                   events->interrupt.shadow);
2650
2651         vcpu->arch.nmi_injected = events->nmi.injected;
2652         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2653                 vcpu->arch.nmi_pending = events->nmi.pending;
2654         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2655
2656         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2657                 vcpu->arch.sipi_vector = events->sipi_vector;
2658
2659         kvm_make_request(KVM_REQ_EVENT, vcpu);
2660
2661         return 0;
2662 }
2663
2664 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2665                                              struct kvm_debugregs *dbgregs)
2666 {
2667         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2668         dbgregs->dr6 = vcpu->arch.dr6;
2669         dbgregs->dr7 = vcpu->arch.dr7;
2670         dbgregs->flags = 0;
2671         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2672 }
2673
2674 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2675                                             struct kvm_debugregs *dbgregs)
2676 {
2677         if (dbgregs->flags)
2678                 return -EINVAL;
2679
2680         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2681         vcpu->arch.dr6 = dbgregs->dr6;
2682         vcpu->arch.dr7 = dbgregs->dr7;
2683
2684         return 0;
2685 }
2686
2687 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2688                                          struct kvm_xsave *guest_xsave)
2689 {
2690         if (cpu_has_xsave)
2691                 memcpy(guest_xsave->region,
2692                         &vcpu->arch.guest_fpu.state->xsave,
2693                         xstate_size);
2694         else {
2695                 memcpy(guest_xsave->region,
2696                         &vcpu->arch.guest_fpu.state->fxsave,
2697                         sizeof(struct i387_fxsave_struct));
2698                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2699                         XSTATE_FPSSE;
2700         }
2701 }
2702
2703 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2704                                         struct kvm_xsave *guest_xsave)
2705 {
2706         u64 xstate_bv =
2707                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2708
2709         if (cpu_has_xsave)
2710                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2711                         guest_xsave->region, xstate_size);
2712         else {
2713                 if (xstate_bv & ~XSTATE_FPSSE)
2714                         return -EINVAL;
2715                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2716                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2717         }
2718         return 0;
2719 }
2720
2721 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2722                                         struct kvm_xcrs *guest_xcrs)
2723 {
2724         if (!cpu_has_xsave) {
2725                 guest_xcrs->nr_xcrs = 0;
2726                 return;
2727         }
2728
2729         guest_xcrs->nr_xcrs = 1;
2730         guest_xcrs->flags = 0;
2731         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2732         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2733 }
2734
2735 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2736                                        struct kvm_xcrs *guest_xcrs)
2737 {
2738         int i, r = 0;
2739
2740         if (!cpu_has_xsave)
2741                 return -EINVAL;
2742
2743         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2744                 return -EINVAL;
2745
2746         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2747                 /* Only support XCR0 currently */
2748                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2749                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2750                                 guest_xcrs->xcrs[0].value);
2751                         break;
2752                 }
2753         if (r)
2754                 r = -EINVAL;
2755         return r;
2756 }
2757
2758 long kvm_arch_vcpu_ioctl(struct file *filp,
2759                          unsigned int ioctl, unsigned long arg)
2760 {
2761         struct kvm_vcpu *vcpu = filp->private_data;
2762         void __user *argp = (void __user *)arg;
2763         int r;
2764         union {
2765                 struct kvm_lapic_state *lapic;
2766                 struct kvm_xsave *xsave;
2767                 struct kvm_xcrs *xcrs;
2768                 void *buffer;
2769         } u;
2770
2771         u.buffer = NULL;
2772         switch (ioctl) {
2773         case KVM_GET_LAPIC: {
2774                 r = -EINVAL;
2775                 if (!vcpu->arch.apic)
2776                         goto out;
2777                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2778
2779                 r = -ENOMEM;
2780                 if (!u.lapic)
2781                         goto out;
2782                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2783                 if (r)
2784                         goto out;
2785                 r = -EFAULT;
2786                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2787                         goto out;
2788                 r = 0;
2789                 break;
2790         }
2791         case KVM_SET_LAPIC: {
2792                 r = -EINVAL;
2793                 if (!vcpu->arch.apic)
2794                         goto out;
2795                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2796                 r = -ENOMEM;
2797                 if (!u.lapic)
2798                         goto out;
2799                 r = -EFAULT;
2800                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2801                         goto out;
2802                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2803                 if (r)
2804                         goto out;
2805                 r = 0;
2806                 break;
2807         }
2808         case KVM_INTERRUPT: {
2809                 struct kvm_interrupt irq;
2810
2811                 r = -EFAULT;
2812                 if (copy_from_user(&irq, argp, sizeof irq))
2813                         goto out;
2814                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2815                 if (r)
2816                         goto out;
2817                 r = 0;
2818                 break;
2819         }
2820         case KVM_NMI: {
2821                 r = kvm_vcpu_ioctl_nmi(vcpu);
2822                 if (r)
2823                         goto out;
2824                 r = 0;
2825                 break;
2826         }
2827         case KVM_SET_CPUID: {
2828                 struct kvm_cpuid __user *cpuid_arg = argp;
2829                 struct kvm_cpuid cpuid;
2830
2831                 r = -EFAULT;
2832                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2833                         goto out;
2834                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2835                 if (r)
2836                         goto out;
2837                 break;
2838         }
2839         case KVM_SET_CPUID2: {
2840                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2841                 struct kvm_cpuid2 cpuid;
2842
2843                 r = -EFAULT;
2844                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2845                         goto out;
2846                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2847                                               cpuid_arg->entries);
2848                 if (r)
2849                         goto out;
2850                 break;
2851         }
2852         case KVM_GET_CPUID2: {
2853                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2854                 struct kvm_cpuid2 cpuid;
2855
2856                 r = -EFAULT;
2857                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2858                         goto out;
2859                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2860                                               cpuid_arg->entries);
2861                 if (r)
2862                         goto out;
2863                 r = -EFAULT;
2864                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2865                         goto out;
2866                 r = 0;
2867                 break;
2868         }
2869         case KVM_GET_MSRS:
2870                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2871                 break;
2872         case KVM_SET_MSRS:
2873                 r = msr_io(vcpu, argp, do_set_msr, 0);
2874                 break;
2875         case KVM_TPR_ACCESS_REPORTING: {
2876                 struct kvm_tpr_access_ctl tac;
2877
2878                 r = -EFAULT;
2879                 if (copy_from_user(&tac, argp, sizeof tac))
2880                         goto out;
2881                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2882                 if (r)
2883                         goto out;
2884                 r = -EFAULT;
2885                 if (copy_to_user(argp, &tac, sizeof tac))
2886                         goto out;
2887                 r = 0;
2888                 break;
2889         };
2890         case KVM_SET_VAPIC_ADDR: {
2891                 struct kvm_vapic_addr va;
2892
2893                 r = -EINVAL;
2894                 if (!irqchip_in_kernel(vcpu->kvm))
2895                         goto out;
2896                 r = -EFAULT;
2897                 if (copy_from_user(&va, argp, sizeof va))
2898                         goto out;
2899                 r = 0;
2900                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2901                 break;
2902         }
2903         case KVM_X86_SETUP_MCE: {
2904                 u64 mcg_cap;
2905
2906                 r = -EFAULT;
2907                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2908                         goto out;
2909                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2910                 break;
2911         }
2912         case KVM_X86_SET_MCE: {
2913                 struct kvm_x86_mce mce;
2914
2915                 r = -EFAULT;
2916                 if (copy_from_user(&mce, argp, sizeof mce))
2917                         goto out;
2918                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2919                 break;
2920         }
2921         case KVM_GET_VCPU_EVENTS: {
2922                 struct kvm_vcpu_events events;
2923
2924                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2925
2926                 r = -EFAULT;
2927                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2928                         break;
2929                 r = 0;
2930                 break;
2931         }
2932         case KVM_SET_VCPU_EVENTS: {
2933                 struct kvm_vcpu_events events;
2934
2935                 r = -EFAULT;
2936                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2937                         break;
2938
2939                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2940                 break;
2941         }
2942         case KVM_GET_DEBUGREGS: {
2943                 struct kvm_debugregs dbgregs;
2944
2945                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2946
2947                 r = -EFAULT;
2948                 if (copy_to_user(argp, &dbgregs,
2949                                  sizeof(struct kvm_debugregs)))
2950                         break;
2951                 r = 0;
2952                 break;
2953         }
2954         case KVM_SET_DEBUGREGS: {
2955                 struct kvm_debugregs dbgregs;
2956
2957                 r = -EFAULT;
2958                 if (copy_from_user(&dbgregs, argp,
2959                                    sizeof(struct kvm_debugregs)))
2960                         break;
2961
2962                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2963                 break;
2964         }
2965         case KVM_GET_XSAVE: {
2966                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2967                 r = -ENOMEM;
2968                 if (!u.xsave)
2969                         break;
2970
2971                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2972
2973                 r = -EFAULT;
2974                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2975                         break;
2976                 r = 0;
2977                 break;
2978         }
2979         case KVM_SET_XSAVE: {
2980                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2981                 r = -ENOMEM;
2982                 if (!u.xsave)
2983                         break;
2984
2985                 r = -EFAULT;
2986                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2987                         break;
2988
2989                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2990                 break;
2991         }
2992         case KVM_GET_XCRS: {
2993                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2994                 r = -ENOMEM;
2995                 if (!u.xcrs)
2996                         break;
2997
2998                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2999
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, u.xcrs,
3002                                  sizeof(struct kvm_xcrs)))
3003                         break;
3004                 r = 0;
3005                 break;
3006         }
3007         case KVM_SET_XCRS: {
3008                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3009                 r = -ENOMEM;
3010                 if (!u.xcrs)
3011                         break;
3012
3013                 r = -EFAULT;
3014                 if (copy_from_user(u.xcrs, argp,
3015                                    sizeof(struct kvm_xcrs)))
3016                         break;
3017
3018                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3019                 break;
3020         }
3021         default:
3022                 r = -EINVAL;
3023         }
3024 out:
3025         kfree(u.buffer);
3026         return r;
3027 }
3028
3029 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3030 {
3031         int ret;
3032
3033         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3034                 return -1;
3035         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3036         return ret;
3037 }
3038
3039 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3040                                               u64 ident_addr)
3041 {
3042         kvm->arch.ept_identity_map_addr = ident_addr;
3043         return 0;
3044 }
3045
3046 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3047                                           u32 kvm_nr_mmu_pages)
3048 {
3049         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3050                 return -EINVAL;
3051
3052         mutex_lock(&kvm->slots_lock);
3053         spin_lock(&kvm->mmu_lock);
3054
3055         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3056         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3057
3058         spin_unlock(&kvm->mmu_lock);
3059         mutex_unlock(&kvm->slots_lock);
3060         return 0;
3061 }
3062
3063 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3064 {
3065         return kvm->arch.n_max_mmu_pages;
3066 }
3067
3068 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3069 {
3070         int r;
3071
3072         r = 0;
3073         switch (chip->chip_id) {
3074         case KVM_IRQCHIP_PIC_MASTER:
3075                 memcpy(&chip->chip.pic,
3076                         &pic_irqchip(kvm)->pics[0],
3077                         sizeof(struct kvm_pic_state));
3078                 break;
3079         case KVM_IRQCHIP_PIC_SLAVE:
3080                 memcpy(&chip->chip.pic,
3081                         &pic_irqchip(kvm)->pics[1],
3082                         sizeof(struct kvm_pic_state));
3083                 break;
3084         case KVM_IRQCHIP_IOAPIC:
3085                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3086                 break;
3087         default:
3088                 r = -EINVAL;
3089                 break;
3090         }
3091         return r;
3092 }
3093
3094 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3095 {
3096         int r;
3097
3098         r = 0;
3099         switch (chip->chip_id) {
3100         case KVM_IRQCHIP_PIC_MASTER:
3101                 spin_lock(&pic_irqchip(kvm)->lock);
3102                 memcpy(&pic_irqchip(kvm)->pics[0],
3103                         &chip->chip.pic,
3104                         sizeof(struct kvm_pic_state));
3105                 spin_unlock(&pic_irqchip(kvm)->lock);
3106                 break;
3107         case KVM_IRQCHIP_PIC_SLAVE:
3108                 spin_lock(&pic_irqchip(kvm)->lock);
3109                 memcpy(&pic_irqchip(kvm)->pics[1],
3110                         &chip->chip.pic,
3111                         sizeof(struct kvm_pic_state));
3112                 spin_unlock(&pic_irqchip(kvm)->lock);
3113                 break;
3114         case KVM_IRQCHIP_IOAPIC:
3115                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3116                 break;
3117         default:
3118                 r = -EINVAL;
3119                 break;
3120         }
3121         kvm_pic_update_irq(pic_irqchip(kvm));
3122         return r;
3123 }
3124
3125 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3126 {
3127         int r = 0;
3128
3129         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3130         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3131         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3132         return r;
3133 }
3134
3135 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3136 {
3137         int r = 0;
3138
3139         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3140         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3141         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3142         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3143         return r;
3144 }
3145
3146 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3147 {
3148         int r = 0;
3149
3150         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3151         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3152                 sizeof(ps->channels));
3153         ps->flags = kvm->arch.vpit->pit_state.flags;
3154         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3155         memset(&ps->reserved, 0, sizeof(ps->reserved));
3156         return r;
3157 }
3158
3159 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3160 {
3161         int r = 0, start = 0;
3162         u32 prev_legacy, cur_legacy;
3163         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3164         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3165         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3166         if (!prev_legacy && cur_legacy)
3167                 start = 1;
3168         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3169                sizeof(kvm->arch.vpit->pit_state.channels));
3170         kvm->arch.vpit->pit_state.flags = ps->flags;
3171         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3172         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3173         return r;
3174 }
3175
3176 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3177                                  struct kvm_reinject_control *control)
3178 {
3179         if (!kvm->arch.vpit)
3180                 return -ENXIO;
3181         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3182         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3183         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3184         return 0;
3185 }
3186
3187 /*
3188  * Get (and clear) the dirty memory log for a memory slot.
3189  */
3190 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3191                                       struct kvm_dirty_log *log)
3192 {
3193         int r, i;
3194         struct kvm_memory_slot *memslot;
3195         unsigned long n;
3196         unsigned long is_dirty = 0;
3197
3198         mutex_lock(&kvm->slots_lock);
3199
3200         r = -EINVAL;
3201         if (log->slot >= KVM_MEMORY_SLOTS)
3202                 goto out;
3203
3204         memslot = &kvm->memslots->memslots[log->slot];
3205         r = -ENOENT;
3206         if (!memslot->dirty_bitmap)
3207                 goto out;
3208
3209         n = kvm_dirty_bitmap_bytes(memslot);
3210
3211         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3212                 is_dirty = memslot->dirty_bitmap[i];
3213
3214         /* If nothing is dirty, don't bother messing with page tables. */
3215         if (is_dirty) {
3216                 struct kvm_memslots *slots, *old_slots;
3217                 unsigned long *dirty_bitmap;
3218
3219                 dirty_bitmap = memslot->dirty_bitmap_head;
3220                 if (memslot->dirty_bitmap == dirty_bitmap)
3221                         dirty_bitmap += n / sizeof(long);
3222                 memset(dirty_bitmap, 0, n);
3223
3224                 r = -ENOMEM;
3225                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3226                 if (!slots)
3227                         goto out;
3228                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3229                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3230                 slots->generation++;
3231
3232                 old_slots = kvm->memslots;
3233                 rcu_assign_pointer(kvm->memslots, slots);
3234                 synchronize_srcu_expedited(&kvm->srcu);
3235                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3236                 kfree(old_slots);
3237
3238                 spin_lock(&kvm->mmu_lock);
3239                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3240                 spin_unlock(&kvm->mmu_lock);
3241
3242                 r = -EFAULT;
3243                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3244                         goto out;
3245         } else {
3246                 r = -EFAULT;
3247                 if (clear_user(log->dirty_bitmap, n))
3248                         goto out;
3249         }
3250
3251         r = 0;
3252 out:
3253         mutex_unlock(&kvm->slots_lock);
3254         return r;
3255 }
3256
3257 long kvm_arch_vm_ioctl(struct file *filp,
3258                        unsigned int ioctl, unsigned long arg)
3259 {
3260         struct kvm *kvm = filp->private_data;
3261         void __user *argp = (void __user *)arg;
3262         int r = -ENOTTY;
3263         /*
3264          * This union makes it completely explicit to gcc-3.x
3265          * that these two variables' stack usage should be
3266          * combined, not added together.
3267          */
3268         union {
3269                 struct kvm_pit_state ps;
3270                 struct kvm_pit_state2 ps2;
3271                 struct kvm_pit_config pit_config;
3272         } u;
3273
3274         switch (ioctl) {
3275         case KVM_SET_TSS_ADDR:
3276                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3277                 if (r < 0)
3278                         goto out;
3279                 break;
3280         case KVM_SET_IDENTITY_MAP_ADDR: {
3281                 u64 ident_addr;
3282
3283                 r = -EFAULT;
3284                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3285                         goto out;
3286                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3287                 if (r < 0)
3288                         goto out;
3289                 break;
3290         }
3291         case KVM_SET_NR_MMU_PAGES:
3292                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3293                 if (r)
3294                         goto out;
3295                 break;
3296         case KVM_GET_NR_MMU_PAGES:
3297                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3298                 break;
3299         case KVM_CREATE_IRQCHIP: {
3300                 struct kvm_pic *vpic;
3301
3302                 mutex_lock(&kvm->lock);
3303                 r = -EEXIST;
3304                 if (kvm->arch.vpic)
3305                         goto create_irqchip_unlock;
3306                 r = -ENOMEM;
3307                 vpic = kvm_create_pic(kvm);
3308                 if (vpic) {
3309                         r = kvm_ioapic_init(kvm);
3310                         if (r) {
3311                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3312                                                           &vpic->dev);
3313                                 kfree(vpic);
3314                                 goto create_irqchip_unlock;
3315                         }
3316                 } else
3317                         goto create_irqchip_unlock;
3318                 smp_wmb();
3319                 kvm->arch.vpic = vpic;
3320                 smp_wmb();
3321                 r = kvm_setup_default_irq_routing(kvm);
3322                 if (r) {
3323                         mutex_lock(&kvm->irq_lock);
3324                         kvm_ioapic_destroy(kvm);
3325                         kvm_destroy_pic(kvm);
3326                         mutex_unlock(&kvm->irq_lock);
3327                 }
3328         create_irqchip_unlock:
3329                 mutex_unlock(&kvm->lock);
3330                 break;
3331         }
3332         case KVM_CREATE_PIT:
3333                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3334                 goto create_pit;
3335         case KVM_CREATE_PIT2:
3336                 r = -EFAULT;
3337                 if (copy_from_user(&u.pit_config, argp,
3338                                    sizeof(struct kvm_pit_config)))
3339                         goto out;
3340         create_pit:
3341                 mutex_lock(&kvm->slots_lock);
3342                 r = -EEXIST;
3343                 if (kvm->arch.vpit)
3344                         goto create_pit_unlock;
3345                 r = -ENOMEM;
3346                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3347                 if (kvm->arch.vpit)
3348                         r = 0;
3349         create_pit_unlock:
3350                 mutex_unlock(&kvm->slots_lock);
3351                 break;
3352         case KVM_IRQ_LINE_STATUS:
3353         case KVM_IRQ_LINE: {
3354                 struct kvm_irq_level irq_event;
3355
3356                 r = -EFAULT;
3357                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3358                         goto out;
3359                 r = -ENXIO;
3360                 if (irqchip_in_kernel(kvm)) {
3361                         __s32 status;
3362                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3363                                         irq_event.irq, irq_event.level);
3364                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3365                                 r = -EFAULT;
3366                                 irq_event.status = status;
3367                                 if (copy_to_user(argp, &irq_event,
3368                                                         sizeof irq_event))
3369                                         goto out;
3370                         }
3371                         r = 0;
3372                 }
3373                 break;
3374         }
3375         case KVM_GET_IRQCHIP: {
3376                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3377                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3378
3379                 r = -ENOMEM;
3380                 if (!chip)
3381                         goto out;
3382                 r = -EFAULT;
3383                 if (copy_from_user(chip, argp, sizeof *chip))
3384                         goto get_irqchip_out;
3385                 r = -ENXIO;
3386                 if (!irqchip_in_kernel(kvm))
3387                         goto get_irqchip_out;
3388                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3389                 if (r)
3390                         goto get_irqchip_out;
3391                 r = -EFAULT;
3392                 if (copy_to_user(argp, chip, sizeof *chip))
3393                         goto get_irqchip_out;
3394                 r = 0;
3395         get_irqchip_out:
3396                 kfree(chip);
3397                 if (r)
3398                         goto out;
3399                 break;
3400         }
3401         case KVM_SET_IRQCHIP: {
3402                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3403                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3404
3405                 r = -ENOMEM;
3406                 if (!chip)
3407                         goto out;
3408                 r = -EFAULT;
3409                 if (copy_from_user(chip, argp, sizeof *chip))
3410                         goto set_irqchip_out;
3411                 r = -ENXIO;
3412                 if (!irqchip_in_kernel(kvm))
3413                         goto set_irqchip_out;
3414                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3415                 if (r)
3416                         goto set_irqchip_out;
3417                 r = 0;
3418         set_irqchip_out:
3419                 kfree(chip);
3420                 if (r)
3421                         goto out;
3422                 break;
3423         }
3424         case KVM_GET_PIT: {
3425                 r = -EFAULT;
3426                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3427                         goto out;
3428                 r = -ENXIO;
3429                 if (!kvm->arch.vpit)
3430                         goto out;
3431                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3432                 if (r)
3433                         goto out;
3434                 r = -EFAULT;
3435                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3436                         goto out;
3437                 r = 0;
3438                 break;
3439         }
3440         case KVM_SET_PIT: {
3441                 r = -EFAULT;
3442                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3443                         goto out;
3444                 r = -ENXIO;
3445                 if (!kvm->arch.vpit)
3446                         goto out;
3447                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3448                 if (r)
3449                         goto out;
3450                 r = 0;
3451                 break;
3452         }
3453         case KVM_GET_PIT2: {
3454                 r = -ENXIO;
3455                 if (!kvm->arch.vpit)
3456                         goto out;
3457                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3458                 if (r)
3459                         goto out;
3460                 r = -EFAULT;
3461                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3462                         goto out;
3463                 r = 0;
3464                 break;
3465         }
3466         case KVM_SET_PIT2: {
3467                 r = -EFAULT;
3468                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3469                         goto out;
3470                 r = -ENXIO;
3471                 if (!kvm->arch.vpit)
3472                         goto out;
3473                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3474                 if (r)
3475                         goto out;
3476                 r = 0;
3477                 break;
3478         }
3479         case KVM_REINJECT_CONTROL: {
3480                 struct kvm_reinject_control control;
3481                 r =  -EFAULT;
3482                 if (copy_from_user(&control, argp, sizeof(control)))
3483                         goto out;
3484                 r = kvm_vm_ioctl_reinject(kvm, &control);
3485                 if (r)
3486                         goto out;
3487                 r = 0;
3488                 break;
3489         }
3490         case KVM_XEN_HVM_CONFIG: {
3491                 r = -EFAULT;
3492                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3493                                    sizeof(struct kvm_xen_hvm_config)))
3494                         goto out;
3495                 r = -EINVAL;
3496                 if (kvm->arch.xen_hvm_config.flags)
3497                         goto out;
3498                 r = 0;
3499                 break;
3500         }
3501         case KVM_SET_CLOCK: {
3502                 struct kvm_clock_data user_ns;
3503                 u64 now_ns;
3504                 s64 delta;
3505
3506                 r = -EFAULT;
3507                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3508                         goto out;
3509
3510                 r = -EINVAL;
3511                 if (user_ns.flags)
3512                         goto out;
3513
3514                 r = 0;
3515                 local_irq_disable();
3516                 now_ns = get_kernel_ns();
3517                 delta = user_ns.clock - now_ns;
3518                 local_irq_enable();
3519                 kvm->arch.kvmclock_offset = delta;
3520                 break;
3521         }
3522         case KVM_GET_CLOCK: {
3523                 struct kvm_clock_data user_ns;
3524                 u64 now_ns;
3525
3526                 local_irq_disable();
3527                 now_ns = get_kernel_ns();
3528                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3529                 local_irq_enable();
3530                 user_ns.flags = 0;
3531                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3532
3533                 r = -EFAULT;
3534                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3535                         goto out;
3536                 r = 0;
3537                 break;
3538         }
3539
3540         default:
3541                 ;
3542         }
3543 out:
3544         return r;
3545 }
3546
3547 static void kvm_init_msr_list(void)
3548 {
3549         u32 dummy[2];
3550         unsigned i, j;
3551
3552         /* skip the first msrs in the list. KVM-specific */
3553         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3554                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3555                         continue;
3556                 if (j < i)
3557                         msrs_to_save[j] = msrs_to_save[i];
3558                 j++;
3559         }
3560         num_msrs_to_save = j;
3561 }
3562
3563 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3564                            const void *v)
3565 {
3566         if (vcpu->arch.apic &&
3567             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3568                 return 0;
3569
3570         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3571 }
3572
3573 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3574 {
3575         if (vcpu->arch.apic &&
3576             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3577                 return 0;
3578
3579         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3580 }
3581
3582 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3583                         struct kvm_segment *var, int seg)
3584 {
3585         kvm_x86_ops->set_segment(vcpu, var, seg);
3586 }
3587
3588 void kvm_get_segment(struct kvm_vcpu *vcpu,
3589                      struct kvm_segment *var, int seg)
3590 {
3591         kvm_x86_ops->get_segment(vcpu, var, seg);
3592 }
3593
3594 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3595 {
3596         return gpa;
3597 }
3598
3599 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3600 {
3601         gpa_t t_gpa;
3602         struct x86_exception exception;
3603
3604         BUG_ON(!mmu_is_nested(vcpu));
3605
3606         /* NPT walks are always user-walks */
3607         access |= PFERR_USER_MASK;
3608         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3609
3610         return t_gpa;
3611 }
3612
3613 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3614                               struct x86_exception *exception)
3615 {
3616         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3617         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3618 }
3619
3620  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3621                                 struct x86_exception *exception)
3622 {
3623         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3624         access |= PFERR_FETCH_MASK;
3625         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3626 }
3627
3628 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3629                                struct x86_exception *exception)
3630 {
3631         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3632         access |= PFERR_WRITE_MASK;
3633         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3634 }
3635
3636 /* uses this to access any guest's mapped memory without checking CPL */
3637 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3638                                 struct x86_exception *exception)
3639 {
3640         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3641 }
3642
3643 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3644                                       struct kvm_vcpu *vcpu, u32 access,
3645                                       struct x86_exception *exception)
3646 {
3647         void *data = val;
3648         int r = X86EMUL_CONTINUE;
3649
3650         while (bytes) {
3651                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3652                                                             exception);
3653                 unsigned offset = addr & (PAGE_SIZE-1);
3654                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3655                 int ret;
3656
3657                 if (gpa == UNMAPPED_GVA)
3658                         return X86EMUL_PROPAGATE_FAULT;
3659                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3660                 if (ret < 0) {
3661                         r = X86EMUL_IO_NEEDED;
3662                         goto out;
3663                 }
3664
3665                 bytes -= toread;
3666                 data += toread;
3667                 addr += toread;
3668         }
3669 out:
3670         return r;
3671 }
3672
3673 /* used for instruction fetching */
3674 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3675                                 struct kvm_vcpu *vcpu,
3676                                 struct x86_exception *exception)
3677 {
3678         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3679         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3680                                           access | PFERR_FETCH_MASK,
3681                                           exception);
3682 }
3683
3684 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3685                                struct kvm_vcpu *vcpu,
3686                                struct x86_exception *exception)
3687 {
3688         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3689         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3690                                           exception);
3691 }
3692
3693 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3694                                       struct kvm_vcpu *vcpu,
3695                                       struct x86_exception *exception)
3696 {
3697         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3698 }
3699
3700 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3701                                        unsigned int bytes,
3702                                        struct kvm_vcpu *vcpu,
3703                                        struct x86_exception *exception)
3704 {
3705         void *data = val;
3706         int r = X86EMUL_CONTINUE;
3707
3708         while (bytes) {
3709                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3710                                                              PFERR_WRITE_MASK,
3711                                                              exception);
3712                 unsigned offset = addr & (PAGE_SIZE-1);
3713                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3714                 int ret;
3715
3716                 if (gpa == UNMAPPED_GVA)
3717                         return X86EMUL_PROPAGATE_FAULT;
3718                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3719                 if (ret < 0) {
3720                         r = X86EMUL_IO_NEEDED;
3721                         goto out;
3722                 }
3723
3724                 bytes -= towrite;
3725                 data += towrite;
3726                 addr += towrite;
3727         }
3728 out:
3729         return r;
3730 }
3731
3732 static int emulator_read_emulated(unsigned long addr,
3733                                   void *val,
3734                                   unsigned int bytes,
3735                                   struct x86_exception *exception,
3736                                   struct kvm_vcpu *vcpu)
3737 {
3738         gpa_t                 gpa;
3739
3740         if (vcpu->mmio_read_completed) {
3741                 memcpy(val, vcpu->mmio_data, bytes);
3742                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3743                                vcpu->mmio_phys_addr, *(u64 *)val);
3744                 vcpu->mmio_read_completed = 0;
3745                 return X86EMUL_CONTINUE;
3746         }
3747
3748         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3749
3750         if (gpa == UNMAPPED_GVA)
3751                 return X86EMUL_PROPAGATE_FAULT;
3752
3753         /* For APIC access vmexit */
3754         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3755                 goto mmio;
3756
3757         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3758             == X86EMUL_CONTINUE)
3759                 return X86EMUL_CONTINUE;
3760
3761 mmio:
3762         /*
3763          * Is this MMIO handled locally?
3764          */
3765         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3766                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3767                 return X86EMUL_CONTINUE;
3768         }
3769
3770         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3771
3772         vcpu->mmio_needed = 1;
3773         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3774         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3775         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3776         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3777
3778         return X86EMUL_IO_NEEDED;
3779 }
3780
3781 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3782                         const void *val, int bytes)
3783 {
3784         int ret;
3785
3786         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3787         if (ret < 0)
3788                 return 0;
3789         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3790         return 1;
3791 }
3792
3793 static int emulator_write_emulated_onepage(unsigned long addr,
3794                                            const void *val,
3795                                            unsigned int bytes,
3796                                            struct x86_exception *exception,
3797                                            struct kvm_vcpu *vcpu)
3798 {
3799         gpa_t                 gpa;
3800
3801         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3802
3803         if (gpa == UNMAPPED_GVA)
3804                 return X86EMUL_PROPAGATE_FAULT;
3805
3806         /* For APIC access vmexit */
3807         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3808                 goto mmio;
3809
3810         if (emulator_write_phys(vcpu, gpa, val, bytes))
3811                 return X86EMUL_CONTINUE;
3812
3813 mmio:
3814         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3815         /*
3816          * Is this MMIO handled locally?
3817          */
3818         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3819                 return X86EMUL_CONTINUE;
3820
3821         vcpu->mmio_needed = 1;
3822         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3823         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3824         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3825         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3826         memcpy(vcpu->run->mmio.data, val, bytes);
3827
3828         return X86EMUL_CONTINUE;
3829 }
3830
3831 int emulator_write_emulated(unsigned long addr,
3832                             const void *val,
3833                             unsigned int bytes,
3834                             struct x86_exception *exception,
3835                             struct kvm_vcpu *vcpu)
3836 {
3837         /* Crossing a page boundary? */
3838         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3839                 int rc, now;
3840
3841                 now = -addr & ~PAGE_MASK;
3842                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3843                                                      vcpu);
3844                 if (rc != X86EMUL_CONTINUE)
3845                         return rc;
3846                 addr += now;
3847                 val += now;
3848                 bytes -= now;
3849         }
3850         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3851                                                vcpu);
3852 }
3853
3854 #define CMPXCHG_TYPE(t, ptr, old, new) \
3855         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3856
3857 #ifdef CONFIG_X86_64
3858 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3859 #else
3860 #  define CMPXCHG64(ptr, old, new) \
3861         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3862 #endif
3863
3864 static int emulator_cmpxchg_emulated(unsigned long addr,
3865                                      const void *old,
3866                                      const void *new,
3867                                      unsigned int bytes,
3868                                      struct x86_exception *exception,
3869                                      struct kvm_vcpu *vcpu)
3870 {
3871         gpa_t gpa;
3872         struct page *page;
3873         char *kaddr;
3874         bool exchanged;
3875
3876         /* guests cmpxchg8b have to be emulated atomically */
3877         if (bytes > 8 || (bytes & (bytes - 1)))
3878                 goto emul_write;
3879
3880         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3881
3882         if (gpa == UNMAPPED_GVA ||
3883             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3884                 goto emul_write;
3885
3886         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3887                 goto emul_write;
3888
3889         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3890         if (is_error_page(page)) {
3891                 kvm_release_page_clean(page);
3892                 goto emul_write;
3893         }
3894
3895         kaddr = kmap_atomic(page, KM_USER0);
3896         kaddr += offset_in_page(gpa);
3897         switch (bytes) {
3898         case 1:
3899                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3900                 break;
3901         case 2:
3902                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3903                 break;
3904         case 4:
3905                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3906                 break;
3907         case 8:
3908                 exchanged = CMPXCHG64(kaddr, old, new);
3909                 break;
3910         default:
3911                 BUG();
3912         }
3913         kunmap_atomic(kaddr, KM_USER0);
3914         kvm_release_page_dirty(page);
3915
3916         if (!exchanged)
3917                 return X86EMUL_CMPXCHG_FAILED;
3918
3919         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3920
3921         return X86EMUL_CONTINUE;
3922
3923 emul_write:
3924         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3925
3926         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3927 }
3928
3929 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3930 {
3931         /* TODO: String I/O for in kernel device */
3932         int r;
3933
3934         if (vcpu->arch.pio.in)
3935                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3936                                     vcpu->arch.pio.size, pd);
3937         else
3938                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3939                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3940                                      pd);
3941         return r;
3942 }
3943
3944
3945 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3946                              unsigned int count, struct kvm_vcpu *vcpu)
3947 {
3948         if (vcpu->arch.pio.count)
3949                 goto data_avail;
3950
3951         trace_kvm_pio(0, port, size, count);
3952
3953         vcpu->arch.pio.port = port;
3954         vcpu->arch.pio.in = 1;
3955         vcpu->arch.pio.count  = count;
3956         vcpu->arch.pio.size = size;
3957
3958         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3959         data_avail:
3960                 memcpy(val, vcpu->arch.pio_data, size * count);
3961                 vcpu->arch.pio.count = 0;
3962                 return 1;
3963         }
3964
3965         vcpu->run->exit_reason = KVM_EXIT_IO;
3966         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3967         vcpu->run->io.size = size;
3968         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3969         vcpu->run->io.count = count;
3970         vcpu->run->io.port = port;
3971
3972         return 0;
3973 }
3974
3975 static int emulator_pio_out_emulated(int size, unsigned short port,
3976                               const void *val, unsigned int count,
3977                               struct kvm_vcpu *vcpu)
3978 {
3979         trace_kvm_pio(1, port, size, count);
3980
3981         vcpu->arch.pio.port = port;
3982         vcpu->arch.pio.in = 0;
3983         vcpu->arch.pio.count = count;
3984         vcpu->arch.pio.size = size;
3985
3986         memcpy(vcpu->arch.pio_data, val, size * count);
3987
3988         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3989                 vcpu->arch.pio.count = 0;
3990                 return 1;
3991         }
3992
3993         vcpu->run->exit_reason = KVM_EXIT_IO;
3994         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3995         vcpu->run->io.size = size;
3996         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3997         vcpu->run->io.count = count;
3998         vcpu->run->io.port = port;
3999
4000         return 0;
4001 }
4002
4003 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4004 {
4005         return kvm_x86_ops->get_segment_base(vcpu, seg);
4006 }
4007
4008 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4009 {
4010         kvm_mmu_invlpg(vcpu, address);
4011         return X86EMUL_CONTINUE;
4012 }
4013
4014 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4015 {
4016         if (!need_emulate_wbinvd(vcpu))
4017                 return X86EMUL_CONTINUE;
4018
4019         if (kvm_x86_ops->has_wbinvd_exit()) {
4020                 int cpu = get_cpu();
4021
4022                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4023                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4024                                 wbinvd_ipi, NULL, 1);
4025                 put_cpu();
4026                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4027         } else
4028                 wbinvd();
4029         return X86EMUL_CONTINUE;
4030 }
4031 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4032
4033 int emulate_clts(struct kvm_vcpu *vcpu)
4034 {
4035         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4036         kvm_x86_ops->fpu_activate(vcpu);
4037         return X86EMUL_CONTINUE;
4038 }
4039
4040 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4041 {
4042         return _kvm_get_dr(vcpu, dr, dest);
4043 }
4044
4045 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4046 {
4047
4048         return __kvm_set_dr(vcpu, dr, value);
4049 }
4050
4051 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4052 {
4053         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4054 }
4055
4056 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4057 {
4058         unsigned long value;
4059
4060         switch (cr) {
4061         case 0:
4062                 value = kvm_read_cr0(vcpu);
4063                 break;
4064         case 2:
4065                 value = vcpu->arch.cr2;
4066                 break;
4067         case 3:
4068                 value = vcpu->arch.cr3;
4069                 break;
4070         case 4:
4071                 value = kvm_read_cr4(vcpu);
4072                 break;
4073         case 8:
4074                 value = kvm_get_cr8(vcpu);
4075                 break;
4076         default:
4077                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4078                 return 0;
4079         }
4080
4081         return value;
4082 }
4083
4084 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4085 {
4086         int res = 0;
4087
4088         switch (cr) {
4089         case 0:
4090                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4091                 break;
4092         case 2:
4093                 vcpu->arch.cr2 = val;
4094                 break;
4095         case 3:
4096                 res = kvm_set_cr3(vcpu, val);
4097                 break;
4098         case 4:
4099                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4100                 break;
4101         case 8:
4102                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4103                 break;
4104         default:
4105                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4106                 res = -1;
4107         }
4108
4109         return res;
4110 }
4111
4112 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4113 {
4114         return kvm_x86_ops->get_cpl(vcpu);
4115 }
4116
4117 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4118 {
4119         kvm_x86_ops->get_gdt(vcpu, dt);
4120 }
4121
4122 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4123 {
4124         kvm_x86_ops->get_idt(vcpu, dt);
4125 }
4126
4127 static unsigned long emulator_get_cached_segment_base(int seg,
4128                                                       struct kvm_vcpu *vcpu)
4129 {
4130         return get_segment_base(vcpu, seg);
4131 }
4132
4133 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4134                                            struct kvm_vcpu *vcpu)
4135 {
4136         struct kvm_segment var;
4137
4138         kvm_get_segment(vcpu, &var, seg);
4139
4140         if (var.unusable)
4141                 return false;
4142
4143         if (var.g)
4144                 var.limit >>= 12;
4145         set_desc_limit(desc, var.limit);
4146         set_desc_base(desc, (unsigned long)var.base);
4147         desc->type = var.type;
4148         desc->s = var.s;
4149         desc->dpl = var.dpl;
4150         desc->p = var.present;
4151         desc->avl = var.avl;
4152         desc->l = var.l;
4153         desc->d = var.db;
4154         desc->g = var.g;
4155
4156         return true;
4157 }
4158
4159 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4160                                            struct kvm_vcpu *vcpu)
4161 {
4162         struct kvm_segment var;
4163
4164         /* needed to preserve selector */
4165         kvm_get_segment(vcpu, &var, seg);
4166
4167         var.base = get_desc_base(desc);
4168         var.limit = get_desc_limit(desc);
4169         if (desc->g)
4170                 var.limit = (var.limit << 12) | 0xfff;
4171         var.type = desc->type;
4172         var.present = desc->p;
4173         var.dpl = desc->dpl;
4174         var.db = desc->d;
4175         var.s = desc->s;
4176         var.l = desc->l;
4177         var.g = desc->g;
4178         var.avl = desc->avl;
4179         var.present = desc->p;
4180         var.unusable = !var.present;
4181         var.padding = 0;
4182
4183         kvm_set_segment(vcpu, &var, seg);
4184         return;
4185 }
4186
4187 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4188 {
4189         struct kvm_segment kvm_seg;
4190
4191         kvm_get_segment(vcpu, &kvm_seg, seg);
4192         return kvm_seg.selector;
4193 }
4194
4195 static void emulator_set_segment_selector(u16 sel, int seg,
4196                                           struct kvm_vcpu *vcpu)
4197 {
4198         struct kvm_segment kvm_seg;
4199
4200         kvm_get_segment(vcpu, &kvm_seg, seg);
4201         kvm_seg.selector = sel;
4202         kvm_set_segment(vcpu, &kvm_seg, seg);
4203 }
4204
4205 static struct x86_emulate_ops emulate_ops = {
4206         .read_std            = kvm_read_guest_virt_system,
4207         .write_std           = kvm_write_guest_virt_system,
4208         .fetch               = kvm_fetch_guest_virt,
4209         .read_emulated       = emulator_read_emulated,
4210         .write_emulated      = emulator_write_emulated,
4211         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4212         .pio_in_emulated     = emulator_pio_in_emulated,
4213         .pio_out_emulated    = emulator_pio_out_emulated,
4214         .get_cached_descriptor = emulator_get_cached_descriptor,
4215         .set_cached_descriptor = emulator_set_cached_descriptor,
4216         .get_segment_selector = emulator_get_segment_selector,
4217         .set_segment_selector = emulator_set_segment_selector,
4218         .get_cached_segment_base = emulator_get_cached_segment_base,
4219         .get_gdt             = emulator_get_gdt,
4220         .get_idt             = emulator_get_idt,
4221         .get_cr              = emulator_get_cr,
4222         .set_cr              = emulator_set_cr,
4223         .cpl                 = emulator_get_cpl,
4224         .get_dr              = emulator_get_dr,
4225         .set_dr              = emulator_set_dr,
4226         .set_msr             = kvm_set_msr,
4227         .get_msr             = kvm_get_msr,
4228 };
4229
4230 static void cache_all_regs(struct kvm_vcpu *vcpu)
4231 {
4232         kvm_register_read(vcpu, VCPU_REGS_RAX);
4233         kvm_register_read(vcpu, VCPU_REGS_RSP);
4234         kvm_register_read(vcpu, VCPU_REGS_RIP);
4235         vcpu->arch.regs_dirty = ~0;
4236 }
4237
4238 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4239 {
4240         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4241         /*
4242          * an sti; sti; sequence only disable interrupts for the first
4243          * instruction. So, if the last instruction, be it emulated or
4244          * not, left the system with the INT_STI flag enabled, it
4245          * means that the last instruction is an sti. We should not
4246          * leave the flag on in this case. The same goes for mov ss
4247          */
4248         if (!(int_shadow & mask))
4249                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4250 }
4251
4252 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4253 {
4254         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4255         if (ctxt->exception.vector == PF_VECTOR)
4256                 kvm_propagate_fault(vcpu, &ctxt->exception);
4257         else if (ctxt->exception.error_code_valid)
4258                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4259                                       ctxt->exception.error_code);
4260         else
4261                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4262 }
4263
4264 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4265 {
4266         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4267         int cs_db, cs_l;
4268
4269         cache_all_regs(vcpu);
4270
4271         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4272
4273         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4274         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4275         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4276         vcpu->arch.emulate_ctxt.mode =
4277                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4278                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4279                 ? X86EMUL_MODE_VM86 : cs_l
4280                 ? X86EMUL_MODE_PROT64 : cs_db
4281                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4282         memset(c, 0, sizeof(struct decode_cache));
4283         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4284 }
4285
4286 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4287 {
4288         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4289         int ret;
4290
4291         init_emulate_ctxt(vcpu);
4292
4293         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4294         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4295         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4296         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4297
4298         if (ret != X86EMUL_CONTINUE)
4299                 return EMULATE_FAIL;
4300
4301         vcpu->arch.emulate_ctxt.eip = c->eip;
4302         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4303         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4304         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4305
4306         if (irq == NMI_VECTOR)
4307                 vcpu->arch.nmi_pending = false;
4308         else
4309                 vcpu->arch.interrupt.pending = false;
4310
4311         return EMULATE_DONE;
4312 }
4313 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4314
4315 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4316 {
4317         int r = EMULATE_DONE;
4318
4319         ++vcpu->stat.insn_emulation_fail;
4320         trace_kvm_emulate_insn_failed(vcpu);
4321         if (!is_guest_mode(vcpu)) {
4322                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4323                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4324                 vcpu->run->internal.ndata = 0;
4325                 r = EMULATE_FAIL;
4326         }
4327         kvm_queue_exception(vcpu, UD_VECTOR);
4328
4329         return r;
4330 }
4331
4332 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4333 {
4334         gpa_t gpa;
4335
4336         if (tdp_enabled)
4337                 return false;
4338
4339         /*
4340          * if emulation was due to access to shadowed page table
4341          * and it failed try to unshadow page and re-entetr the
4342          * guest to let CPU execute the instruction.
4343          */
4344         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4345                 return true;
4346
4347         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4348
4349         if (gpa == UNMAPPED_GVA)
4350                 return true; /* let cpu generate fault */
4351
4352         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4353                 return true;
4354
4355         return false;
4356 }
4357
4358 int emulate_instruction(struct kvm_vcpu *vcpu,
4359                         unsigned long cr2,
4360                         u16 error_code,
4361                         int emulation_type)
4362 {
4363         int r;
4364         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4365
4366         kvm_clear_exception_queue(vcpu);
4367         vcpu->arch.mmio_fault_cr2 = cr2;
4368         /*
4369          * TODO: fix emulate.c to use guest_read/write_register
4370          * instead of direct ->regs accesses, can save hundred cycles
4371          * on Intel for instructions that don't read/change RSP, for
4372          * for example.
4373          */
4374         cache_all_regs(vcpu);
4375
4376         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4377                 init_emulate_ctxt(vcpu);
4378                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4379                 vcpu->arch.emulate_ctxt.have_exception = false;
4380                 vcpu->arch.emulate_ctxt.perm_ok = false;
4381
4382                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4383                 if (r == X86EMUL_PROPAGATE_FAULT)
4384                         goto done;
4385
4386                 trace_kvm_emulate_insn_start(vcpu);
4387
4388                 /* Only allow emulation of specific instructions on #UD
4389                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4390                 if (emulation_type & EMULTYPE_TRAP_UD) {
4391                         if (!c->twobyte)
4392                                 return EMULATE_FAIL;
4393                         switch (c->b) {
4394                         case 0x01: /* VMMCALL */
4395                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4396                                         return EMULATE_FAIL;
4397                                 break;
4398                         case 0x34: /* sysenter */
4399                         case 0x35: /* sysexit */
4400                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4401                                         return EMULATE_FAIL;
4402                                 break;
4403                         case 0x05: /* syscall */
4404                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4405                                         return EMULATE_FAIL;
4406                                 break;
4407                         default:
4408                                 return EMULATE_FAIL;
4409                         }
4410
4411                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4412                                 return EMULATE_FAIL;
4413                 }
4414
4415                 ++vcpu->stat.insn_emulation;
4416                 if (r)  {
4417                         if (reexecute_instruction(vcpu, cr2))
4418                                 return EMULATE_DONE;
4419                         if (emulation_type & EMULTYPE_SKIP)
4420                                 return EMULATE_FAIL;
4421                         return handle_emulation_failure(vcpu);
4422                 }
4423         }
4424
4425         if (emulation_type & EMULTYPE_SKIP) {
4426                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4427                 return EMULATE_DONE;
4428         }
4429
4430         /* this is needed for vmware backdor interface to work since it
4431            changes registers values  during IO operation */
4432         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4433
4434 restart:
4435         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4436
4437         if (r == EMULATION_FAILED) {
4438                 if (reexecute_instruction(vcpu, cr2))
4439                         return EMULATE_DONE;
4440
4441                 return handle_emulation_failure(vcpu);
4442         }
4443
4444 done:
4445         if (vcpu->arch.emulate_ctxt.have_exception) {
4446                 inject_emulated_exception(vcpu);
4447                 r = EMULATE_DONE;
4448         } else if (vcpu->arch.pio.count) {
4449                 if (!vcpu->arch.pio.in)
4450                         vcpu->arch.pio.count = 0;
4451                 r = EMULATE_DO_MMIO;
4452         } else if (vcpu->mmio_needed) {
4453                 if (vcpu->mmio_is_write)
4454                         vcpu->mmio_needed = 0;
4455                 r = EMULATE_DO_MMIO;
4456         } else if (r == EMULATION_RESTART)
4457                 goto restart;
4458         else
4459                 r = EMULATE_DONE;
4460
4461         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4462         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4463         kvm_make_request(KVM_REQ_EVENT, vcpu);
4464         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4465         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4466
4467         return r;
4468 }
4469 EXPORT_SYMBOL_GPL(emulate_instruction);
4470
4471 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4472 {
4473         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4474         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4475         /* do not return to emulator after return from userspace */
4476         vcpu->arch.pio.count = 0;
4477         return ret;
4478 }
4479 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4480
4481 static void tsc_bad(void *info)
4482 {
4483         __get_cpu_var(cpu_tsc_khz) = 0;
4484 }
4485
4486 static void tsc_khz_changed(void *data)
4487 {
4488         struct cpufreq_freqs *freq = data;
4489         unsigned long khz = 0;
4490
4491         if (data)
4492                 khz = freq->new;
4493         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4494                 khz = cpufreq_quick_get(raw_smp_processor_id());
4495         if (!khz)
4496                 khz = tsc_khz;
4497         __get_cpu_var(cpu_tsc_khz) = khz;
4498 }
4499
4500 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4501                                      void *data)
4502 {
4503         struct cpufreq_freqs *freq = data;
4504         struct kvm *kvm;
4505         struct kvm_vcpu *vcpu;
4506         int i, send_ipi = 0;
4507
4508         /*
4509          * We allow guests to temporarily run on slowing clocks,
4510          * provided we notify them after, or to run on accelerating
4511          * clocks, provided we notify them before.  Thus time never
4512          * goes backwards.
4513          *
4514          * However, we have a problem.  We can't atomically update
4515          * the frequency of a given CPU from this function; it is
4516          * merely a notifier, which can be called from any CPU.
4517          * Changing the TSC frequency at arbitrary points in time
4518          * requires a recomputation of local variables related to
4519          * the TSC for each VCPU.  We must flag these local variables
4520          * to be updated and be sure the update takes place with the
4521          * new frequency before any guests proceed.
4522          *
4523          * Unfortunately, the combination of hotplug CPU and frequency
4524          * change creates an intractable locking scenario; the order
4525          * of when these callouts happen is undefined with respect to
4526          * CPU hotplug, and they can race with each other.  As such,
4527          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4528          * undefined; you can actually have a CPU frequency change take
4529          * place in between the computation of X and the setting of the
4530          * variable.  To protect against this problem, all updates of
4531          * the per_cpu tsc_khz variable are done in an interrupt
4532          * protected IPI, and all callers wishing to update the value
4533          * must wait for a synchronous IPI to complete (which is trivial
4534          * if the caller is on the CPU already).  This establishes the
4535          * necessary total order on variable updates.
4536          *
4537          * Note that because a guest time update may take place
4538          * anytime after the setting of the VCPU's request bit, the
4539          * correct TSC value must be set before the request.  However,
4540          * to ensure the update actually makes it to any guest which
4541          * starts running in hardware virtualization between the set
4542          * and the acquisition of the spinlock, we must also ping the
4543          * CPU after setting the request bit.
4544          *
4545          */
4546
4547         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4548                 return 0;
4549         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4550                 return 0;
4551
4552         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4553
4554         spin_lock(&kvm_lock);
4555         list_for_each_entry(kvm, &vm_list, vm_list) {
4556                 kvm_for_each_vcpu(i, vcpu, kvm) {
4557                         if (vcpu->cpu != freq->cpu)
4558                                 continue;
4559                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4560                         if (vcpu->cpu != smp_processor_id())
4561                                 send_ipi = 1;
4562                 }
4563         }
4564         spin_unlock(&kvm_lock);
4565
4566         if (freq->old < freq->new && send_ipi) {
4567                 /*
4568                  * We upscale the frequency.  Must make the guest
4569                  * doesn't see old kvmclock values while running with
4570                  * the new frequency, otherwise we risk the guest sees
4571                  * time go backwards.
4572                  *
4573                  * In case we update the frequency for another cpu
4574                  * (which might be in guest context) send an interrupt
4575                  * to kick the cpu out of guest context.  Next time
4576                  * guest context is entered kvmclock will be updated,
4577                  * so the guest will not see stale values.
4578                  */
4579                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4580         }
4581         return 0;
4582 }
4583
4584 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4585         .notifier_call  = kvmclock_cpufreq_notifier
4586 };
4587
4588 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4589                                         unsigned long action, void *hcpu)
4590 {
4591         unsigned int cpu = (unsigned long)hcpu;
4592
4593         switch (action) {
4594                 case CPU_ONLINE:
4595                 case CPU_DOWN_FAILED:
4596                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4597                         break;
4598                 case CPU_DOWN_PREPARE:
4599                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4600                         break;
4601         }
4602         return NOTIFY_OK;
4603 }
4604
4605 static struct notifier_block kvmclock_cpu_notifier_block = {
4606         .notifier_call  = kvmclock_cpu_notifier,
4607         .priority = -INT_MAX
4608 };
4609
4610 static void kvm_timer_init(void)
4611 {
4612         int cpu;
4613
4614         max_tsc_khz = tsc_khz;
4615         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4616         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4617 #ifdef CONFIG_CPU_FREQ
4618                 struct cpufreq_policy policy;
4619                 memset(&policy, 0, sizeof(policy));
4620                 cpu = get_cpu();
4621                 cpufreq_get_policy(&policy, cpu);
4622                 if (policy.cpuinfo.max_freq)
4623                         max_tsc_khz = policy.cpuinfo.max_freq;
4624                 put_cpu();
4625 #endif
4626                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4627                                           CPUFREQ_TRANSITION_NOTIFIER);
4628         }
4629         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4630         for_each_online_cpu(cpu)
4631                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4632 }
4633
4634 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4635
4636 static int kvm_is_in_guest(void)
4637 {
4638         return percpu_read(current_vcpu) != NULL;
4639 }
4640
4641 static int kvm_is_user_mode(void)
4642 {
4643         int user_mode = 3;
4644
4645         if (percpu_read(current_vcpu))
4646                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4647
4648         return user_mode != 0;
4649 }
4650
4651 static unsigned long kvm_get_guest_ip(void)
4652 {
4653         unsigned long ip = 0;
4654
4655         if (percpu_read(current_vcpu))
4656                 ip = kvm_rip_read(percpu_read(current_vcpu));
4657
4658         return ip;
4659 }
4660
4661 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4662         .is_in_guest            = kvm_is_in_guest,
4663         .is_user_mode           = kvm_is_user_mode,
4664         .get_guest_ip           = kvm_get_guest_ip,
4665 };
4666
4667 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4668 {
4669         percpu_write(current_vcpu, vcpu);
4670 }
4671 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4672
4673 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4674 {
4675         percpu_write(current_vcpu, NULL);
4676 }
4677 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4678
4679 int kvm_arch_init(void *opaque)
4680 {
4681         int r;
4682         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4683
4684         if (kvm_x86_ops) {
4685                 printk(KERN_ERR "kvm: already loaded the other module\n");
4686                 r = -EEXIST;
4687                 goto out;
4688         }
4689
4690         if (!ops->cpu_has_kvm_support()) {
4691                 printk(KERN_ERR "kvm: no hardware support\n");
4692                 r = -EOPNOTSUPP;
4693                 goto out;
4694         }
4695         if (ops->disabled_by_bios()) {
4696                 printk(KERN_ERR "kvm: disabled by bios\n");
4697                 r = -EOPNOTSUPP;
4698                 goto out;
4699         }
4700
4701         r = kvm_mmu_module_init();
4702         if (r)
4703                 goto out;
4704
4705         kvm_init_msr_list();
4706
4707         kvm_x86_ops = ops;
4708         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4709         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4710                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4711
4712         kvm_timer_init();
4713
4714         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4715
4716         if (cpu_has_xsave)
4717                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4718
4719         return 0;
4720
4721 out:
4722         return r;
4723 }
4724
4725 void kvm_arch_exit(void)
4726 {
4727         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4728
4729         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4730                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4731                                             CPUFREQ_TRANSITION_NOTIFIER);
4732         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4733         kvm_x86_ops = NULL;
4734         kvm_mmu_module_exit();
4735 }
4736
4737 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4738 {
4739         ++vcpu->stat.halt_exits;
4740         if (irqchip_in_kernel(vcpu->kvm)) {
4741                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4742                 return 1;
4743         } else {
4744                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4745                 return 0;
4746         }
4747 }
4748 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4749
4750 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4751                            unsigned long a1)
4752 {
4753         if (is_long_mode(vcpu))
4754                 return a0;
4755         else
4756                 return a0 | ((gpa_t)a1 << 32);
4757 }
4758
4759 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4760 {
4761         u64 param, ingpa, outgpa, ret;
4762         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4763         bool fast, longmode;
4764         int cs_db, cs_l;
4765
4766         /*
4767          * hypercall generates UD from non zero cpl and real mode
4768          * per HYPER-V spec
4769          */
4770         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4771                 kvm_queue_exception(vcpu, UD_VECTOR);
4772                 return 0;
4773         }
4774
4775         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4776         longmode = is_long_mode(vcpu) && cs_l == 1;
4777
4778         if (!longmode) {
4779                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4780                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4781                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4782                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4783                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4784                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4785         }
4786 #ifdef CONFIG_X86_64
4787         else {
4788                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4789                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4790                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4791         }
4792 #endif
4793
4794         code = param & 0xffff;
4795         fast = (param >> 16) & 0x1;
4796         rep_cnt = (param >> 32) & 0xfff;
4797         rep_idx = (param >> 48) & 0xfff;
4798
4799         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4800
4801         switch (code) {
4802         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4803                 kvm_vcpu_on_spin(vcpu);
4804                 break;
4805         default:
4806                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4807                 break;
4808         }
4809
4810         ret = res | (((u64)rep_done & 0xfff) << 32);
4811         if (longmode) {
4812                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4813         } else {
4814                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4815                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4816         }
4817
4818         return 1;
4819 }
4820
4821 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4822 {
4823         unsigned long nr, a0, a1, a2, a3, ret;
4824         int r = 1;
4825
4826         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4827                 return kvm_hv_hypercall(vcpu);
4828
4829         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4830         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4831         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4832         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4833         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4834
4835         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4836
4837         if (!is_long_mode(vcpu)) {
4838                 nr &= 0xFFFFFFFF;
4839                 a0 &= 0xFFFFFFFF;
4840                 a1 &= 0xFFFFFFFF;
4841                 a2 &= 0xFFFFFFFF;
4842                 a3 &= 0xFFFFFFFF;
4843         }
4844
4845         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4846                 ret = -KVM_EPERM;
4847                 goto out;
4848         }
4849
4850         switch (nr) {
4851         case KVM_HC_VAPIC_POLL_IRQ:
4852                 ret = 0;
4853                 break;
4854         case KVM_HC_MMU_OP:
4855                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4856                 break;
4857         default:
4858                 ret = -KVM_ENOSYS;
4859                 break;
4860         }
4861 out:
4862         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4863         ++vcpu->stat.hypercalls;
4864         return r;
4865 }
4866 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4867
4868 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4869 {
4870         char instruction[3];
4871         unsigned long rip = kvm_rip_read(vcpu);
4872
4873         /*
4874          * Blow out the MMU to ensure that no other VCPU has an active mapping
4875          * to ensure that the updated hypercall appears atomically across all
4876          * VCPUs.
4877          */
4878         kvm_mmu_zap_all(vcpu->kvm);
4879
4880         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4881
4882         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4883 }
4884
4885 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4886 {
4887         struct desc_ptr dt = { limit, base };
4888
4889         kvm_x86_ops->set_gdt(vcpu, &dt);
4890 }
4891
4892 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4893 {
4894         struct desc_ptr dt = { limit, base };
4895
4896         kvm_x86_ops->set_idt(vcpu, &dt);
4897 }
4898
4899 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4900 {
4901         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4902         int j, nent = vcpu->arch.cpuid_nent;
4903
4904         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4905         /* when no next entry is found, the current entry[i] is reselected */
4906         for (j = i + 1; ; j = (j + 1) % nent) {
4907                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4908                 if (ej->function == e->function) {
4909                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4910                         return j;
4911                 }
4912         }
4913         return 0; /* silence gcc, even though control never reaches here */
4914 }
4915
4916 /* find an entry with matching function, matching index (if needed), and that
4917  * should be read next (if it's stateful) */
4918 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4919         u32 function, u32 index)
4920 {
4921         if (e->function != function)
4922                 return 0;
4923         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4924                 return 0;
4925         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4926             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4927                 return 0;
4928         return 1;
4929 }
4930
4931 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4932                                               u32 function, u32 index)
4933 {
4934         int i;
4935         struct kvm_cpuid_entry2 *best = NULL;
4936
4937         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4938                 struct kvm_cpuid_entry2 *e;
4939
4940                 e = &vcpu->arch.cpuid_entries[i];
4941                 if (is_matching_cpuid_entry(e, function, index)) {
4942                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4943                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4944                         best = e;
4945                         break;
4946                 }
4947                 /*
4948                  * Both basic or both extended?
4949                  */
4950                 if (((e->function ^ function) & 0x80000000) == 0)
4951                         if (!best || e->function > best->function)
4952                                 best = e;
4953         }
4954         return best;
4955 }
4956 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4957
4958 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4959 {
4960         struct kvm_cpuid_entry2 *best;
4961
4962         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4963         if (!best || best->eax < 0x80000008)
4964                 goto not_found;
4965         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4966         if (best)
4967                 return best->eax & 0xff;
4968 not_found:
4969         return 36;
4970 }
4971
4972 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4973 {
4974         u32 function, index;
4975         struct kvm_cpuid_entry2 *best;
4976
4977         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4978         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4979         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4980         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4981         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4982         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4983         best = kvm_find_cpuid_entry(vcpu, function, index);
4984         if (best) {
4985                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4986                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4987                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4988                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4989         }
4990         kvm_x86_ops->skip_emulated_instruction(vcpu);
4991         trace_kvm_cpuid(function,
4992                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4993                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4994                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4995                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4996 }
4997 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4998
4999 /*
5000  * Check if userspace requested an interrupt window, and that the
5001  * interrupt window is open.
5002  *
5003  * No need to exit to userspace if we already have an interrupt queued.
5004  */
5005 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5006 {
5007         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5008                 vcpu->run->request_interrupt_window &&
5009                 kvm_arch_interrupt_allowed(vcpu));
5010 }
5011
5012 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5013 {
5014         struct kvm_run *kvm_run = vcpu->run;
5015
5016         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5017         kvm_run->cr8 = kvm_get_cr8(vcpu);
5018         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5019         if (irqchip_in_kernel(vcpu->kvm))
5020                 kvm_run->ready_for_interrupt_injection = 1;
5021         else
5022                 kvm_run->ready_for_interrupt_injection =
5023                         kvm_arch_interrupt_allowed(vcpu) &&
5024                         !kvm_cpu_has_interrupt(vcpu) &&
5025                         !kvm_event_needs_reinjection(vcpu);
5026 }
5027
5028 static void vapic_enter(struct kvm_vcpu *vcpu)
5029 {
5030         struct kvm_lapic *apic = vcpu->arch.apic;
5031         struct page *page;
5032
5033         if (!apic || !apic->vapic_addr)
5034                 return;
5035
5036         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5037
5038         vcpu->arch.apic->vapic_page = page;
5039 }
5040
5041 static void vapic_exit(struct kvm_vcpu *vcpu)
5042 {
5043         struct kvm_lapic *apic = vcpu->arch.apic;
5044         int idx;
5045
5046         if (!apic || !apic->vapic_addr)
5047                 return;
5048
5049         idx = srcu_read_lock(&vcpu->kvm->srcu);
5050         kvm_release_page_dirty(apic->vapic_page);
5051         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5052         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5053 }
5054
5055 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5056 {
5057         int max_irr, tpr;
5058
5059         if (!kvm_x86_ops->update_cr8_intercept)
5060                 return;
5061
5062         if (!vcpu->arch.apic)
5063                 return;
5064
5065         if (!vcpu->arch.apic->vapic_addr)
5066                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5067         else
5068                 max_irr = -1;
5069
5070         if (max_irr != -1)
5071                 max_irr >>= 4;
5072
5073         tpr = kvm_lapic_get_cr8(vcpu);
5074
5075         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5076 }
5077
5078 static void inject_pending_event(struct kvm_vcpu *vcpu)
5079 {
5080         /* try to reinject previous events if any */
5081         if (vcpu->arch.exception.pending) {
5082                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5083                                         vcpu->arch.exception.has_error_code,
5084                                         vcpu->arch.exception.error_code);
5085                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5086                                           vcpu->arch.exception.has_error_code,
5087                                           vcpu->arch.exception.error_code,
5088                                           vcpu->arch.exception.reinject);
5089                 return;
5090         }
5091
5092         if (vcpu->arch.nmi_injected) {
5093                 kvm_x86_ops->set_nmi(vcpu);
5094                 return;
5095         }
5096
5097         if (vcpu->arch.interrupt.pending) {
5098                 kvm_x86_ops->set_irq(vcpu);
5099                 return;
5100         }
5101
5102         /* try to inject new event if pending */
5103         if (vcpu->arch.nmi_pending) {
5104                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5105                         vcpu->arch.nmi_pending = false;
5106                         vcpu->arch.nmi_injected = true;
5107                         kvm_x86_ops->set_nmi(vcpu);
5108                 }
5109         } else if (kvm_cpu_has_interrupt(vcpu)) {
5110                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5111                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5112                                             false);
5113                         kvm_x86_ops->set_irq(vcpu);
5114                 }
5115         }
5116 }
5117
5118 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5119 {
5120         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5121                         !vcpu->guest_xcr0_loaded) {
5122                 /* kvm_set_xcr() also depends on this */
5123                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5124                 vcpu->guest_xcr0_loaded = 1;
5125         }
5126 }
5127
5128 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5129 {
5130         if (vcpu->guest_xcr0_loaded) {
5131                 if (vcpu->arch.xcr0 != host_xcr0)
5132                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5133                 vcpu->guest_xcr0_loaded = 0;
5134         }
5135 }
5136
5137 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5138 {
5139         int r;
5140         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5141                 vcpu->run->request_interrupt_window;
5142
5143         if (vcpu->requests) {
5144                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5145                         kvm_mmu_unload(vcpu);
5146                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5147                         __kvm_migrate_timers(vcpu);
5148                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5149                         r = kvm_guest_time_update(vcpu);
5150                         if (unlikely(r))
5151                                 goto out;
5152                 }
5153                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5154                         kvm_mmu_sync_roots(vcpu);
5155                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5156                         kvm_x86_ops->tlb_flush(vcpu);
5157                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5158                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5159                         r = 0;
5160                         goto out;
5161                 }
5162                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5163                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5164                         r = 0;
5165                         goto out;
5166                 }
5167                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5168                         vcpu->fpu_active = 0;
5169                         kvm_x86_ops->fpu_deactivate(vcpu);
5170                 }
5171                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5172                         /* Page is swapped out. Do synthetic halt */
5173                         vcpu->arch.apf.halted = true;
5174                         r = 1;
5175                         goto out;
5176                 }
5177         }
5178
5179         r = kvm_mmu_reload(vcpu);
5180         if (unlikely(r))
5181                 goto out;
5182
5183         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5184                 inject_pending_event(vcpu);
5185
5186                 /* enable NMI/IRQ window open exits if needed */
5187                 if (vcpu->arch.nmi_pending)
5188                         kvm_x86_ops->enable_nmi_window(vcpu);
5189                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5190                         kvm_x86_ops->enable_irq_window(vcpu);
5191
5192                 if (kvm_lapic_enabled(vcpu)) {
5193                         update_cr8_intercept(vcpu);
5194                         kvm_lapic_sync_to_vapic(vcpu);
5195                 }
5196         }
5197
5198         preempt_disable();
5199
5200         kvm_x86_ops->prepare_guest_switch(vcpu);
5201         if (vcpu->fpu_active)
5202                 kvm_load_guest_fpu(vcpu);
5203         kvm_load_guest_xcr0(vcpu);
5204
5205         atomic_set(&vcpu->guest_mode, 1);
5206         smp_wmb();
5207
5208         local_irq_disable();
5209
5210         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5211             || need_resched() || signal_pending(current)) {
5212                 atomic_set(&vcpu->guest_mode, 0);
5213                 smp_wmb();
5214                 local_irq_enable();
5215                 preempt_enable();
5216                 kvm_x86_ops->cancel_injection(vcpu);
5217                 r = 1;
5218                 goto out;
5219         }
5220
5221         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5222
5223         kvm_guest_enter();
5224
5225         if (unlikely(vcpu->arch.switch_db_regs)) {
5226                 set_debugreg(0, 7);
5227                 set_debugreg(vcpu->arch.eff_db[0], 0);
5228                 set_debugreg(vcpu->arch.eff_db[1], 1);
5229                 set_debugreg(vcpu->arch.eff_db[2], 2);
5230                 set_debugreg(vcpu->arch.eff_db[3], 3);
5231         }
5232
5233         trace_kvm_entry(vcpu->vcpu_id);
5234         kvm_x86_ops->run(vcpu);
5235
5236         /*
5237          * If the guest has used debug registers, at least dr7
5238          * will be disabled while returning to the host.
5239          * If we don't have active breakpoints in the host, we don't
5240          * care about the messed up debug address registers. But if
5241          * we have some of them active, restore the old state.
5242          */
5243         if (hw_breakpoint_active())
5244                 hw_breakpoint_restore();
5245
5246         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5247
5248         atomic_set(&vcpu->guest_mode, 0);
5249         smp_wmb();
5250         local_irq_enable();
5251
5252         ++vcpu->stat.exits;
5253
5254         /*
5255          * We must have an instruction between local_irq_enable() and
5256          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5257          * the interrupt shadow.  The stat.exits increment will do nicely.
5258          * But we need to prevent reordering, hence this barrier():
5259          */
5260         barrier();
5261
5262         kvm_guest_exit();
5263
5264         preempt_enable();
5265
5266         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5267
5268         /*
5269          * Profile KVM exit RIPs:
5270          */
5271         if (unlikely(prof_on == KVM_PROFILING)) {
5272                 unsigned long rip = kvm_rip_read(vcpu);
5273                 profile_hit(KVM_PROFILING, (void *)rip);
5274         }
5275
5276
5277         kvm_lapic_sync_from_vapic(vcpu);
5278
5279         r = kvm_x86_ops->handle_exit(vcpu);
5280 out:
5281         return r;
5282 }
5283
5284
5285 static int __vcpu_run(struct kvm_vcpu *vcpu)
5286 {
5287         int r;
5288         struct kvm *kvm = vcpu->kvm;
5289
5290         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5291                 pr_debug("vcpu %d received sipi with vector # %x\n",
5292                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5293                 kvm_lapic_reset(vcpu);
5294                 r = kvm_arch_vcpu_reset(vcpu);
5295                 if (r)
5296                         return r;
5297                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5298         }
5299
5300         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5301         vapic_enter(vcpu);
5302
5303         r = 1;
5304         while (r > 0) {
5305                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5306                     !vcpu->arch.apf.halted)
5307                         r = vcpu_enter_guest(vcpu);
5308                 else {
5309                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5310                         kvm_vcpu_block(vcpu);
5311                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5312                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5313                         {
5314                                 switch(vcpu->arch.mp_state) {
5315                                 case KVM_MP_STATE_HALTED:
5316                                         vcpu->arch.mp_state =
5317                                                 KVM_MP_STATE_RUNNABLE;
5318                                 case KVM_MP_STATE_RUNNABLE:
5319                                         vcpu->arch.apf.halted = false;
5320                                         break;
5321                                 case KVM_MP_STATE_SIPI_RECEIVED:
5322                                 default:
5323                                         r = -EINTR;
5324                                         break;
5325                                 }
5326                         }
5327                 }
5328
5329                 if (r <= 0)
5330                         break;
5331
5332                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5333                 if (kvm_cpu_has_pending_timer(vcpu))
5334                         kvm_inject_pending_timer_irqs(vcpu);
5335
5336                 if (dm_request_for_irq_injection(vcpu)) {
5337                         r = -EINTR;
5338                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5339                         ++vcpu->stat.request_irq_exits;
5340                 }
5341
5342                 kvm_check_async_pf_completion(vcpu);
5343
5344                 if (signal_pending(current)) {
5345                         r = -EINTR;
5346                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5347                         ++vcpu->stat.signal_exits;
5348                 }
5349                 if (need_resched()) {
5350                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5351                         kvm_resched(vcpu);
5352                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5353                 }
5354         }
5355
5356         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5357
5358         vapic_exit(vcpu);
5359
5360         return r;
5361 }
5362
5363 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5364 {
5365         int r;
5366         sigset_t sigsaved;
5367
5368         if (vcpu->sigset_active)
5369                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5370
5371         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5372                 kvm_vcpu_block(vcpu);
5373                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5374                 r = -EAGAIN;
5375                 goto out;
5376         }
5377
5378         /* re-sync apic's tpr */
5379         if (!irqchip_in_kernel(vcpu->kvm))
5380                 kvm_set_cr8(vcpu, kvm_run->cr8);
5381
5382         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5383                 if (vcpu->mmio_needed) {
5384                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5385                         vcpu->mmio_read_completed = 1;
5386                         vcpu->mmio_needed = 0;
5387                 }
5388                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5389                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5390                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5391                 if (r != EMULATE_DONE) {
5392                         r = 0;
5393                         goto out;
5394                 }
5395         }
5396         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5397                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5398                                      kvm_run->hypercall.ret);
5399
5400         r = __vcpu_run(vcpu);
5401
5402 out:
5403         post_kvm_run_save(vcpu);
5404         if (vcpu->sigset_active)
5405                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5406
5407         return r;
5408 }
5409
5410 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5411 {
5412         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5413         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5414         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5415         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5416         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5417         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5418         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5419         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5420 #ifdef CONFIG_X86_64
5421         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5422         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5423         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5424         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5425         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5426         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5427         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5428         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5429 #endif
5430
5431         regs->rip = kvm_rip_read(vcpu);
5432         regs->rflags = kvm_get_rflags(vcpu);
5433
5434         return 0;
5435 }
5436
5437 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5438 {
5439         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5440         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5441         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5442         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5443         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5444         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5445         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5446         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5447 #ifdef CONFIG_X86_64
5448         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5449         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5450         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5451         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5452         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5453         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5454         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5455         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5456 #endif
5457
5458         kvm_rip_write(vcpu, regs->rip);
5459         kvm_set_rflags(vcpu, regs->rflags);
5460
5461         vcpu->arch.exception.pending = false;
5462
5463         kvm_make_request(KVM_REQ_EVENT, vcpu);
5464
5465         return 0;
5466 }
5467
5468 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5469 {
5470         struct kvm_segment cs;
5471
5472         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5473         *db = cs.db;
5474         *l = cs.l;
5475 }
5476 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5477
5478 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5479                                   struct kvm_sregs *sregs)
5480 {
5481         struct desc_ptr dt;
5482
5483         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5484         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5485         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5486         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5487         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5488         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5489
5490         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5491         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5492
5493         kvm_x86_ops->get_idt(vcpu, &dt);
5494         sregs->idt.limit = dt.size;
5495         sregs->idt.base = dt.address;
5496         kvm_x86_ops->get_gdt(vcpu, &dt);
5497         sregs->gdt.limit = dt.size;
5498         sregs->gdt.base = dt.address;
5499
5500         sregs->cr0 = kvm_read_cr0(vcpu);
5501         sregs->cr2 = vcpu->arch.cr2;
5502         sregs->cr3 = vcpu->arch.cr3;
5503         sregs->cr4 = kvm_read_cr4(vcpu);
5504         sregs->cr8 = kvm_get_cr8(vcpu);
5505         sregs->efer = vcpu->arch.efer;
5506         sregs->apic_base = kvm_get_apic_base(vcpu);
5507
5508         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5509
5510         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5511                 set_bit(vcpu->arch.interrupt.nr,
5512                         (unsigned long *)sregs->interrupt_bitmap);
5513
5514         return 0;
5515 }
5516
5517 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5518                                     struct kvm_mp_state *mp_state)
5519 {
5520         mp_state->mp_state = vcpu->arch.mp_state;
5521         return 0;
5522 }
5523
5524 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5525                                     struct kvm_mp_state *mp_state)
5526 {
5527         vcpu->arch.mp_state = mp_state->mp_state;
5528         kvm_make_request(KVM_REQ_EVENT, vcpu);
5529         return 0;
5530 }
5531
5532 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5533                     bool has_error_code, u32 error_code)
5534 {
5535         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5536         int ret;
5537
5538         init_emulate_ctxt(vcpu);
5539
5540         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5541                                    tss_selector, reason, has_error_code,
5542                                    error_code);
5543
5544         if (ret)
5545                 return EMULATE_FAIL;
5546
5547         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5548         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5549         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5550         kvm_make_request(KVM_REQ_EVENT, vcpu);
5551         return EMULATE_DONE;
5552 }
5553 EXPORT_SYMBOL_GPL(kvm_task_switch);
5554
5555 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5556                                   struct kvm_sregs *sregs)
5557 {
5558         int mmu_reset_needed = 0;
5559         int pending_vec, max_bits;
5560         struct desc_ptr dt;
5561
5562         dt.size = sregs->idt.limit;
5563         dt.address = sregs->idt.base;
5564         kvm_x86_ops->set_idt(vcpu, &dt);
5565         dt.size = sregs->gdt.limit;
5566         dt.address = sregs->gdt.base;
5567         kvm_x86_ops->set_gdt(vcpu, &dt);
5568
5569         vcpu->arch.cr2 = sregs->cr2;
5570         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5571         vcpu->arch.cr3 = sregs->cr3;
5572
5573         kvm_set_cr8(vcpu, sregs->cr8);
5574
5575         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5576         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5577         kvm_set_apic_base(vcpu, sregs->apic_base);
5578
5579         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5580         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5581         vcpu->arch.cr0 = sregs->cr0;
5582
5583         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5584         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5585         if (sregs->cr4 & X86_CR4_OSXSAVE)
5586                 update_cpuid(vcpu);
5587         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5588                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5589                 mmu_reset_needed = 1;
5590         }
5591
5592         if (mmu_reset_needed)
5593                 kvm_mmu_reset_context(vcpu);
5594
5595         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5596         pending_vec = find_first_bit(
5597                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5598         if (pending_vec < max_bits) {
5599                 kvm_queue_interrupt(vcpu, pending_vec, false);
5600                 pr_debug("Set back pending irq %d\n", pending_vec);
5601                 if (irqchip_in_kernel(vcpu->kvm))
5602                         kvm_pic_clear_isr_ack(vcpu->kvm);
5603         }
5604
5605         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5606         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5607         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5608         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5609         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5610         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5611
5612         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5613         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5614
5615         update_cr8_intercept(vcpu);
5616
5617         /* Older userspace won't unhalt the vcpu on reset. */
5618         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5619             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5620             !is_protmode(vcpu))
5621                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5622
5623         kvm_make_request(KVM_REQ_EVENT, vcpu);
5624
5625         return 0;
5626 }
5627
5628 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5629                                         struct kvm_guest_debug *dbg)
5630 {
5631         unsigned long rflags;
5632         int i, r;
5633
5634         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5635                 r = -EBUSY;
5636                 if (vcpu->arch.exception.pending)
5637                         goto out;
5638                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5639                         kvm_queue_exception(vcpu, DB_VECTOR);
5640                 else
5641                         kvm_queue_exception(vcpu, BP_VECTOR);
5642         }
5643
5644         /*
5645          * Read rflags as long as potentially injected trace flags are still
5646          * filtered out.
5647          */
5648         rflags = kvm_get_rflags(vcpu);
5649
5650         vcpu->guest_debug = dbg->control;
5651         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5652                 vcpu->guest_debug = 0;
5653
5654         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5655                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5656                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5657                 vcpu->arch.switch_db_regs =
5658                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5659         } else {
5660                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5661                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5662                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5663         }
5664
5665         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5666                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5667                         get_segment_base(vcpu, VCPU_SREG_CS);
5668
5669         /*
5670          * Trigger an rflags update that will inject or remove the trace
5671          * flags.
5672          */
5673         kvm_set_rflags(vcpu, rflags);
5674
5675         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5676
5677         r = 0;
5678
5679 out:
5680
5681         return r;
5682 }
5683
5684 /*
5685  * Translate a guest virtual address to a guest physical address.
5686  */
5687 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5688                                     struct kvm_translation *tr)
5689 {
5690         unsigned long vaddr = tr->linear_address;
5691         gpa_t gpa;
5692         int idx;
5693
5694         idx = srcu_read_lock(&vcpu->kvm->srcu);
5695         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5696         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5697         tr->physical_address = gpa;
5698         tr->valid = gpa != UNMAPPED_GVA;
5699         tr->writeable = 1;
5700         tr->usermode = 0;
5701
5702         return 0;
5703 }
5704
5705 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5706 {
5707         struct i387_fxsave_struct *fxsave =
5708                         &vcpu->arch.guest_fpu.state->fxsave;
5709
5710         memcpy(fpu->fpr, fxsave->st_space, 128);
5711         fpu->fcw = fxsave->cwd;
5712         fpu->fsw = fxsave->swd;
5713         fpu->ftwx = fxsave->twd;
5714         fpu->last_opcode = fxsave->fop;
5715         fpu->last_ip = fxsave->rip;
5716         fpu->last_dp = fxsave->rdp;
5717         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5718
5719         return 0;
5720 }
5721
5722 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5723 {
5724         struct i387_fxsave_struct *fxsave =
5725                         &vcpu->arch.guest_fpu.state->fxsave;
5726
5727         memcpy(fxsave->st_space, fpu->fpr, 128);
5728         fxsave->cwd = fpu->fcw;
5729         fxsave->swd = fpu->fsw;
5730         fxsave->twd = fpu->ftwx;
5731         fxsave->fop = fpu->last_opcode;
5732         fxsave->rip = fpu->last_ip;
5733         fxsave->rdp = fpu->last_dp;
5734         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5735
5736         return 0;
5737 }
5738
5739 int fx_init(struct kvm_vcpu *vcpu)
5740 {
5741         int err;
5742
5743         err = fpu_alloc(&vcpu->arch.guest_fpu);
5744         if (err)
5745                 return err;
5746
5747         fpu_finit(&vcpu->arch.guest_fpu);
5748
5749         /*
5750          * Ensure guest xcr0 is valid for loading
5751          */
5752         vcpu->arch.xcr0 = XSTATE_FP;
5753
5754         vcpu->arch.cr0 |= X86_CR0_ET;
5755
5756         return 0;
5757 }
5758 EXPORT_SYMBOL_GPL(fx_init);
5759
5760 static void fx_free(struct kvm_vcpu *vcpu)
5761 {
5762         fpu_free(&vcpu->arch.guest_fpu);
5763 }
5764
5765 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5766 {
5767         if (vcpu->guest_fpu_loaded)
5768                 return;
5769
5770         /*
5771          * Restore all possible states in the guest,
5772          * and assume host would use all available bits.
5773          * Guest xcr0 would be loaded later.
5774          */
5775         kvm_put_guest_xcr0(vcpu);
5776         vcpu->guest_fpu_loaded = 1;
5777         unlazy_fpu(current);
5778         fpu_restore_checking(&vcpu->arch.guest_fpu);
5779         trace_kvm_fpu(1);
5780 }
5781
5782 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5783 {
5784         kvm_put_guest_xcr0(vcpu);
5785
5786         if (!vcpu->guest_fpu_loaded)
5787                 return;
5788
5789         vcpu->guest_fpu_loaded = 0;
5790         fpu_save_init(&vcpu->arch.guest_fpu);
5791         ++vcpu->stat.fpu_reload;
5792         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5793         trace_kvm_fpu(0);
5794 }
5795
5796 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5797 {
5798         if (vcpu->arch.time_page) {
5799                 kvm_release_page_dirty(vcpu->arch.time_page);
5800                 vcpu->arch.time_page = NULL;
5801         }
5802
5803         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5804         fx_free(vcpu);
5805         kvm_x86_ops->vcpu_free(vcpu);
5806 }
5807
5808 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5809                                                 unsigned int id)
5810 {
5811         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5812                 printk_once(KERN_WARNING
5813                 "kvm: SMP vm created on host with unstable TSC; "
5814                 "guest TSC will not be reliable\n");
5815         return kvm_x86_ops->vcpu_create(kvm, id);
5816 }
5817
5818 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5819 {
5820         int r;
5821
5822         vcpu->arch.mtrr_state.have_fixed = 1;
5823         vcpu_load(vcpu);
5824         r = kvm_arch_vcpu_reset(vcpu);
5825         if (r == 0)
5826                 r = kvm_mmu_setup(vcpu);
5827         vcpu_put(vcpu);
5828         if (r < 0)
5829                 goto free_vcpu;
5830
5831         return 0;
5832 free_vcpu:
5833         kvm_x86_ops->vcpu_free(vcpu);
5834         return r;
5835 }
5836
5837 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5838 {
5839         vcpu->arch.apf.msr_val = 0;
5840
5841         vcpu_load(vcpu);
5842         kvm_mmu_unload(vcpu);
5843         vcpu_put(vcpu);
5844
5845         fx_free(vcpu);
5846         kvm_x86_ops->vcpu_free(vcpu);
5847 }
5848
5849 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5850 {
5851         vcpu->arch.nmi_pending = false;
5852         vcpu->arch.nmi_injected = false;
5853
5854         vcpu->arch.switch_db_regs = 0;
5855         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5856         vcpu->arch.dr6 = DR6_FIXED_1;
5857         vcpu->arch.dr7 = DR7_FIXED_1;
5858
5859         kvm_make_request(KVM_REQ_EVENT, vcpu);
5860         vcpu->arch.apf.msr_val = 0;
5861
5862         kvm_clear_async_pf_completion_queue(vcpu);
5863         kvm_async_pf_hash_reset(vcpu);
5864         vcpu->arch.apf.halted = false;
5865
5866         return kvm_x86_ops->vcpu_reset(vcpu);
5867 }
5868
5869 int kvm_arch_hardware_enable(void *garbage)
5870 {
5871         struct kvm *kvm;
5872         struct kvm_vcpu *vcpu;
5873         int i;
5874
5875         kvm_shared_msr_cpu_online();
5876         list_for_each_entry(kvm, &vm_list, vm_list)
5877                 kvm_for_each_vcpu(i, vcpu, kvm)
5878                         if (vcpu->cpu == smp_processor_id())
5879                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5880         return kvm_x86_ops->hardware_enable(garbage);
5881 }
5882
5883 void kvm_arch_hardware_disable(void *garbage)
5884 {
5885         kvm_x86_ops->hardware_disable(garbage);
5886         drop_user_return_notifiers(garbage);
5887 }
5888
5889 int kvm_arch_hardware_setup(void)
5890 {
5891         return kvm_x86_ops->hardware_setup();
5892 }
5893
5894 void kvm_arch_hardware_unsetup(void)
5895 {
5896         kvm_x86_ops->hardware_unsetup();
5897 }
5898
5899 void kvm_arch_check_processor_compat(void *rtn)
5900 {
5901         kvm_x86_ops->check_processor_compatibility(rtn);
5902 }
5903
5904 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5905 {
5906         struct page *page;
5907         struct kvm *kvm;
5908         int r;
5909
5910         BUG_ON(vcpu->kvm == NULL);
5911         kvm = vcpu->kvm;
5912
5913         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5914         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5915         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5916         vcpu->arch.mmu.translate_gpa = translate_gpa;
5917         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5918         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5919                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5920         else
5921                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5922
5923         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5924         if (!page) {
5925                 r = -ENOMEM;
5926                 goto fail;
5927         }
5928         vcpu->arch.pio_data = page_address(page);
5929
5930         if (!kvm->arch.virtual_tsc_khz)
5931                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5932
5933         r = kvm_mmu_create(vcpu);
5934         if (r < 0)
5935                 goto fail_free_pio_data;
5936
5937         if (irqchip_in_kernel(kvm)) {
5938                 r = kvm_create_lapic(vcpu);
5939                 if (r < 0)
5940                         goto fail_mmu_destroy;
5941         }
5942
5943         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5944                                        GFP_KERNEL);
5945         if (!vcpu->arch.mce_banks) {
5946                 r = -ENOMEM;
5947                 goto fail_free_lapic;
5948         }
5949         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5950
5951         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5952                 goto fail_free_mce_banks;
5953
5954         kvm_async_pf_hash_reset(vcpu);
5955
5956         return 0;
5957 fail_free_mce_banks:
5958         kfree(vcpu->arch.mce_banks);
5959 fail_free_lapic:
5960         kvm_free_lapic(vcpu);
5961 fail_mmu_destroy:
5962         kvm_mmu_destroy(vcpu);
5963 fail_free_pio_data:
5964         free_page((unsigned long)vcpu->arch.pio_data);
5965 fail:
5966         return r;
5967 }
5968
5969 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5970 {
5971         int idx;
5972
5973         kfree(vcpu->arch.mce_banks);
5974         kvm_free_lapic(vcpu);
5975         idx = srcu_read_lock(&vcpu->kvm->srcu);
5976         kvm_mmu_destroy(vcpu);
5977         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5978         free_page((unsigned long)vcpu->arch.pio_data);
5979 }
5980
5981 int kvm_arch_init_vm(struct kvm *kvm)
5982 {
5983         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5984         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5985
5986         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5987         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5988
5989         spin_lock_init(&kvm->arch.tsc_write_lock);
5990
5991         return 0;
5992 }
5993
5994 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5995 {
5996         vcpu_load(vcpu);
5997         kvm_mmu_unload(vcpu);
5998         vcpu_put(vcpu);
5999 }
6000
6001 static void kvm_free_vcpus(struct kvm *kvm)
6002 {
6003         unsigned int i;
6004         struct kvm_vcpu *vcpu;
6005
6006         /*
6007          * Unpin any mmu pages first.
6008          */
6009         kvm_for_each_vcpu(i, vcpu, kvm) {
6010                 kvm_clear_async_pf_completion_queue(vcpu);
6011                 kvm_unload_vcpu_mmu(vcpu);
6012         }
6013         kvm_for_each_vcpu(i, vcpu, kvm)
6014                 kvm_arch_vcpu_free(vcpu);
6015
6016         mutex_lock(&kvm->lock);
6017         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6018                 kvm->vcpus[i] = NULL;
6019
6020         atomic_set(&kvm->online_vcpus, 0);
6021         mutex_unlock(&kvm->lock);
6022 }
6023
6024 void kvm_arch_sync_events(struct kvm *kvm)
6025 {
6026         kvm_free_all_assigned_devices(kvm);
6027         kvm_free_pit(kvm);
6028 }
6029
6030 void kvm_arch_destroy_vm(struct kvm *kvm)
6031 {
6032         kvm_iommu_unmap_guest(kvm);
6033         kfree(kvm->arch.vpic);
6034         kfree(kvm->arch.vioapic);
6035         kvm_free_vcpus(kvm);
6036         if (kvm->arch.apic_access_page)
6037                 put_page(kvm->arch.apic_access_page);
6038         if (kvm->arch.ept_identity_pagetable)
6039                 put_page(kvm->arch.ept_identity_pagetable);
6040 }
6041
6042 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6043                                 struct kvm_memory_slot *memslot,
6044                                 struct kvm_memory_slot old,
6045                                 struct kvm_userspace_memory_region *mem,
6046                                 int user_alloc)
6047 {
6048         int npages = memslot->npages;
6049         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6050
6051         /* Prevent internal slot pages from being moved by fork()/COW. */
6052         if (memslot->id >= KVM_MEMORY_SLOTS)
6053                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6054
6055         /*To keep backward compatibility with older userspace,
6056          *x86 needs to hanlde !user_alloc case.
6057          */
6058         if (!user_alloc) {
6059                 if (npages && !old.rmap) {
6060                         unsigned long userspace_addr;
6061
6062                         down_write(&current->mm->mmap_sem);
6063                         userspace_addr = do_mmap(NULL, 0,
6064                                                  npages * PAGE_SIZE,
6065                                                  PROT_READ | PROT_WRITE,
6066                                                  map_flags,
6067                                                  0);
6068                         up_write(&current->mm->mmap_sem);
6069
6070                         if (IS_ERR((void *)userspace_addr))
6071                                 return PTR_ERR((void *)userspace_addr);
6072
6073                         memslot->userspace_addr = userspace_addr;
6074                 }
6075         }
6076
6077
6078         return 0;
6079 }
6080
6081 void kvm_arch_commit_memory_region(struct kvm *kvm,
6082                                 struct kvm_userspace_memory_region *mem,
6083                                 struct kvm_memory_slot old,
6084                                 int user_alloc)
6085 {
6086
6087         int npages = mem->memory_size >> PAGE_SHIFT;
6088
6089         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6090                 int ret;
6091
6092                 down_write(&current->mm->mmap_sem);
6093                 ret = do_munmap(current->mm, old.userspace_addr,
6094                                 old.npages * PAGE_SIZE);
6095                 up_write(&current->mm->mmap_sem);
6096                 if (ret < 0)
6097                         printk(KERN_WARNING
6098                                "kvm_vm_ioctl_set_memory_region: "
6099                                "failed to munmap memory\n");
6100         }
6101
6102         spin_lock(&kvm->mmu_lock);
6103         if (!kvm->arch.n_requested_mmu_pages) {
6104                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6105                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6106         }
6107
6108         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6109         spin_unlock(&kvm->mmu_lock);
6110 }
6111
6112 void kvm_arch_flush_shadow(struct kvm *kvm)
6113 {
6114         kvm_mmu_zap_all(kvm);
6115         kvm_reload_remote_mmus(kvm);
6116 }
6117
6118 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6119 {
6120         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6121                 !vcpu->arch.apf.halted)
6122                 || !list_empty_careful(&vcpu->async_pf.done)
6123                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6124                 || vcpu->arch.nmi_pending ||
6125                 (kvm_arch_interrupt_allowed(vcpu) &&
6126                  kvm_cpu_has_interrupt(vcpu));
6127 }
6128
6129 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6130 {
6131         int me;
6132         int cpu = vcpu->cpu;
6133
6134         if (waitqueue_active(&vcpu->wq)) {
6135                 wake_up_interruptible(&vcpu->wq);
6136                 ++vcpu->stat.halt_wakeup;
6137         }
6138
6139         me = get_cpu();
6140         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6141                 if (atomic_xchg(&vcpu->guest_mode, 0))
6142                         smp_send_reschedule(cpu);
6143         put_cpu();
6144 }
6145
6146 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6147 {
6148         return kvm_x86_ops->interrupt_allowed(vcpu);
6149 }
6150
6151 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6152 {
6153         unsigned long current_rip = kvm_rip_read(vcpu) +
6154                 get_segment_base(vcpu, VCPU_SREG_CS);
6155
6156         return current_rip == linear_rip;
6157 }
6158 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6159
6160 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6161 {
6162         unsigned long rflags;
6163
6164         rflags = kvm_x86_ops->get_rflags(vcpu);
6165         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6166                 rflags &= ~X86_EFLAGS_TF;
6167         return rflags;
6168 }
6169 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6170
6171 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6172 {
6173         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6174             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6175                 rflags |= X86_EFLAGS_TF;
6176         kvm_x86_ops->set_rflags(vcpu, rflags);
6177         kvm_make_request(KVM_REQ_EVENT, vcpu);
6178 }
6179 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6180
6181 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6182 {
6183         int r;
6184
6185         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6186               is_error_page(work->page))
6187                 return;
6188
6189         r = kvm_mmu_reload(vcpu);
6190         if (unlikely(r))
6191                 return;
6192
6193         if (!vcpu->arch.mmu.direct_map &&
6194               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6195                 return;
6196
6197         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6198 }
6199
6200 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6201 {
6202         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6203 }
6204
6205 static inline u32 kvm_async_pf_next_probe(u32 key)
6206 {
6207         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6208 }
6209
6210 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6211 {
6212         u32 key = kvm_async_pf_hash_fn(gfn);
6213
6214         while (vcpu->arch.apf.gfns[key] != ~0)
6215                 key = kvm_async_pf_next_probe(key);
6216
6217         vcpu->arch.apf.gfns[key] = gfn;
6218 }
6219
6220 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6221 {
6222         int i;
6223         u32 key = kvm_async_pf_hash_fn(gfn);
6224
6225         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6226                      (vcpu->arch.apf.gfns[key] != gfn &&
6227                       vcpu->arch.apf.gfns[key] != ~0); i++)
6228                 key = kvm_async_pf_next_probe(key);
6229
6230         return key;
6231 }
6232
6233 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6234 {
6235         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6236 }
6237
6238 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6239 {
6240         u32 i, j, k;
6241
6242         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6243         while (true) {
6244                 vcpu->arch.apf.gfns[i] = ~0;
6245                 do {
6246                         j = kvm_async_pf_next_probe(j);
6247                         if (vcpu->arch.apf.gfns[j] == ~0)
6248                                 return;
6249                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6250                         /*
6251                          * k lies cyclically in ]i,j]
6252                          * |    i.k.j |
6253                          * |....j i.k.| or  |.k..j i...|
6254                          */
6255                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6256                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6257                 i = j;
6258         }
6259 }
6260
6261 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6262 {
6263
6264         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6265                                       sizeof(val));
6266 }
6267
6268 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6269                                      struct kvm_async_pf *work)
6270 {
6271         struct x86_exception fault;
6272
6273         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6274         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6275
6276         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6277             (vcpu->arch.apf.send_user_only &&
6278              kvm_x86_ops->get_cpl(vcpu) == 0))
6279                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6280         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6281                 fault.vector = PF_VECTOR;
6282                 fault.error_code_valid = true;
6283                 fault.error_code = 0;
6284                 fault.nested_page_fault = false;
6285                 fault.address = work->arch.token;
6286                 kvm_inject_page_fault(vcpu, &fault);
6287         }
6288 }
6289
6290 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6291                                  struct kvm_async_pf *work)
6292 {
6293         struct x86_exception fault;
6294
6295         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6296         if (is_error_page(work->page))
6297                 work->arch.token = ~0; /* broadcast wakeup */
6298         else
6299                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6300
6301         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6302             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6303                 fault.vector = PF_VECTOR;
6304                 fault.error_code_valid = true;
6305                 fault.error_code = 0;
6306                 fault.nested_page_fault = false;
6307                 fault.address = work->arch.token;
6308                 kvm_inject_page_fault(vcpu, &fault);
6309         }
6310         vcpu->arch.apf.halted = false;
6311 }
6312
6313 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6314 {
6315         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6316                 return true;
6317         else
6318                 return !kvm_event_needs_reinjection(vcpu) &&
6319                         kvm_x86_ops->interrupt_allowed(vcpu);
6320 }
6321
6322 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6323 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6324 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6325 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6326 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6327 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6328 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6329 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6330 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6331 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6332 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6333 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);