arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58 #include <asm/pvclock.h>
  59 #include <asm/div64.h>
  60
  61 #define MAX_IO_MSRS 256
  62 #define CR0_RESERVED_BITS                                               \
  63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  66 #define CR4_RESERVED_BITS                                               \
  67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  70                           | X86_CR4_OSXSAVE \
  71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  72
  73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  74
  75 #define KVM_MAX_MCE_BANKS 32
  76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  84 #else
  85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  86 #endif
  87
  88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  90
  91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  93                                     struct kvm_cpuid_entry2 __user *entries);
  94
  95 struct kvm_x86_ops *kvm_x86_ops;
  96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  97
  98 int ignore_msrs = 0;
  99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 100
 101 #define KVM_NR_SHARED_MSRS 16
 102
 103 struct kvm_shared_msrs_global {
 104         int nr;
 105         u32 msrs[KVM_NR_SHARED_MSRS];
 106 };
 107
 108 struct kvm_shared_msrs {
 109         struct user_return_notifier urn;
 110         bool registered;
 111         struct kvm_shared_msr_values {
 112                 u64 host;
 113                 u64 curr;
 114         } values[KVM_NR_SHARED_MSRS];
 115 };
 116
 117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 119
 120 struct kvm_stats_debugfs_item debugfs_entries[] = {
 121         { "pf_fixed", VCPU_STAT(pf_fixed) },
 122         { "pf_guest", VCPU_STAT(pf_guest) },
 123         { "tlb_flush", VCPU_STAT(tlb_flush) },
 124         { "invlpg", VCPU_STAT(invlpg) },
 125         { "exits", VCPU_STAT(exits) },
 126         { "io_exits", VCPU_STAT(io_exits) },
 127         { "mmio_exits", VCPU_STAT(mmio_exits) },
 128         { "signal_exits", VCPU_STAT(signal_exits) },
 129         { "irq_window", VCPU_STAT(irq_window_exits) },
 130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 131         { "halt_exits", VCPU_STAT(halt_exits) },
 132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 133         { "hypercalls", VCPU_STAT(hypercalls) },
 134         { "request_irq", VCPU_STAT(request_irq_exits) },
 135         { "irq_exits", VCPU_STAT(irq_exits) },
 136         { "host_state_reload", VCPU_STAT(host_state_reload) },
 137         { "efer_reload", VCPU_STAT(efer_reload) },
 138         { "fpu_reload", VCPU_STAT(fpu_reload) },
 139         { "insn_emulation", VCPU_STAT(insn_emulation) },
 140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 141         { "irq_injections", VCPU_STAT(irq_injections) },
 142         { "nmi_injections", VCPU_STAT(nmi_injections) },
 143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 147         { "mmu_flooded", VM_STAT(mmu_flooded) },
 148         { "mmu_recycled", VM_STAT(mmu_recycled) },
 149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 150         { "mmu_unsync", VM_STAT(mmu_unsync) },
 151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 152         { "largepages", VM_STAT(lpages) },
 153         { NULL }
 154 };
 155
 156 u64 __read_mostly host_xcr0;
 157
 158 static inline u32 bit(int bitno)
 159 {
 160         return 1 << (bitno & 31);
 161 }
 162
 163 static void kvm_on_user_return(struct user_return_notifier *urn)
 164 {
 165         unsigned slot;
 166         struct kvm_shared_msrs *locals
 167                 = container_of(urn, struct kvm_shared_msrs, urn);
 168         struct kvm_shared_msr_values *values;
 169
 170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 171                 values = &locals->values[slot];
 172                 if (values->host != values->curr) {
 173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 174                         values->curr = values->host;
 175                 }
 176         }
 177         locals->registered = false;
 178         user_return_notifier_unregister(urn);
 179 }
 180
 181 static void shared_msr_update(unsigned slot, u32 msr)
 182 {
 183         struct kvm_shared_msrs *smsr;
 184         u64 value;
 185
 186         smsr = &__get_cpu_var(shared_msrs);
 187         /* only read, and nobody should modify it at this time,
 188          * so don't need lock */
 189         if (slot >= shared_msrs_global.nr) {
 190                 printk(KERN_ERR "kvm: invalid MSR slot!");
 191                 return;
 192         }
 193         rdmsrl_safe(msr, &value);
 194         smsr->values[slot].host = value;
 195         smsr->values[slot].curr = value;
 196 }
 197
 198 void kvm_define_shared_msr(unsigned slot, u32 msr)
 199 {
 200         if (slot >= shared_msrs_global.nr)
 201                 shared_msrs_global.nr = slot + 1;
 202         shared_msrs_global.msrs[slot] = msr;
 203         /* we need ensured the shared_msr_global have been updated */
 204         smp_wmb();
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 207
 208 static void kvm_shared_msr_cpu_online(void)
 209 {
 210         unsigned i;
 211
 212         for (i = 0; i < shared_msrs_global.nr; ++i)
 213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 214 }
 215
 216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 217 {
 218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 219
 220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 221                 return;
 222         smsr->values[slot].curr = value;
 223         wrmsrl(shared_msrs_global.msrs[slot], value);
 224         if (!smsr->registered) {
 225                 smsr->urn.on_user_return = kvm_on_user_return;
 226                 user_return_notifier_register(&smsr->urn);
 227                 smsr->registered = true;
 228         }
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 231
 232 static void drop_user_return_notifiers(void *ignore)
 233 {
 234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 235
 236         if (smsr->registered)
 237                 kvm_on_user_return(&smsr->urn);
 238 }
 239
 240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 241 {
 242         if (irqchip_in_kernel(vcpu->kvm))
 243                 return vcpu->arch.apic_base;
 244         else
 245                 return vcpu->arch.apic_base;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 248
 249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 250 {
 251         /* TODO: reserve bits check */
 252         if (irqchip_in_kernel(vcpu->kvm))
 253                 kvm_lapic_set_base(vcpu, data);
 254         else
 255                 vcpu->arch.apic_base = data;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 258
 259 #define EXCPT_BENIGN            0
 260 #define EXCPT_CONTRIBUTORY      1
 261 #define EXCPT_PF                2
 262
 263 static int exception_class(int vector)
 264 {
 265         switch (vector) {
 266         case PF_VECTOR:
 267                 return EXCPT_PF;
 268         case DE_VECTOR:
 269         case TS_VECTOR:
 270         case NP_VECTOR:
 271         case SS_VECTOR:
 272         case GP_VECTOR:
 273                 return EXCPT_CONTRIBUTORY;
 274         default:
 275                 break;
 276         }
 277         return EXCPT_BENIGN;
 278 }
 279
 280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 281                 unsigned nr, bool has_error, u32 error_code,
 282                 bool reinject)
 283 {
 284         u32 prev_nr;
 285         int class1, class2;
 286
 287         kvm_make_request(KVM_REQ_EVENT, vcpu);
 288
 289         if (!vcpu->arch.exception.pending) {
 290         queue:
 291                 vcpu->arch.exception.pending = true;
 292                 vcpu->arch.exception.has_error_code = has_error;
 293                 vcpu->arch.exception.nr = nr;
 294                 vcpu->arch.exception.error_code = error_code;
 295                 vcpu->arch.exception.reinject = reinject;
 296                 return;
 297         }
 298
 299         /* to check exception */
 300         prev_nr = vcpu->arch.exception.nr;
 301         if (prev_nr == DF_VECTOR) {
 302                 /* triple fault -> shutdown */
 303                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 304                 return;
 305         }
 306         class1 = exception_class(prev_nr);
 307         class2 = exception_class(nr);
 308         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 309                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 310                 /* generate double fault per SDM Table 5-5 */
 311                 vcpu->arch.exception.pending = true;
 312                 vcpu->arch.exception.has_error_code = true;
 313                 vcpu->arch.exception.nr = DF_VECTOR;
 314                 vcpu->arch.exception.error_code = 0;
 315         } else
 316                 /* replace previous exception with a new one in a hope
 317                    that instruction re-execution will regenerate lost
 318                    exception */
 319                 goto queue;
 320 }
 321
 322 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 323 {
 324         kvm_multiple_exception(vcpu, nr, false, 0, false);
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 327
 328 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, true);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 333
 334 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 335 {
 336         unsigned error_code = vcpu->arch.fault.error_code;
 337
 338         ++vcpu->stat.pf_guest;
 339         vcpu->arch.cr2 = vcpu->arch.fault.address;
 340         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 341 }
 342
 343 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 344 {
 345         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 346                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 347         else
 348                 vcpu->arch.mmu.inject_page_fault(vcpu);
 349
 350         vcpu->arch.fault.nested = false;
 351 }
 352
 353 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 354 {
 355         kvm_make_request(KVM_REQ_EVENT, vcpu);
 356         vcpu->arch.nmi_pending = 1;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 359
 360 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 361 {
 362         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 365
 366 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 367 {
 368         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 371
 372 /*
 373  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 374  * a #GP and return false.
 375  */
 376 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 377 {
 378         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 379                 return true;
 380         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 381         return false;
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 384
 385 /*
 386  * This function will be used to read from the physical memory of the currently
 387  * running guest. The difference to kvm_read_guest_page is that this function
 388  * can read from guest physical or from the guest's guest physical memory.
 389  */
 390 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 391                             gfn_t ngfn, void *data, int offset, int len,
 392                             u32 access)
 393 {
 394         gfn_t real_gfn;
 395         gpa_t ngpa;
 396
 397         ngpa     = gfn_to_gpa(ngfn);
 398         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 399         if (real_gfn == UNMAPPED_GVA)
 400                 return -EFAULT;
 401
 402         real_gfn = gpa_to_gfn(real_gfn);
 403
 404         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 405 }
 406 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 407
 408 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 409                                void *data, int offset, int len, u32 access)
 410 {
 411         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 412                                        data, offset, len, access);
 413 }
 414
 415 /*
 416  * Load the pae pdptrs.  Return true is they are all valid.
 417  */
 418 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 419 {
 420         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 421         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 422         int i;
 423         int ret;
 424         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 425
 426         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 427                                       offset * sizeof(u64), sizeof(pdpte),
 428                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 429         if (ret < 0) {
 430                 ret = 0;
 431                 goto out;
 432         }
 433         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 434                 if (is_present_gpte(pdpte[i]) &&
 435                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 436                         ret = 0;
 437                         goto out;
 438                 }
 439         }
 440         ret = 1;
 441
 442         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 443         __set_bit(VCPU_EXREG_PDPTR,
 444                   (unsigned long *)&vcpu->arch.regs_avail);
 445         __set_bit(VCPU_EXREG_PDPTR,
 446                   (unsigned long *)&vcpu->arch.regs_dirty);
 447 out:
 448
 449         return ret;
 450 }
 451 EXPORT_SYMBOL_GPL(load_pdptrs);
 452
 453 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 454 {
 455         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 456         bool changed = true;
 457         int offset;
 458         gfn_t gfn;
 459         int r;
 460
 461         if (is_long_mode(vcpu) || !is_pae(vcpu))
 462                 return false;
 463
 464         if (!test_bit(VCPU_EXREG_PDPTR,
 465                       (unsigned long *)&vcpu->arch.regs_avail))
 466                 return true;
 467
 468         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 469         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 470         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 471                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 472         if (r < 0)
 473                 goto out;
 474         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 475 out:
 476
 477         return changed;
 478 }
 479
 480 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 481 {
 482         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 483         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 484                                     X86_CR0_CD | X86_CR0_NW;
 485
 486         cr0 |= X86_CR0_ET;
 487
 488 #ifdef CONFIG_X86_64
 489         if (cr0 & 0xffffffff00000000UL)
 490                 return 1;
 491 #endif
 492
 493         cr0 &= ~CR0_RESERVED_BITS;
 494
 495         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 496                 return 1;
 497
 498         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 499                 return 1;
 500
 501         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 502 #ifdef CONFIG_X86_64
 503                 if ((vcpu->arch.efer & EFER_LME)) {
 504                         int cs_db, cs_l;
 505
 506                         if (!is_pae(vcpu))
 507                                 return 1;
 508                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 509                         if (cs_l)
 510                                 return 1;
 511                 } else
 512 #endif
 513                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 514                                                  vcpu->arch.cr3))
 515                         return 1;
 516         }
 517
 518         kvm_x86_ops->set_cr0(vcpu, cr0);
 519
 520         if ((cr0 ^ old_cr0) & update_bits)
 521                 kvm_mmu_reset_context(vcpu);
 522         return 0;
 523 }
 524 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 525
 526 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 527 {
 528         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 529 }
 530 EXPORT_SYMBOL_GPL(kvm_lmsw);
 531
 532 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 533 {
 534         u64 xcr0;
 535
 536         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 537         if (index != XCR_XFEATURE_ENABLED_MASK)
 538                 return 1;
 539         xcr0 = xcr;
 540         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 541                 return 1;
 542         if (!(xcr0 & XSTATE_FP))
 543                 return 1;
 544         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 545                 return 1;
 546         if (xcr0 & ~host_xcr0)
 547                 return 1;
 548         vcpu->arch.xcr0 = xcr0;
 549         vcpu->guest_xcr0_loaded = 0;
 550         return 0;
 551 }
 552
 553 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 554 {
 555         if (__kvm_set_xcr(vcpu, index, xcr)) {
 556                 kvm_inject_gp(vcpu, 0);
 557                 return 1;
 558         }
 559         return 0;
 560 }
 561 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 562
 563 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 564 {
 565         struct kvm_cpuid_entry2 *best;
 566
 567         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 568         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 569 }
 570
 571 static void update_cpuid(struct kvm_vcpu *vcpu)
 572 {
 573         struct kvm_cpuid_entry2 *best;
 574
 575         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 576         if (!best)
 577                 return;
 578
 579         /* Update OSXSAVE bit */
 580         if (cpu_has_xsave && best->function == 0x1) {
 581                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 582                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 583                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 584         }
 585 }
 586
 587 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 588 {
 589         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 590         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 591
 592         if (cr4 & CR4_RESERVED_BITS)
 593                 return 1;
 594
 595         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 596                 return 1;
 597
 598         if (is_long_mode(vcpu)) {
 599                 if (!(cr4 & X86_CR4_PAE))
 600                         return 1;
 601         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 602                    && ((cr4 ^ old_cr4) & pdptr_bits)
 603                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 604                 return 1;
 605
 606         if (cr4 & X86_CR4_VMXE)
 607                 return 1;
 608
 609         kvm_x86_ops->set_cr4(vcpu, cr4);
 610
 611         if ((cr4 ^ old_cr4) & pdptr_bits)
 612                 kvm_mmu_reset_context(vcpu);
 613
 614         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 615                 update_cpuid(vcpu);
 616
 617         return 0;
 618 }
 619 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 620
 621 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 622 {
 623         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 624                 kvm_mmu_sync_roots(vcpu);
 625                 kvm_mmu_flush_tlb(vcpu);
 626                 return 0;
 627         }
 628
 629         if (is_long_mode(vcpu)) {
 630                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 631                         return 1;
 632         } else {
 633                 if (is_pae(vcpu)) {
 634                         if (cr3 & CR3_PAE_RESERVED_BITS)
 635                                 return 1;
 636                         if (is_paging(vcpu) &&
 637                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 638                                 return 1;
 639                 }
 640                 /*
 641                  * We don't check reserved bits in nonpae mode, because
 642                  * this isn't enforced, and VMware depends on this.
 643                  */
 644         }
 645
 646         /*
 647          * Does the new cr3 value map to physical memory? (Note, we
 648          * catch an invalid cr3 even in real-mode, because it would
 649          * cause trouble later on when we turn on paging anyway.)
 650          *
 651          * A real CPU would silently accept an invalid cr3 and would
 652          * attempt to use it - with largely undefined (and often hard
 653          * to debug) behavior on the guest side.
 654          */
 655         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 656                 return 1;
 657         vcpu->arch.cr3 = cr3;
 658         vcpu->arch.mmu.new_cr3(vcpu);
 659         return 0;
 660 }
 661 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 662
 663 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 664 {
 665         if (cr8 & CR8_RESERVED_BITS)
 666                 return 1;
 667         if (irqchip_in_kernel(vcpu->kvm))
 668                 kvm_lapic_set_tpr(vcpu, cr8);
 669         else
 670                 vcpu->arch.cr8 = cr8;
 671         return 0;
 672 }
 673
 674 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 675 {
 676         if (__kvm_set_cr8(vcpu, cr8))
 677                 kvm_inject_gp(vcpu, 0);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 680
 681 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 682 {
 683         if (irqchip_in_kernel(vcpu->kvm))
 684                 return kvm_lapic_get_cr8(vcpu);
 685         else
 686                 return vcpu->arch.cr8;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 689
 690 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 691 {
 692         switch (dr) {
 693         case 0 ... 3:
 694                 vcpu->arch.db[dr] = val;
 695                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 696                         vcpu->arch.eff_db[dr] = val;
 697                 break;
 698         case 4:
 699                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 700                         return 1; /* #UD */
 701                 /* fall through */
 702         case 6:
 703                 if (val & 0xffffffff00000000ULL)
 704                         return -1; /* #GP */
 705                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 706                 break;
 707         case 5:
 708                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 709                         return 1; /* #UD */
 710                 /* fall through */
 711         default: /* 7 */
 712                 if (val & 0xffffffff00000000ULL)
 713                         return -1; /* #GP */
 714                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 715                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 716                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 717                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 718                 }
 719                 break;
 720         }
 721
 722         return 0;
 723 }
 724
 725 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 726 {
 727         int res;
 728
 729         res = __kvm_set_dr(vcpu, dr, val);
 730         if (res > 0)
 731                 kvm_queue_exception(vcpu, UD_VECTOR);
 732         else if (res < 0)
 733                 kvm_inject_gp(vcpu, 0);
 734
 735         return res;
 736 }
 737 EXPORT_SYMBOL_GPL(kvm_set_dr);
 738
 739 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 740 {
 741         switch (dr) {
 742         case 0 ... 3:
 743                 *val = vcpu->arch.db[dr];
 744                 break;
 745         case 4:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         case 6:
 750                 *val = vcpu->arch.dr6;
 751                 break;
 752         case 5:
 753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                         return 1;
 755                 /* fall through */
 756         default: /* 7 */
 757                 *val = vcpu->arch.dr7;
 758                 break;
 759         }
 760
 761         return 0;
 762 }
 763
 764 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 765 {
 766         if (_kvm_get_dr(vcpu, dr, val)) {
 767                 kvm_queue_exception(vcpu, UD_VECTOR);
 768                 return 1;
 769         }
 770         return 0;
 771 }
 772 EXPORT_SYMBOL_GPL(kvm_get_dr);
 773
 774 /*
 775  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 776  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 777  *
 778  * This list is modified at module load time to reflect the
 779  * capabilities of the host cpu. This capabilities test skips MSRs that are
 780  * kvm-specific. Those are put in the beginning of the list.
 781  */
 782
 783 #define KVM_SAVE_MSRS_BEGIN     7
 784 static u32 msrs_to_save[] = {
 785         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 786         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 787         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 788         HV_X64_MSR_APIC_ASSIST_PAGE,
 789         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 790         MSR_STAR,
 791 #ifdef CONFIG_X86_64
 792         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 793 #endif
 794         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 795 };
 796
 797 static unsigned num_msrs_to_save;
 798
 799 static u32 emulated_msrs[] = {
 800         MSR_IA32_MISC_ENABLE,
 801         MSR_IA32_MCG_STATUS,
 802         MSR_IA32_MCG_CTL,
 803 };
 804
 805 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 806 {
 807         u64 old_efer = vcpu->arch.efer;
 808
 809         if (efer & efer_reserved_bits)
 810                 return 1;
 811
 812         if (is_paging(vcpu)
 813             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 814                 return 1;
 815
 816         if (efer & EFER_FFXSR) {
 817                 struct kvm_cpuid_entry2 *feat;
 818
 819                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 820                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 821                         return 1;
 822         }
 823
 824         if (efer & EFER_SVME) {
 825                 struct kvm_cpuid_entry2 *feat;
 826
 827                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 828                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 829                         return 1;
 830         }
 831
 832         efer &= ~EFER_LMA;
 833         efer |= vcpu->arch.efer & EFER_LMA;
 834
 835         kvm_x86_ops->set_efer(vcpu, efer);
 836
 837         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 838         kvm_mmu_reset_context(vcpu);
 839
 840         /* Update reserved bits */
 841         if ((efer ^ old_efer) & EFER_NX)
 842                 kvm_mmu_reset_context(vcpu);
 843
 844         return 0;
 845 }
 846
 847 void kvm_enable_efer_bits(u64 mask)
 848 {
 849        efer_reserved_bits &= ~mask;
 850 }
 851 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 852
 853
 854 /*
 855  * Writes msr value into into the appropriate "register".
 856  * Returns 0 on success, non-0 otherwise.
 857  * Assumes vcpu_load() was already called.
 858  */
 859 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 860 {
 861         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 862 }
 863
 864 /*
 865  * Adapt set_msr() to msr_io()'s calling convention
 866  */
 867 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 868 {
 869         return kvm_set_msr(vcpu, index, *data);
 870 }
 871
 872 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 873 {
 874         int version;
 875         int r;
 876         struct pvclock_wall_clock wc;
 877         struct timespec boot;
 878
 879         if (!wall_clock)
 880                 return;
 881
 882         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 883         if (r)
 884                 return;
 885
 886         if (version & 1)
 887                 ++version;  /* first time write, random junk */
 888
 889         ++version;
 890
 891         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 892
 893         /*
 894          * The guest calculates current wall clock time by adding
 895          * system time (updated by kvm_guest_time_update below) to the
 896          * wall clock specified here.  guest system time equals host
 897          * system time for us, thus we must fill in host boot time here.
 898          */
 899         getboottime(&boot);
 900
 901         wc.sec = boot.tv_sec;
 902         wc.nsec = boot.tv_nsec;
 903         wc.version = version;
 904
 905         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 906
 907         version++;
 908         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 909 }
 910
 911 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 912 {
 913         uint32_t quotient, remainder;
 914
 915         /* Don't try to replace with do_div(), this one calculates
 916          * "(dividend << 32) / divisor" */
 917         __asm__ ( "divl %4"
 918                   : "=a" (quotient), "=d" (remainder)
 919                   : "0" (0), "1" (dividend), "r" (divisor) );
 920         return quotient;
 921 }
 922
 923 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 924                                s8 *pshift, u32 *pmultiplier)
 925 {
 926         uint64_t scaled64;
 927         int32_t  shift = 0;
 928         uint64_t tps64;
 929         uint32_t tps32;
 930
 931         tps64 = base_khz * 1000LL;
 932         scaled64 = scaled_khz * 1000LL;
 933         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 934                 tps64 >>= 1;
 935                 shift--;
 936         }
 937
 938         tps32 = (uint32_t)tps64;
 939         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 940                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 941                         scaled64 >>= 1;
 942                 else
 943                         tps32 <<= 1;
 944                 shift++;
 945         }
 946
 947         *pshift = shift;
 948         *pmultiplier = div_frac(scaled64, tps32);
 949
 950         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 951                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 952 }
 953
 954 static inline u64 get_kernel_ns(void)
 955 {
 956         struct timespec ts;
 957
 958         WARN_ON(preemptible());
 959         ktime_get_ts(&ts);
 960         monotonic_to_bootbased(&ts);
 961         return timespec_to_ns(&ts);
 962 }
 963
 964 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 965 unsigned long max_tsc_khz;
 966
 967 static inline int kvm_tsc_changes_freq(void)
 968 {
 969         int cpu = get_cpu();
 970         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 971                   cpufreq_quick_get(cpu) != 0;
 972         put_cpu();
 973         return ret;
 974 }
 975
 976 static inline u64 nsec_to_cycles(u64 nsec)
 977 {
 978         u64 ret;
 979
 980         WARN_ON(preemptible());
 981         if (kvm_tsc_changes_freq())
 982                 printk_once(KERN_WARNING
 983                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 984         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 985         do_div(ret, USEC_PER_SEC);
 986         return ret;
 987 }
 988
 989 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 990 {
 991         /* Compute a scale to convert nanoseconds in TSC cycles */
 992         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 993                            &kvm->arch.virtual_tsc_shift,
 994                            &kvm->arch.virtual_tsc_mult);
 995         kvm->arch.virtual_tsc_khz = this_tsc_khz;
 996 }
 997
 998 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
 999 {
1000         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1001                                       vcpu->kvm->arch.virtual_tsc_mult,
1002                                       vcpu->kvm->arch.virtual_tsc_shift);
1003         tsc += vcpu->arch.last_tsc_write;
1004         return tsc;
1005 }
1006
1007 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1008 {
1009         struct kvm *kvm = vcpu->kvm;
1010         u64 offset, ns, elapsed;
1011         unsigned long flags;
1012         s64 sdiff;
1013
1014         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1015         offset = data - native_read_tsc();
1016         ns = get_kernel_ns();
1017         elapsed = ns - kvm->arch.last_tsc_nsec;
1018         sdiff = data - kvm->arch.last_tsc_write;
1019         if (sdiff < 0)
1020                 sdiff = -sdiff;
1021
1022         /*
1023          * Special case: close write to TSC within 5 seconds of
1024          * another CPU is interpreted as an attempt to synchronize
1025          * The 5 seconds is to accomodate host load / swapping as
1026          * well as any reset of TSC during the boot process.
1027          *
1028          * In that case, for a reliable TSC, we can match TSC offsets,
1029          * or make a best guest using elapsed value.
1030          */
1031         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1032             elapsed < 5ULL * NSEC_PER_SEC) {
1033                 if (!check_tsc_unstable()) {
1034                         offset = kvm->arch.last_tsc_offset;
1035                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1036                 } else {
1037                         u64 delta = nsec_to_cycles(elapsed);
1038                         offset += delta;
1039                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1040                 }
1041                 ns = kvm->arch.last_tsc_nsec;
1042         }
1043         kvm->arch.last_tsc_nsec = ns;
1044         kvm->arch.last_tsc_write = data;
1045         kvm->arch.last_tsc_offset = offset;
1046         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1047         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1048
1049         /* Reset of TSC must disable overshoot protection below */
1050         vcpu->arch.hv_clock.tsc_timestamp = 0;
1051         vcpu->arch.last_tsc_write = data;
1052         vcpu->arch.last_tsc_nsec = ns;
1053 }
1054 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1055
1056 static int kvm_guest_time_update(struct kvm_vcpu *v)
1057 {
1058         unsigned long flags;
1059         struct kvm_vcpu_arch *vcpu = &v->arch;
1060         void *shared_kaddr;
1061         unsigned long this_tsc_khz;
1062         s64 kernel_ns, max_kernel_ns;
1063         u64 tsc_timestamp;
1064
1065         /* Keep irq disabled to prevent changes to the clock */
1066         local_irq_save(flags);
1067         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1068         kernel_ns = get_kernel_ns();
1069         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1070
1071         if (unlikely(this_tsc_khz == 0)) {
1072                 local_irq_restore(flags);
1073                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1074                 return 1;
1075         }
1076
1077         /*
1078          * We may have to catch up the TSC to match elapsed wall clock
1079          * time for two reasons, even if kvmclock is used.
1080          *   1) CPU could have been running below the maximum TSC rate
1081          *   2) Broken TSC compensation resets the base at each VCPU
1082          *      entry to avoid unknown leaps of TSC even when running
1083          *      again on the same CPU.  This may cause apparent elapsed
1084          *      time to disappear, and the guest to stand still or run
1085          *      very slowly.
1086          */
1087         if (vcpu->tsc_catchup) {
1088                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1089                 if (tsc > tsc_timestamp) {
1090                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1091                         tsc_timestamp = tsc;
1092                 }
1093         }
1094
1095         local_irq_restore(flags);
1096
1097         if (!vcpu->time_page)
1098                 return 0;
1099
1100         /*
1101          * Time as measured by the TSC may go backwards when resetting the base
1102          * tsc_timestamp.  The reason for this is that the TSC resolution is
1103          * higher than the resolution of the other clock scales.  Thus, many
1104          * possible measurments of the TSC correspond to one measurement of any
1105          * other clock, and so a spread of values is possible.  This is not a
1106          * problem for the computation of the nanosecond clock; with TSC rates
1107          * around 1GHZ, there can only be a few cycles which correspond to one
1108          * nanosecond value, and any path through this code will inevitably
1109          * take longer than that.  However, with the kernel_ns value itself,
1110          * the precision may be much lower, down to HZ granularity.  If the
1111          * first sampling of TSC against kernel_ns ends in the low part of the
1112          * range, and the second in the high end of the range, we can get:
1113          *
1114          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1115          *
1116          * As the sampling errors potentially range in the thousands of cycles,
1117          * it is possible such a time value has already been observed by the
1118          * guest.  To protect against this, we must compute the system time as
1119          * observed by the guest and ensure the new system time is greater.
1120          */
1121         max_kernel_ns = 0;
1122         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1123                 max_kernel_ns = vcpu->last_guest_tsc -
1124                                 vcpu->hv_clock.tsc_timestamp;
1125                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1126                                     vcpu->hv_clock.tsc_to_system_mul,
1127                                     vcpu->hv_clock.tsc_shift);
1128                 max_kernel_ns += vcpu->last_kernel_ns;
1129         }
1130
1131         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1132                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1133                                    &vcpu->hv_clock.tsc_shift,
1134                                    &vcpu->hv_clock.tsc_to_system_mul);
1135                 vcpu->hw_tsc_khz = this_tsc_khz;
1136         }
1137
1138         if (max_kernel_ns > kernel_ns)
1139                 kernel_ns = max_kernel_ns;
1140
1141         /* With all the info we got, fill in the values */
1142         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1143         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1144         vcpu->last_kernel_ns = kernel_ns;
1145         vcpu->last_guest_tsc = tsc_timestamp;
1146         vcpu->hv_clock.flags = 0;
1147
1148         /*
1149          * The interface expects us to write an even number signaling that the
1150          * update is finished. Since the guest won't see the intermediate
1151          * state, we just increase by 2 at the end.
1152          */
1153         vcpu->hv_clock.version += 2;
1154
1155         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1156
1157         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1158                sizeof(vcpu->hv_clock));
1159
1160         kunmap_atomic(shared_kaddr, KM_USER0);
1161
1162         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1163         return 0;
1164 }
1165
1166 static bool msr_mtrr_valid(unsigned msr)
1167 {
1168         switch (msr) {
1169         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1170         case MSR_MTRRfix64K_00000:
1171         case MSR_MTRRfix16K_80000:
1172         case MSR_MTRRfix16K_A0000:
1173         case MSR_MTRRfix4K_C0000:
1174         case MSR_MTRRfix4K_C8000:
1175         case MSR_MTRRfix4K_D0000:
1176         case MSR_MTRRfix4K_D8000:
1177         case MSR_MTRRfix4K_E0000:
1178         case MSR_MTRRfix4K_E8000:
1179         case MSR_MTRRfix4K_F0000:
1180         case MSR_MTRRfix4K_F8000:
1181         case MSR_MTRRdefType:
1182         case MSR_IA32_CR_PAT:
1183                 return true;
1184         case 0x2f8:
1185                 return true;
1186         }
1187         return false;
1188 }
1189
1190 static bool valid_pat_type(unsigned t)
1191 {
1192         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1193 }
1194
1195 static bool valid_mtrr_type(unsigned t)
1196 {
1197         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1198 }
1199
1200 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1201 {
1202         int i;
1203
1204         if (!msr_mtrr_valid(msr))
1205                 return false;
1206
1207         if (msr == MSR_IA32_CR_PAT) {
1208                 for (i = 0; i < 8; i++)
1209                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1210                                 return false;
1211                 return true;
1212         } else if (msr == MSR_MTRRdefType) {
1213                 if (data & ~0xcff)
1214                         return false;
1215                 return valid_mtrr_type(data & 0xff);
1216         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1217                 for (i = 0; i < 8 ; i++)
1218                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1219                                 return false;
1220                 return true;
1221         }
1222
1223         /* variable MTRRs */
1224         return valid_mtrr_type(data & 0xff);
1225 }
1226
1227 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1228 {
1229         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1230
1231         if (!mtrr_valid(vcpu, msr, data))
1232                 return 1;
1233
1234         if (msr == MSR_MTRRdefType) {
1235                 vcpu->arch.mtrr_state.def_type = data;
1236                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1237         } else if (msr == MSR_MTRRfix64K_00000)
1238                 p[0] = data;
1239         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1240                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1241         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1242                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1243         else if (msr == MSR_IA32_CR_PAT)
1244                 vcpu->arch.pat = data;
1245         else {  /* Variable MTRRs */
1246                 int idx, is_mtrr_mask;
1247                 u64 *pt;
1248
1249                 idx = (msr - 0x200) / 2;
1250                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1251                 if (!is_mtrr_mask)
1252                         pt =
1253                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1254                 else
1255                         pt =
1256                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1257                 *pt = data;
1258         }
1259
1260         kvm_mmu_reset_context(vcpu);
1261         return 0;
1262 }
1263
1264 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1265 {
1266         u64 mcg_cap = vcpu->arch.mcg_cap;
1267         unsigned bank_num = mcg_cap & 0xff;
1268
1269         switch (msr) {
1270         case MSR_IA32_MCG_STATUS:
1271                 vcpu->arch.mcg_status = data;
1272                 break;
1273         case MSR_IA32_MCG_CTL:
1274                 if (!(mcg_cap & MCG_CTL_P))
1275                         return 1;
1276                 if (data != 0 && data != ~(u64)0)
1277                         return -1;
1278                 vcpu->arch.mcg_ctl = data;
1279                 break;
1280         default:
1281                 if (msr >= MSR_IA32_MC0_CTL &&
1282                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1283                         u32 offset = msr - MSR_IA32_MC0_CTL;
1284                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1285                          * some Linux kernels though clear bit 10 in bank 4 to
1286                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1287                          * this to avoid an uncatched #GP in the guest
1288                          */
1289                         if ((offset & 0x3) == 0 &&
1290                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1291                                 return -1;
1292                         vcpu->arch.mce_banks[offset] = data;
1293                         break;
1294                 }
1295                 return 1;
1296         }
1297         return 0;
1298 }
1299
1300 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1301 {
1302         struct kvm *kvm = vcpu->kvm;
1303         int lm = is_long_mode(vcpu);
1304         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1305                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1306         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1307                 : kvm->arch.xen_hvm_config.blob_size_32;
1308         u32 page_num = data & ~PAGE_MASK;
1309         u64 page_addr = data & PAGE_MASK;
1310         u8 *page;
1311         int r;
1312
1313         r = -E2BIG;
1314         if (page_num >= blob_size)
1315                 goto out;
1316         r = -ENOMEM;
1317         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1318         if (!page)
1319                 goto out;
1320         r = -EFAULT;
1321         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1322                 goto out_free;
1323         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1324                 goto out_free;
1325         r = 0;
1326 out_free:
1327         kfree(page);
1328 out:
1329         return r;
1330 }
1331
1332 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1333 {
1334         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1335 }
1336
1337 static bool kvm_hv_msr_partition_wide(u32 msr)
1338 {
1339         bool r = false;
1340         switch (msr) {
1341         case HV_X64_MSR_GUEST_OS_ID:
1342         case HV_X64_MSR_HYPERCALL:
1343                 r = true;
1344                 break;
1345         }
1346
1347         return r;
1348 }
1349
1350 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1351 {
1352         struct kvm *kvm = vcpu->kvm;
1353
1354         switch (msr) {
1355         case HV_X64_MSR_GUEST_OS_ID:
1356                 kvm->arch.hv_guest_os_id = data;
1357                 /* setting guest os id to zero disables hypercall page */
1358                 if (!kvm->arch.hv_guest_os_id)
1359                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1360                 break;
1361         case HV_X64_MSR_HYPERCALL: {
1362                 u64 gfn;
1363                 unsigned long addr;
1364                 u8 instructions[4];
1365
1366                 /* if guest os id is not set hypercall should remain disabled */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         break;
1369                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1370                         kvm->arch.hv_hypercall = data;
1371                         break;
1372                 }
1373                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1374                 addr = gfn_to_hva(kvm, gfn);
1375                 if (kvm_is_error_hva(addr))
1376                         return 1;
1377                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1378                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1379                 if (copy_to_user((void __user *)addr, instructions, 4))
1380                         return 1;
1381                 kvm->arch.hv_hypercall = data;
1382                 break;
1383         }
1384         default:
1385                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1386                           "data 0x%llx\n", msr, data);
1387                 return 1;
1388         }
1389         return 0;
1390 }
1391
1392 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1393 {
1394         switch (msr) {
1395         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1396                 unsigned long addr;
1397
1398                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1399                         vcpu->arch.hv_vapic = data;
1400                         break;
1401                 }
1402                 addr = gfn_to_hva(vcpu->kvm, data >>
1403                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1404                 if (kvm_is_error_hva(addr))
1405                         return 1;
1406                 if (clear_user((void __user *)addr, PAGE_SIZE))
1407                         return 1;
1408                 vcpu->arch.hv_vapic = data;
1409                 break;
1410         }
1411         case HV_X64_MSR_EOI:
1412                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1413         case HV_X64_MSR_ICR:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1415         case HV_X64_MSR_TPR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422
1423         return 0;
1424 }
1425
1426 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1427 {
1428         switch (msr) {
1429         case MSR_EFER:
1430                 return set_efer(vcpu, data);
1431         case MSR_K7_HWCR:
1432                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1433                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1434                 if (data != 0) {
1435                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1436                                 data);
1437                         return 1;
1438                 }
1439                 break;
1440         case MSR_FAM10H_MMIO_CONF_BASE:
1441                 if (data != 0) {
1442                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1443                                 "0x%llx\n", data);
1444                         return 1;
1445                 }
1446                 break;
1447         case MSR_AMD64_NB_CFG:
1448                 break;
1449         case MSR_IA32_DEBUGCTLMSR:
1450                 if (!data) {
1451                         /* We support the non-activated case already */
1452                         break;
1453                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1454                         /* Values other than LBR and BTF are vendor-specific,
1455                            thus reserved and should throw a #GP */
1456                         return 1;
1457                 }
1458                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1459                         __func__, data);
1460                 break;
1461         case MSR_IA32_UCODE_REV:
1462         case MSR_IA32_UCODE_WRITE:
1463         case MSR_VM_HSAVE_PA:
1464         case MSR_AMD64_PATCH_LOADER:
1465                 break;
1466         case 0x200 ... 0x2ff:
1467                 return set_msr_mtrr(vcpu, msr, data);
1468         case MSR_IA32_APICBASE:
1469                 kvm_set_apic_base(vcpu, data);
1470                 break;
1471         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1472                 return kvm_x2apic_msr_write(vcpu, msr, data);
1473         case MSR_IA32_MISC_ENABLE:
1474                 vcpu->arch.ia32_misc_enable_msr = data;
1475                 break;
1476         case MSR_KVM_WALL_CLOCK_NEW:
1477         case MSR_KVM_WALL_CLOCK:
1478                 vcpu->kvm->arch.wall_clock = data;
1479                 kvm_write_wall_clock(vcpu->kvm, data);
1480                 break;
1481         case MSR_KVM_SYSTEM_TIME_NEW:
1482         case MSR_KVM_SYSTEM_TIME: {
1483                 if (vcpu->arch.time_page) {
1484                         kvm_release_page_dirty(vcpu->arch.time_page);
1485                         vcpu->arch.time_page = NULL;
1486                 }
1487
1488                 vcpu->arch.time = data;
1489                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1490
1491                 /* we verify if the enable bit is set... */
1492                 if (!(data & 1))
1493                         break;
1494
1495                 /* ...but clean it before doing the actual write */
1496                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1497
1498                 vcpu->arch.time_page =
1499                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1500
1501                 if (is_error_page(vcpu->arch.time_page)) {
1502                         kvm_release_page_clean(vcpu->arch.time_page);
1503                         vcpu->arch.time_page = NULL;
1504                 }
1505                 break;
1506         }
1507         case MSR_IA32_MCG_CTL:
1508         case MSR_IA32_MCG_STATUS:
1509         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1510                 return set_msr_mce(vcpu, msr, data);
1511
1512         /* Performance counters are not protected by a CPUID bit,
1513          * so we should check all of them in the generic path for the sake of
1514          * cross vendor migration.
1515          * Writing a zero into the event select MSRs disables them,
1516          * which we perfectly emulate ;-). Any other value should be at least
1517          * reported, some guests depend on them.
1518          */
1519         case MSR_P6_EVNTSEL0:
1520         case MSR_P6_EVNTSEL1:
1521         case MSR_K7_EVNTSEL0:
1522         case MSR_K7_EVNTSEL1:
1523         case MSR_K7_EVNTSEL2:
1524         case MSR_K7_EVNTSEL3:
1525                 if (data != 0)
1526                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1527                                 "0x%x data 0x%llx\n", msr, data);
1528                 break;
1529         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1530          * so we ignore writes to make it happy.
1531          */
1532         case MSR_P6_PERFCTR0:
1533         case MSR_P6_PERFCTR1:
1534         case MSR_K7_PERFCTR0:
1535         case MSR_K7_PERFCTR1:
1536         case MSR_K7_PERFCTR2:
1537         case MSR_K7_PERFCTR3:
1538                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1539                         "0x%x data 0x%llx\n", msr, data);
1540                 break;
1541         case MSR_K7_CLK_CTL:
1542                 /*
1543                  * Ignore all writes to this no longer documented MSR.
1544                  * Writes are only relevant for old K7 processors,
1545                  * all pre-dating SVM, but a recommended workaround from
1546                  * AMD for these chips. It is possible to speicify the
1547                  * affected processor models on the command line, hence
1548                  * the need to ignore the workaround.
1549                  */
1550                 break;
1551         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1552                 if (kvm_hv_msr_partition_wide(msr)) {
1553                         int r;
1554                         mutex_lock(&vcpu->kvm->lock);
1555                         r = set_msr_hyperv_pw(vcpu, msr, data);
1556                         mutex_unlock(&vcpu->kvm->lock);
1557                         return r;
1558                 } else
1559                         return set_msr_hyperv(vcpu, msr, data);
1560                 break;
1561         default:
1562                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1563                         return xen_hvm_config(vcpu, data);
1564                 if (!ignore_msrs) {
1565                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1566                                 msr, data);
1567                         return 1;
1568                 } else {
1569                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1570                                 msr, data);
1571                         break;
1572                 }
1573         }
1574         return 0;
1575 }
1576 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1577
1578
1579 /*
1580  * Reads an msr value (of 'msr_index') into 'pdata'.
1581  * Returns 0 on success, non-0 otherwise.
1582  * Assumes vcpu_load() was already called.
1583  */
1584 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1585 {
1586         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1587 }
1588
1589 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1590 {
1591         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1592
1593         if (!msr_mtrr_valid(msr))
1594                 return 1;
1595
1596         if (msr == MSR_MTRRdefType)
1597                 *pdata = vcpu->arch.mtrr_state.def_type +
1598                          (vcpu->arch.mtrr_state.enabled << 10);
1599         else if (msr == MSR_MTRRfix64K_00000)
1600                 *pdata = p[0];
1601         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1602                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1603         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1604                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1605         else if (msr == MSR_IA32_CR_PAT)
1606                 *pdata = vcpu->arch.pat;
1607         else {  /* Variable MTRRs */
1608                 int idx, is_mtrr_mask;
1609                 u64 *pt;
1610
1611                 idx = (msr - 0x200) / 2;
1612                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1613                 if (!is_mtrr_mask)
1614                         pt =
1615                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1616                 else
1617                         pt =
1618                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1619                 *pdata = *pt;
1620         }
1621
1622         return 0;
1623 }
1624
1625 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1626 {
1627         u64 data;
1628         u64 mcg_cap = vcpu->arch.mcg_cap;
1629         unsigned bank_num = mcg_cap & 0xff;
1630
1631         switch (msr) {
1632         case MSR_IA32_P5_MC_ADDR:
1633         case MSR_IA32_P5_MC_TYPE:
1634                 data = 0;
1635                 break;
1636         case MSR_IA32_MCG_CAP:
1637                 data = vcpu->arch.mcg_cap;
1638                 break;
1639         case MSR_IA32_MCG_CTL:
1640                 if (!(mcg_cap & MCG_CTL_P))
1641                         return 1;
1642                 data = vcpu->arch.mcg_ctl;
1643                 break;
1644         case MSR_IA32_MCG_STATUS:
1645                 data = vcpu->arch.mcg_status;
1646                 break;
1647         default:
1648                 if (msr >= MSR_IA32_MC0_CTL &&
1649                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1650                         u32 offset = msr - MSR_IA32_MC0_CTL;
1651                         data = vcpu->arch.mce_banks[offset];
1652                         break;
1653                 }
1654                 return 1;
1655         }
1656         *pdata = data;
1657         return 0;
1658 }
1659
1660 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1661 {
1662         u64 data = 0;
1663         struct kvm *kvm = vcpu->kvm;
1664
1665         switch (msr) {
1666         case HV_X64_MSR_GUEST_OS_ID:
1667                 data = kvm->arch.hv_guest_os_id;
1668                 break;
1669         case HV_X64_MSR_HYPERCALL:
1670                 data = kvm->arch.hv_hypercall;
1671                 break;
1672         default:
1673                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1674                 return 1;
1675         }
1676
1677         *pdata = data;
1678         return 0;
1679 }
1680
1681 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1682 {
1683         u64 data = 0;
1684
1685         switch (msr) {
1686         case HV_X64_MSR_VP_INDEX: {
1687                 int r;
1688                 struct kvm_vcpu *v;
1689                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1690                         if (v == vcpu)
1691                                 data = r;
1692                 break;
1693         }
1694         case HV_X64_MSR_EOI:
1695                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1696         case HV_X64_MSR_ICR:
1697                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1698         case HV_X64_MSR_TPR:
1699                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1700         default:
1701                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1702                 return 1;
1703         }
1704         *pdata = data;
1705         return 0;
1706 }
1707
1708 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1709 {
1710         u64 data;
1711
1712         switch (msr) {
1713         case MSR_IA32_PLATFORM_ID:
1714         case MSR_IA32_UCODE_REV:
1715         case MSR_IA32_EBL_CR_POWERON:
1716         case MSR_IA32_DEBUGCTLMSR:
1717         case MSR_IA32_LASTBRANCHFROMIP:
1718         case MSR_IA32_LASTBRANCHTOIP:
1719         case MSR_IA32_LASTINTFROMIP:
1720         case MSR_IA32_LASTINTTOIP:
1721         case MSR_K8_SYSCFG:
1722         case MSR_K7_HWCR:
1723         case MSR_VM_HSAVE_PA:
1724         case MSR_P6_PERFCTR0:
1725         case MSR_P6_PERFCTR1:
1726         case MSR_P6_EVNTSEL0:
1727         case MSR_P6_EVNTSEL1:
1728         case MSR_K7_EVNTSEL0:
1729         case MSR_K7_PERFCTR0:
1730         case MSR_K8_INT_PENDING_MSG:
1731         case MSR_AMD64_NB_CFG:
1732         case MSR_FAM10H_MMIO_CONF_BASE:
1733                 data = 0;
1734                 break;
1735         case MSR_MTRRcap:
1736                 data = 0x500 | KVM_NR_VAR_MTRR;
1737                 break;
1738         case 0x200 ... 0x2ff:
1739                 return get_msr_mtrr(vcpu, msr, pdata);
1740         case 0xcd: /* fsb frequency */
1741                 data = 3;
1742                 break;
1743                 /*
1744                  * MSR_EBC_FREQUENCY_ID
1745                  * Conservative value valid for even the basic CPU models.
1746                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1747                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1748                  * and 266MHz for model 3, or 4. Set Core Clock
1749                  * Frequency to System Bus Frequency Ratio to 1 (bits
1750                  * 31:24) even though these are only valid for CPU
1751                  * models > 2, however guests may end up dividing or
1752                  * multiplying by zero otherwise.
1753                  */
1754         case MSR_EBC_FREQUENCY_ID:
1755                 data = 1 << 24;
1756                 break;
1757         case MSR_IA32_APICBASE:
1758                 data = kvm_get_apic_base(vcpu);
1759                 break;
1760         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1761                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1762                 break;
1763         case MSR_IA32_MISC_ENABLE:
1764                 data = vcpu->arch.ia32_misc_enable_msr;
1765                 break;
1766         case MSR_IA32_PERF_STATUS:
1767                 /* TSC increment by tick */
1768                 data = 1000ULL;
1769                 /* CPU multiplier */
1770                 data |= (((uint64_t)4ULL) << 40);
1771                 break;
1772         case MSR_EFER:
1773                 data = vcpu->arch.efer;
1774                 break;
1775         case MSR_KVM_WALL_CLOCK:
1776         case MSR_KVM_WALL_CLOCK_NEW:
1777                 data = vcpu->kvm->arch.wall_clock;
1778                 break;
1779         case MSR_KVM_SYSTEM_TIME:
1780         case MSR_KVM_SYSTEM_TIME_NEW:
1781                 data = vcpu->arch.time;
1782                 break;
1783         case MSR_IA32_P5_MC_ADDR:
1784         case MSR_IA32_P5_MC_TYPE:
1785         case MSR_IA32_MCG_CAP:
1786         case MSR_IA32_MCG_CTL:
1787         case MSR_IA32_MCG_STATUS:
1788         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1789                 return get_msr_mce(vcpu, msr, pdata);
1790         case MSR_K7_CLK_CTL:
1791                 /*
1792                  * Provide expected ramp-up count for K7. All other
1793                  * are set to zero, indicating minimum divisors for
1794                  * every field.
1795                  *
1796                  * This prevents guest kernels on AMD host with CPU
1797                  * type 6, model 8 and higher from exploding due to
1798                  * the rdmsr failing.
1799                  */
1800                 data = 0x20000000;
1801                 break;
1802         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1803                 if (kvm_hv_msr_partition_wide(msr)) {
1804                         int r;
1805                         mutex_lock(&vcpu->kvm->lock);
1806                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1807                         mutex_unlock(&vcpu->kvm->lock);
1808                         return r;
1809                 } else
1810                         return get_msr_hyperv(vcpu, msr, pdata);
1811                 break;
1812         default:
1813                 if (!ignore_msrs) {
1814                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1815                         return 1;
1816                 } else {
1817                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1818                         data = 0;
1819                 }
1820                 break;
1821         }
1822         *pdata = data;
1823         return 0;
1824 }
1825 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1826
1827 /*
1828  * Read or write a bunch of msrs. All parameters are kernel addresses.
1829  *
1830  * @return number of msrs set successfully.
1831  */
1832 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1833                     struct kvm_msr_entry *entries,
1834                     int (*do_msr)(struct kvm_vcpu *vcpu,
1835                                   unsigned index, u64 *data))
1836 {
1837         int i, idx;
1838
1839         idx = srcu_read_lock(&vcpu->kvm->srcu);
1840         for (i = 0; i < msrs->nmsrs; ++i)
1841                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1842                         break;
1843         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1844
1845         return i;
1846 }
1847
1848 /*
1849  * Read or write a bunch of msrs. Parameters are user addresses.
1850  *
1851  * @return number of msrs set successfully.
1852  */
1853 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1854                   int (*do_msr)(struct kvm_vcpu *vcpu,
1855                                 unsigned index, u64 *data),
1856                   int writeback)
1857 {
1858         struct kvm_msrs msrs;
1859         struct kvm_msr_entry *entries;
1860         int r, n;
1861         unsigned size;
1862
1863         r = -EFAULT;
1864         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1865                 goto out;
1866
1867         r = -E2BIG;
1868         if (msrs.nmsrs >= MAX_IO_MSRS)
1869                 goto out;
1870
1871         r = -ENOMEM;
1872         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1873         entries = kmalloc(size, GFP_KERNEL);
1874         if (!entries)
1875                 goto out;
1876
1877         r = -EFAULT;
1878         if (copy_from_user(entries, user_msrs->entries, size))
1879                 goto out_free;
1880
1881         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1882         if (r < 0)
1883                 goto out_free;
1884
1885         r = -EFAULT;
1886         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1887                 goto out_free;
1888
1889         r = n;
1890
1891 out_free:
1892         kfree(entries);
1893 out:
1894         return r;
1895 }
1896
1897 int kvm_dev_ioctl_check_extension(long ext)
1898 {
1899         int r;
1900
1901         switch (ext) {
1902         case KVM_CAP_IRQCHIP:
1903         case KVM_CAP_HLT:
1904         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1905         case KVM_CAP_SET_TSS_ADDR:
1906         case KVM_CAP_EXT_CPUID:
1907         case KVM_CAP_CLOCKSOURCE:
1908         case KVM_CAP_PIT:
1909         case KVM_CAP_NOP_IO_DELAY:
1910         case KVM_CAP_MP_STATE:
1911         case KVM_CAP_SYNC_MMU:
1912         case KVM_CAP_REINJECT_CONTROL:
1913         case KVM_CAP_IRQ_INJECT_STATUS:
1914         case KVM_CAP_ASSIGN_DEV_IRQ:
1915         case KVM_CAP_IRQFD:
1916         case KVM_CAP_IOEVENTFD:
1917         case KVM_CAP_PIT2:
1918         case KVM_CAP_PIT_STATE2:
1919         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1920         case KVM_CAP_XEN_HVM:
1921         case KVM_CAP_ADJUST_CLOCK:
1922         case KVM_CAP_VCPU_EVENTS:
1923         case KVM_CAP_HYPERV:
1924         case KVM_CAP_HYPERV_VAPIC:
1925         case KVM_CAP_HYPERV_SPIN:
1926         case KVM_CAP_PCI_SEGMENT:
1927         case KVM_CAP_DEBUGREGS:
1928         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1929         case KVM_CAP_XSAVE:
1930                 r = 1;
1931                 break;
1932         case KVM_CAP_COALESCED_MMIO:
1933                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1934                 break;
1935         case KVM_CAP_VAPIC:
1936                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1937                 break;
1938         case KVM_CAP_NR_VCPUS:
1939                 r = KVM_MAX_VCPUS;
1940                 break;
1941         case KVM_CAP_NR_MEMSLOTS:
1942                 r = KVM_MEMORY_SLOTS;
1943                 break;
1944         case KVM_CAP_PV_MMU:    /* obsolete */
1945                 r = 0;
1946                 break;
1947         case KVM_CAP_IOMMU:
1948                 r = iommu_found();
1949                 break;
1950         case KVM_CAP_MCE:
1951                 r = KVM_MAX_MCE_BANKS;
1952                 break;
1953         case KVM_CAP_XCRS:
1954                 r = cpu_has_xsave;
1955                 break;
1956         default:
1957                 r = 0;
1958                 break;
1959         }
1960         return r;
1961
1962 }
1963
1964 long kvm_arch_dev_ioctl(struct file *filp,
1965                         unsigned int ioctl, unsigned long arg)
1966 {
1967         void __user *argp = (void __user *)arg;
1968         long r;
1969
1970         switch (ioctl) {
1971         case KVM_GET_MSR_INDEX_LIST: {
1972                 struct kvm_msr_list __user *user_msr_list = argp;
1973                 struct kvm_msr_list msr_list;
1974                 unsigned n;
1975
1976                 r = -EFAULT;
1977                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1978                         goto out;
1979                 n = msr_list.nmsrs;
1980                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1981                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1982                         goto out;
1983                 r = -E2BIG;
1984                 if (n < msr_list.nmsrs)
1985                         goto out;
1986                 r = -EFAULT;
1987                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1988                                  num_msrs_to_save * sizeof(u32)))
1989                         goto out;
1990                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1991                                  &emulated_msrs,
1992                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1993                         goto out;
1994                 r = 0;
1995                 break;
1996         }
1997         case KVM_GET_SUPPORTED_CPUID: {
1998                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1999                 struct kvm_cpuid2 cpuid;
2000
2001                 r = -EFAULT;
2002                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2003                         goto out;
2004                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2005                                                       cpuid_arg->entries);
2006                 if (r)
2007                         goto out;
2008
2009                 r = -EFAULT;
2010                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2011                         goto out;
2012                 r = 0;
2013                 break;
2014         }
2015         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2016                 u64 mce_cap;
2017
2018                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2019                 r = -EFAULT;
2020                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2021                         goto out;
2022                 r = 0;
2023                 break;
2024         }
2025         default:
2026                 r = -EINVAL;
2027         }
2028 out:
2029         return r;
2030 }
2031
2032 static void wbinvd_ipi(void *garbage)
2033 {
2034         wbinvd();
2035 }
2036
2037 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2038 {
2039         return vcpu->kvm->arch.iommu_domain &&
2040                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2041 }
2042
2043 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2044 {
2045         /* Address WBINVD may be executed by guest */
2046         if (need_emulate_wbinvd(vcpu)) {
2047                 if (kvm_x86_ops->has_wbinvd_exit())
2048                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2049                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2050                         smp_call_function_single(vcpu->cpu,
2051                                         wbinvd_ipi, NULL, 1);
2052         }
2053
2054         kvm_x86_ops->vcpu_load(vcpu, cpu);
2055         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2056                 /* Make sure TSC doesn't go backwards */
2057                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2058                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2059                 if (tsc_delta < 0)
2060                         mark_tsc_unstable("KVM discovered backwards TSC");
2061                 if (check_tsc_unstable()) {
2062                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2063                         vcpu->arch.tsc_catchup = 1;
2064                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2065                 }
2066                 if (vcpu->cpu != cpu)
2067                         kvm_migrate_timers(vcpu);
2068                 vcpu->cpu = cpu;
2069         }
2070 }
2071
2072 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2073 {
2074         kvm_x86_ops->vcpu_put(vcpu);
2075         kvm_put_guest_fpu(vcpu);
2076         vcpu->arch.last_host_tsc = native_read_tsc();
2077 }
2078
2079 static int is_efer_nx(void)
2080 {
2081         unsigned long long efer = 0;
2082
2083         rdmsrl_safe(MSR_EFER, &efer);
2084         return efer & EFER_NX;
2085 }
2086
2087 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2088 {
2089         int i;
2090         struct kvm_cpuid_entry2 *e, *entry;
2091
2092         entry = NULL;
2093         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2094                 e = &vcpu->arch.cpuid_entries[i];
2095                 if (e->function == 0x80000001) {
2096                         entry = e;
2097                         break;
2098                 }
2099         }
2100         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2101                 entry->edx &= ~(1 << 20);
2102                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2103         }
2104 }
2105
2106 /* when an old userspace process fills a new kernel module */
2107 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2108                                     struct kvm_cpuid *cpuid,
2109                                     struct kvm_cpuid_entry __user *entries)
2110 {
2111         int r, i;
2112         struct kvm_cpuid_entry *cpuid_entries;
2113
2114         r = -E2BIG;
2115         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2116                 goto out;
2117         r = -ENOMEM;
2118         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2119         if (!cpuid_entries)
2120                 goto out;
2121         r = -EFAULT;
2122         if (copy_from_user(cpuid_entries, entries,
2123                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2124                 goto out_free;
2125         for (i = 0; i < cpuid->nent; i++) {
2126                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2127                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2128                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2129                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2130                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2131                 vcpu->arch.cpuid_entries[i].index = 0;
2132                 vcpu->arch.cpuid_entries[i].flags = 0;
2133                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2134                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2135                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2136         }
2137         vcpu->arch.cpuid_nent = cpuid->nent;
2138         cpuid_fix_nx_cap(vcpu);
2139         r = 0;
2140         kvm_apic_set_version(vcpu);
2141         kvm_x86_ops->cpuid_update(vcpu);
2142         update_cpuid(vcpu);
2143
2144 out_free:
2145         vfree(cpuid_entries);
2146 out:
2147         return r;
2148 }
2149
2150 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2151                                      struct kvm_cpuid2 *cpuid,
2152                                      struct kvm_cpuid_entry2 __user *entries)
2153 {
2154         int r;
2155
2156         r = -E2BIG;
2157         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2158                 goto out;
2159         r = -EFAULT;
2160         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2161                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2162                 goto out;
2163         vcpu->arch.cpuid_nent = cpuid->nent;
2164         kvm_apic_set_version(vcpu);
2165         kvm_x86_ops->cpuid_update(vcpu);
2166         update_cpuid(vcpu);
2167         return 0;
2168
2169 out:
2170         return r;
2171 }
2172
2173 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2174                                      struct kvm_cpuid2 *cpuid,
2175                                      struct kvm_cpuid_entry2 __user *entries)
2176 {
2177         int r;
2178
2179         r = -E2BIG;
2180         if (cpuid->nent < vcpu->arch.cpuid_nent)
2181                 goto out;
2182         r = -EFAULT;
2183         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2184                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2185                 goto out;
2186         return 0;
2187
2188 out:
2189         cpuid->nent = vcpu->arch.cpuid_nent;
2190         return r;
2191 }
2192
2193 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2194                            u32 index)
2195 {
2196         entry->function = function;
2197         entry->index = index;
2198         cpuid_count(entry->function, entry->index,
2199                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2200         entry->flags = 0;
2201 }
2202
2203 #define F(x) bit(X86_FEATURE_##x)
2204
2205 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2206                          u32 index, int *nent, int maxnent)
2207 {
2208         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2209 #ifdef CONFIG_X86_64
2210         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2211                                 ? F(GBPAGES) : 0;
2212         unsigned f_lm = F(LM);
2213 #else
2214         unsigned f_gbpages = 0;
2215         unsigned f_lm = 0;
2216 #endif
2217         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2218
2219         /* cpuid 1.edx */
2220         const u32 kvm_supported_word0_x86_features =
2221                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2222                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2223                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2224                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2225                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2226                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2227                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2228                 0 /* HTT, TM, Reserved, PBE */;
2229         /* cpuid 0x80000001.edx */
2230         const u32 kvm_supported_word1_x86_features =
2231                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2232                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2233                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2234                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2235                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2236                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2237                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2238                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2239         /* cpuid 1.ecx */
2240         const u32 kvm_supported_word4_x86_features =
2241                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2242                 0 /* DS-CPL, VMX, SMX, EST */ |
2243                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2244                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2245                 0 /* Reserved, DCA */ | F(XMM4_1) |
2246                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2247                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2248         /* cpuid 0x80000001.ecx */
2249         const u32 kvm_supported_word6_x86_features =
2250                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2251                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2252                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2253                 0 /* SKINIT */ | 0 /* WDT */;
2254
2255         /* all calls to cpuid_count() should be made on the same cpu */
2256         get_cpu();
2257         do_cpuid_1_ent(entry, function, index);
2258         ++*nent;
2259
2260         switch (function) {
2261         case 0:
2262                 entry->eax = min(entry->eax, (u32)0xd);
2263                 break;
2264         case 1:
2265                 entry->edx &= kvm_supported_word0_x86_features;
2266                 entry->ecx &= kvm_supported_word4_x86_features;
2267                 /* we support x2apic emulation even if host does not support
2268                  * it since we emulate x2apic in software */
2269                 entry->ecx |= F(X2APIC);
2270                 break;
2271         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2272          * may return different values. This forces us to get_cpu() before
2273          * issuing the first command, and also to emulate this annoying behavior
2274          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2275         case 2: {
2276                 int t, times = entry->eax & 0xff;
2277
2278                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2279                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2280                 for (t = 1; t < times && *nent < maxnent; ++t) {
2281                         do_cpuid_1_ent(&entry[t], function, 0);
2282                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2283                         ++*nent;
2284                 }
2285                 break;
2286         }
2287         /* function 4 and 0xb have additional index. */
2288         case 4: {
2289                 int i, cache_type;
2290
2291                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2292                 /* read more entries until cache_type is zero */
2293                 for (i = 1; *nent < maxnent; ++i) {
2294                         cache_type = entry[i - 1].eax & 0x1f;
2295                         if (!cache_type)
2296                                 break;
2297                         do_cpuid_1_ent(&entry[i], function, i);
2298                         entry[i].flags |=
2299                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2300                         ++*nent;
2301                 }
2302                 break;
2303         }
2304         case 0xb: {
2305                 int i, level_type;
2306
2307                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2308                 /* read more entries until level_type is zero */
2309                 for (i = 1; *nent < maxnent; ++i) {
2310                         level_type = entry[i - 1].ecx & 0xff00;
2311                         if (!level_type)
2312                                 break;
2313                         do_cpuid_1_ent(&entry[i], function, i);
2314                         entry[i].flags |=
2315                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2316                         ++*nent;
2317                 }
2318                 break;
2319         }
2320         case 0xd: {
2321                 int i;
2322
2323                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2324                 for (i = 1; *nent < maxnent; ++i) {
2325                         if (entry[i - 1].eax == 0 && i != 2)
2326                                 break;
2327                         do_cpuid_1_ent(&entry[i], function, i);
2328                         entry[i].flags |=
2329                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2330                         ++*nent;
2331                 }
2332                 break;
2333         }
2334         case KVM_CPUID_SIGNATURE: {
2335                 char signature[12] = "KVMKVMKVM\0\0";
2336                 u32 *sigptr = (u32 *)signature;
2337                 entry->eax = 0;
2338                 entry->ebx = sigptr[0];
2339                 entry->ecx = sigptr[1];
2340                 entry->edx = sigptr[2];
2341                 break;
2342         }
2343         case KVM_CPUID_FEATURES:
2344                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2345                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2346                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2347                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2348                 entry->ebx = 0;
2349                 entry->ecx = 0;
2350                 entry->edx = 0;
2351                 break;
2352         case 0x80000000:
2353                 entry->eax = min(entry->eax, 0x8000001a);
2354                 break;
2355         case 0x80000001:
2356                 entry->edx &= kvm_supported_word1_x86_features;
2357                 entry->ecx &= kvm_supported_word6_x86_features;
2358                 break;
2359         }
2360
2361         kvm_x86_ops->set_supported_cpuid(function, entry);
2362
2363         put_cpu();
2364 }
2365
2366 #undef F
2367
2368 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2369                                      struct kvm_cpuid_entry2 __user *entries)
2370 {
2371         struct kvm_cpuid_entry2 *cpuid_entries;
2372         int limit, nent = 0, r = -E2BIG;
2373         u32 func;
2374
2375         if (cpuid->nent < 1)
2376                 goto out;
2377         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2378                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2379         r = -ENOMEM;
2380         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2381         if (!cpuid_entries)
2382                 goto out;
2383
2384         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2385         limit = cpuid_entries[0].eax;
2386         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2387                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2388                              &nent, cpuid->nent);
2389         r = -E2BIG;
2390         if (nent >= cpuid->nent)
2391                 goto out_free;
2392
2393         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2394         limit = cpuid_entries[nent - 1].eax;
2395         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2396                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2397                              &nent, cpuid->nent);
2398
2399
2400
2401         r = -E2BIG;
2402         if (nent >= cpuid->nent)
2403                 goto out_free;
2404
2405         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2406                      cpuid->nent);
2407
2408         r = -E2BIG;
2409         if (nent >= cpuid->nent)
2410                 goto out_free;
2411
2412         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2413                      cpuid->nent);
2414
2415         r = -E2BIG;
2416         if (nent >= cpuid->nent)
2417                 goto out_free;
2418
2419         r = -EFAULT;
2420         if (copy_to_user(entries, cpuid_entries,
2421                          nent * sizeof(struct kvm_cpuid_entry2)))
2422                 goto out_free;
2423         cpuid->nent = nent;
2424         r = 0;
2425
2426 out_free:
2427         vfree(cpuid_entries);
2428 out:
2429         return r;
2430 }
2431
2432 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2433                                     struct kvm_lapic_state *s)
2434 {
2435         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2436
2437         return 0;
2438 }
2439
2440 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2441                                     struct kvm_lapic_state *s)
2442 {
2443         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2444         kvm_apic_post_state_restore(vcpu);
2445         update_cr8_intercept(vcpu);
2446
2447         return 0;
2448 }
2449
2450 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2451                                     struct kvm_interrupt *irq)
2452 {
2453         if (irq->irq < 0 || irq->irq >= 256)
2454                 return -EINVAL;
2455         if (irqchip_in_kernel(vcpu->kvm))
2456                 return -ENXIO;
2457
2458         kvm_queue_interrupt(vcpu, irq->irq, false);
2459         kvm_make_request(KVM_REQ_EVENT, vcpu);
2460
2461         return 0;
2462 }
2463
2464 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2465 {
2466         kvm_inject_nmi(vcpu);
2467
2468         return 0;
2469 }
2470
2471 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2472                                            struct kvm_tpr_access_ctl *tac)
2473 {
2474         if (tac->flags)
2475                 return -EINVAL;
2476         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2477         return 0;
2478 }
2479
2480 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2481                                         u64 mcg_cap)
2482 {
2483         int r;
2484         unsigned bank_num = mcg_cap & 0xff, bank;
2485
2486         r = -EINVAL;
2487         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2488                 goto out;
2489         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2490                 goto out;
2491         r = 0;
2492         vcpu->arch.mcg_cap = mcg_cap;
2493         /* Init IA32_MCG_CTL to all 1s */
2494         if (mcg_cap & MCG_CTL_P)
2495                 vcpu->arch.mcg_ctl = ~(u64)0;
2496         /* Init IA32_MCi_CTL to all 1s */
2497         for (bank = 0; bank < bank_num; bank++)
2498                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2499 out:
2500         return r;
2501 }
2502
2503 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2504                                       struct kvm_x86_mce *mce)
2505 {
2506         u64 mcg_cap = vcpu->arch.mcg_cap;
2507         unsigned bank_num = mcg_cap & 0xff;
2508         u64 *banks = vcpu->arch.mce_banks;
2509
2510         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2511                 return -EINVAL;
2512         /*
2513          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2514          * reporting is disabled
2515          */
2516         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2517             vcpu->arch.mcg_ctl != ~(u64)0)
2518                 return 0;
2519         banks += 4 * mce->bank;
2520         /*
2521          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2522          * reporting is disabled for the bank
2523          */
2524         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2525                 return 0;
2526         if (mce->status & MCI_STATUS_UC) {
2527                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2528                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2529                         printk(KERN_DEBUG "kvm: set_mce: "
2530                                "injects mce exception while "
2531                                "previous one is in progress!\n");
2532                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2533                         return 0;
2534                 }
2535                 if (banks[1] & MCI_STATUS_VAL)
2536                         mce->status |= MCI_STATUS_OVER;
2537                 banks[2] = mce->addr;
2538                 banks[3] = mce->misc;
2539                 vcpu->arch.mcg_status = mce->mcg_status;
2540                 banks[1] = mce->status;
2541                 kvm_queue_exception(vcpu, MC_VECTOR);
2542         } else if (!(banks[1] & MCI_STATUS_VAL)
2543                    || !(banks[1] & MCI_STATUS_UC)) {
2544                 if (banks[1] & MCI_STATUS_VAL)
2545                         mce->status |= MCI_STATUS_OVER;
2546                 banks[2] = mce->addr;
2547                 banks[3] = mce->misc;
2548                 banks[1] = mce->status;
2549         } else
2550                 banks[1] |= MCI_STATUS_OVER;
2551         return 0;
2552 }
2553
2554 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2555                                                struct kvm_vcpu_events *events)
2556 {
2557         events->exception.injected =
2558                 vcpu->arch.exception.pending &&
2559                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2560         events->exception.nr = vcpu->arch.exception.nr;
2561         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2562         events->exception.error_code = vcpu->arch.exception.error_code;
2563
2564         events->interrupt.injected =
2565                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2566         events->interrupt.nr = vcpu->arch.interrupt.nr;
2567         events->interrupt.soft = 0;
2568         events->interrupt.shadow =
2569                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2570                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2571
2572         events->nmi.injected = vcpu->arch.nmi_injected;
2573         events->nmi.pending = vcpu->arch.nmi_pending;
2574         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2575
2576         events->sipi_vector = vcpu->arch.sipi_vector;
2577
2578         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2579                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2580                          | KVM_VCPUEVENT_VALID_SHADOW);
2581 }
2582
2583 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2584                                               struct kvm_vcpu_events *events)
2585 {
2586         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2587                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2588                               | KVM_VCPUEVENT_VALID_SHADOW))
2589                 return -EINVAL;
2590
2591         vcpu->arch.exception.pending = events->exception.injected;
2592         vcpu->arch.exception.nr = events->exception.nr;
2593         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2594         vcpu->arch.exception.error_code = events->exception.error_code;
2595
2596         vcpu->arch.interrupt.pending = events->interrupt.injected;
2597         vcpu->arch.interrupt.nr = events->interrupt.nr;
2598         vcpu->arch.interrupt.soft = events->interrupt.soft;
2599         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2600                 kvm_pic_clear_isr_ack(vcpu->kvm);
2601         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2602                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2603                                                   events->interrupt.shadow);
2604
2605         vcpu->arch.nmi_injected = events->nmi.injected;
2606         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2607                 vcpu->arch.nmi_pending = events->nmi.pending;
2608         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2609
2610         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2611                 vcpu->arch.sipi_vector = events->sipi_vector;
2612
2613         kvm_make_request(KVM_REQ_EVENT, vcpu);
2614
2615         return 0;
2616 }
2617
2618 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2619                                              struct kvm_debugregs *dbgregs)
2620 {
2621         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2622         dbgregs->dr6 = vcpu->arch.dr6;
2623         dbgregs->dr7 = vcpu->arch.dr7;
2624         dbgregs->flags = 0;
2625 }
2626
2627 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2628                                             struct kvm_debugregs *dbgregs)
2629 {
2630         if (dbgregs->flags)
2631                 return -EINVAL;
2632
2633         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2634         vcpu->arch.dr6 = dbgregs->dr6;
2635         vcpu->arch.dr7 = dbgregs->dr7;
2636
2637         return 0;
2638 }
2639
2640 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2641                                          struct kvm_xsave *guest_xsave)
2642 {
2643         if (cpu_has_xsave)
2644                 memcpy(guest_xsave->region,
2645                         &vcpu->arch.guest_fpu.state->xsave,
2646                         xstate_size);
2647         else {
2648                 memcpy(guest_xsave->region,
2649                         &vcpu->arch.guest_fpu.state->fxsave,
2650                         sizeof(struct i387_fxsave_struct));
2651                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2652                         XSTATE_FPSSE;
2653         }
2654 }
2655
2656 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2657                                         struct kvm_xsave *guest_xsave)
2658 {
2659         u64 xstate_bv =
2660                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2661
2662         if (cpu_has_xsave)
2663                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2664                         guest_xsave->region, xstate_size);
2665         else {
2666                 if (xstate_bv & ~XSTATE_FPSSE)
2667                         return -EINVAL;
2668                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2669                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2670         }
2671         return 0;
2672 }
2673
2674 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2675                                         struct kvm_xcrs *guest_xcrs)
2676 {
2677         if (!cpu_has_xsave) {
2678                 guest_xcrs->nr_xcrs = 0;
2679                 return;
2680         }
2681
2682         guest_xcrs->nr_xcrs = 1;
2683         guest_xcrs->flags = 0;
2684         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2685         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2686 }
2687
2688 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2689                                        struct kvm_xcrs *guest_xcrs)
2690 {
2691         int i, r = 0;
2692
2693         if (!cpu_has_xsave)
2694                 return -EINVAL;
2695
2696         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2697                 return -EINVAL;
2698
2699         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2700                 /* Only support XCR0 currently */
2701                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2702                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2703                                 guest_xcrs->xcrs[0].value);
2704                         break;
2705                 }
2706         if (r)
2707                 r = -EINVAL;
2708         return r;
2709 }
2710
2711 long kvm_arch_vcpu_ioctl(struct file *filp,
2712                          unsigned int ioctl, unsigned long arg)
2713 {
2714         struct kvm_vcpu *vcpu = filp->private_data;
2715         void __user *argp = (void __user *)arg;
2716         int r;
2717         union {
2718                 struct kvm_lapic_state *lapic;
2719                 struct kvm_xsave *xsave;
2720                 struct kvm_xcrs *xcrs;
2721                 void *buffer;
2722         } u;
2723
2724         u.buffer = NULL;
2725         switch (ioctl) {
2726         case KVM_GET_LAPIC: {
2727                 r = -EINVAL;
2728                 if (!vcpu->arch.apic)
2729                         goto out;
2730                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2731
2732                 r = -ENOMEM;
2733                 if (!u.lapic)
2734                         goto out;
2735                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2736                 if (r)
2737                         goto out;
2738                 r = -EFAULT;
2739                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2740                         goto out;
2741                 r = 0;
2742                 break;
2743         }
2744         case KVM_SET_LAPIC: {
2745                 r = -EINVAL;
2746                 if (!vcpu->arch.apic)
2747                         goto out;
2748                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2749                 r = -ENOMEM;
2750                 if (!u.lapic)
2751                         goto out;
2752                 r = -EFAULT;
2753                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2754                         goto out;
2755                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2756                 if (r)
2757                         goto out;
2758                 r = 0;
2759                 break;
2760         }
2761         case KVM_INTERRUPT: {
2762                 struct kvm_interrupt irq;
2763
2764                 r = -EFAULT;
2765                 if (copy_from_user(&irq, argp, sizeof irq))
2766                         goto out;
2767                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2768                 if (r)
2769                         goto out;
2770                 r = 0;
2771                 break;
2772         }
2773         case KVM_NMI: {
2774                 r = kvm_vcpu_ioctl_nmi(vcpu);
2775                 if (r)
2776                         goto out;
2777                 r = 0;
2778                 break;
2779         }
2780         case KVM_SET_CPUID: {
2781                 struct kvm_cpuid __user *cpuid_arg = argp;
2782                 struct kvm_cpuid cpuid;
2783
2784                 r = -EFAULT;
2785                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2786                         goto out;
2787                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2788                 if (r)
2789                         goto out;
2790                 break;
2791         }
2792         case KVM_SET_CPUID2: {
2793                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2794                 struct kvm_cpuid2 cpuid;
2795
2796                 r = -EFAULT;
2797                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2798                         goto out;
2799                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2800                                               cpuid_arg->entries);
2801                 if (r)
2802                         goto out;
2803                 break;
2804         }
2805         case KVM_GET_CPUID2: {
2806                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2807                 struct kvm_cpuid2 cpuid;
2808
2809                 r = -EFAULT;
2810                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2811                         goto out;
2812                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2813                                               cpuid_arg->entries);
2814                 if (r)
2815                         goto out;
2816                 r = -EFAULT;
2817                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2818                         goto out;
2819                 r = 0;
2820                 break;
2821         }
2822         case KVM_GET_MSRS:
2823                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2824                 break;
2825         case KVM_SET_MSRS:
2826                 r = msr_io(vcpu, argp, do_set_msr, 0);
2827                 break;
2828         case KVM_TPR_ACCESS_REPORTING: {
2829                 struct kvm_tpr_access_ctl tac;
2830
2831                 r = -EFAULT;
2832                 if (copy_from_user(&tac, argp, sizeof tac))
2833                         goto out;
2834                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2835                 if (r)
2836                         goto out;
2837                 r = -EFAULT;
2838                 if (copy_to_user(argp, &tac, sizeof tac))
2839                         goto out;
2840                 r = 0;
2841                 break;
2842         };
2843         case KVM_SET_VAPIC_ADDR: {
2844                 struct kvm_vapic_addr va;
2845
2846                 r = -EINVAL;
2847                 if (!irqchip_in_kernel(vcpu->kvm))
2848                         goto out;
2849                 r = -EFAULT;
2850                 if (copy_from_user(&va, argp, sizeof va))
2851                         goto out;
2852                 r = 0;
2853                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2854                 break;
2855         }
2856         case KVM_X86_SETUP_MCE: {
2857                 u64 mcg_cap;
2858
2859                 r = -EFAULT;
2860                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2861                         goto out;
2862                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2863                 break;
2864         }
2865         case KVM_X86_SET_MCE: {
2866                 struct kvm_x86_mce mce;
2867
2868                 r = -EFAULT;
2869                 if (copy_from_user(&mce, argp, sizeof mce))
2870                         goto out;
2871                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2872                 break;
2873         }
2874         case KVM_GET_VCPU_EVENTS: {
2875                 struct kvm_vcpu_events events;
2876
2877                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2878
2879                 r = -EFAULT;
2880                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2881                         break;
2882                 r = 0;
2883                 break;
2884         }
2885         case KVM_SET_VCPU_EVENTS: {
2886                 struct kvm_vcpu_events events;
2887
2888                 r = -EFAULT;
2889                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2890                         break;
2891
2892                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2893                 break;
2894         }
2895         case KVM_GET_DEBUGREGS: {
2896                 struct kvm_debugregs dbgregs;
2897
2898                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2899
2900                 r = -EFAULT;
2901                 if (copy_to_user(argp, &dbgregs,
2902                                  sizeof(struct kvm_debugregs)))
2903                         break;
2904                 r = 0;
2905                 break;
2906         }
2907         case KVM_SET_DEBUGREGS: {
2908                 struct kvm_debugregs dbgregs;
2909
2910                 r = -EFAULT;
2911                 if (copy_from_user(&dbgregs, argp,
2912                                    sizeof(struct kvm_debugregs)))
2913                         break;
2914
2915                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2916                 break;
2917         }
2918         case KVM_GET_XSAVE: {
2919                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2920                 r = -ENOMEM;
2921                 if (!u.xsave)
2922                         break;
2923
2924                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2925
2926                 r = -EFAULT;
2927                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2928                         break;
2929                 r = 0;
2930                 break;
2931         }
2932         case KVM_SET_XSAVE: {
2933                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2934                 r = -ENOMEM;
2935                 if (!u.xsave)
2936                         break;
2937
2938                 r = -EFAULT;
2939                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2940                         break;
2941
2942                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2943                 break;
2944         }
2945         case KVM_GET_XCRS: {
2946                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2947                 r = -ENOMEM;
2948                 if (!u.xcrs)
2949                         break;
2950
2951                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2952
2953                 r = -EFAULT;
2954                 if (copy_to_user(argp, u.xcrs,
2955                                  sizeof(struct kvm_xcrs)))
2956                         break;
2957                 r = 0;
2958                 break;
2959         }
2960         case KVM_SET_XCRS: {
2961                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2962                 r = -ENOMEM;
2963                 if (!u.xcrs)
2964                         break;
2965
2966                 r = -EFAULT;
2967                 if (copy_from_user(u.xcrs, argp,
2968                                    sizeof(struct kvm_xcrs)))
2969                         break;
2970
2971                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2972                 break;
2973         }
2974         default:
2975                 r = -EINVAL;
2976         }
2977 out:
2978         kfree(u.buffer);
2979         return r;
2980 }
2981
2982 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2983 {
2984         int ret;
2985
2986         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2987                 return -1;
2988         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2989         return ret;
2990 }
2991
2992 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2993                                               u64 ident_addr)
2994 {
2995         kvm->arch.ept_identity_map_addr = ident_addr;
2996         return 0;
2997 }
2998
2999 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3000                                           u32 kvm_nr_mmu_pages)
3001 {
3002         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3003                 return -EINVAL;
3004
3005         mutex_lock(&kvm->slots_lock);
3006         spin_lock(&kvm->mmu_lock);
3007
3008         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3009         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3010
3011         spin_unlock(&kvm->mmu_lock);
3012         mutex_unlock(&kvm->slots_lock);
3013         return 0;
3014 }
3015
3016 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3017 {
3018         return kvm->arch.n_max_mmu_pages;
3019 }
3020
3021 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3022 {
3023         int r;
3024
3025         r = 0;
3026         switch (chip->chip_id) {
3027         case KVM_IRQCHIP_PIC_MASTER:
3028                 memcpy(&chip->chip.pic,
3029                         &pic_irqchip(kvm)->pics[0],
3030                         sizeof(struct kvm_pic_state));
3031                 break;
3032         case KVM_IRQCHIP_PIC_SLAVE:
3033                 memcpy(&chip->chip.pic,
3034                         &pic_irqchip(kvm)->pics[1],
3035                         sizeof(struct kvm_pic_state));
3036                 break;
3037         case KVM_IRQCHIP_IOAPIC:
3038                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3039                 break;
3040         default:
3041                 r = -EINVAL;
3042                 break;
3043         }
3044         return r;
3045 }
3046
3047 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3048 {
3049         int r;
3050
3051         r = 0;
3052         switch (chip->chip_id) {
3053         case KVM_IRQCHIP_PIC_MASTER:
3054                 spin_lock(&pic_irqchip(kvm)->lock);
3055                 memcpy(&pic_irqchip(kvm)->pics[0],
3056                         &chip->chip.pic,
3057                         sizeof(struct kvm_pic_state));
3058                 spin_unlock(&pic_irqchip(kvm)->lock);
3059                 break;
3060         case KVM_IRQCHIP_PIC_SLAVE:
3061                 spin_lock(&pic_irqchip(kvm)->lock);
3062                 memcpy(&pic_irqchip(kvm)->pics[1],
3063                         &chip->chip.pic,
3064                         sizeof(struct kvm_pic_state));
3065                 spin_unlock(&pic_irqchip(kvm)->lock);
3066                 break;
3067         case KVM_IRQCHIP_IOAPIC:
3068                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3069                 break;
3070         default:
3071                 r = -EINVAL;
3072                 break;
3073         }
3074         kvm_pic_update_irq(pic_irqchip(kvm));
3075         return r;
3076 }
3077
3078 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3079 {
3080         int r = 0;
3081
3082         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3083         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3084         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3085         return r;
3086 }
3087
3088 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3089 {
3090         int r = 0;
3091
3092         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3093         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3094         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3095         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3096         return r;
3097 }
3098
3099 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3100 {
3101         int r = 0;
3102
3103         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3104         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3105                 sizeof(ps->channels));
3106         ps->flags = kvm->arch.vpit->pit_state.flags;
3107         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3108         return r;
3109 }
3110
3111 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3112 {
3113         int r = 0, start = 0;
3114         u32 prev_legacy, cur_legacy;
3115         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3116         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3117         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3118         if (!prev_legacy && cur_legacy)
3119                 start = 1;
3120         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3121                sizeof(kvm->arch.vpit->pit_state.channels));
3122         kvm->arch.vpit->pit_state.flags = ps->flags;
3123         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3124         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3125         return r;
3126 }
3127
3128 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3129                                  struct kvm_reinject_control *control)
3130 {
3131         if (!kvm->arch.vpit)
3132                 return -ENXIO;
3133         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3134         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3135         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3136         return 0;
3137 }
3138
3139 /*
3140  * Get (and clear) the dirty memory log for a memory slot.
3141  */
3142 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3143                                       struct kvm_dirty_log *log)
3144 {
3145         int r, i;
3146         struct kvm_memory_slot *memslot;
3147         unsigned long n;
3148         unsigned long is_dirty = 0;
3149
3150         mutex_lock(&kvm->slots_lock);
3151
3152         r = -EINVAL;
3153         if (log->slot >= KVM_MEMORY_SLOTS)
3154                 goto out;
3155
3156         memslot = &kvm->memslots->memslots[log->slot];
3157         r = -ENOENT;
3158         if (!memslot->dirty_bitmap)
3159                 goto out;
3160
3161         n = kvm_dirty_bitmap_bytes(memslot);
3162
3163         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3164                 is_dirty = memslot->dirty_bitmap[i];
3165
3166         /* If nothing is dirty, don't bother messing with page tables. */
3167         if (is_dirty) {
3168                 struct kvm_memslots *slots, *old_slots;
3169                 unsigned long *dirty_bitmap;
3170
3171                 spin_lock(&kvm->mmu_lock);
3172                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3173                 spin_unlock(&kvm->mmu_lock);
3174
3175                 r = -ENOMEM;
3176                 dirty_bitmap = vmalloc(n);
3177                 if (!dirty_bitmap)
3178                         goto out;
3179                 memset(dirty_bitmap, 0, n);
3180
3181                 r = -ENOMEM;
3182                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3183                 if (!slots) {
3184                         vfree(dirty_bitmap);
3185                         goto out;
3186                 }
3187                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3188                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3189
3190                 old_slots = kvm->memslots;
3191                 rcu_assign_pointer(kvm->memslots, slots);
3192                 synchronize_srcu_expedited(&kvm->srcu);
3193                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3194                 kfree(old_slots);
3195
3196                 r = -EFAULT;
3197                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3198                         vfree(dirty_bitmap);
3199                         goto out;
3200                 }
3201                 vfree(dirty_bitmap);
3202         } else {
3203                 r = -EFAULT;
3204                 if (clear_user(log->dirty_bitmap, n))
3205                         goto out;
3206         }
3207
3208         r = 0;
3209 out:
3210         mutex_unlock(&kvm->slots_lock);
3211         return r;
3212 }
3213
3214 long kvm_arch_vm_ioctl(struct file *filp,
3215                        unsigned int ioctl, unsigned long arg)
3216 {
3217         struct kvm *kvm = filp->private_data;
3218         void __user *argp = (void __user *)arg;
3219         int r = -ENOTTY;
3220         /*
3221          * This union makes it completely explicit to gcc-3.x
3222          * that these two variables' stack usage should be
3223          * combined, not added together.
3224          */
3225         union {
3226                 struct kvm_pit_state ps;
3227                 struct kvm_pit_state2 ps2;
3228                 struct kvm_pit_config pit_config;
3229         } u;
3230
3231         switch (ioctl) {
3232         case KVM_SET_TSS_ADDR:
3233                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3234                 if (r < 0)
3235                         goto out;
3236                 break;
3237         case KVM_SET_IDENTITY_MAP_ADDR: {
3238                 u64 ident_addr;
3239
3240                 r = -EFAULT;
3241                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3242                         goto out;
3243                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3244                 if (r < 0)
3245                         goto out;
3246                 break;
3247         }
3248         case KVM_SET_NR_MMU_PAGES:
3249                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3250                 if (r)
3251                         goto out;
3252                 break;
3253         case KVM_GET_NR_MMU_PAGES:
3254                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3255                 break;
3256         case KVM_CREATE_IRQCHIP: {
3257                 struct kvm_pic *vpic;
3258
3259                 mutex_lock(&kvm->lock);
3260                 r = -EEXIST;
3261                 if (kvm->arch.vpic)
3262                         goto create_irqchip_unlock;
3263                 r = -ENOMEM;
3264                 vpic = kvm_create_pic(kvm);
3265                 if (vpic) {
3266                         r = kvm_ioapic_init(kvm);
3267                         if (r) {
3268                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3269                                                           &vpic->dev);
3270                                 kfree(vpic);
3271                                 goto create_irqchip_unlock;
3272                         }
3273                 } else
3274                         goto create_irqchip_unlock;
3275                 smp_wmb();
3276                 kvm->arch.vpic = vpic;
3277                 smp_wmb();
3278                 r = kvm_setup_default_irq_routing(kvm);
3279                 if (r) {
3280                         mutex_lock(&kvm->irq_lock);
3281                         kvm_ioapic_destroy(kvm);
3282                         kvm_destroy_pic(kvm);
3283                         mutex_unlock(&kvm->irq_lock);
3284                 }
3285         create_irqchip_unlock:
3286                 mutex_unlock(&kvm->lock);
3287                 break;
3288         }
3289         case KVM_CREATE_PIT:
3290                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3291                 goto create_pit;
3292         case KVM_CREATE_PIT2:
3293                 r = -EFAULT;
3294                 if (copy_from_user(&u.pit_config, argp,
3295                                    sizeof(struct kvm_pit_config)))
3296                         goto out;
3297         create_pit:
3298                 mutex_lock(&kvm->slots_lock);
3299                 r = -EEXIST;
3300                 if (kvm->arch.vpit)
3301                         goto create_pit_unlock;
3302                 r = -ENOMEM;
3303                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3304                 if (kvm->arch.vpit)
3305                         r = 0;
3306         create_pit_unlock:
3307                 mutex_unlock(&kvm->slots_lock);
3308                 break;
3309         case KVM_IRQ_LINE_STATUS:
3310         case KVM_IRQ_LINE: {
3311                 struct kvm_irq_level irq_event;
3312
3313                 r = -EFAULT;
3314                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3315                         goto out;
3316                 r = -ENXIO;
3317                 if (irqchip_in_kernel(kvm)) {
3318                         __s32 status;
3319                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3320                                         irq_event.irq, irq_event.level);
3321                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3322                                 r = -EFAULT;
3323                                 irq_event.status = status;
3324                                 if (copy_to_user(argp, &irq_event,
3325                                                         sizeof irq_event))
3326                                         goto out;
3327                         }
3328                         r = 0;
3329                 }
3330                 break;
3331         }
3332         case KVM_GET_IRQCHIP: {
3333                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3334                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3335
3336                 r = -ENOMEM;
3337                 if (!chip)
3338                         goto out;
3339                 r = -EFAULT;
3340                 if (copy_from_user(chip, argp, sizeof *chip))
3341                         goto get_irqchip_out;
3342                 r = -ENXIO;
3343                 if (!irqchip_in_kernel(kvm))
3344                         goto get_irqchip_out;
3345                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3346                 if (r)
3347                         goto get_irqchip_out;
3348                 r = -EFAULT;
3349                 if (copy_to_user(argp, chip, sizeof *chip))
3350                         goto get_irqchip_out;
3351                 r = 0;
3352         get_irqchip_out:
3353                 kfree(chip);
3354                 if (r)
3355                         goto out;
3356                 break;
3357         }
3358         case KVM_SET_IRQCHIP: {
3359                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3360                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3361
3362                 r = -ENOMEM;
3363                 if (!chip)
3364                         goto out;
3365                 r = -EFAULT;
3366                 if (copy_from_user(chip, argp, sizeof *chip))
3367                         goto set_irqchip_out;
3368                 r = -ENXIO;
3369                 if (!irqchip_in_kernel(kvm))
3370                         goto set_irqchip_out;
3371                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3372                 if (r)
3373                         goto set_irqchip_out;
3374                 r = 0;
3375         set_irqchip_out:
3376                 kfree(chip);
3377                 if (r)
3378                         goto out;
3379                 break;
3380         }
3381         case KVM_GET_PIT: {
3382                 r = -EFAULT;
3383                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3384                         goto out;
3385                 r = -ENXIO;
3386                 if (!kvm->arch.vpit)
3387                         goto out;
3388                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3389                 if (r)
3390                         goto out;
3391                 r = -EFAULT;
3392                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3393                         goto out;
3394                 r = 0;
3395                 break;
3396         }
3397         case KVM_SET_PIT: {
3398                 r = -EFAULT;
3399                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3400                         goto out;
3401                 r = -ENXIO;
3402                 if (!kvm->arch.vpit)
3403                         goto out;
3404                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3405                 if (r)
3406                         goto out;
3407                 r = 0;
3408                 break;
3409         }
3410         case KVM_GET_PIT2: {
3411                 r = -ENXIO;
3412                 if (!kvm->arch.vpit)
3413                         goto out;
3414                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3415                 if (r)
3416                         goto out;
3417                 r = -EFAULT;
3418                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3419                         goto out;
3420                 r = 0;
3421                 break;
3422         }
3423         case KVM_SET_PIT2: {
3424                 r = -EFAULT;
3425                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3426                         goto out;
3427                 r = -ENXIO;
3428                 if (!kvm->arch.vpit)
3429                         goto out;
3430                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3431                 if (r)
3432                         goto out;
3433                 r = 0;
3434                 break;
3435         }
3436         case KVM_REINJECT_CONTROL: {
3437                 struct kvm_reinject_control control;
3438                 r =  -EFAULT;
3439                 if (copy_from_user(&control, argp, sizeof(control)))
3440                         goto out;
3441                 r = kvm_vm_ioctl_reinject(kvm, &control);
3442                 if (r)
3443                         goto out;
3444                 r = 0;
3445                 break;
3446         }
3447         case KVM_XEN_HVM_CONFIG: {
3448                 r = -EFAULT;
3449                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3450                                    sizeof(struct kvm_xen_hvm_config)))
3451                         goto out;
3452                 r = -EINVAL;
3453                 if (kvm->arch.xen_hvm_config.flags)
3454                         goto out;
3455                 r = 0;
3456                 break;
3457         }
3458         case KVM_SET_CLOCK: {
3459                 struct kvm_clock_data user_ns;
3460                 u64 now_ns;
3461                 s64 delta;
3462
3463                 r = -EFAULT;
3464                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3465                         goto out;
3466
3467                 r = -EINVAL;
3468                 if (user_ns.flags)
3469                         goto out;
3470
3471                 r = 0;
3472                 now_ns = get_kernel_ns();
3473                 delta = user_ns.clock - now_ns;
3474                 kvm->arch.kvmclock_offset = delta;
3475                 break;
3476         }
3477         case KVM_GET_CLOCK: {
3478                 struct kvm_clock_data user_ns;
3479                 u64 now_ns;
3480
3481                 now_ns = get_kernel_ns();
3482                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3483                 user_ns.flags = 0;
3484
3485                 r = -EFAULT;
3486                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3487                         goto out;
3488                 r = 0;
3489                 break;
3490         }
3491
3492         default:
3493                 ;
3494         }
3495 out:
3496         return r;
3497 }
3498
3499 static void kvm_init_msr_list(void)
3500 {
3501         u32 dummy[2];
3502         unsigned i, j;
3503
3504         /* skip the first msrs in the list. KVM-specific */
3505         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3506                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3507                         continue;
3508                 if (j < i)
3509                         msrs_to_save[j] = msrs_to_save[i];
3510                 j++;
3511         }
3512         num_msrs_to_save = j;
3513 }
3514
3515 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3516                            const void *v)
3517 {
3518         if (vcpu->arch.apic &&
3519             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3520                 return 0;
3521
3522         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3523 }
3524
3525 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3526 {
3527         if (vcpu->arch.apic &&
3528             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3529                 return 0;
3530
3531         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3532 }
3533
3534 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3535                         struct kvm_segment *var, int seg)
3536 {
3537         kvm_x86_ops->set_segment(vcpu, var, seg);
3538 }
3539
3540 void kvm_get_segment(struct kvm_vcpu *vcpu,
3541                      struct kvm_segment *var, int seg)
3542 {
3543         kvm_x86_ops->get_segment(vcpu, var, seg);
3544 }
3545
3546 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3547 {
3548         return gpa;
3549 }
3550
3551 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3552 {
3553         gpa_t t_gpa;
3554         u32 error;
3555
3556         BUG_ON(!mmu_is_nested(vcpu));
3557
3558         /* NPT walks are always user-walks */
3559         access |= PFERR_USER_MASK;
3560         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3561         if (t_gpa == UNMAPPED_GVA)
3562                 vcpu->arch.fault.nested = true;
3563
3564         return t_gpa;
3565 }
3566
3567 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3568 {
3569         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3570         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3571 }
3572
3573  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3574 {
3575         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3576         access |= PFERR_FETCH_MASK;
3577         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3578 }
3579
3580 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3581 {
3582         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3583         access |= PFERR_WRITE_MASK;
3584         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3585 }
3586
3587 /* uses this to access any guest's mapped memory without checking CPL */
3588 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3589 {
3590         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3591 }
3592
3593 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3594                                       struct kvm_vcpu *vcpu, u32 access,
3595                                       u32 *error)
3596 {
3597         void *data = val;
3598         int r = X86EMUL_CONTINUE;
3599
3600         while (bytes) {
3601                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3602                                                             error);
3603                 unsigned offset = addr & (PAGE_SIZE-1);
3604                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3605                 int ret;
3606
3607                 if (gpa == UNMAPPED_GVA) {
3608                         r = X86EMUL_PROPAGATE_FAULT;
3609                         goto out;
3610                 }
3611                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3612                 if (ret < 0) {
3613                         r = X86EMUL_IO_NEEDED;
3614                         goto out;
3615                 }
3616
3617                 bytes -= toread;
3618                 data += toread;
3619                 addr += toread;
3620         }
3621 out:
3622         return r;
3623 }
3624
3625 /* used for instruction fetching */
3626 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3627                                 struct kvm_vcpu *vcpu, u32 *error)
3628 {
3629         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3630         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3631                                           access | PFERR_FETCH_MASK, error);
3632 }
3633
3634 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3635                                struct kvm_vcpu *vcpu, u32 *error)
3636 {
3637         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3638         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3639                                           error);
3640 }
3641
3642 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3643                                struct kvm_vcpu *vcpu, u32 *error)
3644 {
3645         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3646 }
3647
3648 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3649                                        unsigned int bytes,
3650                                        struct kvm_vcpu *vcpu,
3651                                        u32 *error)
3652 {
3653         void *data = val;
3654         int r = X86EMUL_CONTINUE;
3655
3656         while (bytes) {
3657                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3658                                                              PFERR_WRITE_MASK,
3659                                                              error);
3660                 unsigned offset = addr & (PAGE_SIZE-1);
3661                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3662                 int ret;
3663
3664                 if (gpa == UNMAPPED_GVA) {
3665                         r = X86EMUL_PROPAGATE_FAULT;
3666                         goto out;
3667                 }
3668                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3669                 if (ret < 0) {
3670                         r = X86EMUL_IO_NEEDED;
3671                         goto out;
3672                 }
3673
3674                 bytes -= towrite;
3675                 data += towrite;
3676                 addr += towrite;
3677         }
3678 out:
3679         return r;
3680 }
3681
3682 static int emulator_read_emulated(unsigned long addr,
3683                                   void *val,
3684                                   unsigned int bytes,
3685                                   unsigned int *error_code,
3686                                   struct kvm_vcpu *vcpu)
3687 {
3688         gpa_t                 gpa;
3689
3690         if (vcpu->mmio_read_completed) {
3691                 memcpy(val, vcpu->mmio_data, bytes);
3692                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3693                                vcpu->mmio_phys_addr, *(u64 *)val);
3694                 vcpu->mmio_read_completed = 0;
3695                 return X86EMUL_CONTINUE;
3696         }
3697
3698         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3699
3700         if (gpa == UNMAPPED_GVA)
3701                 return X86EMUL_PROPAGATE_FAULT;
3702
3703         /* For APIC access vmexit */
3704         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3705                 goto mmio;
3706
3707         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3708                                 == X86EMUL_CONTINUE)
3709                 return X86EMUL_CONTINUE;
3710
3711 mmio:
3712         /*
3713          * Is this MMIO handled locally?
3714          */
3715         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3716                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3717                 return X86EMUL_CONTINUE;
3718         }
3719
3720         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3721
3722         vcpu->mmio_needed = 1;
3723         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3724         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3725         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3726         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3727
3728         return X86EMUL_IO_NEEDED;
3729 }
3730
3731 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3732                           const void *val, int bytes)
3733 {
3734         int ret;
3735
3736         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3737         if (ret < 0)
3738                 return 0;
3739         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3740         return 1;
3741 }
3742
3743 static int emulator_write_emulated_onepage(unsigned long addr,
3744                                            const void *val,
3745                                            unsigned int bytes,
3746                                            unsigned int *error_code,
3747                                            struct kvm_vcpu *vcpu)
3748 {
3749         gpa_t                 gpa;
3750
3751         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3752
3753         if (gpa == UNMAPPED_GVA)
3754                 return X86EMUL_PROPAGATE_FAULT;
3755
3756         /* For APIC access vmexit */
3757         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3758                 goto mmio;
3759
3760         if (emulator_write_phys(vcpu, gpa, val, bytes))
3761                 return X86EMUL_CONTINUE;
3762
3763 mmio:
3764         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3765         /*
3766          * Is this MMIO handled locally?
3767          */
3768         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3769                 return X86EMUL_CONTINUE;
3770
3771         vcpu->mmio_needed = 1;
3772         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3773         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3774         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3775         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3776         memcpy(vcpu->run->mmio.data, val, bytes);
3777
3778         return X86EMUL_CONTINUE;
3779 }
3780
3781 int emulator_write_emulated(unsigned long addr,
3782                             const void *val,
3783                             unsigned int bytes,
3784                             unsigned int *error_code,
3785                             struct kvm_vcpu *vcpu)
3786 {
3787         /* Crossing a page boundary? */
3788         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3789                 int rc, now;
3790
3791                 now = -addr & ~PAGE_MASK;
3792                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3793                                                      vcpu);
3794                 if (rc != X86EMUL_CONTINUE)
3795                         return rc;
3796                 addr += now;
3797                 val += now;
3798                 bytes -= now;
3799         }
3800         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3801                                                vcpu);
3802 }
3803
3804 #define CMPXCHG_TYPE(t, ptr, old, new) \
3805         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3806
3807 #ifdef CONFIG_X86_64
3808 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3809 #else
3810 #  define CMPXCHG64(ptr, old, new) \
3811         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3812 #endif
3813
3814 static int emulator_cmpxchg_emulated(unsigned long addr,
3815                                      const void *old,
3816                                      const void *new,
3817                                      unsigned int bytes,
3818                                      unsigned int *error_code,
3819                                      struct kvm_vcpu *vcpu)
3820 {
3821         gpa_t gpa;
3822         struct page *page;
3823         char *kaddr;
3824         bool exchanged;
3825
3826         /* guests cmpxchg8b have to be emulated atomically */
3827         if (bytes > 8 || (bytes & (bytes - 1)))
3828                 goto emul_write;
3829
3830         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3831
3832         if (gpa == UNMAPPED_GVA ||
3833             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3834                 goto emul_write;
3835
3836         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3837                 goto emul_write;
3838
3839         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3840         if (is_error_page(page)) {
3841                 kvm_release_page_clean(page);
3842                 goto emul_write;
3843         }
3844
3845         kaddr = kmap_atomic(page, KM_USER0);
3846         kaddr += offset_in_page(gpa);
3847         switch (bytes) {
3848         case 1:
3849                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3850                 break;
3851         case 2:
3852                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3853                 break;
3854         case 4:
3855                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3856                 break;
3857         case 8:
3858                 exchanged = CMPXCHG64(kaddr, old, new);
3859                 break;
3860         default:
3861                 BUG();
3862         }
3863         kunmap_atomic(kaddr, KM_USER0);
3864         kvm_release_page_dirty(page);
3865
3866         if (!exchanged)
3867                 return X86EMUL_CMPXCHG_FAILED;
3868
3869         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3870
3871         return X86EMUL_CONTINUE;
3872
3873 emul_write:
3874         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3875
3876         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3877 }
3878
3879 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3880 {
3881         /* TODO: String I/O for in kernel device */
3882         int r;
3883
3884         if (vcpu->arch.pio.in)
3885                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3886                                     vcpu->arch.pio.size, pd);
3887         else
3888                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3889                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3890                                      pd);
3891         return r;
3892 }
3893
3894
3895 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3896                              unsigned int count, struct kvm_vcpu *vcpu)
3897 {
3898         if (vcpu->arch.pio.count)
3899                 goto data_avail;
3900
3901         trace_kvm_pio(0, port, size, 1);
3902
3903         vcpu->arch.pio.port = port;
3904         vcpu->arch.pio.in = 1;
3905         vcpu->arch.pio.count  = count;
3906         vcpu->arch.pio.size = size;
3907
3908         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3909         data_avail:
3910                 memcpy(val, vcpu->arch.pio_data, size * count);
3911                 vcpu->arch.pio.count = 0;
3912                 return 1;
3913         }
3914
3915         vcpu->run->exit_reason = KVM_EXIT_IO;
3916         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3917         vcpu->run->io.size = size;
3918         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3919         vcpu->run->io.count = count;
3920         vcpu->run->io.port = port;
3921
3922         return 0;
3923 }
3924
3925 static int emulator_pio_out_emulated(int size, unsigned short port,
3926                               const void *val, unsigned int count,
3927                               struct kvm_vcpu *vcpu)
3928 {
3929         trace_kvm_pio(1, port, size, 1);
3930
3931         vcpu->arch.pio.port = port;
3932         vcpu->arch.pio.in = 0;
3933         vcpu->arch.pio.count = count;
3934         vcpu->arch.pio.size = size;
3935
3936         memcpy(vcpu->arch.pio_data, val, size * count);
3937
3938         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3939                 vcpu->arch.pio.count = 0;
3940                 return 1;
3941         }
3942
3943         vcpu->run->exit_reason = KVM_EXIT_IO;
3944         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3945         vcpu->run->io.size = size;
3946         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3947         vcpu->run->io.count = count;
3948         vcpu->run->io.port = port;
3949
3950         return 0;
3951 }
3952
3953 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3954 {
3955         return kvm_x86_ops->get_segment_base(vcpu, seg);
3956 }
3957
3958 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3959 {
3960         kvm_mmu_invlpg(vcpu, address);
3961         return X86EMUL_CONTINUE;
3962 }
3963
3964 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3965 {
3966         if (!need_emulate_wbinvd(vcpu))
3967                 return X86EMUL_CONTINUE;
3968
3969         if (kvm_x86_ops->has_wbinvd_exit()) {
3970                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3971                                 wbinvd_ipi, NULL, 1);
3972                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3973         }
3974         wbinvd();
3975         return X86EMUL_CONTINUE;
3976 }
3977 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3978
3979 int emulate_clts(struct kvm_vcpu *vcpu)
3980 {
3981         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3982         kvm_x86_ops->fpu_activate(vcpu);
3983         return X86EMUL_CONTINUE;
3984 }
3985
3986 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3987 {
3988         return _kvm_get_dr(vcpu, dr, dest);
3989 }
3990
3991 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3992 {
3993
3994         return __kvm_set_dr(vcpu, dr, value);
3995 }
3996
3997 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3998 {
3999         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4000 }
4001
4002 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4003 {
4004         unsigned long value;
4005
4006         switch (cr) {
4007         case 0:
4008                 value = kvm_read_cr0(vcpu);
4009                 break;
4010         case 2:
4011                 value = vcpu->arch.cr2;
4012                 break;
4013         case 3:
4014                 value = vcpu->arch.cr3;
4015                 break;
4016         case 4:
4017                 value = kvm_read_cr4(vcpu);
4018                 break;
4019         case 8:
4020                 value = kvm_get_cr8(vcpu);
4021                 break;
4022         default:
4023                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4024                 return 0;
4025         }
4026
4027         return value;
4028 }
4029
4030 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4031 {
4032         int res = 0;
4033
4034         switch (cr) {
4035         case 0:
4036                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4037                 break;
4038         case 2:
4039                 vcpu->arch.cr2 = val;
4040                 break;
4041         case 3:
4042                 res = kvm_set_cr3(vcpu, val);
4043                 break;
4044         case 4:
4045                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4046                 break;
4047         case 8:
4048                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4049                 break;
4050         default:
4051                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4052                 res = -1;
4053         }
4054
4055         return res;
4056 }
4057
4058 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4059 {
4060         return kvm_x86_ops->get_cpl(vcpu);
4061 }
4062
4063 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4064 {
4065         kvm_x86_ops->get_gdt(vcpu, dt);
4066 }
4067
4068 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4069 {
4070         kvm_x86_ops->get_idt(vcpu, dt);
4071 }
4072
4073 static unsigned long emulator_get_cached_segment_base(int seg,
4074                                                       struct kvm_vcpu *vcpu)
4075 {
4076         return get_segment_base(vcpu, seg);
4077 }
4078
4079 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4080                                            struct kvm_vcpu *vcpu)
4081 {
4082         struct kvm_segment var;
4083
4084         kvm_get_segment(vcpu, &var, seg);
4085
4086         if (var.unusable)
4087                 return false;
4088
4089         if (var.g)
4090                 var.limit >>= 12;
4091         set_desc_limit(desc, var.limit);
4092         set_desc_base(desc, (unsigned long)var.base);
4093         desc->type = var.type;
4094         desc->s = var.s;
4095         desc->dpl = var.dpl;
4096         desc->p = var.present;
4097         desc->avl = var.avl;
4098         desc->l = var.l;
4099         desc->d = var.db;
4100         desc->g = var.g;
4101
4102         return true;
4103 }
4104
4105 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4106                                            struct kvm_vcpu *vcpu)
4107 {
4108         struct kvm_segment var;
4109
4110         /* needed to preserve selector */
4111         kvm_get_segment(vcpu, &var, seg);
4112
4113         var.base = get_desc_base(desc);
4114         var.limit = get_desc_limit(desc);
4115         if (desc->g)
4116                 var.limit = (var.limit << 12) | 0xfff;
4117         var.type = desc->type;
4118         var.present = desc->p;
4119         var.dpl = desc->dpl;
4120         var.db = desc->d;
4121         var.s = desc->s;
4122         var.l = desc->l;
4123         var.g = desc->g;
4124         var.avl = desc->avl;
4125         var.present = desc->p;
4126         var.unusable = !var.present;
4127         var.padding = 0;
4128
4129         kvm_set_segment(vcpu, &var, seg);
4130         return;
4131 }
4132
4133 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4134 {
4135         struct kvm_segment kvm_seg;
4136
4137         kvm_get_segment(vcpu, &kvm_seg, seg);
4138         return kvm_seg.selector;
4139 }
4140
4141 static void emulator_set_segment_selector(u16 sel, int seg,
4142                                           struct kvm_vcpu *vcpu)
4143 {
4144         struct kvm_segment kvm_seg;
4145
4146         kvm_get_segment(vcpu, &kvm_seg, seg);
4147         kvm_seg.selector = sel;
4148         kvm_set_segment(vcpu, &kvm_seg, seg);
4149 }
4150
4151 static struct x86_emulate_ops emulate_ops = {
4152         .read_std            = kvm_read_guest_virt_system,
4153         .write_std           = kvm_write_guest_virt_system,
4154         .fetch               = kvm_fetch_guest_virt,
4155         .read_emulated       = emulator_read_emulated,
4156         .write_emulated      = emulator_write_emulated,
4157         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4158         .pio_in_emulated     = emulator_pio_in_emulated,
4159         .pio_out_emulated    = emulator_pio_out_emulated,
4160         .get_cached_descriptor = emulator_get_cached_descriptor,
4161         .set_cached_descriptor = emulator_set_cached_descriptor,
4162         .get_segment_selector = emulator_get_segment_selector,
4163         .set_segment_selector = emulator_set_segment_selector,
4164         .get_cached_segment_base = emulator_get_cached_segment_base,
4165         .get_gdt             = emulator_get_gdt,
4166         .get_idt             = emulator_get_idt,
4167         .get_cr              = emulator_get_cr,
4168         .set_cr              = emulator_set_cr,
4169         .cpl                 = emulator_get_cpl,
4170         .get_dr              = emulator_get_dr,
4171         .set_dr              = emulator_set_dr,
4172         .set_msr             = kvm_set_msr,
4173         .get_msr             = kvm_get_msr,
4174 };
4175
4176 static void cache_all_regs(struct kvm_vcpu *vcpu)
4177 {
4178         kvm_register_read(vcpu, VCPU_REGS_RAX);
4179         kvm_register_read(vcpu, VCPU_REGS_RSP);
4180         kvm_register_read(vcpu, VCPU_REGS_RIP);
4181         vcpu->arch.regs_dirty = ~0;
4182 }
4183
4184 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4185 {
4186         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4187         /*
4188          * an sti; sti; sequence only disable interrupts for the first
4189          * instruction. So, if the last instruction, be it emulated or
4190          * not, left the system with the INT_STI flag enabled, it
4191          * means that the last instruction is an sti. We should not
4192          * leave the flag on in this case. The same goes for mov ss
4193          */
4194         if (!(int_shadow & mask))
4195                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4196 }
4197
4198 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4199 {
4200         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4201         if (ctxt->exception == PF_VECTOR)
4202                 kvm_propagate_fault(vcpu);
4203         else if (ctxt->error_code_valid)
4204                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4205         else
4206                 kvm_queue_exception(vcpu, ctxt->exception);
4207 }
4208
4209 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4210 {
4211         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4212         int cs_db, cs_l;
4213
4214         cache_all_regs(vcpu);
4215
4216         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4217
4218         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4219         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4220         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4221         vcpu->arch.emulate_ctxt.mode =
4222                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4223                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4224                 ? X86EMUL_MODE_VM86 : cs_l
4225                 ? X86EMUL_MODE_PROT64 : cs_db
4226                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4227         memset(c, 0, sizeof(struct decode_cache));
4228         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4229 }
4230
4231 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4232 {
4233         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4234         int ret;
4235
4236         init_emulate_ctxt(vcpu);
4237
4238         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4239         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4240         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4241         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4242
4243         if (ret != X86EMUL_CONTINUE)
4244                 return EMULATE_FAIL;
4245
4246         vcpu->arch.emulate_ctxt.eip = c->eip;
4247         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4248         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4249         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4250
4251         if (irq == NMI_VECTOR)
4252                 vcpu->arch.nmi_pending = false;
4253         else
4254                 vcpu->arch.interrupt.pending = false;
4255
4256         return EMULATE_DONE;
4257 }
4258 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4259
4260 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4261 {
4262         ++vcpu->stat.insn_emulation_fail;
4263         trace_kvm_emulate_insn_failed(vcpu);
4264         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4265         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4266         vcpu->run->internal.ndata = 0;
4267         kvm_queue_exception(vcpu, UD_VECTOR);
4268         return EMULATE_FAIL;
4269 }
4270
4271 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4272 {
4273         gpa_t gpa;
4274
4275         if (tdp_enabled)
4276                 return false;
4277
4278         /*
4279          * if emulation was due to access to shadowed page table
4280          * and it failed try to unshadow page and re-entetr the
4281          * guest to let CPU execute the instruction.
4282          */
4283         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4284                 return true;
4285
4286         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4287
4288         if (gpa == UNMAPPED_GVA)
4289                 return true; /* let cpu generate fault */
4290
4291         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4292                 return true;
4293
4294         return false;
4295 }
4296
4297 int emulate_instruction(struct kvm_vcpu *vcpu,
4298                         unsigned long cr2,
4299                         u16 error_code,
4300                         int emulation_type)
4301 {
4302         int r;
4303         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4304
4305         kvm_clear_exception_queue(vcpu);
4306         vcpu->arch.mmio_fault_cr2 = cr2;
4307         /*
4308          * TODO: fix emulate.c to use guest_read/write_register
4309          * instead of direct ->regs accesses, can save hundred cycles
4310          * on Intel for instructions that don't read/change RSP, for
4311          * for example.
4312          */
4313         cache_all_regs(vcpu);
4314
4315         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4316                 init_emulate_ctxt(vcpu);
4317                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4318                 vcpu->arch.emulate_ctxt.exception = -1;
4319                 vcpu->arch.emulate_ctxt.perm_ok = false;
4320
4321                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4322                 if (r == X86EMUL_PROPAGATE_FAULT)
4323                         goto done;
4324
4325                 trace_kvm_emulate_insn_start(vcpu);
4326
4327                 /* Only allow emulation of specific instructions on #UD
4328                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4329                 if (emulation_type & EMULTYPE_TRAP_UD) {
4330                         if (!c->twobyte)
4331                                 return EMULATE_FAIL;
4332                         switch (c->b) {
4333                         case 0x01: /* VMMCALL */
4334                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4335                                         return EMULATE_FAIL;
4336                                 break;
4337                         case 0x34: /* sysenter */
4338                         case 0x35: /* sysexit */
4339                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4340                                         return EMULATE_FAIL;
4341                                 break;
4342                         case 0x05: /* syscall */
4343                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4344                                         return EMULATE_FAIL;
4345                                 break;
4346                         default:
4347                                 return EMULATE_FAIL;
4348                         }
4349
4350                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4351                                 return EMULATE_FAIL;
4352                 }
4353
4354                 ++vcpu->stat.insn_emulation;
4355                 if (r)  {
4356                         if (reexecute_instruction(vcpu, cr2))
4357                                 return EMULATE_DONE;
4358                         if (emulation_type & EMULTYPE_SKIP)
4359                                 return EMULATE_FAIL;
4360                         return handle_emulation_failure(vcpu);
4361                 }
4362         }
4363
4364         if (emulation_type & EMULTYPE_SKIP) {
4365                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4366                 return EMULATE_DONE;
4367         }
4368
4369         /* this is needed for vmware backdor interface to work since it
4370            changes registers values  during IO operation */
4371         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4372
4373 restart:
4374         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4375
4376         if (r == EMULATION_FAILED) {
4377                 if (reexecute_instruction(vcpu, cr2))
4378                         return EMULATE_DONE;
4379
4380                 return handle_emulation_failure(vcpu);
4381         }
4382
4383 done:
4384         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4385                 inject_emulated_exception(vcpu);
4386                 r = EMULATE_DONE;
4387         } else if (vcpu->arch.pio.count) {
4388                 if (!vcpu->arch.pio.in)
4389                         vcpu->arch.pio.count = 0;
4390                 r = EMULATE_DO_MMIO;
4391         } else if (vcpu->mmio_needed) {
4392                 if (vcpu->mmio_is_write)
4393                         vcpu->mmio_needed = 0;
4394                 r = EMULATE_DO_MMIO;
4395         } else if (r == EMULATION_RESTART)
4396                 goto restart;
4397         else
4398                 r = EMULATE_DONE;
4399
4400         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4401         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4402         kvm_make_request(KVM_REQ_EVENT, vcpu);
4403         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4404         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4405
4406         return r;
4407 }
4408 EXPORT_SYMBOL_GPL(emulate_instruction);
4409
4410 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4411 {
4412         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4413         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4414         /* do not return to emulator after return from userspace */
4415         vcpu->arch.pio.count = 0;
4416         return ret;
4417 }
4418 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4419
4420 static void tsc_bad(void *info)
4421 {
4422         __get_cpu_var(cpu_tsc_khz) = 0;
4423 }
4424
4425 static void tsc_khz_changed(void *data)
4426 {
4427         struct cpufreq_freqs *freq = data;
4428         unsigned long khz = 0;
4429
4430         if (data)
4431                 khz = freq->new;
4432         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4433                 khz = cpufreq_quick_get(raw_smp_processor_id());
4434         if (!khz)
4435                 khz = tsc_khz;
4436         __get_cpu_var(cpu_tsc_khz) = khz;
4437 }
4438
4439 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4440                                      void *data)
4441 {
4442         struct cpufreq_freqs *freq = data;
4443         struct kvm *kvm;
4444         struct kvm_vcpu *vcpu;
4445         int i, send_ipi = 0;
4446
4447         /*
4448          * We allow guests to temporarily run on slowing clocks,
4449          * provided we notify them after, or to run on accelerating
4450          * clocks, provided we notify them before.  Thus time never
4451          * goes backwards.
4452          *
4453          * However, we have a problem.  We can't atomically update
4454          * the frequency of a given CPU from this function; it is
4455          * merely a notifier, which can be called from any CPU.
4456          * Changing the TSC frequency at arbitrary points in time
4457          * requires a recomputation of local variables related to
4458          * the TSC for each VCPU.  We must flag these local variables
4459          * to be updated and be sure the update takes place with the
4460          * new frequency before any guests proceed.
4461          *
4462          * Unfortunately, the combination of hotplug CPU and frequency
4463          * change creates an intractable locking scenario; the order
4464          * of when these callouts happen is undefined with respect to
4465          * CPU hotplug, and they can race with each other.  As such,
4466          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4467          * undefined; you can actually have a CPU frequency change take
4468          * place in between the computation of X and the setting of the
4469          * variable.  To protect against this problem, all updates of
4470          * the per_cpu tsc_khz variable are done in an interrupt
4471          * protected IPI, and all callers wishing to update the value
4472          * must wait for a synchronous IPI to complete (which is trivial
4473          * if the caller is on the CPU already).  This establishes the
4474          * necessary total order on variable updates.
4475          *
4476          * Note that because a guest time update may take place
4477          * anytime after the setting of the VCPU's request bit, the
4478          * correct TSC value must be set before the request.  However,
4479          * to ensure the update actually makes it to any guest which
4480          * starts running in hardware virtualization between the set
4481          * and the acquisition of the spinlock, we must also ping the
4482          * CPU after setting the request bit.
4483          *
4484          */
4485
4486         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4487                 return 0;
4488         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4489                 return 0;
4490
4491         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4492
4493         spin_lock(&kvm_lock);
4494         list_for_each_entry(kvm, &vm_list, vm_list) {
4495                 kvm_for_each_vcpu(i, vcpu, kvm) {
4496                         if (vcpu->cpu != freq->cpu)
4497                                 continue;
4498                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4499                         if (vcpu->cpu != smp_processor_id())
4500                                 send_ipi = 1;
4501                 }
4502         }
4503         spin_unlock(&kvm_lock);
4504
4505         if (freq->old < freq->new && send_ipi) {
4506                 /*
4507                  * We upscale the frequency.  Must make the guest
4508                  * doesn't see old kvmclock values while running with
4509                  * the new frequency, otherwise we risk the guest sees
4510                  * time go backwards.
4511                  *
4512                  * In case we update the frequency for another cpu
4513                  * (which might be in guest context) send an interrupt
4514                  * to kick the cpu out of guest context.  Next time
4515                  * guest context is entered kvmclock will be updated,
4516                  * so the guest will not see stale values.
4517                  */
4518                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4519         }
4520         return 0;
4521 }
4522
4523 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4524         .notifier_call  = kvmclock_cpufreq_notifier
4525 };
4526
4527 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4528                                         unsigned long action, void *hcpu)
4529 {
4530         unsigned int cpu = (unsigned long)hcpu;
4531
4532         switch (action) {
4533                 case CPU_ONLINE:
4534                 case CPU_DOWN_FAILED:
4535                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4536                         break;
4537                 case CPU_DOWN_PREPARE:
4538                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4539                         break;
4540         }
4541         return NOTIFY_OK;
4542 }
4543
4544 static struct notifier_block kvmclock_cpu_notifier_block = {
4545         .notifier_call  = kvmclock_cpu_notifier,
4546         .priority = -INT_MAX
4547 };
4548
4549 static void kvm_timer_init(void)
4550 {
4551         int cpu;
4552
4553         max_tsc_khz = tsc_khz;
4554         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4555         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4556 #ifdef CONFIG_CPU_FREQ
4557                 struct cpufreq_policy policy;
4558                 memset(&policy, 0, sizeof(policy));
4559                 cpufreq_get_policy(&policy, get_cpu());
4560                 if (policy.cpuinfo.max_freq)
4561                         max_tsc_khz = policy.cpuinfo.max_freq;
4562 #endif
4563                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4564                                           CPUFREQ_TRANSITION_NOTIFIER);
4565         }
4566         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4567         for_each_online_cpu(cpu)
4568                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4569 }
4570
4571 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4572
4573 static int kvm_is_in_guest(void)
4574 {
4575         return percpu_read(current_vcpu) != NULL;
4576 }
4577
4578 static int kvm_is_user_mode(void)
4579 {
4580         int user_mode = 3;
4581
4582         if (percpu_read(current_vcpu))
4583                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4584
4585         return user_mode != 0;
4586 }
4587
4588 static unsigned long kvm_get_guest_ip(void)
4589 {
4590         unsigned long ip = 0;
4591
4592         if (percpu_read(current_vcpu))
4593                 ip = kvm_rip_read(percpu_read(current_vcpu));
4594
4595         return ip;
4596 }
4597
4598 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4599         .is_in_guest            = kvm_is_in_guest,
4600         .is_user_mode           = kvm_is_user_mode,
4601         .get_guest_ip           = kvm_get_guest_ip,
4602 };
4603
4604 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4605 {
4606         percpu_write(current_vcpu, vcpu);
4607 }
4608 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4609
4610 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4611 {
4612         percpu_write(current_vcpu, NULL);
4613 }
4614 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4615
4616 int kvm_arch_init(void *opaque)
4617 {
4618         int r;
4619         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4620
4621         if (kvm_x86_ops) {
4622                 printk(KERN_ERR "kvm: already loaded the other module\n");
4623                 r = -EEXIST;
4624                 goto out;
4625         }
4626
4627         if (!ops->cpu_has_kvm_support()) {
4628                 printk(KERN_ERR "kvm: no hardware support\n");
4629                 r = -EOPNOTSUPP;
4630                 goto out;
4631         }
4632         if (ops->disabled_by_bios()) {
4633                 printk(KERN_ERR "kvm: disabled by bios\n");
4634                 r = -EOPNOTSUPP;
4635                 goto out;
4636         }
4637
4638         r = kvm_mmu_module_init();
4639         if (r)
4640                 goto out;
4641
4642         kvm_init_msr_list();
4643
4644         kvm_x86_ops = ops;
4645         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4646         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4647         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4648                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4649
4650         kvm_timer_init();
4651
4652         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4653
4654         if (cpu_has_xsave)
4655                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4656
4657         return 0;
4658
4659 out:
4660         return r;
4661 }
4662
4663 void kvm_arch_exit(void)
4664 {
4665         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4666
4667         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4668                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4669                                             CPUFREQ_TRANSITION_NOTIFIER);
4670         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4671         kvm_x86_ops = NULL;
4672         kvm_mmu_module_exit();
4673 }
4674
4675 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4676 {
4677         ++vcpu->stat.halt_exits;
4678         if (irqchip_in_kernel(vcpu->kvm)) {
4679                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4680                 return 1;
4681         } else {
4682                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4683                 return 0;
4684         }
4685 }
4686 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4687
4688 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4689                            unsigned long a1)
4690 {
4691         if (is_long_mode(vcpu))
4692                 return a0;
4693         else
4694                 return a0 | ((gpa_t)a1 << 32);
4695 }
4696
4697 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4698 {
4699         u64 param, ingpa, outgpa, ret;
4700         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4701         bool fast, longmode;
4702         int cs_db, cs_l;
4703
4704         /*
4705          * hypercall generates UD from non zero cpl and real mode
4706          * per HYPER-V spec
4707          */
4708         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4709                 kvm_queue_exception(vcpu, UD_VECTOR);
4710                 return 0;
4711         }
4712
4713         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4714         longmode = is_long_mode(vcpu) && cs_l == 1;
4715
4716         if (!longmode) {
4717                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4718                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4719                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4720                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4721                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4722                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4723         }
4724 #ifdef CONFIG_X86_64
4725         else {
4726                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4727                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4728                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4729         }
4730 #endif
4731
4732         code = param & 0xffff;
4733         fast = (param >> 16) & 0x1;
4734         rep_cnt = (param >> 32) & 0xfff;
4735         rep_idx = (param >> 48) & 0xfff;
4736
4737         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4738
4739         switch (code) {
4740         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4741                 kvm_vcpu_on_spin(vcpu);
4742                 break;
4743         default:
4744                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4745                 break;
4746         }
4747
4748         ret = res | (((u64)rep_done & 0xfff) << 32);
4749         if (longmode) {
4750                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4751         } else {
4752                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4753                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4754         }
4755
4756         return 1;
4757 }
4758
4759 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4760 {
4761         unsigned long nr, a0, a1, a2, a3, ret;
4762         int r = 1;
4763
4764         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4765                 return kvm_hv_hypercall(vcpu);
4766
4767         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4768         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4769         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4770         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4771         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4772
4773         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4774
4775         if (!is_long_mode(vcpu)) {
4776                 nr &= 0xFFFFFFFF;
4777                 a0 &= 0xFFFFFFFF;
4778                 a1 &= 0xFFFFFFFF;
4779                 a2 &= 0xFFFFFFFF;
4780                 a3 &= 0xFFFFFFFF;
4781         }
4782
4783         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4784                 ret = -KVM_EPERM;
4785                 goto out;
4786         }
4787
4788         switch (nr) {
4789         case KVM_HC_VAPIC_POLL_IRQ:
4790                 ret = 0;
4791                 break;
4792         case KVM_HC_MMU_OP:
4793                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4794                 break;
4795         default:
4796                 ret = -KVM_ENOSYS;
4797                 break;
4798         }
4799 out:
4800         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4801         ++vcpu->stat.hypercalls;
4802         return r;
4803 }
4804 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4805
4806 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4807 {
4808         char instruction[3];
4809         unsigned long rip = kvm_rip_read(vcpu);
4810
4811         /*
4812          * Blow out the MMU to ensure that no other VCPU has an active mapping
4813          * to ensure that the updated hypercall appears atomically across all
4814          * VCPUs.
4815          */
4816         kvm_mmu_zap_all(vcpu->kvm);
4817
4818         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4819
4820         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4821 }
4822
4823 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4824 {
4825         struct desc_ptr dt = { limit, base };
4826
4827         kvm_x86_ops->set_gdt(vcpu, &dt);
4828 }
4829
4830 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4831 {
4832         struct desc_ptr dt = { limit, base };
4833
4834         kvm_x86_ops->set_idt(vcpu, &dt);
4835 }
4836
4837 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4838 {
4839         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4840         int j, nent = vcpu->arch.cpuid_nent;
4841
4842         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4843         /* when no next entry is found, the current entry[i] is reselected */
4844         for (j = i + 1; ; j = (j + 1) % nent) {
4845                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4846                 if (ej->function == e->function) {
4847                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4848                         return j;
4849                 }
4850         }
4851         return 0; /* silence gcc, even though control never reaches here */
4852 }
4853
4854 /* find an entry with matching function, matching index (if needed), and that
4855  * should be read next (if it's stateful) */
4856 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4857         u32 function, u32 index)
4858 {
4859         if (e->function != function)
4860                 return 0;
4861         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4862                 return 0;
4863         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4864             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4865                 return 0;
4866         return 1;
4867 }
4868
4869 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4870                                               u32 function, u32 index)
4871 {
4872         int i;
4873         struct kvm_cpuid_entry2 *best = NULL;
4874
4875         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4876                 struct kvm_cpuid_entry2 *e;
4877
4878                 e = &vcpu->arch.cpuid_entries[i];
4879                 if (is_matching_cpuid_entry(e, function, index)) {
4880                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4881                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4882                         best = e;
4883                         break;
4884                 }
4885                 /*
4886                  * Both basic or both extended?
4887                  */
4888                 if (((e->function ^ function) & 0x80000000) == 0)
4889                         if (!best || e->function > best->function)
4890                                 best = e;
4891         }
4892         return best;
4893 }
4894 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4895
4896 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4897 {
4898         struct kvm_cpuid_entry2 *best;
4899
4900         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4901         if (!best || best->eax < 0x80000008)
4902                 goto not_found;
4903         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4904         if (best)
4905                 return best->eax & 0xff;
4906 not_found:
4907         return 36;
4908 }
4909
4910 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4911 {
4912         u32 function, index;
4913         struct kvm_cpuid_entry2 *best;
4914
4915         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4916         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4917         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4918         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4919         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4920         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4921         best = kvm_find_cpuid_entry(vcpu, function, index);
4922         if (best) {
4923                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4924                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4925                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4926                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4927         }
4928         kvm_x86_ops->skip_emulated_instruction(vcpu);
4929         trace_kvm_cpuid(function,
4930                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4931                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4932                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4933                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4934 }
4935 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4936
4937 /*
4938  * Check if userspace requested an interrupt window, and that the
4939  * interrupt window is open.
4940  *
4941  * No need to exit to userspace if we already have an interrupt queued.
4942  */
4943 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4944 {
4945         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4946                 vcpu->run->request_interrupt_window &&
4947                 kvm_arch_interrupt_allowed(vcpu));
4948 }
4949
4950 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4951 {
4952         struct kvm_run *kvm_run = vcpu->run;
4953
4954         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4955         kvm_run->cr8 = kvm_get_cr8(vcpu);
4956         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4957         if (irqchip_in_kernel(vcpu->kvm))
4958                 kvm_run->ready_for_interrupt_injection = 1;
4959         else
4960                 kvm_run->ready_for_interrupt_injection =
4961                         kvm_arch_interrupt_allowed(vcpu) &&
4962                         !kvm_cpu_has_interrupt(vcpu) &&
4963                         !kvm_event_needs_reinjection(vcpu);
4964 }
4965
4966 static void vapic_enter(struct kvm_vcpu *vcpu)
4967 {
4968         struct kvm_lapic *apic = vcpu->arch.apic;
4969         struct page *page;
4970
4971         if (!apic || !apic->vapic_addr)
4972                 return;
4973
4974         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4975
4976         vcpu->arch.apic->vapic_page = page;
4977 }
4978
4979 static void vapic_exit(struct kvm_vcpu *vcpu)
4980 {
4981         struct kvm_lapic *apic = vcpu->arch.apic;
4982         int idx;
4983
4984         if (!apic || !apic->vapic_addr)
4985                 return;
4986
4987         idx = srcu_read_lock(&vcpu->kvm->srcu);
4988         kvm_release_page_dirty(apic->vapic_page);
4989         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4990         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4991 }
4992
4993 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4994 {
4995         int max_irr, tpr;
4996
4997         if (!kvm_x86_ops->update_cr8_intercept)
4998                 return;
4999
5000         if (!vcpu->arch.apic)
5001                 return;
5002
5003         if (!vcpu->arch.apic->vapic_addr)
5004                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5005         else
5006                 max_irr = -1;
5007
5008         if (max_irr != -1)
5009                 max_irr >>= 4;
5010
5011         tpr = kvm_lapic_get_cr8(vcpu);
5012
5013         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5014 }
5015
5016 static void inject_pending_event(struct kvm_vcpu *vcpu)
5017 {
5018         /* try to reinject previous events if any */
5019         if (vcpu->arch.exception.pending) {
5020                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5021                                         vcpu->arch.exception.has_error_code,
5022                                         vcpu->arch.exception.error_code);
5023                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5024                                           vcpu->arch.exception.has_error_code,
5025                                           vcpu->arch.exception.error_code,
5026                                           vcpu->arch.exception.reinject);
5027                 return;
5028         }
5029
5030         if (vcpu->arch.nmi_injected) {
5031                 kvm_x86_ops->set_nmi(vcpu);
5032                 return;
5033         }
5034
5035         if (vcpu->arch.interrupt.pending) {
5036                 kvm_x86_ops->set_irq(vcpu);
5037                 return;
5038         }
5039
5040         /* try to inject new event if pending */
5041         if (vcpu->arch.nmi_pending) {
5042                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5043                         vcpu->arch.nmi_pending = false;
5044                         vcpu->arch.nmi_injected = true;
5045                         kvm_x86_ops->set_nmi(vcpu);
5046                 }
5047         } else if (kvm_cpu_has_interrupt(vcpu)) {
5048                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5049                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5050                                             false);
5051                         kvm_x86_ops->set_irq(vcpu);
5052                 }
5053         }
5054 }
5055
5056 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5057 {
5058         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5059                         !vcpu->guest_xcr0_loaded) {
5060                 /* kvm_set_xcr() also depends on this */
5061                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5062                 vcpu->guest_xcr0_loaded = 1;
5063         }
5064 }
5065
5066 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5067 {
5068         if (vcpu->guest_xcr0_loaded) {
5069                 if (vcpu->arch.xcr0 != host_xcr0)
5070                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5071                 vcpu->guest_xcr0_loaded = 0;
5072         }
5073 }
5074
5075 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5076 {
5077         int r;
5078         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5079                 vcpu->run->request_interrupt_window;
5080
5081         if (vcpu->requests) {
5082                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5083                         kvm_mmu_unload(vcpu);
5084                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5085                         __kvm_migrate_timers(vcpu);
5086                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5087                         r = kvm_guest_time_update(vcpu);
5088                         if (unlikely(r))
5089                                 goto out;
5090                 }
5091                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5092                         kvm_mmu_sync_roots(vcpu);
5093                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5094                         kvm_x86_ops->tlb_flush(vcpu);
5095                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5096                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5097                         r = 0;
5098                         goto out;
5099                 }
5100                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5101                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5102                         r = 0;
5103                         goto out;
5104                 }
5105                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5106                         vcpu->fpu_active = 0;
5107                         kvm_x86_ops->fpu_deactivate(vcpu);
5108                 }
5109         }
5110
5111         r = kvm_mmu_reload(vcpu);
5112         if (unlikely(r))
5113                 goto out;
5114
5115         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5116                 inject_pending_event(vcpu);
5117
5118                 /* enable NMI/IRQ window open exits if needed */
5119                 if (vcpu->arch.nmi_pending)
5120                         kvm_x86_ops->enable_nmi_window(vcpu);
5121                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5122                         kvm_x86_ops->enable_irq_window(vcpu);
5123
5124                 if (kvm_lapic_enabled(vcpu)) {
5125                         update_cr8_intercept(vcpu);
5126                         kvm_lapic_sync_to_vapic(vcpu);
5127                 }
5128         }
5129
5130         preempt_disable();
5131
5132         kvm_x86_ops->prepare_guest_switch(vcpu);
5133         if (vcpu->fpu_active)
5134                 kvm_load_guest_fpu(vcpu);
5135         kvm_load_guest_xcr0(vcpu);
5136
5137         atomic_set(&vcpu->guest_mode, 1);
5138         smp_wmb();
5139
5140         local_irq_disable();
5141
5142         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5143             || need_resched() || signal_pending(current)) {
5144                 atomic_set(&vcpu->guest_mode, 0);
5145                 smp_wmb();
5146                 local_irq_enable();
5147                 preempt_enable();
5148                 kvm_x86_ops->cancel_injection(vcpu);
5149                 r = 1;
5150                 goto out;
5151         }
5152
5153         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5154
5155         kvm_guest_enter();
5156
5157         if (unlikely(vcpu->arch.switch_db_regs)) {
5158                 set_debugreg(0, 7);
5159                 set_debugreg(vcpu->arch.eff_db[0], 0);
5160                 set_debugreg(vcpu->arch.eff_db[1], 1);
5161                 set_debugreg(vcpu->arch.eff_db[2], 2);
5162                 set_debugreg(vcpu->arch.eff_db[3], 3);
5163         }
5164
5165         trace_kvm_entry(vcpu->vcpu_id);
5166         kvm_x86_ops->run(vcpu);
5167
5168         /*
5169          * If the guest has used debug registers, at least dr7
5170          * will be disabled while returning to the host.
5171          * If we don't have active breakpoints in the host, we don't
5172          * care about the messed up debug address registers. But if
5173          * we have some of them active, restore the old state.
5174          */
5175         if (hw_breakpoint_active())
5176                 hw_breakpoint_restore();
5177
5178         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5179
5180         atomic_set(&vcpu->guest_mode, 0);
5181         smp_wmb();
5182         local_irq_enable();
5183
5184         ++vcpu->stat.exits;
5185
5186         /*
5187          * We must have an instruction between local_irq_enable() and
5188          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5189          * the interrupt shadow.  The stat.exits increment will do nicely.
5190          * But we need to prevent reordering, hence this barrier():
5191          */
5192         barrier();
5193
5194         kvm_guest_exit();
5195
5196         preempt_enable();
5197
5198         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5199
5200         /*
5201          * Profile KVM exit RIPs:
5202          */
5203         if (unlikely(prof_on == KVM_PROFILING)) {
5204                 unsigned long rip = kvm_rip_read(vcpu);
5205                 profile_hit(KVM_PROFILING, (void *)rip);
5206         }
5207
5208
5209         kvm_lapic_sync_from_vapic(vcpu);
5210
5211         r = kvm_x86_ops->handle_exit(vcpu);
5212 out:
5213         return r;
5214 }
5215
5216
5217 static int __vcpu_run(struct kvm_vcpu *vcpu)
5218 {
5219         int r;
5220         struct kvm *kvm = vcpu->kvm;
5221
5222         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5223                 pr_debug("vcpu %d received sipi with vector # %x\n",
5224                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5225                 kvm_lapic_reset(vcpu);
5226                 r = kvm_arch_vcpu_reset(vcpu);
5227                 if (r)
5228                         return r;
5229                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5230         }
5231
5232         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5233         vapic_enter(vcpu);
5234
5235         r = 1;
5236         while (r > 0) {
5237                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5238                         r = vcpu_enter_guest(vcpu);
5239                 else {
5240                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5241                         kvm_vcpu_block(vcpu);
5242                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5243                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5244                         {
5245                                 switch(vcpu->arch.mp_state) {
5246                                 case KVM_MP_STATE_HALTED:
5247                                         vcpu->arch.mp_state =
5248                                                 KVM_MP_STATE_RUNNABLE;
5249                                 case KVM_MP_STATE_RUNNABLE:
5250                                         break;
5251                                 case KVM_MP_STATE_SIPI_RECEIVED:
5252                                 default:
5253                                         r = -EINTR;
5254                                         break;
5255                                 }
5256                         }
5257                 }
5258
5259                 if (r <= 0)
5260                         break;
5261
5262                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5263                 if (kvm_cpu_has_pending_timer(vcpu))
5264                         kvm_inject_pending_timer_irqs(vcpu);
5265
5266                 if (dm_request_for_irq_injection(vcpu)) {
5267                         r = -EINTR;
5268                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5269                         ++vcpu->stat.request_irq_exits;
5270                 }
5271                 if (signal_pending(current)) {
5272                         r = -EINTR;
5273                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5274                         ++vcpu->stat.signal_exits;
5275                 }
5276                 if (need_resched()) {
5277                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5278                         kvm_resched(vcpu);
5279                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5280                 }
5281         }
5282
5283         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5284
5285         vapic_exit(vcpu);
5286
5287         return r;
5288 }
5289
5290 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5291 {
5292         int r;
5293         sigset_t sigsaved;
5294
5295         if (vcpu->sigset_active)
5296                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5297
5298         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5299                 kvm_vcpu_block(vcpu);
5300                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5301                 r = -EAGAIN;
5302                 goto out;
5303         }
5304
5305         /* re-sync apic's tpr */
5306         if (!irqchip_in_kernel(vcpu->kvm))
5307                 kvm_set_cr8(vcpu, kvm_run->cr8);
5308
5309         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5310                 if (vcpu->mmio_needed) {
5311                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5312                         vcpu->mmio_read_completed = 1;
5313                         vcpu->mmio_needed = 0;
5314                 }
5315                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5316                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5317                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5318                 if (r != EMULATE_DONE) {
5319                         r = 0;
5320                         goto out;
5321                 }
5322         }
5323         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5324                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5325                                      kvm_run->hypercall.ret);
5326
5327         r = __vcpu_run(vcpu);
5328
5329 out:
5330         post_kvm_run_save(vcpu);
5331         if (vcpu->sigset_active)
5332                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5333
5334         return r;
5335 }
5336
5337 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5338 {
5339         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5340         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5341         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5342         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5343         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5344         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5345         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5346         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5347 #ifdef CONFIG_X86_64
5348         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5349         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5350         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5351         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5352         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5353         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5354         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5355         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5356 #endif
5357
5358         regs->rip = kvm_rip_read(vcpu);
5359         regs->rflags = kvm_get_rflags(vcpu);
5360
5361         return 0;
5362 }
5363
5364 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5365 {
5366         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5367         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5368         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5369         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5370         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5371         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5372         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5373         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5374 #ifdef CONFIG_X86_64
5375         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5376         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5377         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5378         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5379         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5380         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5381         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5382         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5383 #endif
5384
5385         kvm_rip_write(vcpu, regs->rip);
5386         kvm_set_rflags(vcpu, regs->rflags);
5387
5388         vcpu->arch.exception.pending = false;
5389
5390         kvm_make_request(KVM_REQ_EVENT, vcpu);
5391
5392         return 0;
5393 }
5394
5395 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5396 {
5397         struct kvm_segment cs;
5398
5399         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5400         *db = cs.db;
5401         *l = cs.l;
5402 }
5403 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5404
5405 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5406                                   struct kvm_sregs *sregs)
5407 {
5408         struct desc_ptr dt;
5409
5410         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5411         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5412         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5413         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5414         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5415         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5416
5417         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5418         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5419
5420         kvm_x86_ops->get_idt(vcpu, &dt);
5421         sregs->idt.limit = dt.size;
5422         sregs->idt.base = dt.address;
5423         kvm_x86_ops->get_gdt(vcpu, &dt);
5424         sregs->gdt.limit = dt.size;
5425         sregs->gdt.base = dt.address;
5426
5427         sregs->cr0 = kvm_read_cr0(vcpu);
5428         sregs->cr2 = vcpu->arch.cr2;
5429         sregs->cr3 = vcpu->arch.cr3;
5430         sregs->cr4 = kvm_read_cr4(vcpu);
5431         sregs->cr8 = kvm_get_cr8(vcpu);
5432         sregs->efer = vcpu->arch.efer;
5433         sregs->apic_base = kvm_get_apic_base(vcpu);
5434
5435         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5436
5437         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5438                 set_bit(vcpu->arch.interrupt.nr,
5439                         (unsigned long *)sregs->interrupt_bitmap);
5440
5441         return 0;
5442 }
5443
5444 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5445                                     struct kvm_mp_state *mp_state)
5446 {
5447         mp_state->mp_state = vcpu->arch.mp_state;
5448         return 0;
5449 }
5450
5451 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5452                                     struct kvm_mp_state *mp_state)
5453 {
5454         vcpu->arch.mp_state = mp_state->mp_state;
5455         kvm_make_request(KVM_REQ_EVENT, vcpu);
5456         return 0;
5457 }
5458
5459 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5460                     bool has_error_code, u32 error_code)
5461 {
5462         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5463         int ret;
5464
5465         init_emulate_ctxt(vcpu);
5466
5467         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5468                                    tss_selector, reason, has_error_code,
5469                                    error_code);
5470
5471         if (ret)
5472                 return EMULATE_FAIL;
5473
5474         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5475         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5476         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5477         kvm_make_request(KVM_REQ_EVENT, vcpu);
5478         return EMULATE_DONE;
5479 }
5480 EXPORT_SYMBOL_GPL(kvm_task_switch);
5481
5482 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5483                                   struct kvm_sregs *sregs)
5484 {
5485         int mmu_reset_needed = 0;
5486         int pending_vec, max_bits;
5487         struct desc_ptr dt;
5488
5489         dt.size = sregs->idt.limit;
5490         dt.address = sregs->idt.base;
5491         kvm_x86_ops->set_idt(vcpu, &dt);
5492         dt.size = sregs->gdt.limit;
5493         dt.address = sregs->gdt.base;
5494         kvm_x86_ops->set_gdt(vcpu, &dt);
5495
5496         vcpu->arch.cr2 = sregs->cr2;
5497         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5498         vcpu->arch.cr3 = sregs->cr3;
5499
5500         kvm_set_cr8(vcpu, sregs->cr8);
5501
5502         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5503         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5504         kvm_set_apic_base(vcpu, sregs->apic_base);
5505
5506         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5507         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5508         vcpu->arch.cr0 = sregs->cr0;
5509
5510         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5511         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5512         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5513                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5514                 mmu_reset_needed = 1;
5515         }
5516
5517         if (mmu_reset_needed)
5518                 kvm_mmu_reset_context(vcpu);
5519
5520         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5521         pending_vec = find_first_bit(
5522                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5523         if (pending_vec < max_bits) {
5524                 kvm_queue_interrupt(vcpu, pending_vec, false);
5525                 pr_debug("Set back pending irq %d\n", pending_vec);
5526                 if (irqchip_in_kernel(vcpu->kvm))
5527                         kvm_pic_clear_isr_ack(vcpu->kvm);
5528         }
5529
5530         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5531         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5532         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5533         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5534         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5535         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5536
5537         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5538         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5539
5540         update_cr8_intercept(vcpu);
5541
5542         /* Older userspace won't unhalt the vcpu on reset. */
5543         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5544             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5545             !is_protmode(vcpu))
5546                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5547
5548         kvm_make_request(KVM_REQ_EVENT, vcpu);
5549
5550         return 0;
5551 }
5552
5553 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5554                                         struct kvm_guest_debug *dbg)
5555 {
5556         unsigned long rflags;
5557         int i, r;
5558
5559         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5560                 r = -EBUSY;
5561                 if (vcpu->arch.exception.pending)
5562                         goto out;
5563                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5564                         kvm_queue_exception(vcpu, DB_VECTOR);
5565                 else
5566                         kvm_queue_exception(vcpu, BP_VECTOR);
5567         }
5568
5569         /*
5570          * Read rflags as long as potentially injected trace flags are still
5571          * filtered out.
5572          */
5573         rflags = kvm_get_rflags(vcpu);
5574
5575         vcpu->guest_debug = dbg->control;
5576         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5577                 vcpu->guest_debug = 0;
5578
5579         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5580                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5581                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5582                 vcpu->arch.switch_db_regs =
5583                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5584         } else {
5585                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5586                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5587                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5588         }
5589
5590         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5591                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5592                         get_segment_base(vcpu, VCPU_SREG_CS);
5593
5594         /*
5595          * Trigger an rflags update that will inject or remove the trace
5596          * flags.
5597          */
5598         kvm_set_rflags(vcpu, rflags);
5599
5600         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5601
5602         r = 0;
5603
5604 out:
5605
5606         return r;
5607 }
5608
5609 /*
5610  * Translate a guest virtual address to a guest physical address.
5611  */
5612 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5613                                     struct kvm_translation *tr)
5614 {
5615         unsigned long vaddr = tr->linear_address;
5616         gpa_t gpa;
5617         int idx;
5618
5619         idx = srcu_read_lock(&vcpu->kvm->srcu);
5620         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5621         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5622         tr->physical_address = gpa;
5623         tr->valid = gpa != UNMAPPED_GVA;
5624         tr->writeable = 1;
5625         tr->usermode = 0;
5626
5627         return 0;
5628 }
5629
5630 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5631 {
5632         struct i387_fxsave_struct *fxsave =
5633                         &vcpu->arch.guest_fpu.state->fxsave;
5634
5635         memcpy(fpu->fpr, fxsave->st_space, 128);
5636         fpu->fcw = fxsave->cwd;
5637         fpu->fsw = fxsave->swd;
5638         fpu->ftwx = fxsave->twd;
5639         fpu->last_opcode = fxsave->fop;
5640         fpu->last_ip = fxsave->rip;
5641         fpu->last_dp = fxsave->rdp;
5642         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5643
5644         return 0;
5645 }
5646
5647 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5648 {
5649         struct i387_fxsave_struct *fxsave =
5650                         &vcpu->arch.guest_fpu.state->fxsave;
5651
5652         memcpy(fxsave->st_space, fpu->fpr, 128);
5653         fxsave->cwd = fpu->fcw;
5654         fxsave->swd = fpu->fsw;
5655         fxsave->twd = fpu->ftwx;
5656         fxsave->fop = fpu->last_opcode;
5657         fxsave->rip = fpu->last_ip;
5658         fxsave->rdp = fpu->last_dp;
5659         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5660
5661         return 0;
5662 }
5663
5664 int fx_init(struct kvm_vcpu *vcpu)
5665 {
5666         int err;
5667
5668         err = fpu_alloc(&vcpu->arch.guest_fpu);
5669         if (err)
5670                 return err;
5671
5672         fpu_finit(&vcpu->arch.guest_fpu);
5673
5674         /*
5675          * Ensure guest xcr0 is valid for loading
5676          */
5677         vcpu->arch.xcr0 = XSTATE_FP;
5678
5679         vcpu->arch.cr0 |= X86_CR0_ET;
5680
5681         return 0;
5682 }
5683 EXPORT_SYMBOL_GPL(fx_init);
5684
5685 static void fx_free(struct kvm_vcpu *vcpu)
5686 {
5687         fpu_free(&vcpu->arch.guest_fpu);
5688 }
5689
5690 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5691 {
5692         if (vcpu->guest_fpu_loaded)
5693                 return;
5694
5695         /*
5696          * Restore all possible states in the guest,
5697          * and assume host would use all available bits.
5698          * Guest xcr0 would be loaded later.
5699          */
5700         kvm_put_guest_xcr0(vcpu);
5701         vcpu->guest_fpu_loaded = 1;
5702         unlazy_fpu(current);
5703         fpu_restore_checking(&vcpu->arch.guest_fpu);
5704         trace_kvm_fpu(1);
5705 }
5706
5707 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5708 {
5709         kvm_put_guest_xcr0(vcpu);
5710
5711         if (!vcpu->guest_fpu_loaded)
5712                 return;
5713
5714         vcpu->guest_fpu_loaded = 0;
5715         fpu_save_init(&vcpu->arch.guest_fpu);
5716         ++vcpu->stat.fpu_reload;
5717         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5718         trace_kvm_fpu(0);
5719 }
5720
5721 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5722 {
5723         if (vcpu->arch.time_page) {
5724                 kvm_release_page_dirty(vcpu->arch.time_page);
5725                 vcpu->arch.time_page = NULL;
5726         }
5727
5728         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5729         fx_free(vcpu);
5730         kvm_x86_ops->vcpu_free(vcpu);
5731 }
5732
5733 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5734                                                 unsigned int id)
5735 {
5736         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5737                 printk_once(KERN_WARNING
5738                 "kvm: SMP vm created on host with unstable TSC; "
5739                 "guest TSC will not be reliable\n");
5740         return kvm_x86_ops->vcpu_create(kvm, id);
5741 }
5742
5743 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5744 {
5745         int r;
5746
5747         vcpu->arch.mtrr_state.have_fixed = 1;
5748         vcpu_load(vcpu);
5749         r = kvm_arch_vcpu_reset(vcpu);
5750         if (r == 0)
5751                 r = kvm_mmu_setup(vcpu);
5752         vcpu_put(vcpu);
5753         if (r < 0)
5754                 goto free_vcpu;
5755
5756         return 0;
5757 free_vcpu:
5758         kvm_x86_ops->vcpu_free(vcpu);
5759         return r;
5760 }
5761
5762 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5763 {
5764         vcpu_load(vcpu);
5765         kvm_mmu_unload(vcpu);
5766         vcpu_put(vcpu);
5767
5768         fx_free(vcpu);
5769         kvm_x86_ops->vcpu_free(vcpu);
5770 }
5771
5772 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5773 {
5774         vcpu->arch.nmi_pending = false;
5775         vcpu->arch.nmi_injected = false;
5776
5777         vcpu->arch.switch_db_regs = 0;
5778         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5779         vcpu->arch.dr6 = DR6_FIXED_1;
5780         vcpu->arch.dr7 = DR7_FIXED_1;
5781
5782         kvm_make_request(KVM_REQ_EVENT, vcpu);
5783
5784         return kvm_x86_ops->vcpu_reset(vcpu);
5785 }
5786
5787 int kvm_arch_hardware_enable(void *garbage)
5788 {
5789         struct kvm *kvm;
5790         struct kvm_vcpu *vcpu;
5791         int i;
5792
5793         kvm_shared_msr_cpu_online();
5794         list_for_each_entry(kvm, &vm_list, vm_list)
5795                 kvm_for_each_vcpu(i, vcpu, kvm)
5796                         if (vcpu->cpu == smp_processor_id())
5797                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5798         return kvm_x86_ops->hardware_enable(garbage);
5799 }
5800
5801 void kvm_arch_hardware_disable(void *garbage)
5802 {
5803         kvm_x86_ops->hardware_disable(garbage);
5804         drop_user_return_notifiers(garbage);
5805 }
5806
5807 int kvm_arch_hardware_setup(void)
5808 {
5809         return kvm_x86_ops->hardware_setup();
5810 }
5811
5812 void kvm_arch_hardware_unsetup(void)
5813 {
5814         kvm_x86_ops->hardware_unsetup();
5815 }
5816
5817 void kvm_arch_check_processor_compat(void *rtn)
5818 {
5819         kvm_x86_ops->check_processor_compatibility(rtn);
5820 }
5821
5822 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5823 {
5824         struct page *page;
5825         struct kvm *kvm;
5826         int r;
5827
5828         BUG_ON(vcpu->kvm == NULL);
5829         kvm = vcpu->kvm;
5830
5831         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5832         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5833         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5834         vcpu->arch.mmu.translate_gpa = translate_gpa;
5835         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5836         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5837                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5838         else
5839                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5840
5841         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5842         if (!page) {
5843                 r = -ENOMEM;
5844                 goto fail;
5845         }
5846         vcpu->arch.pio_data = page_address(page);
5847
5848         if (!kvm->arch.virtual_tsc_khz)
5849                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5850
5851         r = kvm_mmu_create(vcpu);
5852         if (r < 0)
5853                 goto fail_free_pio_data;
5854
5855         if (irqchip_in_kernel(kvm)) {
5856                 r = kvm_create_lapic(vcpu);
5857                 if (r < 0)
5858                         goto fail_mmu_destroy;
5859         }
5860
5861         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5862                                        GFP_KERNEL);
5863         if (!vcpu->arch.mce_banks) {
5864                 r = -ENOMEM;
5865                 goto fail_free_lapic;
5866         }
5867         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5868
5869         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5870                 goto fail_free_mce_banks;
5871
5872         return 0;
5873 fail_free_mce_banks:
5874         kfree(vcpu->arch.mce_banks);
5875 fail_free_lapic:
5876         kvm_free_lapic(vcpu);
5877 fail_mmu_destroy:
5878         kvm_mmu_destroy(vcpu);
5879 fail_free_pio_data:
5880         free_page((unsigned long)vcpu->arch.pio_data);
5881 fail:
5882         return r;
5883 }
5884
5885 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5886 {
5887         int idx;
5888
5889         kfree(vcpu->arch.mce_banks);
5890         kvm_free_lapic(vcpu);
5891         idx = srcu_read_lock(&vcpu->kvm->srcu);
5892         kvm_mmu_destroy(vcpu);
5893         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5894         free_page((unsigned long)vcpu->arch.pio_data);
5895 }
5896
5897 struct  kvm *kvm_arch_create_vm(void)
5898 {
5899         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5900
5901         if (!kvm)
5902                 return ERR_PTR(-ENOMEM);
5903
5904         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5905         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5906
5907         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5908         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5909
5910         spin_lock_init(&kvm->arch.tsc_write_lock);
5911
5912         return kvm;
5913 }
5914
5915 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5916 {
5917         vcpu_load(vcpu);
5918         kvm_mmu_unload(vcpu);
5919         vcpu_put(vcpu);
5920 }
5921
5922 static void kvm_free_vcpus(struct kvm *kvm)
5923 {
5924         unsigned int i;
5925         struct kvm_vcpu *vcpu;
5926
5927         /*
5928          * Unpin any mmu pages first.
5929          */
5930         kvm_for_each_vcpu(i, vcpu, kvm)
5931                 kvm_unload_vcpu_mmu(vcpu);
5932         kvm_for_each_vcpu(i, vcpu, kvm)
5933                 kvm_arch_vcpu_free(vcpu);
5934
5935         mutex_lock(&kvm->lock);
5936         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5937                 kvm->vcpus[i] = NULL;
5938
5939         atomic_set(&kvm->online_vcpus, 0);
5940         mutex_unlock(&kvm->lock);
5941 }
5942
5943 void kvm_arch_sync_events(struct kvm *kvm)
5944 {
5945         kvm_free_all_assigned_devices(kvm);
5946         kvm_free_pit(kvm);
5947 }
5948
5949 void kvm_arch_destroy_vm(struct kvm *kvm)
5950 {
5951         kvm_iommu_unmap_guest(kvm);
5952         kfree(kvm->arch.vpic);
5953         kfree(kvm->arch.vioapic);
5954         kvm_free_vcpus(kvm);
5955         kvm_free_physmem(kvm);
5956         if (kvm->arch.apic_access_page)
5957                 put_page(kvm->arch.apic_access_page);
5958         if (kvm->arch.ept_identity_pagetable)
5959                 put_page(kvm->arch.ept_identity_pagetable);
5960         cleanup_srcu_struct(&kvm->srcu);
5961         kfree(kvm);
5962 }
5963
5964 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5965                                 struct kvm_memory_slot *memslot,
5966                                 struct kvm_memory_slot old,
5967                                 struct kvm_userspace_memory_region *mem,
5968                                 int user_alloc)
5969 {
5970         int npages = memslot->npages;
5971         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5972
5973         /* Prevent internal slot pages from being moved by fork()/COW. */
5974         if (memslot->id >= KVM_MEMORY_SLOTS)
5975                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5976
5977         /*To keep backward compatibility with older userspace,
5978          *x86 needs to hanlde !user_alloc case.
5979          */
5980         if (!user_alloc) {
5981                 if (npages && !old.rmap) {
5982                         unsigned long userspace_addr;
5983
5984                         down_write(&current->mm->mmap_sem);
5985                         userspace_addr = do_mmap(NULL, 0,
5986                                                  npages * PAGE_SIZE,
5987                                                  PROT_READ | PROT_WRITE,
5988                                                  map_flags,
5989                                                  0);
5990                         up_write(&current->mm->mmap_sem);
5991
5992                         if (IS_ERR((void *)userspace_addr))
5993                                 return PTR_ERR((void *)userspace_addr);
5994
5995                         memslot->userspace_addr = userspace_addr;
5996                 }
5997         }
5998
5999
6000         return 0;
6001 }
6002
6003 void kvm_arch_commit_memory_region(struct kvm *kvm,
6004                                 struct kvm_userspace_memory_region *mem,
6005                                 struct kvm_memory_slot old,
6006                                 int user_alloc)
6007 {
6008
6009         int npages = mem->memory_size >> PAGE_SHIFT;
6010
6011         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6012                 int ret;
6013
6014                 down_write(&current->mm->mmap_sem);
6015                 ret = do_munmap(current->mm, old.userspace_addr,
6016                                 old.npages * PAGE_SIZE);
6017                 up_write(&current->mm->mmap_sem);
6018                 if (ret < 0)
6019                         printk(KERN_WARNING
6020                                "kvm_vm_ioctl_set_memory_region: "
6021                                "failed to munmap memory\n");
6022         }
6023
6024         spin_lock(&kvm->mmu_lock);
6025         if (!kvm->arch.n_requested_mmu_pages) {
6026                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6027                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6028         }
6029
6030         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6031         spin_unlock(&kvm->mmu_lock);
6032 }
6033
6034 void kvm_arch_flush_shadow(struct kvm *kvm)
6035 {
6036         kvm_mmu_zap_all(kvm);
6037         kvm_reload_remote_mmus(kvm);
6038 }
6039
6040 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6041 {
6042         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
6043                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6044                 || vcpu->arch.nmi_pending ||
6045                 (kvm_arch_interrupt_allowed(vcpu) &&
6046                  kvm_cpu_has_interrupt(vcpu));
6047 }
6048
6049 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6050 {
6051         int me;
6052         int cpu = vcpu->cpu;
6053
6054         if (waitqueue_active(&vcpu->wq)) {
6055                 wake_up_interruptible(&vcpu->wq);
6056                 ++vcpu->stat.halt_wakeup;
6057         }
6058
6059         me = get_cpu();
6060         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6061                 if (atomic_xchg(&vcpu->guest_mode, 0))
6062                         smp_send_reschedule(cpu);
6063         put_cpu();
6064 }
6065
6066 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6067 {
6068         return kvm_x86_ops->interrupt_allowed(vcpu);
6069 }
6070
6071 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6072 {
6073         unsigned long current_rip = kvm_rip_read(vcpu) +
6074                 get_segment_base(vcpu, VCPU_SREG_CS);
6075
6076         return current_rip == linear_rip;
6077 }
6078 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6079
6080 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6081 {
6082         unsigned long rflags;
6083
6084         rflags = kvm_x86_ops->get_rflags(vcpu);
6085         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6086                 rflags &= ~X86_EFLAGS_TF;
6087         return rflags;
6088 }
6089 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6090
6091 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6092 {
6093         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6094             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6095                 rflags |= X86_EFLAGS_TF;
6096         kvm_x86_ops->set_rflags(vcpu, rflags);
6097         kvm_make_request(KVM_REQ_EVENT, vcpu);
6098 }
6099 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6100
6101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6103 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6104 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6105 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6106 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6107 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6108 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6109 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6110 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6111 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6112 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);