arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 unsigned int min_timer_period_us = 500;
  96 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
  97
  98 bool kvm_has_tsc_control;
  99 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 100 u32  kvm_max_guest_tsc_khz;
 101 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175         unsigned long flags;
 176
 177         /*
 178          * Disabling irqs at this point since the following code could be
 179          * interrupted and executed through kvm_arch_hardware_disable()
 180          */
 181         local_irq_save(flags);
 182         if (locals->registered) {
 183                 locals->registered = false;
 184                 user_return_notifier_unregister(urn);
 185         }
 186         local_irq_restore(flags);
 187         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 188                 values = &locals->values[slot];
 189                 if (values->host != values->curr) {
 190                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 191                         values->curr = values->host;
 192                 }
 193         }
 194 }
 195
 196 static void shared_msr_update(unsigned slot, u32 msr)
 197 {
 198         struct kvm_shared_msrs *smsr;
 199         u64 value;
 200
 201         smsr = &__get_cpu_var(shared_msrs);
 202         /* only read, and nobody should modify it at this time,
 203          * so don't need lock */
 204         if (slot >= shared_msrs_global.nr) {
 205                 printk(KERN_ERR "kvm: invalid MSR slot!");
 206                 return;
 207         }
 208         rdmsrl_safe(msr, &value);
 209         smsr->values[slot].host = value;
 210         smsr->values[slot].curr = value;
 211 }
 212
 213 void kvm_define_shared_msr(unsigned slot, u32 msr)
 214 {
 215         if (slot >= shared_msrs_global.nr)
 216                 shared_msrs_global.nr = slot + 1;
 217         shared_msrs_global.msrs[slot] = msr;
 218         /* we need ensured the shared_msr_global have been updated */
 219         smp_wmb();
 220 }
 221 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 222
 223 static void kvm_shared_msr_cpu_online(void)
 224 {
 225         unsigned i;
 226
 227         for (i = 0; i < shared_msrs_global.nr; ++i)
 228                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 229 }
 230
 231 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 232 {
 233         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 234
 235         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 236                 return;
 237         smsr->values[slot].curr = value;
 238         wrmsrl(shared_msrs_global.msrs[slot], value);
 239         if (!smsr->registered) {
 240                 smsr->urn.on_user_return = kvm_on_user_return;
 241                 user_return_notifier_register(&smsr->urn);
 242                 smsr->registered = true;
 243         }
 244 }
 245 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 246
 247 static void drop_user_return_notifiers(void *ignore)
 248 {
 249         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 250
 251         if (smsr->registered)
 252                 kvm_on_user_return(&smsr->urn);
 253 }
 254
 255 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 256 {
 257         if (irqchip_in_kernel(vcpu->kvm))
 258                 return vcpu->arch.apic_base;
 259         else
 260                 return vcpu->arch.apic_base;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 263
 264 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 265 {
 266         /* TODO: reserve bits check */
 267         if (irqchip_in_kernel(vcpu->kvm))
 268                 kvm_lapic_set_base(vcpu, data);
 269         else
 270                 vcpu->arch.apic_base = data;
 271 }
 272 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 273
 274 #define EXCPT_BENIGN            0
 275 #define EXCPT_CONTRIBUTORY      1
 276 #define EXCPT_PF                2
 277
 278 static int exception_class(int vector)
 279 {
 280         switch (vector) {
 281         case PF_VECTOR:
 282                 return EXCPT_PF;
 283         case DE_VECTOR:
 284         case TS_VECTOR:
 285         case NP_VECTOR:
 286         case SS_VECTOR:
 287         case GP_VECTOR:
 288                 return EXCPT_CONTRIBUTORY;
 289         default:
 290                 break;
 291         }
 292         return EXCPT_BENIGN;
 293 }
 294
 295 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 296                 unsigned nr, bool has_error, u32 error_code,
 297                 bool reinject)
 298 {
 299         u32 prev_nr;
 300         int class1, class2;
 301
 302         kvm_make_request(KVM_REQ_EVENT, vcpu);
 303
 304         if (!vcpu->arch.exception.pending) {
 305         queue:
 306                 vcpu->arch.exception.pending = true;
 307                 vcpu->arch.exception.has_error_code = has_error;
 308                 vcpu->arch.exception.nr = nr;
 309                 vcpu->arch.exception.error_code = error_code;
 310                 vcpu->arch.exception.reinject = reinject;
 311                 return;
 312         }
 313
 314         /* to check exception */
 315         prev_nr = vcpu->arch.exception.nr;
 316         if (prev_nr == DF_VECTOR) {
 317                 /* triple fault -> shutdown */
 318                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 319                 return;
 320         }
 321         class1 = exception_class(prev_nr);
 322         class2 = exception_class(nr);
 323         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 324                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 325                 /* generate double fault per SDM Table 5-5 */
 326                 vcpu->arch.exception.pending = true;
 327                 vcpu->arch.exception.has_error_code = true;
 328                 vcpu->arch.exception.nr = DF_VECTOR;
 329                 vcpu->arch.exception.error_code = 0;
 330         } else
 331                 /* replace previous exception with a new one in a hope
 332                    that instruction re-execution will regenerate lost
 333                    exception */
 334                 goto queue;
 335 }
 336
 337 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 338 {
 339         kvm_multiple_exception(vcpu, nr, false, 0, false);
 340 }
 341 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 342
 343 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 344 {
 345         kvm_multiple_exception(vcpu, nr, false, 0, true);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 348
 349 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 350 {
 351         if (err)
 352                 kvm_inject_gp(vcpu, 0);
 353         else
 354                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 357
 358 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         ++vcpu->stat.pf_guest;
 361         vcpu->arch.cr2 = fault->address;
 362         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 365
 366 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 367 {
 368         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 369                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 370         else
 371                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 372 }
 373
 374 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 375 {
 376         atomic_inc(&vcpu->arch.nmi_queued);
 377         kvm_make_request(KVM_REQ_NMI, vcpu);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 380
 381 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 382 {
 383         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 386
 387 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 388 {
 389         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 392
 393 /*
 394  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 395  * a #GP and return false.
 396  */
 397 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 398 {
 399         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 400                 return true;
 401         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 402         return false;
 403 }
 404 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 405
 406 /*
 407  * This function will be used to read from the physical memory of the currently
 408  * running guest. The difference to kvm_read_guest_page is that this function
 409  * can read from guest physical or from the guest's guest physical memory.
 410  */
 411 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 412                             gfn_t ngfn, void *data, int offset, int len,
 413                             u32 access)
 414 {
 415         gfn_t real_gfn;
 416         gpa_t ngpa;
 417
 418         ngpa     = gfn_to_gpa(ngfn);
 419         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 420         if (real_gfn == UNMAPPED_GVA)
 421                 return -EFAULT;
 422
 423         real_gfn = gpa_to_gfn(real_gfn);
 424
 425         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 426 }
 427 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 428
 429 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 430                                void *data, int offset, int len, u32 access)
 431 {
 432         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 433                                        data, offset, len, access);
 434 }
 435
 436 /*
 437  * Load the pae pdptrs.  Return true is they are all valid.
 438  */
 439 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 440 {
 441         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 442         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 443         int i;
 444         int ret;
 445         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 446
 447         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 448                                       offset * sizeof(u64), sizeof(pdpte),
 449                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 450         if (ret < 0) {
 451                 ret = 0;
 452                 goto out;
 453         }
 454         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 455                 if (is_present_gpte(pdpte[i]) &&
 456                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 457                         ret = 0;
 458                         goto out;
 459                 }
 460         }
 461         ret = 1;
 462
 463         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 464         __set_bit(VCPU_EXREG_PDPTR,
 465                   (unsigned long *)&vcpu->arch.regs_avail);
 466         __set_bit(VCPU_EXREG_PDPTR,
 467                   (unsigned long *)&vcpu->arch.regs_dirty);
 468 out:
 469
 470         return ret;
 471 }
 472 EXPORT_SYMBOL_GPL(load_pdptrs);
 473
 474 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 475 {
 476         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 477         bool changed = true;
 478         int offset;
 479         gfn_t gfn;
 480         int r;
 481
 482         if (is_long_mode(vcpu) || !is_pae(vcpu))
 483                 return false;
 484
 485         if (!test_bit(VCPU_EXREG_PDPTR,
 486                       (unsigned long *)&vcpu->arch.regs_avail))
 487                 return true;
 488
 489         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 490         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 491         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 492                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 493         if (r < 0)
 494                 goto out;
 495         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 496 out:
 497
 498         return changed;
 499 }
 500
 501 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 502 {
 503         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 504         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 505                                     X86_CR0_CD | X86_CR0_NW;
 506
 507         cr0 |= X86_CR0_ET;
 508
 509 #ifdef CONFIG_X86_64
 510         if (cr0 & 0xffffffff00000000UL)
 511                 return 1;
 512 #endif
 513
 514         cr0 &= ~CR0_RESERVED_BITS;
 515
 516         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 517                 return 1;
 518
 519         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 520                 return 1;
 521
 522         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 523 #ifdef CONFIG_X86_64
 524                 if ((vcpu->arch.efer & EFER_LME)) {
 525                         int cs_db, cs_l;
 526
 527                         if (!is_pae(vcpu))
 528                                 return 1;
 529                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 530                         if (cs_l)
 531                                 return 1;
 532                 } else
 533 #endif
 534                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 535                                                  kvm_read_cr3(vcpu)))
 536                         return 1;
 537         }
 538
 539         kvm_x86_ops->set_cr0(vcpu, cr0);
 540
 541         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 542                 kvm_clear_async_pf_completion_queue(vcpu);
 543                 kvm_async_pf_hash_reset(vcpu);
 544         }
 545
 546         if ((cr0 ^ old_cr0) & update_bits)
 547                 kvm_mmu_reset_context(vcpu);
 548         return 0;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 551
 552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 553 {
 554         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_lmsw);
 557
 558 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 559 {
 560         u64 xcr0;
 561
 562         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 563         if (index != XCR_XFEATURE_ENABLED_MASK)
 564                 return 1;
 565         xcr0 = xcr;
 566         if (!(xcr0 & XSTATE_FP))
 567                 return 1;
 568         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 569                 return 1;
 570         if (xcr0 & ~host_xcr0)
 571                 return 1;
 572         vcpu->arch.xcr0 = xcr0;
 573         vcpu->guest_xcr0_loaded = 0;
 574         return 0;
 575 }
 576
 577 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 578 {
 579         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 580             __kvm_set_xcr(vcpu, index, xcr)) {
 581                 kvm_inject_gp(vcpu, 0);
 582                 return 1;
 583         }
 584         return 0;
 585 }
 586 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 587
 588 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 589 {
 590         struct kvm_cpuid_entry2 *best;
 591
 592         if (!static_cpu_has(X86_FEATURE_XSAVE))
 593                 return 0;
 594
 595         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 596         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 597 }
 598
 599 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 600 {
 601         struct kvm_cpuid_entry2 *best;
 602
 603         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 604         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 605 }
 606
 607 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 608 {
 609         struct kvm_cpuid_entry2 *best;
 610
 611         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 612         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 613 }
 614
 615 static void update_cpuid(struct kvm_vcpu *vcpu)
 616 {
 617         struct kvm_cpuid_entry2 *best;
 618         struct kvm_lapic *apic = vcpu->arch.apic;
 619
 620         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 621         if (!best)
 622                 return;
 623
 624         /* Update OSXSAVE bit */
 625         if (cpu_has_xsave && best->function == 0x1) {
 626                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 627                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 628                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 629         }
 630
 631         if (apic) {
 632                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 633                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 634                 else
 635                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 636         }
 637 }
 638
 639 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 640 {
 641         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 642         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 643                                    X86_CR4_PAE | X86_CR4_SMEP;
 644         if (cr4 & CR4_RESERVED_BITS)
 645                 return 1;
 646
 647         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 648                 return 1;
 649
 650         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 651                 return 1;
 652
 653         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 654                 return 1;
 655
 656         if (is_long_mode(vcpu)) {
 657                 if (!(cr4 & X86_CR4_PAE))
 658                         return 1;
 659         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 660                    && ((cr4 ^ old_cr4) & pdptr_bits)
 661                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 662                                    kvm_read_cr3(vcpu)))
 663                 return 1;
 664
 665         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 666                 return 1;
 667
 668         if ((cr4 ^ old_cr4) & pdptr_bits)
 669                 kvm_mmu_reset_context(vcpu);
 670
 671         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 672                 update_cpuid(vcpu);
 673
 674         return 0;
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 677
 678 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 679 {
 680         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 681                 kvm_mmu_sync_roots(vcpu);
 682                 kvm_mmu_flush_tlb(vcpu);
 683                 return 0;
 684         }
 685
 686         if (is_long_mode(vcpu)) {
 687                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 688                         return 1;
 689         } else {
 690                 if (is_pae(vcpu)) {
 691                         if (cr3 & CR3_PAE_RESERVED_BITS)
 692                                 return 1;
 693                         if (is_paging(vcpu) &&
 694                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 695                                 return 1;
 696                 }
 697                 /*
 698                  * We don't check reserved bits in nonpae mode, because
 699                  * this isn't enforced, and VMware depends on this.
 700                  */
 701         }
 702
 703         /*
 704          * Does the new cr3 value map to physical memory? (Note, we
 705          * catch an invalid cr3 even in real-mode, because it would
 706          * cause trouble later on when we turn on paging anyway.)
 707          *
 708          * A real CPU would silently accept an invalid cr3 and would
 709          * attempt to use it - with largely undefined (and often hard
 710          * to debug) behavior on the guest side.
 711          */
 712         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 713                 return 1;
 714         vcpu->arch.cr3 = cr3;
 715         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 716         vcpu->arch.mmu.new_cr3(vcpu);
 717         return 0;
 718 }
 719 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 720
 721 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 722 {
 723         if (cr8 & CR8_RESERVED_BITS)
 724                 return 1;
 725         if (irqchip_in_kernel(vcpu->kvm))
 726                 kvm_lapic_set_tpr(vcpu, cr8);
 727         else
 728                 vcpu->arch.cr8 = cr8;
 729         return 0;
 730 }
 731 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 732
 733 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 734 {
 735         if (irqchip_in_kernel(vcpu->kvm))
 736                 return kvm_lapic_get_cr8(vcpu);
 737         else
 738                 return vcpu->arch.cr8;
 739 }
 740 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 741
 742 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 743 {
 744         switch (dr) {
 745         case 0 ... 3:
 746                 vcpu->arch.db[dr] = val;
 747                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 748                         vcpu->arch.eff_db[dr] = val;
 749                 break;
 750         case 4:
 751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 752                         return 1; /* #UD */
 753                 /* fall through */
 754         case 6:
 755                 if (val & 0xffffffff00000000ULL)
 756                         return -1; /* #GP */
 757                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 758                 break;
 759         case 5:
 760                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 761                         return 1; /* #UD */
 762                 /* fall through */
 763         default: /* 7 */
 764                 if (val & 0xffffffff00000000ULL)
 765                         return -1; /* #GP */
 766                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 767                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 768                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 769                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 770                 }
 771                 break;
 772         }
 773
 774         return 0;
 775 }
 776
 777 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 778 {
 779         int res;
 780
 781         res = __kvm_set_dr(vcpu, dr, val);
 782         if (res > 0)
 783                 kvm_queue_exception(vcpu, UD_VECTOR);
 784         else if (res < 0)
 785                 kvm_inject_gp(vcpu, 0);
 786
 787         return res;
 788 }
 789 EXPORT_SYMBOL_GPL(kvm_set_dr);
 790
 791 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 792 {
 793         switch (dr) {
 794         case 0 ... 3:
 795                 *val = vcpu->arch.db[dr];
 796                 break;
 797         case 4:
 798                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 799                         return 1;
 800                 /* fall through */
 801         case 6:
 802                 *val = vcpu->arch.dr6;
 803                 break;
 804         case 5:
 805                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 806                         return 1;
 807                 /* fall through */
 808         default: /* 7 */
 809                 *val = vcpu->arch.dr7;
 810                 break;
 811         }
 812
 813         return 0;
 814 }
 815
 816 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 817 {
 818         if (_kvm_get_dr(vcpu, dr, val)) {
 819                 kvm_queue_exception(vcpu, UD_VECTOR);
 820                 return 1;
 821         }
 822         return 0;
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_get_dr);
 825
 826 /*
 827  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 828  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 829  *
 830  * This list is modified at module load time to reflect the
 831  * capabilities of the host cpu. This capabilities test skips MSRs that are
 832  * kvm-specific. Those are put in the beginning of the list.
 833  */
 834
 835 #define KVM_SAVE_MSRS_BEGIN     9
 836 static u32 msrs_to_save[] = {
 837         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 838         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 839         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 840         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 841         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 842         MSR_STAR,
 843 #ifdef CONFIG_X86_64
 844         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 845 #endif
 846         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 847 };
 848
 849 static unsigned num_msrs_to_save;
 850
 851 static u32 emulated_msrs[] = {
 852         MSR_IA32_TSCDEADLINE,
 853         MSR_IA32_MISC_ENABLE,
 854         MSR_IA32_MCG_STATUS,
 855         MSR_IA32_MCG_CTL,
 856 };
 857
 858 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 859 {
 860         u64 old_efer = vcpu->arch.efer;
 861
 862         if (efer & efer_reserved_bits)
 863                 return 1;
 864
 865         if (is_paging(vcpu)
 866             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 867                 return 1;
 868
 869         if (efer & EFER_FFXSR) {
 870                 struct kvm_cpuid_entry2 *feat;
 871
 872                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 873                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 874                         return 1;
 875         }
 876
 877         if (efer & EFER_SVME) {
 878                 struct kvm_cpuid_entry2 *feat;
 879
 880                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 881                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 882                         return 1;
 883         }
 884
 885         efer &= ~EFER_LMA;
 886         efer |= vcpu->arch.efer & EFER_LMA;
 887
 888         kvm_x86_ops->set_efer(vcpu, efer);
 889
 890         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 891
 892         /* Update reserved bits */
 893         if ((efer ^ old_efer) & EFER_NX)
 894                 kvm_mmu_reset_context(vcpu);
 895
 896         return 0;
 897 }
 898
 899 void kvm_enable_efer_bits(u64 mask)
 900 {
 901        efer_reserved_bits &= ~mask;
 902 }
 903 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 904
 905 /*
 906  * Writes msr value into into the appropriate "register".
 907  * Returns 0 on success, non-0 otherwise.
 908  * Assumes vcpu_load() was already called.
 909  */
 910 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 911 {
 912         switch (msr_index) {
 913         case MSR_FS_BASE:
 914         case MSR_GS_BASE:
 915         case MSR_KERNEL_GS_BASE:
 916         case MSR_CSTAR:
 917         case MSR_LSTAR:
 918                 if (is_noncanonical_address(data))
 919                         return 1;
 920                 break;
 921         case MSR_IA32_SYSENTER_EIP:
 922         case MSR_IA32_SYSENTER_ESP:
 923                 /*
 924                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
 925                  * non-canonical address is written on Intel but not on
 926                  * AMD (which ignores the top 32-bits, because it does
 927                  * not implement 64-bit SYSENTER).
 928                  *
 929                  * 64-bit code should hence be able to write a non-canonical
 930                  * value on AMD.  Making the address canonical ensures that
 931                  * vmentry does not fail on Intel after writing a non-canonical
 932                  * value, and that something deterministic happens if the guest
 933                  * invokes 64-bit SYSENTER.
 934                  */
 935                 data = get_canonical(data);
 936         }
 937         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 938 }
 939 EXPORT_SYMBOL_GPL(kvm_set_msr);
 940
 941 /*
 942  * Adapt set_msr() to msr_io()'s calling convention
 943  */
 944 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 945 {
 946         return kvm_set_msr(vcpu, index, *data);
 947 }
 948
 949 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 950 {
 951         int version;
 952         int r;
 953         struct pvclock_wall_clock wc;
 954         struct timespec boot;
 955
 956         if (!wall_clock)
 957                 return;
 958
 959         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 960         if (r)
 961                 return;
 962
 963         if (version & 1)
 964                 ++version;  /* first time write, random junk */
 965
 966         ++version;
 967
 968         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 969
 970         /*
 971          * The guest calculates current wall clock time by adding
 972          * system time (updated by kvm_guest_time_update below) to the
 973          * wall clock specified here.  guest system time equals host
 974          * system time for us, thus we must fill in host boot time here.
 975          */
 976         getboottime(&boot);
 977
 978         wc.sec = boot.tv_sec;
 979         wc.nsec = boot.tv_nsec;
 980         wc.version = version;
 981
 982         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 983
 984         version++;
 985         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 986 }
 987
 988 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 989 {
 990         uint32_t quotient, remainder;
 991
 992         /* Don't try to replace with do_div(), this one calculates
 993          * "(dividend << 32) / divisor" */
 994         __asm__ ( "divl %4"
 995                   : "=a" (quotient), "=d" (remainder)
 996                   : "0" (0), "1" (dividend), "r" (divisor) );
 997         return quotient;
 998 }
 999
1000 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1001                                s8 *pshift, u32 *pmultiplier)
1002 {
1003         uint64_t scaled64;
1004         int32_t  shift = 0;
1005         uint64_t tps64;
1006         uint32_t tps32;
1007
1008         tps64 = base_khz * 1000LL;
1009         scaled64 = scaled_khz * 1000LL;
1010         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1011                 tps64 >>= 1;
1012                 shift--;
1013         }
1014
1015         tps32 = (uint32_t)tps64;
1016         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1017                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1018                         scaled64 >>= 1;
1019                 else
1020                         tps32 <<= 1;
1021                 shift++;
1022         }
1023
1024         *pshift = shift;
1025         *pmultiplier = div_frac(scaled64, tps32);
1026
1027         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1028                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1029 }
1030
1031 static inline u64 get_kernel_ns(void)
1032 {
1033         struct timespec ts;
1034
1035         WARN_ON(preemptible());
1036         ktime_get_ts(&ts);
1037         monotonic_to_bootbased(&ts);
1038         return timespec_to_ns(&ts);
1039 }
1040
1041 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1042 unsigned long max_tsc_khz;
1043
1044 static inline int kvm_tsc_changes_freq(void)
1045 {
1046         int cpu = get_cpu();
1047         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1048                   cpufreq_quick_get(cpu) != 0;
1049         put_cpu();
1050         return ret;
1051 }
1052
1053 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1054 {
1055         if (vcpu->arch.virtual_tsc_khz)
1056                 return vcpu->arch.virtual_tsc_khz;
1057         else
1058                 return __this_cpu_read(cpu_tsc_khz);
1059 }
1060
1061 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1062 {
1063         u64 ret;
1064
1065         WARN_ON(preemptible());
1066         if (kvm_tsc_changes_freq())
1067                 printk_once(KERN_WARNING
1068                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1069         ret = nsec * vcpu_tsc_khz(vcpu);
1070         do_div(ret, USEC_PER_SEC);
1071         return ret;
1072 }
1073
1074 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1075 {
1076         /* Compute a scale to convert nanoseconds in TSC cycles */
1077         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1078                            &vcpu->arch.tsc_catchup_shift,
1079                            &vcpu->arch.tsc_catchup_mult);
1080 }
1081
1082 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1083 {
1084         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1085                                       vcpu->arch.tsc_catchup_mult,
1086                                       vcpu->arch.tsc_catchup_shift);
1087         tsc += vcpu->arch.last_tsc_write;
1088         return tsc;
1089 }
1090
1091 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1092 {
1093         struct kvm *kvm = vcpu->kvm;
1094         u64 offset, ns, elapsed;
1095         unsigned long flags;
1096         s64 sdiff;
1097
1098         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1099         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1100         ns = get_kernel_ns();
1101         elapsed = ns - kvm->arch.last_tsc_nsec;
1102         sdiff = data - kvm->arch.last_tsc_write;
1103         if (sdiff < 0)
1104                 sdiff = -sdiff;
1105
1106         /*
1107          * Special case: close write to TSC within 5 seconds of
1108          * another CPU is interpreted as an attempt to synchronize
1109          * The 5 seconds is to accommodate host load / swapping as
1110          * well as any reset of TSC during the boot process.
1111          *
1112          * In that case, for a reliable TSC, we can match TSC offsets,
1113          * or make a best guest using elapsed value.
1114          */
1115         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1116             elapsed < 5ULL * NSEC_PER_SEC) {
1117                 if (!check_tsc_unstable()) {
1118                         offset = kvm->arch.last_tsc_offset;
1119                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1120                 } else {
1121                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1122                         offset += delta;
1123                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1124                 }
1125                 ns = kvm->arch.last_tsc_nsec;
1126         }
1127         kvm->arch.last_tsc_nsec = ns;
1128         kvm->arch.last_tsc_write = data;
1129         kvm->arch.last_tsc_offset = offset;
1130         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1131         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1132
1133         /* Reset of TSC must disable overshoot protection below */
1134         vcpu->arch.hv_clock.tsc_timestamp = 0;
1135         vcpu->arch.last_tsc_write = data;
1136         vcpu->arch.last_tsc_nsec = ns;
1137 }
1138 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1139
1140 static int kvm_guest_time_update(struct kvm_vcpu *v)
1141 {
1142         unsigned long flags;
1143         struct kvm_vcpu_arch *vcpu = &v->arch;
1144         unsigned long this_tsc_khz;
1145         s64 kernel_ns, max_kernel_ns;
1146         u64 tsc_timestamp;
1147
1148         /* Keep irq disabled to prevent changes to the clock */
1149         local_irq_save(flags);
1150         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1151         kernel_ns = get_kernel_ns();
1152         this_tsc_khz = vcpu_tsc_khz(v);
1153         if (unlikely(this_tsc_khz == 0)) {
1154                 local_irq_restore(flags);
1155                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1156                 return 1;
1157         }
1158
1159         /*
1160          * We may have to catch up the TSC to match elapsed wall clock
1161          * time for two reasons, even if kvmclock is used.
1162          *   1) CPU could have been running below the maximum TSC rate
1163          *   2) Broken TSC compensation resets the base at each VCPU
1164          *      entry to avoid unknown leaps of TSC even when running
1165          *      again on the same CPU.  This may cause apparent elapsed
1166          *      time to disappear, and the guest to stand still or run
1167          *      very slowly.
1168          */
1169         if (vcpu->tsc_catchup) {
1170                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1171                 if (tsc > tsc_timestamp) {
1172                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1173                         tsc_timestamp = tsc;
1174                 }
1175         }
1176
1177         local_irq_restore(flags);
1178
1179         if (!vcpu->pv_time_enabled)
1180                 return 0;
1181
1182         /*
1183          * Time as measured by the TSC may go backwards when resetting the base
1184          * tsc_timestamp.  The reason for this is that the TSC resolution is
1185          * higher than the resolution of the other clock scales.  Thus, many
1186          * possible measurments of the TSC correspond to one measurement of any
1187          * other clock, and so a spread of values is possible.  This is not a
1188          * problem for the computation of the nanosecond clock; with TSC rates
1189          * around 1GHZ, there can only be a few cycles which correspond to one
1190          * nanosecond value, and any path through this code will inevitably
1191          * take longer than that.  However, with the kernel_ns value itself,
1192          * the precision may be much lower, down to HZ granularity.  If the
1193          * first sampling of TSC against kernel_ns ends in the low part of the
1194          * range, and the second in the high end of the range, we can get:
1195          *
1196          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1197          *
1198          * As the sampling errors potentially range in the thousands of cycles,
1199          * it is possible such a time value has already been observed by the
1200          * guest.  To protect against this, we must compute the system time as
1201          * observed by the guest and ensure the new system time is greater.
1202          */
1203         max_kernel_ns = 0;
1204         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1205                 max_kernel_ns = vcpu->last_guest_tsc -
1206                                 vcpu->hv_clock.tsc_timestamp;
1207                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1208                                     vcpu->hv_clock.tsc_to_system_mul,
1209                                     vcpu->hv_clock.tsc_shift);
1210                 max_kernel_ns += vcpu->last_kernel_ns;
1211         }
1212
1213         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1214                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1215                                    &vcpu->hv_clock.tsc_shift,
1216                                    &vcpu->hv_clock.tsc_to_system_mul);
1217                 vcpu->hw_tsc_khz = this_tsc_khz;
1218         }
1219
1220         if (max_kernel_ns > kernel_ns)
1221                 kernel_ns = max_kernel_ns;
1222
1223         /* With all the info we got, fill in the values */
1224         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1225         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1226         vcpu->last_kernel_ns = kernel_ns;
1227         vcpu->last_guest_tsc = tsc_timestamp;
1228         vcpu->hv_clock.flags = 0;
1229
1230         /*
1231          * The interface expects us to write an even number signaling that the
1232          * update is finished. Since the guest won't see the intermediate
1233          * state, we just increase by 2 at the end.
1234          */
1235         vcpu->hv_clock.version += 2;
1236
1237         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1238                                 &vcpu->hv_clock,
1239                                 sizeof(vcpu->hv_clock));
1240         return 0;
1241 }
1242
1243 static bool msr_mtrr_valid(unsigned msr)
1244 {
1245         switch (msr) {
1246         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1247         case MSR_MTRRfix64K_00000:
1248         case MSR_MTRRfix16K_80000:
1249         case MSR_MTRRfix16K_A0000:
1250         case MSR_MTRRfix4K_C0000:
1251         case MSR_MTRRfix4K_C8000:
1252         case MSR_MTRRfix4K_D0000:
1253         case MSR_MTRRfix4K_D8000:
1254         case MSR_MTRRfix4K_E0000:
1255         case MSR_MTRRfix4K_E8000:
1256         case MSR_MTRRfix4K_F0000:
1257         case MSR_MTRRfix4K_F8000:
1258         case MSR_MTRRdefType:
1259         case MSR_IA32_CR_PAT:
1260                 return true;
1261         case 0x2f8:
1262                 return true;
1263         }
1264         return false;
1265 }
1266
1267 static bool valid_pat_type(unsigned t)
1268 {
1269         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1270 }
1271
1272 static bool valid_mtrr_type(unsigned t)
1273 {
1274         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1275 }
1276
1277 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1278 {
1279         int i;
1280
1281         if (!msr_mtrr_valid(msr))
1282                 return false;
1283
1284         if (msr == MSR_IA32_CR_PAT) {
1285                 for (i = 0; i < 8; i++)
1286                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1287                                 return false;
1288                 return true;
1289         } else if (msr == MSR_MTRRdefType) {
1290                 if (data & ~0xcff)
1291                         return false;
1292                 return valid_mtrr_type(data & 0xff);
1293         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1294                 for (i = 0; i < 8 ; i++)
1295                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1296                                 return false;
1297                 return true;
1298         }
1299
1300         /* variable MTRRs */
1301         return valid_mtrr_type(data & 0xff);
1302 }
1303
1304 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1305 {
1306         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1307
1308         if (!mtrr_valid(vcpu, msr, data))
1309                 return 1;
1310
1311         if (msr == MSR_MTRRdefType) {
1312                 vcpu->arch.mtrr_state.def_type = data;
1313                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1314         } else if (msr == MSR_MTRRfix64K_00000)
1315                 p[0] = data;
1316         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1317                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1318         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1319                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1320         else if (msr == MSR_IA32_CR_PAT)
1321                 vcpu->arch.pat = data;
1322         else {  /* Variable MTRRs */
1323                 int idx, is_mtrr_mask;
1324                 u64 *pt;
1325
1326                 idx = (msr - 0x200) / 2;
1327                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1328                 if (!is_mtrr_mask)
1329                         pt =
1330                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1331                 else
1332                         pt =
1333                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1334                 *pt = data;
1335         }
1336
1337         kvm_mmu_reset_context(vcpu);
1338         return 0;
1339 }
1340
1341 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1342 {
1343         u64 mcg_cap = vcpu->arch.mcg_cap;
1344         unsigned bank_num = mcg_cap & 0xff;
1345
1346         switch (msr) {
1347         case MSR_IA32_MCG_STATUS:
1348                 vcpu->arch.mcg_status = data;
1349                 break;
1350         case MSR_IA32_MCG_CTL:
1351                 if (!(mcg_cap & MCG_CTL_P))
1352                         return 1;
1353                 if (data != 0 && data != ~(u64)0)
1354                         return -1;
1355                 vcpu->arch.mcg_ctl = data;
1356                 break;
1357         default:
1358                 if (msr >= MSR_IA32_MC0_CTL &&
1359                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1360                         u32 offset = msr - MSR_IA32_MC0_CTL;
1361                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1362                          * some Linux kernels though clear bit 10 in bank 4 to
1363                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1364                          * this to avoid an uncatched #GP in the guest
1365                          */
1366                         if ((offset & 0x3) == 0 &&
1367                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1368                                 return -1;
1369                         vcpu->arch.mce_banks[offset] = data;
1370                         break;
1371                 }
1372                 return 1;
1373         }
1374         return 0;
1375 }
1376
1377 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1378 {
1379         struct kvm *kvm = vcpu->kvm;
1380         int lm = is_long_mode(vcpu);
1381         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1382                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1383         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1384                 : kvm->arch.xen_hvm_config.blob_size_32;
1385         u32 page_num = data & ~PAGE_MASK;
1386         u64 page_addr = data & PAGE_MASK;
1387         u8 *page;
1388         int r;
1389
1390         r = -E2BIG;
1391         if (page_num >= blob_size)
1392                 goto out;
1393         r = -ENOMEM;
1394         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1395         if (!page)
1396                 goto out;
1397         r = -EFAULT;
1398         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1399                 goto out_free;
1400         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1401                 goto out_free;
1402         r = 0;
1403 out_free:
1404         kfree(page);
1405 out:
1406         return r;
1407 }
1408
1409 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1410 {
1411         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1412 }
1413
1414 static bool kvm_hv_msr_partition_wide(u32 msr)
1415 {
1416         bool r = false;
1417         switch (msr) {
1418         case HV_X64_MSR_GUEST_OS_ID:
1419         case HV_X64_MSR_HYPERCALL:
1420                 r = true;
1421                 break;
1422         }
1423
1424         return r;
1425 }
1426
1427 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1428 {
1429         struct kvm *kvm = vcpu->kvm;
1430
1431         switch (msr) {
1432         case HV_X64_MSR_GUEST_OS_ID:
1433                 kvm->arch.hv_guest_os_id = data;
1434                 /* setting guest os id to zero disables hypercall page */
1435                 if (!kvm->arch.hv_guest_os_id)
1436                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1437                 break;
1438         case HV_X64_MSR_HYPERCALL: {
1439                 u64 gfn;
1440                 unsigned long addr;
1441                 u8 instructions[4];
1442
1443                 /* if guest os id is not set hypercall should remain disabled */
1444                 if (!kvm->arch.hv_guest_os_id)
1445                         break;
1446                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1447                         kvm->arch.hv_hypercall = data;
1448                         break;
1449                 }
1450                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1451                 addr = gfn_to_hva(kvm, gfn);
1452                 if (kvm_is_error_hva(addr))
1453                         return 1;
1454                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1455                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1456                 if (__copy_to_user((void __user *)addr, instructions, 4))
1457                         return 1;
1458                 kvm->arch.hv_hypercall = data;
1459                 break;
1460         }
1461         default:
1462                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1463                           "data 0x%llx\n", msr, data);
1464                 return 1;
1465         }
1466         return 0;
1467 }
1468
1469 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1470 {
1471         switch (msr) {
1472         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1473                 unsigned long addr;
1474
1475                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1476                         vcpu->arch.hv_vapic = data;
1477                         break;
1478                 }
1479                 addr = gfn_to_hva(vcpu->kvm, data >>
1480                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1481                 if (kvm_is_error_hva(addr))
1482                         return 1;
1483                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1484                         return 1;
1485                 vcpu->arch.hv_vapic = data;
1486                 break;
1487         }
1488         case HV_X64_MSR_EOI:
1489                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1490         case HV_X64_MSR_ICR:
1491                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1492         case HV_X64_MSR_TPR:
1493                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1494         default:
1495                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1496                           "data 0x%llx\n", msr, data);
1497                 return 1;
1498         }
1499
1500         return 0;
1501 }
1502
1503 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1504 {
1505         gpa_t gpa = data & ~0x3f;
1506
1507         /* Bits 2:5 are resrved, Should be zero */
1508         if (data & 0x3c)
1509                 return 1;
1510
1511         vcpu->arch.apf.msr_val = data;
1512
1513         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1514                 kvm_clear_async_pf_completion_queue(vcpu);
1515                 kvm_async_pf_hash_reset(vcpu);
1516                 return 0;
1517         }
1518
1519         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1520                                         sizeof(u32)))
1521                 return 1;
1522
1523         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1524         kvm_async_pf_wakeup_all(vcpu);
1525         return 0;
1526 }
1527
1528 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1529 {
1530         vcpu->arch.pv_time_enabled = false;
1531 }
1532
1533 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1534 {
1535         u64 delta;
1536
1537         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1538                 return;
1539
1540         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1541         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1542         vcpu->arch.st.accum_steal = delta;
1543 }
1544
1545 static void record_steal_time(struct kvm_vcpu *vcpu)
1546 {
1547         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1548                 return;
1549
1550         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1551                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1552                 return;
1553
1554         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1555         vcpu->arch.st.steal.version += 2;
1556         vcpu->arch.st.accum_steal = 0;
1557
1558         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1559                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1560 }
1561
1562 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1563 {
1564         switch (msr) {
1565         case MSR_EFER:
1566                 return set_efer(vcpu, data);
1567         case MSR_K7_HWCR:
1568                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1569                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1570                 if (data != 0) {
1571                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1572                                 data);
1573                         return 1;
1574                 }
1575                 break;
1576         case MSR_FAM10H_MMIO_CONF_BASE:
1577                 if (data != 0) {
1578                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1579                                 "0x%llx\n", data);
1580                         return 1;
1581                 }
1582                 break;
1583         case MSR_AMD64_NB_CFG:
1584                 break;
1585         case MSR_IA32_DEBUGCTLMSR:
1586                 if (!data) {
1587                         /* We support the non-activated case already */
1588                         break;
1589                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1590                         /* Values other than LBR and BTF are vendor-specific,
1591                            thus reserved and should throw a #GP */
1592                         return 1;
1593                 }
1594                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1595                         __func__, data);
1596                 break;
1597         case MSR_IA32_UCODE_REV:
1598         case MSR_IA32_UCODE_WRITE:
1599         case MSR_VM_HSAVE_PA:
1600         case MSR_AMD64_PATCH_LOADER:
1601                 break;
1602         case 0x200 ... 0x2ff:
1603                 return set_msr_mtrr(vcpu, msr, data);
1604         case MSR_IA32_APICBASE:
1605                 kvm_set_apic_base(vcpu, data);
1606                 break;
1607         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1608                 return kvm_x2apic_msr_write(vcpu, msr, data);
1609         case MSR_IA32_TSCDEADLINE:
1610                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1611                 break;
1612         case MSR_IA32_MISC_ENABLE:
1613                 vcpu->arch.ia32_misc_enable_msr = data;
1614                 break;
1615         case MSR_KVM_WALL_CLOCK_NEW:
1616         case MSR_KVM_WALL_CLOCK:
1617                 vcpu->kvm->arch.wall_clock = data;
1618                 kvm_write_wall_clock(vcpu->kvm, data);
1619                 break;
1620         case MSR_KVM_SYSTEM_TIME_NEW:
1621         case MSR_KVM_SYSTEM_TIME: {
1622                 u64 gpa_offset;
1623                 kvmclock_reset(vcpu);
1624
1625                 vcpu->arch.time = data;
1626                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1627
1628                 /* we verify if the enable bit is set... */
1629                 if (!(data & 1))
1630                         break;
1631
1632                 gpa_offset = data & ~(PAGE_MASK | 1);
1633
1634                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1635                      &vcpu->arch.pv_time, data & ~1ULL,
1636                      sizeof(struct pvclock_vcpu_time_info)))
1637                         vcpu->arch.pv_time_enabled = false;
1638                 else
1639                         vcpu->arch.pv_time_enabled = true;
1640                 break;
1641         }
1642         case MSR_KVM_ASYNC_PF_EN:
1643                 if (kvm_pv_enable_async_pf(vcpu, data))
1644                         return 1;
1645                 break;
1646         case MSR_KVM_STEAL_TIME:
1647
1648                 if (unlikely(!sched_info_on()))
1649                         return 1;
1650
1651                 if (data & KVM_STEAL_RESERVED_MASK)
1652                         return 1;
1653
1654                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1655                                                 data & KVM_STEAL_VALID_BITS,
1656                                                 sizeof(struct kvm_steal_time)))
1657                         return 1;
1658
1659                 vcpu->arch.st.msr_val = data;
1660
1661                 if (!(data & KVM_MSR_ENABLED))
1662                         break;
1663
1664                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1665
1666                 preempt_disable();
1667                 accumulate_steal_time(vcpu);
1668                 preempt_enable();
1669
1670                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1671
1672                 break;
1673
1674         case MSR_IA32_MCG_CTL:
1675         case MSR_IA32_MCG_STATUS:
1676         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1677                 return set_msr_mce(vcpu, msr, data);
1678
1679         /* Performance counters are not protected by a CPUID bit,
1680          * so we should check all of them in the generic path for the sake of
1681          * cross vendor migration.
1682          * Writing a zero into the event select MSRs disables them,
1683          * which we perfectly emulate ;-). Any other value should be at least
1684          * reported, some guests depend on them.
1685          */
1686         case MSR_P6_EVNTSEL0:
1687         case MSR_P6_EVNTSEL1:
1688         case MSR_K7_EVNTSEL0:
1689         case MSR_K7_EVNTSEL1:
1690         case MSR_K7_EVNTSEL2:
1691         case MSR_K7_EVNTSEL3:
1692                 if (data != 0)
1693                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1694                                 "0x%x data 0x%llx\n", msr, data);
1695                 break;
1696         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1697          * so we ignore writes to make it happy.
1698          */
1699         case MSR_P6_PERFCTR0:
1700         case MSR_P6_PERFCTR1:
1701         case MSR_K7_PERFCTR0:
1702         case MSR_K7_PERFCTR1:
1703         case MSR_K7_PERFCTR2:
1704         case MSR_K7_PERFCTR3:
1705                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1706                         "0x%x data 0x%llx\n", msr, data);
1707                 break;
1708         case MSR_K7_CLK_CTL:
1709                 /*
1710                  * Ignore all writes to this no longer documented MSR.
1711                  * Writes are only relevant for old K7 processors,
1712                  * all pre-dating SVM, but a recommended workaround from
1713                  * AMD for these chips. It is possible to speicify the
1714                  * affected processor models on the command line, hence
1715                  * the need to ignore the workaround.
1716                  */
1717                 break;
1718         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1719                 if (kvm_hv_msr_partition_wide(msr)) {
1720                         int r;
1721                         mutex_lock(&vcpu->kvm->lock);
1722                         r = set_msr_hyperv_pw(vcpu, msr, data);
1723                         mutex_unlock(&vcpu->kvm->lock);
1724                         return r;
1725                 } else
1726                         return set_msr_hyperv(vcpu, msr, data);
1727                 break;
1728         case MSR_IA32_BBL_CR_CTL3:
1729                 /* Drop writes to this legacy MSR -- see rdmsr
1730                  * counterpart for further detail.
1731                  */
1732                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1733                 break;
1734         default:
1735                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1736                         return xen_hvm_config(vcpu, data);
1737                 if (!ignore_msrs) {
1738                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1739                                 msr, data);
1740                         return 1;
1741                 } else {
1742                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1743                                 msr, data);
1744                         break;
1745                 }
1746         }
1747         return 0;
1748 }
1749 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1750
1751
1752 /*
1753  * Reads an msr value (of 'msr_index') into 'pdata'.
1754  * Returns 0 on success, non-0 otherwise.
1755  * Assumes vcpu_load() was already called.
1756  */
1757 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1758 {
1759         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1760 }
1761
1762 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1763 {
1764         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1765
1766         if (!msr_mtrr_valid(msr))
1767                 return 1;
1768
1769         if (msr == MSR_MTRRdefType)
1770                 *pdata = vcpu->arch.mtrr_state.def_type +
1771                          (vcpu->arch.mtrr_state.enabled << 10);
1772         else if (msr == MSR_MTRRfix64K_00000)
1773                 *pdata = p[0];
1774         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1775                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1776         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1777                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1778         else if (msr == MSR_IA32_CR_PAT)
1779                 *pdata = vcpu->arch.pat;
1780         else {  /* Variable MTRRs */
1781                 int idx, is_mtrr_mask;
1782                 u64 *pt;
1783
1784                 idx = (msr - 0x200) / 2;
1785                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1786                 if (!is_mtrr_mask)
1787                         pt =
1788                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1789                 else
1790                         pt =
1791                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1792                 *pdata = *pt;
1793         }
1794
1795         return 0;
1796 }
1797
1798 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1799 {
1800         u64 data;
1801         u64 mcg_cap = vcpu->arch.mcg_cap;
1802         unsigned bank_num = mcg_cap & 0xff;
1803
1804         switch (msr) {
1805         case MSR_IA32_P5_MC_ADDR:
1806         case MSR_IA32_P5_MC_TYPE:
1807                 data = 0;
1808                 break;
1809         case MSR_IA32_MCG_CAP:
1810                 data = vcpu->arch.mcg_cap;
1811                 break;
1812         case MSR_IA32_MCG_CTL:
1813                 if (!(mcg_cap & MCG_CTL_P))
1814                         return 1;
1815                 data = vcpu->arch.mcg_ctl;
1816                 break;
1817         case MSR_IA32_MCG_STATUS:
1818                 data = vcpu->arch.mcg_status;
1819                 break;
1820         default:
1821                 if (msr >= MSR_IA32_MC0_CTL &&
1822                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1823                         u32 offset = msr - MSR_IA32_MC0_CTL;
1824                         data = vcpu->arch.mce_banks[offset];
1825                         break;
1826                 }
1827                 return 1;
1828         }
1829         *pdata = data;
1830         return 0;
1831 }
1832
1833 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1834 {
1835         u64 data = 0;
1836         struct kvm *kvm = vcpu->kvm;
1837
1838         switch (msr) {
1839         case HV_X64_MSR_GUEST_OS_ID:
1840                 data = kvm->arch.hv_guest_os_id;
1841                 break;
1842         case HV_X64_MSR_HYPERCALL:
1843                 data = kvm->arch.hv_hypercall;
1844                 break;
1845         default:
1846                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1847                 return 1;
1848         }
1849
1850         *pdata = data;
1851         return 0;
1852 }
1853
1854 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1855 {
1856         u64 data = 0;
1857
1858         switch (msr) {
1859         case HV_X64_MSR_VP_INDEX: {
1860                 int r;
1861                 struct kvm_vcpu *v;
1862                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1863                         if (v == vcpu)
1864                                 data = r;
1865                 break;
1866         }
1867         case HV_X64_MSR_EOI:
1868                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1869         case HV_X64_MSR_ICR:
1870                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1871         case HV_X64_MSR_TPR:
1872                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1873         case HV_X64_MSR_APIC_ASSIST_PAGE:
1874                 data = vcpu->arch.hv_vapic;
1875                 break;
1876         default:
1877                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1878                 return 1;
1879         }
1880         *pdata = data;
1881         return 0;
1882 }
1883
1884 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1885 {
1886         u64 data;
1887
1888         switch (msr) {
1889         case MSR_IA32_PLATFORM_ID:
1890         case MSR_IA32_EBL_CR_POWERON:
1891         case MSR_IA32_DEBUGCTLMSR:
1892         case MSR_IA32_LASTBRANCHFROMIP:
1893         case MSR_IA32_LASTBRANCHTOIP:
1894         case MSR_IA32_LASTINTFROMIP:
1895         case MSR_IA32_LASTINTTOIP:
1896         case MSR_K8_SYSCFG:
1897         case MSR_K8_TSEG_ADDR:
1898         case MSR_K8_TSEG_MASK:
1899         case MSR_K7_HWCR:
1900         case MSR_VM_HSAVE_PA:
1901         case MSR_P6_PERFCTR0:
1902         case MSR_P6_PERFCTR1:
1903         case MSR_P6_EVNTSEL0:
1904         case MSR_P6_EVNTSEL1:
1905         case MSR_K7_EVNTSEL0:
1906         case MSR_K7_PERFCTR0:
1907         case MSR_K8_INT_PENDING_MSG:
1908         case MSR_AMD64_NB_CFG:
1909         case MSR_FAM10H_MMIO_CONF_BASE:
1910                 data = 0;
1911                 break;
1912         case MSR_IA32_UCODE_REV:
1913                 data = 0x100000000ULL;
1914                 break;
1915         case MSR_MTRRcap:
1916                 data = 0x500 | KVM_NR_VAR_MTRR;
1917                 break;
1918         case 0x200 ... 0x2ff:
1919                 return get_msr_mtrr(vcpu, msr, pdata);
1920         case 0xcd: /* fsb frequency */
1921                 data = 3;
1922                 break;
1923                 /*
1924                  * MSR_EBC_FREQUENCY_ID
1925                  * Conservative value valid for even the basic CPU models.
1926                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1927                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1928                  * and 266MHz for model 3, or 4. Set Core Clock
1929                  * Frequency to System Bus Frequency Ratio to 1 (bits
1930                  * 31:24) even though these are only valid for CPU
1931                  * models > 2, however guests may end up dividing or
1932                  * multiplying by zero otherwise.
1933                  */
1934         case MSR_EBC_FREQUENCY_ID:
1935                 data = 1 << 24;
1936                 break;
1937         case MSR_IA32_APICBASE:
1938                 data = kvm_get_apic_base(vcpu);
1939                 break;
1940         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1941                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1942                 break;
1943         case MSR_IA32_TSCDEADLINE:
1944                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1945                 break;
1946         case MSR_IA32_MISC_ENABLE:
1947                 data = vcpu->arch.ia32_misc_enable_msr;
1948                 break;
1949         case MSR_IA32_PERF_STATUS:
1950                 /* TSC increment by tick */
1951                 data = 1000ULL;
1952                 /* CPU multiplier */
1953                 data |= (((uint64_t)4ULL) << 40);
1954                 break;
1955         case MSR_EFER:
1956                 data = vcpu->arch.efer;
1957                 break;
1958         case MSR_KVM_WALL_CLOCK:
1959         case MSR_KVM_WALL_CLOCK_NEW:
1960                 data = vcpu->kvm->arch.wall_clock;
1961                 break;
1962         case MSR_KVM_SYSTEM_TIME:
1963         case MSR_KVM_SYSTEM_TIME_NEW:
1964                 data = vcpu->arch.time;
1965                 break;
1966         case MSR_KVM_ASYNC_PF_EN:
1967                 data = vcpu->arch.apf.msr_val;
1968                 break;
1969         case MSR_KVM_STEAL_TIME:
1970                 data = vcpu->arch.st.msr_val;
1971                 break;
1972         case MSR_IA32_P5_MC_ADDR:
1973         case MSR_IA32_P5_MC_TYPE:
1974         case MSR_IA32_MCG_CAP:
1975         case MSR_IA32_MCG_CTL:
1976         case MSR_IA32_MCG_STATUS:
1977         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1978                 return get_msr_mce(vcpu, msr, pdata);
1979         case MSR_K7_CLK_CTL:
1980                 /*
1981                  * Provide expected ramp-up count for K7. All other
1982                  * are set to zero, indicating minimum divisors for
1983                  * every field.
1984                  *
1985                  * This prevents guest kernels on AMD host with CPU
1986                  * type 6, model 8 and higher from exploding due to
1987                  * the rdmsr failing.
1988                  */
1989                 data = 0x20000000;
1990                 break;
1991         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1992                 if (kvm_hv_msr_partition_wide(msr)) {
1993                         int r;
1994                         mutex_lock(&vcpu->kvm->lock);
1995                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1996                         mutex_unlock(&vcpu->kvm->lock);
1997                         return r;
1998                 } else
1999                         return get_msr_hyperv(vcpu, msr, pdata);
2000                 break;
2001         case MSR_IA32_BBL_CR_CTL3:
2002                 /* This legacy MSR exists but isn't fully documented in current
2003                  * silicon.  It is however accessed by winxp in very narrow
2004                  * scenarios where it sets bit #19, itself documented as
2005                  * a "reserved" bit.  Best effort attempt to source coherent
2006                  * read data here should the balance of the register be
2007                  * interpreted by the guest:
2008                  *
2009                  * L2 cache control register 3: 64GB range, 256KB size,
2010                  * enabled, latency 0x1, configured
2011                  */
2012                 data = 0xbe702111;
2013                 break;
2014         default:
2015                 if (!ignore_msrs) {
2016                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2017                         return 1;
2018                 } else {
2019                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2020                         data = 0;
2021                 }
2022                 break;
2023         }
2024         *pdata = data;
2025         return 0;
2026 }
2027 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2028
2029 /*
2030  * Read or write a bunch of msrs. All parameters are kernel addresses.
2031  *
2032  * @return number of msrs set successfully.
2033  */
2034 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2035                     struct kvm_msr_entry *entries,
2036                     int (*do_msr)(struct kvm_vcpu *vcpu,
2037                                   unsigned index, u64 *data))
2038 {
2039         int i, idx;
2040
2041         idx = srcu_read_lock(&vcpu->kvm->srcu);
2042         for (i = 0; i < msrs->nmsrs; ++i)
2043                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2044                         break;
2045         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2046
2047         return i;
2048 }
2049
2050 /*
2051  * Read or write a bunch of msrs. Parameters are user addresses.
2052  *
2053  * @return number of msrs set successfully.
2054  */
2055 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2056                   int (*do_msr)(struct kvm_vcpu *vcpu,
2057                                 unsigned index, u64 *data),
2058                   int writeback)
2059 {
2060         struct kvm_msrs msrs;
2061         struct kvm_msr_entry *entries;
2062         int r, n;
2063         unsigned size;
2064
2065         r = -EFAULT;
2066         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2067                 goto out;
2068
2069         r = -E2BIG;
2070         if (msrs.nmsrs >= MAX_IO_MSRS)
2071                 goto out;
2072
2073         r = -ENOMEM;
2074         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2075         entries = kmalloc(size, GFP_KERNEL);
2076         if (!entries)
2077                 goto out;
2078
2079         r = -EFAULT;
2080         if (copy_from_user(entries, user_msrs->entries, size))
2081                 goto out_free;
2082
2083         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2084         if (r < 0)
2085                 goto out_free;
2086
2087         r = -EFAULT;
2088         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2089                 goto out_free;
2090
2091         r = n;
2092
2093 out_free:
2094         kfree(entries);
2095 out:
2096         return r;
2097 }
2098
2099 int kvm_dev_ioctl_check_extension(long ext)
2100 {
2101         int r;
2102
2103         switch (ext) {
2104         case KVM_CAP_IRQCHIP:
2105         case KVM_CAP_HLT:
2106         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2107         case KVM_CAP_SET_TSS_ADDR:
2108         case KVM_CAP_EXT_CPUID:
2109         case KVM_CAP_CLOCKSOURCE:
2110         case KVM_CAP_PIT:
2111         case KVM_CAP_NOP_IO_DELAY:
2112         case KVM_CAP_MP_STATE:
2113         case KVM_CAP_SYNC_MMU:
2114         case KVM_CAP_USER_NMI:
2115         case KVM_CAP_REINJECT_CONTROL:
2116         case KVM_CAP_IRQ_INJECT_STATUS:
2117         case KVM_CAP_ASSIGN_DEV_IRQ:
2118         case KVM_CAP_IRQFD:
2119         case KVM_CAP_IOEVENTFD:
2120         case KVM_CAP_PIT2:
2121         case KVM_CAP_PIT_STATE2:
2122         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2123         case KVM_CAP_XEN_HVM:
2124         case KVM_CAP_ADJUST_CLOCK:
2125         case KVM_CAP_VCPU_EVENTS:
2126         case KVM_CAP_HYPERV:
2127         case KVM_CAP_HYPERV_VAPIC:
2128         case KVM_CAP_HYPERV_SPIN:
2129         case KVM_CAP_PCI_SEGMENT:
2130         case KVM_CAP_DEBUGREGS:
2131         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2132         case KVM_CAP_XSAVE:
2133         case KVM_CAP_ASYNC_PF:
2134         case KVM_CAP_GET_TSC_KHZ:
2135                 r = 1;
2136                 break;
2137         case KVM_CAP_COALESCED_MMIO:
2138                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2139                 break;
2140         case KVM_CAP_VAPIC:
2141                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2142                 break;
2143         case KVM_CAP_NR_VCPUS:
2144                 r = KVM_SOFT_MAX_VCPUS;
2145                 break;
2146         case KVM_CAP_MAX_VCPUS:
2147                 r = KVM_MAX_VCPUS;
2148                 break;
2149         case KVM_CAP_NR_MEMSLOTS:
2150                 r = KVM_MEMORY_SLOTS;
2151                 break;
2152         case KVM_CAP_PV_MMU:    /* obsolete */
2153                 r = 0;
2154                 break;
2155         case KVM_CAP_IOMMU:
2156                 r = iommu_present(&pci_bus_type);
2157                 break;
2158         case KVM_CAP_MCE:
2159                 r = KVM_MAX_MCE_BANKS;
2160                 break;
2161         case KVM_CAP_XCRS:
2162                 r = cpu_has_xsave;
2163                 break;
2164         case KVM_CAP_TSC_CONTROL:
2165                 r = kvm_has_tsc_control;
2166                 break;
2167         case KVM_CAP_TSC_DEADLINE_TIMER:
2168                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2169                 break;
2170         default:
2171                 r = 0;
2172                 break;
2173         }
2174         return r;
2175
2176 }
2177
2178 long kvm_arch_dev_ioctl(struct file *filp,
2179                         unsigned int ioctl, unsigned long arg)
2180 {
2181         void __user *argp = (void __user *)arg;
2182         long r;
2183
2184         switch (ioctl) {
2185         case KVM_GET_MSR_INDEX_LIST: {
2186                 struct kvm_msr_list __user *user_msr_list = argp;
2187                 struct kvm_msr_list msr_list;
2188                 unsigned n;
2189
2190                 r = -EFAULT;
2191                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2192                         goto out;
2193                 n = msr_list.nmsrs;
2194                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2195                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2196                         goto out;
2197                 r = -E2BIG;
2198                 if (n < msr_list.nmsrs)
2199                         goto out;
2200                 r = -EFAULT;
2201                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2202                                  num_msrs_to_save * sizeof(u32)))
2203                         goto out;
2204                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2205                                  &emulated_msrs,
2206                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2207                         goto out;
2208                 r = 0;
2209                 break;
2210         }
2211         case KVM_GET_SUPPORTED_CPUID: {
2212                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2213                 struct kvm_cpuid2 cpuid;
2214
2215                 r = -EFAULT;
2216                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2217                         goto out;
2218                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2219                                                       cpuid_arg->entries);
2220                 if (r)
2221                         goto out;
2222
2223                 r = -EFAULT;
2224                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2225                         goto out;
2226                 r = 0;
2227                 break;
2228         }
2229         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2230                 u64 mce_cap;
2231
2232                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2233                 r = -EFAULT;
2234                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2235                         goto out;
2236                 r = 0;
2237                 break;
2238         }
2239         default:
2240                 r = -EINVAL;
2241         }
2242 out:
2243         return r;
2244 }
2245
2246 static void wbinvd_ipi(void *garbage)
2247 {
2248         wbinvd();
2249 }
2250
2251 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2252 {
2253         return vcpu->kvm->arch.iommu_domain &&
2254                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2255 }
2256
2257 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2258 {
2259         /* Address WBINVD may be executed by guest */
2260         if (need_emulate_wbinvd(vcpu)) {
2261                 if (kvm_x86_ops->has_wbinvd_exit())
2262                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2263                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2264                         smp_call_function_single(vcpu->cpu,
2265                                         wbinvd_ipi, NULL, 1);
2266         }
2267
2268         kvm_x86_ops->vcpu_load(vcpu, cpu);
2269         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2270                 /* Make sure TSC doesn't go backwards */
2271                 s64 tsc_delta;
2272                 u64 tsc;
2273
2274                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2275                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2276                              tsc - vcpu->arch.last_guest_tsc;
2277
2278                 if (tsc_delta < 0)
2279                         mark_tsc_unstable("KVM discovered backwards TSC");
2280                 if (check_tsc_unstable()) {
2281                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2282                         vcpu->arch.tsc_catchup = 1;
2283                 }
2284                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2285                 if (vcpu->cpu != cpu)
2286                         kvm_migrate_timers(vcpu);
2287                 vcpu->cpu = cpu;
2288         }
2289
2290         accumulate_steal_time(vcpu);
2291         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2292 }
2293
2294 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2295 {
2296         kvm_x86_ops->vcpu_put(vcpu);
2297         kvm_put_guest_fpu(vcpu);
2298         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2299 }
2300
2301 static int is_efer_nx(void)
2302 {
2303         unsigned long long efer = 0;
2304
2305         rdmsrl_safe(MSR_EFER, &efer);
2306         return efer & EFER_NX;
2307 }
2308
2309 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2310 {
2311         int i;
2312         struct kvm_cpuid_entry2 *e, *entry;
2313
2314         entry = NULL;
2315         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2316                 e = &vcpu->arch.cpuid_entries[i];
2317                 if (e->function == 0x80000001) {
2318                         entry = e;
2319                         break;
2320                 }
2321         }
2322         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2323                 entry->edx &= ~(1 << 20);
2324                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2325         }
2326 }
2327
2328 /* when an old userspace process fills a new kernel module */
2329 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2330                                     struct kvm_cpuid *cpuid,
2331                                     struct kvm_cpuid_entry __user *entries)
2332 {
2333         int r, i;
2334         struct kvm_cpuid_entry *cpuid_entries;
2335
2336         r = -E2BIG;
2337         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2338                 goto out;
2339         r = -ENOMEM;
2340         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2341         if (!cpuid_entries)
2342                 goto out;
2343         r = -EFAULT;
2344         if (copy_from_user(cpuid_entries, entries,
2345                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2346                 goto out_free;
2347         for (i = 0; i < cpuid->nent; i++) {
2348                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2349                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2350                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2351                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2352                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2353                 vcpu->arch.cpuid_entries[i].index = 0;
2354                 vcpu->arch.cpuid_entries[i].flags = 0;
2355                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2356                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2357                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2358         }
2359         vcpu->arch.cpuid_nent = cpuid->nent;
2360         cpuid_fix_nx_cap(vcpu);
2361         r = 0;
2362         kvm_apic_set_version(vcpu);
2363         kvm_x86_ops->cpuid_update(vcpu);
2364         update_cpuid(vcpu);
2365
2366 out_free:
2367         vfree(cpuid_entries);
2368 out:
2369         return r;
2370 }
2371
2372 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2373                                      struct kvm_cpuid2 *cpuid,
2374                                      struct kvm_cpuid_entry2 __user *entries)
2375 {
2376         int r;
2377
2378         r = -E2BIG;
2379         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2380                 goto out;
2381         r = -EFAULT;
2382         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2383                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2384                 goto out;
2385         vcpu->arch.cpuid_nent = cpuid->nent;
2386         kvm_apic_set_version(vcpu);
2387         kvm_x86_ops->cpuid_update(vcpu);
2388         update_cpuid(vcpu);
2389         return 0;
2390
2391 out:
2392         return r;
2393 }
2394
2395 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2396                                      struct kvm_cpuid2 *cpuid,
2397                                      struct kvm_cpuid_entry2 __user *entries)
2398 {
2399         int r;
2400
2401         r = -E2BIG;
2402         if (cpuid->nent < vcpu->arch.cpuid_nent)
2403                 goto out;
2404         r = -EFAULT;
2405         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2406                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2407                 goto out;
2408         return 0;
2409
2410 out:
2411         cpuid->nent = vcpu->arch.cpuid_nent;
2412         return r;
2413 }
2414
2415 static void cpuid_mask(u32 *word, int wordnum)
2416 {
2417         *word &= boot_cpu_data.x86_capability[wordnum];
2418 }
2419
2420 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2421                            u32 index)
2422 {
2423         entry->function = function;
2424         entry->index = index;
2425         cpuid_count(entry->function, entry->index,
2426                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2427         entry->flags = 0;
2428 }
2429
2430 static bool supported_xcr0_bit(unsigned bit)
2431 {
2432         u64 mask = ((u64)1 << bit);
2433
2434         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2435 }
2436
2437 #define F(x) bit(X86_FEATURE_##x)
2438
2439 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2440                          u32 index, int *nent, int maxnent)
2441 {
2442         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2443 #ifdef CONFIG_X86_64
2444         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2445                                 ? F(GBPAGES) : 0;
2446         unsigned f_lm = F(LM);
2447 #else
2448         unsigned f_gbpages = 0;
2449         unsigned f_lm = 0;
2450 #endif
2451         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2452
2453         /* cpuid 1.edx */
2454         const u32 kvm_supported_word0_x86_features =
2455                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2456                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2457                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2458                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2459                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2460                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2461                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2462                 0 /* HTT, TM, Reserved, PBE */;
2463         /* cpuid 0x80000001.edx */
2464         const u32 kvm_supported_word1_x86_features =
2465                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2466                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2467                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2468                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2469                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2470                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2471                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2472                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2473         /* cpuid 1.ecx */
2474         const u32 kvm_supported_word4_x86_features =
2475                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2476                 0 /* DS-CPL, VMX, SMX, EST */ |
2477                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2478                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2479                 0 /* Reserved, DCA */ | F(XMM4_1) |
2480                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2481                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2482                 F(F16C) | F(RDRAND);
2483         /* cpuid 0x80000001.ecx */
2484         const u32 kvm_supported_word6_x86_features =
2485                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2486                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2487                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2488                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2489
2490         /* cpuid 0xC0000001.edx */
2491         const u32 kvm_supported_word5_x86_features =
2492                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2493                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2494                 F(PMM) | F(PMM_EN);
2495
2496         /* cpuid 7.0.ebx */
2497         const u32 kvm_supported_word9_x86_features =
2498                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2499
2500         /* all calls to cpuid_count() should be made on the same cpu */
2501         get_cpu();
2502         do_cpuid_1_ent(entry, function, index);
2503         ++*nent;
2504
2505         switch (function) {
2506         case 0:
2507                 entry->eax = min(entry->eax, (u32)0xd);
2508                 break;
2509         case 1:
2510                 entry->edx &= kvm_supported_word0_x86_features;
2511                 cpuid_mask(&entry->edx, 0);
2512                 entry->ecx &= kvm_supported_word4_x86_features;
2513                 cpuid_mask(&entry->ecx, 4);
2514                 /* we support x2apic emulation even if host does not support
2515                  * it since we emulate x2apic in software */
2516                 entry->ecx |= F(X2APIC);
2517                 break;
2518         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2519          * may return different values. This forces us to get_cpu() before
2520          * issuing the first command, and also to emulate this annoying behavior
2521          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2522         case 2: {
2523                 int t, times = entry->eax & 0xff;
2524
2525                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2526                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2527                 for (t = 1; t < times && *nent < maxnent; ++t) {
2528                         do_cpuid_1_ent(&entry[t], function, 0);
2529                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2530                         ++*nent;
2531                 }
2532                 break;
2533         }
2534         /* function 4 has additional index. */
2535         case 4: {
2536                 int i, cache_type;
2537
2538                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2539                 /* read more entries until cache_type is zero */
2540                 for (i = 1; *nent < maxnent; ++i) {
2541                         cache_type = entry[i - 1].eax & 0x1f;
2542                         if (!cache_type)
2543                                 break;
2544                         do_cpuid_1_ent(&entry[i], function, i);
2545                         entry[i].flags |=
2546                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2547                         ++*nent;
2548                 }
2549                 break;
2550         }
2551         case 7: {
2552                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2553                 /* Mask ebx against host capbability word 9 */
2554                 if (index == 0) {
2555                         entry->ebx &= kvm_supported_word9_x86_features;
2556                         cpuid_mask(&entry->ebx, 9);
2557                 } else
2558                         entry->ebx = 0;
2559                 entry->eax = 0;
2560                 entry->ecx = 0;
2561                 entry->edx = 0;
2562                 break;
2563         }
2564         case 9:
2565                 break;
2566         /* function 0xb has additional index. */
2567         case 0xb: {
2568                 int i, level_type;
2569
2570                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2571                 /* read more entries until level_type is zero */
2572                 for (i = 1; *nent < maxnent; ++i) {
2573                         level_type = entry[i - 1].ecx & 0xff00;
2574                         if (!level_type)
2575                                 break;
2576                         do_cpuid_1_ent(&entry[i], function, i);
2577                         entry[i].flags |=
2578                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2579                         ++*nent;
2580                 }
2581                 break;
2582         }
2583         case 0xd: {
2584                 int idx, i;
2585
2586                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2587                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2588                         do_cpuid_1_ent(&entry[i], function, idx);
2589                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2590                                 continue;
2591                         entry[i].flags |=
2592                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2593                         ++*nent;
2594                         ++i;
2595                 }
2596                 break;
2597         }
2598         case KVM_CPUID_SIGNATURE: {
2599                 char signature[12] = "KVMKVMKVM\0\0";
2600                 u32 *sigptr = (u32 *)signature;
2601                 entry->eax = 0;
2602                 entry->ebx = sigptr[0];
2603                 entry->ecx = sigptr[1];
2604                 entry->edx = sigptr[2];
2605                 break;
2606         }
2607         case KVM_CPUID_FEATURES:
2608                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2609                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2610                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2611                              (1 << KVM_FEATURE_ASYNC_PF) |
2612                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2613
2614                 if (sched_info_on())
2615                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2616
2617                 entry->ebx = 0;
2618                 entry->ecx = 0;
2619                 entry->edx = 0;
2620                 break;
2621         case 0x80000000:
2622                 entry->eax = min(entry->eax, 0x8000001a);
2623                 break;
2624         case 0x80000001:
2625                 entry->edx &= kvm_supported_word1_x86_features;
2626                 cpuid_mask(&entry->edx, 1);
2627                 entry->ecx &= kvm_supported_word6_x86_features;
2628                 cpuid_mask(&entry->ecx, 6);
2629                 break;
2630         case 0x80000008: {
2631                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2632                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2633                 unsigned phys_as = entry->eax & 0xff;
2634
2635                 if (!g_phys_as)
2636                         g_phys_as = phys_as;
2637                 entry->eax = g_phys_as | (virt_as << 8);
2638                 entry->ebx = entry->edx = 0;
2639                 break;
2640         }
2641         case 0x80000019:
2642                 entry->ecx = entry->edx = 0;
2643                 break;
2644         case 0x8000001a:
2645                 break;
2646         case 0x8000001d:
2647                 break;
2648         /*Add support for Centaur's CPUID instruction*/
2649         case 0xC0000000:
2650                 /*Just support up to 0xC0000004 now*/
2651                 entry->eax = min(entry->eax, 0xC0000004);
2652                 break;
2653         case 0xC0000001:
2654                 entry->edx &= kvm_supported_word5_x86_features;
2655                 cpuid_mask(&entry->edx, 5);
2656                 break;
2657         case 3: /* Processor serial number */
2658         case 5: /* MONITOR/MWAIT */
2659         case 6: /* Thermal management */
2660         case 0xA: /* Architectural Performance Monitoring */
2661         case 0x80000007: /* Advanced power management */
2662         case 0xC0000002:
2663         case 0xC0000003:
2664         case 0xC0000004:
2665         default:
2666                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2667                 break;
2668         }
2669
2670         kvm_x86_ops->set_supported_cpuid(function, entry);
2671
2672         put_cpu();
2673 }
2674
2675 #undef F
2676
2677 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2678                                      struct kvm_cpuid_entry2 __user *entries)
2679 {
2680         struct kvm_cpuid_entry2 *cpuid_entries;
2681         int limit, nent = 0, r = -E2BIG;
2682         u32 func;
2683
2684         if (cpuid->nent < 1)
2685                 goto out;
2686         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2687                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2688         r = -ENOMEM;
2689         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2690         if (!cpuid_entries)
2691                 goto out;
2692
2693         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2694         limit = cpuid_entries[0].eax;
2695         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2696                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2697                              &nent, cpuid->nent);
2698         r = -E2BIG;
2699         if (nent >= cpuid->nent)
2700                 goto out_free;
2701
2702         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2703         limit = cpuid_entries[nent - 1].eax;
2704         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2705                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2706                              &nent, cpuid->nent);
2707
2708
2709
2710         r = -E2BIG;
2711         if (nent >= cpuid->nent)
2712                 goto out_free;
2713
2714         /* Add support for Centaur's CPUID instruction. */
2715         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2716                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2717                                 &nent, cpuid->nent);
2718
2719                 r = -E2BIG;
2720                 if (nent >= cpuid->nent)
2721                         goto out_free;
2722
2723                 limit = cpuid_entries[nent - 1].eax;
2724                 for (func = 0xC0000001;
2725                         func <= limit && nent < cpuid->nent; ++func)
2726                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2727                                         &nent, cpuid->nent);
2728
2729                 r = -E2BIG;
2730                 if (nent >= cpuid->nent)
2731                         goto out_free;
2732         }
2733
2734         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2735                      cpuid->nent);
2736
2737         r = -E2BIG;
2738         if (nent >= cpuid->nent)
2739                 goto out_free;
2740
2741         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2742                      cpuid->nent);
2743
2744         r = -E2BIG;
2745         if (nent >= cpuid->nent)
2746                 goto out_free;
2747
2748         r = -EFAULT;
2749         if (copy_to_user(entries, cpuid_entries,
2750                          nent * sizeof(struct kvm_cpuid_entry2)))
2751                 goto out_free;
2752         cpuid->nent = nent;
2753         r = 0;
2754
2755 out_free:
2756         vfree(cpuid_entries);
2757 out:
2758         return r;
2759 }
2760
2761 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2762                                     struct kvm_lapic_state *s)
2763 {
2764         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2765
2766         return 0;
2767 }
2768
2769 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2770                                     struct kvm_lapic_state *s)
2771 {
2772         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2773         kvm_apic_post_state_restore(vcpu);
2774         update_cr8_intercept(vcpu);
2775
2776         return 0;
2777 }
2778
2779 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2780                                     struct kvm_interrupt *irq)
2781 {
2782         if (irq->irq < 0 || irq->irq >= 256)
2783                 return -EINVAL;
2784         if (irqchip_in_kernel(vcpu->kvm))
2785                 return -ENXIO;
2786
2787         kvm_queue_interrupt(vcpu, irq->irq, false);
2788         kvm_make_request(KVM_REQ_EVENT, vcpu);
2789
2790         return 0;
2791 }
2792
2793 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2794 {
2795         kvm_inject_nmi(vcpu);
2796
2797         return 0;
2798 }
2799
2800 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2801                                            struct kvm_tpr_access_ctl *tac)
2802 {
2803         if (tac->flags)
2804                 return -EINVAL;
2805         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2806         return 0;
2807 }
2808
2809 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2810                                         u64 mcg_cap)
2811 {
2812         int r;
2813         unsigned bank_num = mcg_cap & 0xff, bank;
2814
2815         r = -EINVAL;
2816         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2817                 goto out;
2818         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2819                 goto out;
2820         r = 0;
2821         vcpu->arch.mcg_cap = mcg_cap;
2822         /* Init IA32_MCG_CTL to all 1s */
2823         if (mcg_cap & MCG_CTL_P)
2824                 vcpu->arch.mcg_ctl = ~(u64)0;
2825         /* Init IA32_MCi_CTL to all 1s */
2826         for (bank = 0; bank < bank_num; bank++)
2827                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2828 out:
2829         return r;
2830 }
2831
2832 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2833                                       struct kvm_x86_mce *mce)
2834 {
2835         u64 mcg_cap = vcpu->arch.mcg_cap;
2836         unsigned bank_num = mcg_cap & 0xff;
2837         u64 *banks = vcpu->arch.mce_banks;
2838
2839         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2840                 return -EINVAL;
2841         /*
2842          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2843          * reporting is disabled
2844          */
2845         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2846             vcpu->arch.mcg_ctl != ~(u64)0)
2847                 return 0;
2848         banks += 4 * mce->bank;
2849         /*
2850          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2851          * reporting is disabled for the bank
2852          */
2853         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2854                 return 0;
2855         if (mce->status & MCI_STATUS_UC) {
2856                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2857                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2858                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2859                         return 0;
2860                 }
2861                 if (banks[1] & MCI_STATUS_VAL)
2862                         mce->status |= MCI_STATUS_OVER;
2863                 banks[2] = mce->addr;
2864                 banks[3] = mce->misc;
2865                 vcpu->arch.mcg_status = mce->mcg_status;
2866                 banks[1] = mce->status;
2867                 kvm_queue_exception(vcpu, MC_VECTOR);
2868         } else if (!(banks[1] & MCI_STATUS_VAL)
2869                    || !(banks[1] & MCI_STATUS_UC)) {
2870                 if (banks[1] & MCI_STATUS_VAL)
2871                         mce->status |= MCI_STATUS_OVER;
2872                 banks[2] = mce->addr;
2873                 banks[3] = mce->misc;
2874                 banks[1] = mce->status;
2875         } else
2876                 banks[1] |= MCI_STATUS_OVER;
2877         return 0;
2878 }
2879
2880 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2881                                                struct kvm_vcpu_events *events)
2882 {
2883         process_nmi(vcpu);
2884         events->exception.injected =
2885                 vcpu->arch.exception.pending &&
2886                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2887         events->exception.nr = vcpu->arch.exception.nr;
2888         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2889         events->exception.pad = 0;
2890         events->exception.error_code = vcpu->arch.exception.error_code;
2891
2892         events->interrupt.injected =
2893                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2894         events->interrupt.nr = vcpu->arch.interrupt.nr;
2895         events->interrupt.soft = 0;
2896         events->interrupt.shadow =
2897                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2898                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2899
2900         events->nmi.injected = vcpu->arch.nmi_injected;
2901         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2902         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2903         events->nmi.pad = 0;
2904
2905         events->sipi_vector = vcpu->arch.sipi_vector;
2906
2907         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2908                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2909                          | KVM_VCPUEVENT_VALID_SHADOW);
2910         memset(&events->reserved, 0, sizeof(events->reserved));
2911 }
2912
2913 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2914                                               struct kvm_vcpu_events *events)
2915 {
2916         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2917                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2918                               | KVM_VCPUEVENT_VALID_SHADOW))
2919                 return -EINVAL;
2920
2921         process_nmi(vcpu);
2922         vcpu->arch.exception.pending = events->exception.injected;
2923         vcpu->arch.exception.nr = events->exception.nr;
2924         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2925         vcpu->arch.exception.error_code = events->exception.error_code;
2926
2927         vcpu->arch.interrupt.pending = events->interrupt.injected;
2928         vcpu->arch.interrupt.nr = events->interrupt.nr;
2929         vcpu->arch.interrupt.soft = events->interrupt.soft;
2930         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2931                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2932                                                   events->interrupt.shadow);
2933
2934         vcpu->arch.nmi_injected = events->nmi.injected;
2935         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2936                 vcpu->arch.nmi_pending = events->nmi.pending;
2937         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2938
2939         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2940                 vcpu->arch.sipi_vector = events->sipi_vector;
2941
2942         kvm_make_request(KVM_REQ_EVENT, vcpu);
2943
2944         return 0;
2945 }
2946
2947 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2948                                              struct kvm_debugregs *dbgregs)
2949 {
2950         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2951         dbgregs->dr6 = vcpu->arch.dr6;
2952         dbgregs->dr7 = vcpu->arch.dr7;
2953         dbgregs->flags = 0;
2954         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2955 }
2956
2957 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2958                                             struct kvm_debugregs *dbgregs)
2959 {
2960         if (dbgregs->flags)
2961                 return -EINVAL;
2962
2963         if (dbgregs->dr6 & ~0xffffffffull)
2964                 return -EINVAL;
2965         if (dbgregs->dr7 & ~0xffffffffull)
2966                 return -EINVAL;
2967
2968         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2969         vcpu->arch.dr6 = dbgregs->dr6;
2970         vcpu->arch.dr7 = dbgregs->dr7;
2971
2972         return 0;
2973 }
2974
2975 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2976                                          struct kvm_xsave *guest_xsave)
2977 {
2978         if (cpu_has_xsave)
2979                 memcpy(guest_xsave->region,
2980                         &vcpu->arch.guest_fpu.state->xsave,
2981                         xstate_size);
2982         else {
2983                 memcpy(guest_xsave->region,
2984                         &vcpu->arch.guest_fpu.state->fxsave,
2985                         sizeof(struct i387_fxsave_struct));
2986                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2987                         XSTATE_FPSSE;
2988         }
2989 }
2990
2991 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2992                                         struct kvm_xsave *guest_xsave)
2993 {
2994         u64 xstate_bv =
2995                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2996
2997         if (cpu_has_xsave)
2998                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2999                         guest_xsave->region, xstate_size);
3000         else {
3001                 if (xstate_bv & ~XSTATE_FPSSE)
3002                         return -EINVAL;
3003                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
3004                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
3005         }
3006         return 0;
3007 }
3008
3009 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3010                                         struct kvm_xcrs *guest_xcrs)
3011 {
3012         if (!cpu_has_xsave) {
3013                 guest_xcrs->nr_xcrs = 0;
3014                 return;
3015         }
3016
3017         guest_xcrs->nr_xcrs = 1;
3018         guest_xcrs->flags = 0;
3019         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3020         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3021 }
3022
3023 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3024                                        struct kvm_xcrs *guest_xcrs)
3025 {
3026         int i, r = 0;
3027
3028         if (!cpu_has_xsave)
3029                 return -EINVAL;
3030
3031         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3032                 return -EINVAL;
3033
3034         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3035                 /* Only support XCR0 currently */
3036                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3037                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3038                                 guest_xcrs->xcrs[0].value);
3039                         break;
3040                 }
3041         if (r)
3042                 r = -EINVAL;
3043         return r;
3044 }
3045
3046 long kvm_arch_vcpu_ioctl(struct file *filp,
3047                          unsigned int ioctl, unsigned long arg)
3048 {
3049         struct kvm_vcpu *vcpu = filp->private_data;
3050         void __user *argp = (void __user *)arg;
3051         int r;
3052         union {
3053                 struct kvm_lapic_state *lapic;
3054                 struct kvm_xsave *xsave;
3055                 struct kvm_xcrs *xcrs;
3056                 void *buffer;
3057         } u;
3058
3059         u.buffer = NULL;
3060         switch (ioctl) {
3061         case KVM_GET_LAPIC: {
3062                 r = -EINVAL;
3063                 if (!vcpu->arch.apic)
3064                         goto out;
3065                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3066
3067                 r = -ENOMEM;
3068                 if (!u.lapic)
3069                         goto out;
3070                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3071                 if (r)
3072                         goto out;
3073                 r = -EFAULT;
3074                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3075                         goto out;
3076                 r = 0;
3077                 break;
3078         }
3079         case KVM_SET_LAPIC: {
3080                 r = -EINVAL;
3081                 if (!vcpu->arch.apic)
3082                         goto out;
3083                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3084                 r = -ENOMEM;
3085                 if (!u.lapic)
3086                         goto out;
3087                 r = -EFAULT;
3088                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3089                         goto out;
3090                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3091                 if (r)
3092                         goto out;
3093                 r = 0;
3094                 break;
3095         }
3096         case KVM_INTERRUPT: {
3097                 struct kvm_interrupt irq;
3098
3099                 r = -EFAULT;
3100                 if (copy_from_user(&irq, argp, sizeof irq))
3101                         goto out;
3102                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3103                 if (r)
3104                         goto out;
3105                 r = 0;
3106                 break;
3107         }
3108         case KVM_NMI: {
3109                 r = kvm_vcpu_ioctl_nmi(vcpu);
3110                 if (r)
3111                         goto out;
3112                 r = 0;
3113                 break;
3114         }
3115         case KVM_SET_CPUID: {
3116                 struct kvm_cpuid __user *cpuid_arg = argp;
3117                 struct kvm_cpuid cpuid;
3118
3119                 r = -EFAULT;
3120                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3121                         goto out;
3122                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3123                 if (r)
3124                         goto out;
3125                 break;
3126         }
3127         case KVM_SET_CPUID2: {
3128                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3129                 struct kvm_cpuid2 cpuid;
3130
3131                 r = -EFAULT;
3132                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3133                         goto out;
3134                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3135                                               cpuid_arg->entries);
3136                 if (r)
3137                         goto out;
3138                 break;
3139         }
3140         case KVM_GET_CPUID2: {
3141                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3142                 struct kvm_cpuid2 cpuid;
3143
3144                 r = -EFAULT;
3145                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3146                         goto out;
3147                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3148                                               cpuid_arg->entries);
3149                 if (r)
3150                         goto out;
3151                 r = -EFAULT;
3152                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3153                         goto out;
3154                 r = 0;
3155                 break;
3156         }
3157         case KVM_GET_MSRS:
3158                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3159                 break;
3160         case KVM_SET_MSRS:
3161                 r = msr_io(vcpu, argp, do_set_msr, 0);
3162                 break;
3163         case KVM_TPR_ACCESS_REPORTING: {
3164                 struct kvm_tpr_access_ctl tac;
3165
3166                 r = -EFAULT;
3167                 if (copy_from_user(&tac, argp, sizeof tac))
3168                         goto out;
3169                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3170                 if (r)
3171                         goto out;
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, &tac, sizeof tac))
3174                         goto out;
3175                 r = 0;
3176                 break;
3177         };
3178         case KVM_SET_VAPIC_ADDR: {
3179                 struct kvm_vapic_addr va;
3180
3181                 r = -EINVAL;
3182                 if (!irqchip_in_kernel(vcpu->kvm))
3183                         goto out;
3184                 r = -EFAULT;
3185                 if (copy_from_user(&va, argp, sizeof va))
3186                         goto out;
3187                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3188                 break;
3189         }
3190         case KVM_X86_SETUP_MCE: {
3191                 u64 mcg_cap;
3192
3193                 r = -EFAULT;
3194                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3195                         goto out;
3196                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3197                 break;
3198         }
3199         case KVM_X86_SET_MCE: {
3200                 struct kvm_x86_mce mce;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&mce, argp, sizeof mce))
3204                         goto out;
3205                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3206                 break;
3207         }
3208         case KVM_GET_VCPU_EVENTS: {
3209                 struct kvm_vcpu_events events;
3210
3211                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3212
3213                 r = -EFAULT;
3214                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3215                         break;
3216                 r = 0;
3217                 break;
3218         }
3219         case KVM_SET_VCPU_EVENTS: {
3220                 struct kvm_vcpu_events events;
3221
3222                 r = -EFAULT;
3223                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3224                         break;
3225
3226                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3227                 break;
3228         }
3229         case KVM_GET_DEBUGREGS: {
3230                 struct kvm_debugregs dbgregs;
3231
3232                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3233
3234                 r = -EFAULT;
3235                 if (copy_to_user(argp, &dbgregs,
3236                                  sizeof(struct kvm_debugregs)))
3237                         break;
3238                 r = 0;
3239                 break;
3240         }
3241         case KVM_SET_DEBUGREGS: {
3242                 struct kvm_debugregs dbgregs;
3243
3244                 r = -EFAULT;
3245                 if (copy_from_user(&dbgregs, argp,
3246                                    sizeof(struct kvm_debugregs)))
3247                         break;
3248
3249                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3250                 break;
3251         }
3252         case KVM_GET_XSAVE: {
3253                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3254                 r = -ENOMEM;
3255                 if (!u.xsave)
3256                         break;
3257
3258                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3259
3260                 r = -EFAULT;
3261                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3262                         break;
3263                 r = 0;
3264                 break;
3265         }
3266         case KVM_SET_XSAVE: {
3267                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3268                 r = -ENOMEM;
3269                 if (!u.xsave)
3270                         break;
3271
3272                 r = -EFAULT;
3273                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3274                         break;
3275
3276                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3277                 break;
3278         }
3279         case KVM_GET_XCRS: {
3280                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3281                 r = -ENOMEM;
3282                 if (!u.xcrs)
3283                         break;
3284
3285                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3286
3287                 r = -EFAULT;
3288                 if (copy_to_user(argp, u.xcrs,
3289                                  sizeof(struct kvm_xcrs)))
3290                         break;
3291                 r = 0;
3292                 break;
3293         }
3294         case KVM_SET_XCRS: {
3295                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3296                 r = -ENOMEM;
3297                 if (!u.xcrs)
3298                         break;
3299
3300                 r = -EFAULT;
3301                 if (copy_from_user(u.xcrs, argp,
3302                                    sizeof(struct kvm_xcrs)))
3303                         break;
3304
3305                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3306                 break;
3307         }
3308         case KVM_SET_TSC_KHZ: {
3309                 u32 user_tsc_khz;
3310
3311                 r = -EINVAL;
3312                 if (!kvm_has_tsc_control)
3313                         break;
3314
3315                 user_tsc_khz = (u32)arg;
3316
3317                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3318                         goto out;
3319
3320                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3321
3322                 r = 0;
3323                 goto out;
3324         }
3325         case KVM_GET_TSC_KHZ: {
3326                 r = -EIO;
3327                 if (check_tsc_unstable())
3328                         goto out;
3329
3330                 r = vcpu_tsc_khz(vcpu);
3331
3332                 goto out;
3333         }
3334         default:
3335                 r = -EINVAL;
3336         }
3337 out:
3338         kfree(u.buffer);
3339         return r;
3340 }
3341
3342 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3343 {
3344         int ret;
3345
3346         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3347                 return -1;
3348         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3349         return ret;
3350 }
3351
3352 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3353                                               u64 ident_addr)
3354 {
3355         kvm->arch.ept_identity_map_addr = ident_addr;
3356         return 0;
3357 }
3358
3359 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3360                                           u32 kvm_nr_mmu_pages)
3361 {
3362         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3363                 return -EINVAL;
3364
3365         mutex_lock(&kvm->slots_lock);
3366         spin_lock(&kvm->mmu_lock);
3367
3368         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3369         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3370
3371         spin_unlock(&kvm->mmu_lock);
3372         mutex_unlock(&kvm->slots_lock);
3373         return 0;
3374 }
3375
3376 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3377 {
3378         return kvm->arch.n_max_mmu_pages;
3379 }
3380
3381 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3382 {
3383         int r;
3384
3385         r = 0;
3386         switch (chip->chip_id) {
3387         case KVM_IRQCHIP_PIC_MASTER:
3388                 memcpy(&chip->chip.pic,
3389                         &pic_irqchip(kvm)->pics[0],
3390                         sizeof(struct kvm_pic_state));
3391                 break;
3392         case KVM_IRQCHIP_PIC_SLAVE:
3393                 memcpy(&chip->chip.pic,
3394                         &pic_irqchip(kvm)->pics[1],
3395                         sizeof(struct kvm_pic_state));
3396                 break;
3397         case KVM_IRQCHIP_IOAPIC:
3398                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3399                 break;
3400         default:
3401                 r = -EINVAL;
3402                 break;
3403         }
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3408 {
3409         int r;
3410
3411         r = 0;
3412         switch (chip->chip_id) {
3413         case KVM_IRQCHIP_PIC_MASTER:
3414                 spin_lock(&pic_irqchip(kvm)->lock);
3415                 memcpy(&pic_irqchip(kvm)->pics[0],
3416                         &chip->chip.pic,
3417                         sizeof(struct kvm_pic_state));
3418                 spin_unlock(&pic_irqchip(kvm)->lock);
3419                 break;
3420         case KVM_IRQCHIP_PIC_SLAVE:
3421                 spin_lock(&pic_irqchip(kvm)->lock);
3422                 memcpy(&pic_irqchip(kvm)->pics[1],
3423                         &chip->chip.pic,
3424                         sizeof(struct kvm_pic_state));
3425                 spin_unlock(&pic_irqchip(kvm)->lock);
3426                 break;
3427         case KVM_IRQCHIP_IOAPIC:
3428                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3429                 break;
3430         default:
3431                 r = -EINVAL;
3432                 break;
3433         }
3434         kvm_pic_update_irq(pic_irqchip(kvm));
3435         return r;
3436 }
3437
3438 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3439 {
3440         int r = 0;
3441
3442         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3443         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return r;
3446 }
3447
3448 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3449 {
3450         int r = 0;
3451         int i;
3452         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3453         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3454         for (i = 0; i < 3; i++)
3455                 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3456         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3457         return r;
3458 }
3459
3460 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3461 {
3462         int r = 0;
3463
3464         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3465         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3466                 sizeof(ps->channels));
3467         ps->flags = kvm->arch.vpit->pit_state.flags;
3468         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3469         memset(&ps->reserved, 0, sizeof(ps->reserved));
3470         return r;
3471 }
3472
3473 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3474 {
3475         int r = 0, start = 0;
3476         int i;
3477         u32 prev_legacy, cur_legacy;
3478         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3479         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3480         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3481         if (!prev_legacy && cur_legacy)
3482                 start = 1;
3483         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3484                sizeof(kvm->arch.vpit->pit_state.channels));
3485         kvm->arch.vpit->pit_state.flags = ps->flags;
3486         for (i = 0; i < 3; i++)
3487                 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3488                                    start && i == 0);
3489         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3490         return r;
3491 }
3492
3493 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3494                                  struct kvm_reinject_control *control)
3495 {
3496         if (!kvm->arch.vpit)
3497                 return -ENXIO;
3498         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3499         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3500         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3501         return 0;
3502 }
3503
3504 /*
3505  * Get (and clear) the dirty memory log for a memory slot.
3506  */
3507 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3508                                       struct kvm_dirty_log *log)
3509 {
3510         int r, i;
3511         struct kvm_memory_slot *memslot;
3512         unsigned long n;
3513         unsigned long is_dirty = 0;
3514
3515         mutex_lock(&kvm->slots_lock);
3516
3517         r = -EINVAL;
3518         if (log->slot >= KVM_MEMORY_SLOTS)
3519                 goto out;
3520
3521         memslot = &kvm->memslots->memslots[log->slot];
3522         r = -ENOENT;
3523         if (!memslot->dirty_bitmap)
3524                 goto out;
3525
3526         n = kvm_dirty_bitmap_bytes(memslot);
3527
3528         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3529                 is_dirty = memslot->dirty_bitmap[i];
3530
3531         /* If nothing is dirty, don't bother messing with page tables. */
3532         if (is_dirty) {
3533                 struct kvm_memslots *slots, *old_slots;
3534                 unsigned long *dirty_bitmap;
3535
3536                 dirty_bitmap = memslot->dirty_bitmap_head;
3537                 if (memslot->dirty_bitmap == dirty_bitmap)
3538                         dirty_bitmap += n / sizeof(long);
3539                 memset(dirty_bitmap, 0, n);
3540
3541                 r = -ENOMEM;
3542                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3543                 if (!slots)
3544                         goto out;
3545                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3546                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3547                 slots->generation++;
3548
3549                 old_slots = kvm->memslots;
3550                 rcu_assign_pointer(kvm->memslots, slots);
3551                 synchronize_srcu_expedited(&kvm->srcu);
3552                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3553                 kfree(old_slots);
3554
3555                 spin_lock(&kvm->mmu_lock);
3556                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3557                 spin_unlock(&kvm->mmu_lock);
3558
3559                 r = -EFAULT;
3560                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3561                         goto out;
3562         } else {
3563                 r = -EFAULT;
3564                 if (clear_user(log->dirty_bitmap, n))
3565                         goto out;
3566         }
3567
3568         r = 0;
3569 out:
3570         mutex_unlock(&kvm->slots_lock);
3571         return r;
3572 }
3573
3574 long kvm_arch_vm_ioctl(struct file *filp,
3575                        unsigned int ioctl, unsigned long arg)
3576 {
3577         struct kvm *kvm = filp->private_data;
3578         void __user *argp = (void __user *)arg;
3579         int r = -ENOTTY;
3580         /*
3581          * This union makes it completely explicit to gcc-3.x
3582          * that these two variables' stack usage should be
3583          * combined, not added together.
3584          */
3585         union {
3586                 struct kvm_pit_state ps;
3587                 struct kvm_pit_state2 ps2;
3588                 struct kvm_pit_config pit_config;
3589         } u;
3590
3591         switch (ioctl) {
3592         case KVM_SET_TSS_ADDR:
3593                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3594                 if (r < 0)
3595                         goto out;
3596                 break;
3597         case KVM_SET_IDENTITY_MAP_ADDR: {
3598                 u64 ident_addr;
3599
3600                 r = -EFAULT;
3601                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3602                         goto out;
3603                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3604                 if (r < 0)
3605                         goto out;
3606                 break;
3607         }
3608         case KVM_SET_NR_MMU_PAGES:
3609                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3610                 if (r)
3611                         goto out;
3612                 break;
3613         case KVM_GET_NR_MMU_PAGES:
3614                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3615                 break;
3616         case KVM_CREATE_IRQCHIP: {
3617                 struct kvm_pic *vpic;
3618
3619                 mutex_lock(&kvm->lock);
3620                 r = -EEXIST;
3621                 if (kvm->arch.vpic)
3622                         goto create_irqchip_unlock;
3623                 r = -EINVAL;
3624                 if (atomic_read(&kvm->online_vcpus))
3625                         goto create_irqchip_unlock;
3626                 r = -ENOMEM;
3627                 vpic = kvm_create_pic(kvm);
3628                 if (vpic) {
3629                         r = kvm_ioapic_init(kvm);
3630                         if (r) {
3631                                 mutex_lock(&kvm->slots_lock);
3632                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3633                                                           &vpic->dev_master);
3634                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3635                                                           &vpic->dev_slave);
3636                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3637                                                           &vpic->dev_eclr);
3638                                 mutex_unlock(&kvm->slots_lock);
3639                                 kfree(vpic);
3640                                 goto create_irqchip_unlock;
3641                         }
3642                 } else
3643                         goto create_irqchip_unlock;
3644                 smp_wmb();
3645                 kvm->arch.vpic = vpic;
3646                 smp_wmb();
3647                 r = kvm_setup_default_irq_routing(kvm);
3648                 if (r) {
3649                         mutex_lock(&kvm->slots_lock);
3650                         mutex_lock(&kvm->irq_lock);
3651                         kvm_ioapic_destroy(kvm);
3652                         kvm_destroy_pic(kvm);
3653                         mutex_unlock(&kvm->irq_lock);
3654                         mutex_unlock(&kvm->slots_lock);
3655                 }
3656         create_irqchip_unlock:
3657                 mutex_unlock(&kvm->lock);
3658                 break;
3659         }
3660         case KVM_CREATE_PIT:
3661                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3662                 goto create_pit;
3663         case KVM_CREATE_PIT2:
3664                 r = -EFAULT;
3665                 if (copy_from_user(&u.pit_config, argp,
3666                                    sizeof(struct kvm_pit_config)))
3667                         goto out;
3668         create_pit:
3669                 mutex_lock(&kvm->slots_lock);
3670                 r = -EEXIST;
3671                 if (kvm->arch.vpit)
3672                         goto create_pit_unlock;
3673                 r = -ENOMEM;
3674                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3675                 if (kvm->arch.vpit)
3676                         r = 0;
3677         create_pit_unlock:
3678                 mutex_unlock(&kvm->slots_lock);
3679                 break;
3680         case KVM_IRQ_LINE_STATUS:
3681         case KVM_IRQ_LINE: {
3682                 struct kvm_irq_level irq_event;
3683
3684                 r = -EFAULT;
3685                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3686                         goto out;
3687                 r = -ENXIO;
3688                 if (irqchip_in_kernel(kvm)) {
3689                         __s32 status;
3690                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3691                                         irq_event.irq, irq_event.level);
3692                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3693                                 r = -EFAULT;
3694                                 irq_event.status = status;
3695                                 if (copy_to_user(argp, &irq_event,
3696                                                         sizeof irq_event))
3697                                         goto out;
3698                         }
3699                         r = 0;
3700                 }
3701                 break;
3702         }
3703         case KVM_GET_IRQCHIP: {
3704                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3705                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3706
3707                 r = -ENOMEM;
3708                 if (!chip)
3709                         goto out;
3710                 r = -EFAULT;
3711                 if (copy_from_user(chip, argp, sizeof *chip))
3712                         goto get_irqchip_out;
3713                 r = -ENXIO;
3714                 if (!irqchip_in_kernel(kvm))
3715                         goto get_irqchip_out;
3716                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3717                 if (r)
3718                         goto get_irqchip_out;
3719                 r = -EFAULT;
3720                 if (copy_to_user(argp, chip, sizeof *chip))
3721                         goto get_irqchip_out;
3722                 r = 0;
3723         get_irqchip_out:
3724                 kfree(chip);
3725                 if (r)
3726                         goto out;
3727                 break;
3728         }
3729         case KVM_SET_IRQCHIP: {
3730                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3731                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3732
3733                 r = -ENOMEM;
3734                 if (!chip)
3735                         goto out;
3736                 r = -EFAULT;
3737                 if (copy_from_user(chip, argp, sizeof *chip))
3738                         goto set_irqchip_out;
3739                 r = -ENXIO;
3740                 if (!irqchip_in_kernel(kvm))
3741                         goto set_irqchip_out;
3742                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3743                 if (r)
3744                         goto set_irqchip_out;
3745                 r = 0;
3746         set_irqchip_out:
3747                 kfree(chip);
3748                 if (r)
3749                         goto out;
3750                 break;
3751         }
3752         case KVM_GET_PIT: {
3753                 r = -EFAULT;
3754                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3755                         goto out;
3756                 r = -ENXIO;
3757                 if (!kvm->arch.vpit)
3758                         goto out;
3759                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3760                 if (r)
3761                         goto out;
3762                 r = -EFAULT;
3763                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3764                         goto out;
3765                 r = 0;
3766                 break;
3767         }
3768         case KVM_SET_PIT: {
3769                 r = -EFAULT;
3770                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3771                         goto out;
3772                 r = -ENXIO;
3773                 if (!kvm->arch.vpit)
3774                         goto out;
3775                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3776                 if (r)
3777                         goto out;
3778                 r = 0;
3779                 break;
3780         }
3781         case KVM_GET_PIT2: {
3782                 r = -ENXIO;
3783                 if (!kvm->arch.vpit)
3784                         goto out;
3785                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3786                 if (r)
3787                         goto out;
3788                 r = -EFAULT;
3789                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3790                         goto out;
3791                 r = 0;
3792                 break;
3793         }
3794         case KVM_SET_PIT2: {
3795                 r = -EFAULT;
3796                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3797                         goto out;
3798                 r = -ENXIO;
3799                 if (!kvm->arch.vpit)
3800                         goto out;
3801                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3802                 if (r)
3803                         goto out;
3804                 r = 0;
3805                 break;
3806         }
3807         case KVM_REINJECT_CONTROL: {
3808                 struct kvm_reinject_control control;
3809                 r =  -EFAULT;
3810                 if (copy_from_user(&control, argp, sizeof(control)))
3811                         goto out;
3812                 r = kvm_vm_ioctl_reinject(kvm, &control);
3813                 if (r)
3814                         goto out;
3815                 r = 0;
3816                 break;
3817         }
3818         case KVM_XEN_HVM_CONFIG: {
3819                 r = -EFAULT;
3820                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3821                                    sizeof(struct kvm_xen_hvm_config)))
3822                         goto out;
3823                 r = -EINVAL;
3824                 if (kvm->arch.xen_hvm_config.flags)
3825                         goto out;
3826                 r = 0;
3827                 break;
3828         }
3829         case KVM_SET_CLOCK: {
3830                 struct kvm_clock_data user_ns;
3831                 u64 now_ns;
3832                 s64 delta;
3833
3834                 r = -EFAULT;
3835                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3836                         goto out;
3837
3838                 r = -EINVAL;
3839                 if (user_ns.flags)
3840                         goto out;
3841
3842                 r = 0;
3843                 local_irq_disable();
3844                 now_ns = get_kernel_ns();
3845                 delta = user_ns.clock - now_ns;
3846                 local_irq_enable();
3847                 kvm->arch.kvmclock_offset = delta;
3848                 break;
3849         }
3850         case KVM_GET_CLOCK: {
3851                 struct kvm_clock_data user_ns;
3852                 u64 now_ns;
3853
3854                 local_irq_disable();
3855                 now_ns = get_kernel_ns();
3856                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3857                 local_irq_enable();
3858                 user_ns.flags = 0;
3859                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3860
3861                 r = -EFAULT;
3862                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3863                         goto out;
3864                 r = 0;
3865                 break;
3866         }
3867
3868         default:
3869                 ;
3870         }
3871 out:
3872         return r;
3873 }
3874
3875 static void kvm_init_msr_list(void)
3876 {
3877         u32 dummy[2];
3878         unsigned i, j;
3879
3880         /* skip the first msrs in the list. KVM-specific */
3881         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3882                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3883                         continue;
3884                 if (j < i)
3885                         msrs_to_save[j] = msrs_to_save[i];
3886                 j++;
3887         }
3888         num_msrs_to_save = j;
3889 }
3890
3891 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3892                            const void *v)
3893 {
3894         int handled = 0;
3895         int n;
3896
3897         do {
3898                 n = min(len, 8);
3899                 if (!(vcpu->arch.apic &&
3900                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3901                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3902                         break;
3903                 handled += n;
3904                 addr += n;
3905                 len -= n;
3906                 v += n;
3907         } while (len);
3908
3909         return handled;
3910 }
3911
3912 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3913 {
3914         int handled = 0;
3915         int n;
3916
3917         do {
3918                 n = min(len, 8);
3919                 if (!(vcpu->arch.apic &&
3920                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3921                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3922                         break;
3923                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3924                 handled += n;
3925                 addr += n;
3926                 len -= n;
3927                 v += n;
3928         } while (len);
3929
3930         return handled;
3931 }
3932
3933 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3934                         struct kvm_segment *var, int seg)
3935 {
3936         kvm_x86_ops->set_segment(vcpu, var, seg);
3937 }
3938
3939 void kvm_get_segment(struct kvm_vcpu *vcpu,
3940                      struct kvm_segment *var, int seg)
3941 {
3942         kvm_x86_ops->get_segment(vcpu, var, seg);
3943 }
3944
3945 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3946 {
3947         return gpa;
3948 }
3949
3950 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3951 {
3952         gpa_t t_gpa;
3953         struct x86_exception exception;
3954
3955         BUG_ON(!mmu_is_nested(vcpu));
3956
3957         /* NPT walks are always user-walks */
3958         access |= PFERR_USER_MASK;
3959         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3960
3961         return t_gpa;
3962 }
3963
3964 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3965                               struct x86_exception *exception)
3966 {
3967         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3968         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3969 }
3970
3971  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3972                                 struct x86_exception *exception)
3973 {
3974         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3975         access |= PFERR_FETCH_MASK;
3976         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3977 }
3978
3979 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3980                                struct x86_exception *exception)
3981 {
3982         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3983         access |= PFERR_WRITE_MASK;
3984         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3985 }
3986
3987 /* uses this to access any guest's mapped memory without checking CPL */
3988 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3989                                 struct x86_exception *exception)
3990 {
3991         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3992 }
3993
3994 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3995                                       struct kvm_vcpu *vcpu, u32 access,
3996                                       struct x86_exception *exception)
3997 {
3998         void *data = val;
3999         int r = X86EMUL_CONTINUE;
4000
4001         while (bytes) {
4002                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4003                                                             exception);
4004                 unsigned offset = addr & (PAGE_SIZE-1);
4005                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4006                 int ret;
4007
4008                 if (gpa == UNMAPPED_GVA)
4009                         return X86EMUL_PROPAGATE_FAULT;
4010                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
4011                 if (ret < 0) {
4012                         r = X86EMUL_IO_NEEDED;
4013                         goto out;
4014                 }
4015
4016                 bytes -= toread;
4017                 data += toread;
4018                 addr += toread;
4019         }
4020 out:
4021         return r;
4022 }
4023
4024 /* used for instruction fetching */
4025 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4026                                 gva_t addr, void *val, unsigned int bytes,
4027                                 struct x86_exception *exception)
4028 {
4029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4030         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4031
4032         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
4033                                           access | PFERR_FETCH_MASK,
4034                                           exception);
4035 }
4036
4037 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4038                                gva_t addr, void *val, unsigned int bytes,
4039                                struct x86_exception *exception)
4040 {
4041         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4042         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4043
4044         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4045                                           exception);
4046 }
4047 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4048
4049 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4050                                       gva_t addr, void *val, unsigned int bytes,
4051                                       struct x86_exception *exception)
4052 {
4053         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4054         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4055 }
4056
4057 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4058                                        gva_t addr, void *val,
4059                                        unsigned int bytes,
4060                                        struct x86_exception *exception)
4061 {
4062         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4063         void *data = val;
4064         int r = X86EMUL_CONTINUE;
4065
4066         while (bytes) {
4067                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4068                                                              PFERR_WRITE_MASK,
4069                                                              exception);
4070                 unsigned offset = addr & (PAGE_SIZE-1);
4071                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4072                 int ret;
4073
4074                 if (gpa == UNMAPPED_GVA)
4075                         return X86EMUL_PROPAGATE_FAULT;
4076                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4077                 if (ret < 0) {
4078                         r = X86EMUL_IO_NEEDED;
4079                         goto out;
4080                 }
4081
4082                 bytes -= towrite;
4083                 data += towrite;
4084                 addr += towrite;
4085         }
4086 out:
4087         return r;
4088 }
4089 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4090
4091 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4092                                 gpa_t *gpa, struct x86_exception *exception,
4093                                 bool write)
4094 {
4095         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4096
4097         if (vcpu_match_mmio_gva(vcpu, gva) &&
4098                   check_write_user_access(vcpu, write, access,
4099                   vcpu->arch.access)) {
4100                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4101                                         (gva & (PAGE_SIZE - 1));
4102                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4103                 return 1;
4104         }
4105
4106         if (write)
4107                 access |= PFERR_WRITE_MASK;
4108
4109         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4110
4111         if (*gpa == UNMAPPED_GVA)
4112                 return -1;
4113
4114         /* For APIC access vmexit */
4115         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4116                 return 1;
4117
4118         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4119                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4120                 return 1;
4121         }
4122
4123         return 0;
4124 }
4125
4126 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4127                         const void *val, int bytes)
4128 {
4129         int ret;
4130
4131         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4132         if (ret < 0)
4133                 return 0;
4134         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4135         return 1;
4136 }
4137
4138 struct read_write_emulator_ops {
4139         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4140                                   int bytes);
4141         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4142                                   void *val, int bytes);
4143         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4144                                int bytes, void *val);
4145         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4146                                     void *val, int bytes);
4147         bool write;
4148 };
4149
4150 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4151 {
4152         if (vcpu->mmio_read_completed) {
4153                 memcpy(val, vcpu->mmio_data, bytes);
4154                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4155                                vcpu->mmio_phys_addr, *(u64 *)val);
4156                 vcpu->mmio_read_completed = 0;
4157                 return 1;
4158         }
4159
4160         return 0;
4161 }
4162
4163 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4164                         void *val, int bytes)
4165 {
4166         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4167 }
4168
4169 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4170                          void *val, int bytes)
4171 {
4172         return emulator_write_phys(vcpu, gpa, val, bytes);
4173 }
4174
4175 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4176 {
4177         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4178         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4179 }
4180
4181 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4182                           void *val, int bytes)
4183 {
4184         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4185         return X86EMUL_IO_NEEDED;
4186 }
4187
4188 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4189                            void *val, int bytes)
4190 {
4191         memcpy(vcpu->mmio_data, val, bytes);
4192         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4193         return X86EMUL_CONTINUE;
4194 }
4195
4196 static struct read_write_emulator_ops read_emultor = {
4197         .read_write_prepare = read_prepare,
4198         .read_write_emulate = read_emulate,
4199         .read_write_mmio = vcpu_mmio_read,
4200         .read_write_exit_mmio = read_exit_mmio,
4201 };
4202
4203 static struct read_write_emulator_ops write_emultor = {
4204         .read_write_emulate = write_emulate,
4205         .read_write_mmio = write_mmio,
4206         .read_write_exit_mmio = write_exit_mmio,
4207         .write = true,
4208 };
4209
4210 static int emulator_read_write_onepage(unsigned long addr, void *val,
4211                                        unsigned int bytes,
4212                                        struct x86_exception *exception,
4213                                        struct kvm_vcpu *vcpu,
4214                                        struct read_write_emulator_ops *ops)
4215 {
4216         gpa_t gpa;
4217         int handled, ret;
4218         bool write = ops->write;
4219
4220         if (ops->read_write_prepare &&
4221                   ops->read_write_prepare(vcpu, val, bytes))
4222                 return X86EMUL_CONTINUE;
4223
4224         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4225
4226         if (ret < 0)
4227                 return X86EMUL_PROPAGATE_FAULT;
4228
4229         /* For APIC access vmexit */
4230         if (ret)
4231                 goto mmio;
4232
4233         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4234                 return X86EMUL_CONTINUE;
4235
4236 mmio:
4237         /*
4238          * Is this MMIO handled locally?
4239          */
4240         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4241         if (handled == bytes)
4242                 return X86EMUL_CONTINUE;
4243
4244         gpa += handled;
4245         bytes -= handled;
4246         val += handled;
4247
4248         vcpu->mmio_needed = 1;
4249         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4250         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4251         vcpu->mmio_size = bytes;
4252         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4253         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4254         vcpu->mmio_index = 0;
4255
4256         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4257 }
4258
4259 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4260                         void *val, unsigned int bytes,
4261                         struct x86_exception *exception,
4262                         struct read_write_emulator_ops *ops)
4263 {
4264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4265
4266         /* Crossing a page boundary? */
4267         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4268                 int rc, now;
4269
4270                 now = -addr & ~PAGE_MASK;
4271                 rc = emulator_read_write_onepage(addr, val, now, exception,
4272                                                  vcpu, ops);
4273
4274                 if (rc != X86EMUL_CONTINUE)
4275                         return rc;
4276                 addr += now;
4277                 val += now;
4278                 bytes -= now;
4279         }
4280
4281         return emulator_read_write_onepage(addr, val, bytes, exception,
4282                                            vcpu, ops);
4283 }
4284
4285 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4286                                   unsigned long addr,
4287                                   void *val,
4288                                   unsigned int bytes,
4289                                   struct x86_exception *exception)
4290 {
4291         return emulator_read_write(ctxt, addr, val, bytes,
4292                                    exception, &read_emultor);
4293 }
4294
4295 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4296                             unsigned long addr,
4297                             const void *val,
4298                             unsigned int bytes,
4299                             struct x86_exception *exception)
4300 {
4301         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4302                                    exception, &write_emultor);
4303 }
4304
4305 #define CMPXCHG_TYPE(t, ptr, old, new) \
4306         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4307
4308 #ifdef CONFIG_X86_64
4309 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4310 #else
4311 #  define CMPXCHG64(ptr, old, new) \
4312         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4313 #endif
4314
4315 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4316                                      unsigned long addr,
4317                                      const void *old,
4318                                      const void *new,
4319                                      unsigned int bytes,
4320                                      struct x86_exception *exception)
4321 {
4322         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4323         gpa_t gpa;
4324         struct page *page;
4325         char *kaddr;
4326         bool exchanged;
4327
4328         /* guests cmpxchg8b have to be emulated atomically */
4329         if (bytes > 8 || (bytes & (bytes - 1)))
4330                 goto emul_write;
4331
4332         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4333
4334         if (gpa == UNMAPPED_GVA ||
4335             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4336                 goto emul_write;
4337
4338         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4339                 goto emul_write;
4340
4341         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4342         if (is_error_page(page)) {
4343                 kvm_release_page_clean(page);
4344                 goto emul_write;
4345         }
4346
4347         kaddr = kmap_atomic(page, KM_USER0);
4348         kaddr += offset_in_page(gpa);
4349         switch (bytes) {
4350         case 1:
4351                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4352                 break;
4353         case 2:
4354                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4355                 break;
4356         case 4:
4357                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4358                 break;
4359         case 8:
4360                 exchanged = CMPXCHG64(kaddr, old, new);
4361                 break;
4362         default:
4363                 BUG();
4364         }
4365         kunmap_atomic(kaddr, KM_USER0);
4366         kvm_release_page_dirty(page);
4367
4368         if (!exchanged)
4369                 return X86EMUL_CMPXCHG_FAILED;
4370
4371         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4372
4373         return X86EMUL_CONTINUE;
4374
4375 emul_write:
4376         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4377
4378         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4379 }
4380
4381 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4382 {
4383         /* TODO: String I/O for in kernel device */
4384         int r;
4385
4386         if (vcpu->arch.pio.in)
4387                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4388                                     vcpu->arch.pio.size, pd);
4389         else
4390                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4391                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4392                                      pd);
4393         return r;
4394 }
4395
4396
4397 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4398                                     int size, unsigned short port, void *val,
4399                                     unsigned int count)
4400 {
4401         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4402
4403         if (vcpu->arch.pio.count)
4404                 goto data_avail;
4405
4406         trace_kvm_pio(0, port, size, count);
4407
4408         vcpu->arch.pio.port = port;
4409         vcpu->arch.pio.in = 1;
4410         vcpu->arch.pio.count  = count;
4411         vcpu->arch.pio.size = size;
4412
4413         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4414         data_avail:
4415                 memcpy(val, vcpu->arch.pio_data, size * count);
4416                 vcpu->arch.pio.count = 0;
4417                 return 1;
4418         }
4419
4420         vcpu->run->exit_reason = KVM_EXIT_IO;
4421         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4422         vcpu->run->io.size = size;
4423         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4424         vcpu->run->io.count = count;
4425         vcpu->run->io.port = port;
4426
4427         return 0;
4428 }
4429
4430 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4431                                      int size, unsigned short port,
4432                                      const void *val, unsigned int count)
4433 {
4434         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4435
4436         trace_kvm_pio(1, port, size, count);
4437
4438         vcpu->arch.pio.port = port;
4439         vcpu->arch.pio.in = 0;
4440         vcpu->arch.pio.count = count;
4441         vcpu->arch.pio.size = size;
4442
4443         memcpy(vcpu->arch.pio_data, val, size * count);
4444
4445         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4446                 vcpu->arch.pio.count = 0;
4447                 return 1;
4448         }
4449
4450         vcpu->run->exit_reason = KVM_EXIT_IO;
4451         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4452         vcpu->run->io.size = size;
4453         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4454         vcpu->run->io.count = count;
4455         vcpu->run->io.port = port;
4456
4457         return 0;
4458 }
4459
4460 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4461 {
4462         return kvm_x86_ops->get_segment_base(vcpu, seg);
4463 }
4464
4465 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4466 {
4467         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4468 }
4469
4470 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4471 {
4472         if (!need_emulate_wbinvd(vcpu))
4473                 return X86EMUL_CONTINUE;
4474
4475         if (kvm_x86_ops->has_wbinvd_exit()) {
4476                 int cpu = get_cpu();
4477
4478                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4479                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4480                                 wbinvd_ipi, NULL, 1);
4481                 put_cpu();
4482                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4483         } else
4484                 wbinvd();
4485         return X86EMUL_CONTINUE;
4486 }
4487 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4488
4489 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4490 {
4491         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4492 }
4493
4494 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4495 {
4496         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4497 }
4498
4499 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4500 {
4501
4502         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4503 }
4504
4505 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4506 {
4507         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4508 }
4509
4510 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4511 {
4512         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4513         unsigned long value;
4514
4515         switch (cr) {
4516         case 0:
4517                 value = kvm_read_cr0(vcpu);
4518                 break;
4519         case 2:
4520                 value = vcpu->arch.cr2;
4521                 break;
4522         case 3:
4523                 value = kvm_read_cr3(vcpu);
4524                 break;
4525         case 4:
4526                 value = kvm_read_cr4(vcpu);
4527                 break;
4528         case 8:
4529                 value = kvm_get_cr8(vcpu);
4530                 break;
4531         default:
4532                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4533                 return 0;
4534         }
4535
4536         return value;
4537 }
4538
4539 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4540 {
4541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4542         int res = 0;
4543
4544         switch (cr) {
4545         case 0:
4546                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4547                 break;
4548         case 2:
4549                 vcpu->arch.cr2 = val;
4550                 break;
4551         case 3:
4552                 res = kvm_set_cr3(vcpu, val);
4553                 break;
4554         case 4:
4555                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4556                 break;
4557         case 8:
4558                 res = kvm_set_cr8(vcpu, val);
4559                 break;
4560         default:
4561                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4562                 res = -1;
4563         }
4564
4565         return res;
4566 }
4567
4568 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4569 {
4570         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4571 }
4572
4573 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4574 {
4575         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4576 }
4577
4578 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4579 {
4580         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4581 }
4582
4583 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4584 {
4585         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4586 }
4587
4588 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4589 {
4590         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4591 }
4592
4593 static unsigned long emulator_get_cached_segment_base(
4594         struct x86_emulate_ctxt *ctxt, int seg)
4595 {
4596         return get_segment_base(emul_to_vcpu(ctxt), seg);
4597 }
4598
4599 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4600                                  struct desc_struct *desc, u32 *base3,
4601                                  int seg)
4602 {
4603         struct kvm_segment var;
4604
4605         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4606         *selector = var.selector;
4607
4608         if (var.unusable)
4609                 return false;
4610
4611         if (var.g)
4612                 var.limit >>= 12;
4613         set_desc_limit(desc, var.limit);
4614         set_desc_base(desc, (unsigned long)var.base);
4615 #ifdef CONFIG_X86_64
4616         if (base3)
4617                 *base3 = var.base >> 32;
4618 #endif
4619         desc->type = var.type;
4620         desc->s = var.s;
4621         desc->dpl = var.dpl;
4622         desc->p = var.present;
4623         desc->avl = var.avl;
4624         desc->l = var.l;
4625         desc->d = var.db;
4626         desc->g = var.g;
4627
4628         return true;
4629 }
4630
4631 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4632                                  struct desc_struct *desc, u32 base3,
4633                                  int seg)
4634 {
4635         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4636         struct kvm_segment var;
4637
4638         var.selector = selector;
4639         var.base = get_desc_base(desc);
4640 #ifdef CONFIG_X86_64
4641         var.base |= ((u64)base3) << 32;
4642 #endif
4643         var.limit = get_desc_limit(desc);
4644         if (desc->g)
4645                 var.limit = (var.limit << 12) | 0xfff;
4646         var.type = desc->type;
4647         var.present = desc->p;
4648         var.dpl = desc->dpl;
4649         var.db = desc->d;
4650         var.s = desc->s;
4651         var.l = desc->l;
4652         var.g = desc->g;
4653         var.avl = desc->avl;
4654         var.present = desc->p;
4655         var.unusable = !var.present;
4656         var.padding = 0;
4657
4658         kvm_set_segment(vcpu, &var, seg);
4659         return;
4660 }
4661
4662 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4663                             u32 msr_index, u64 *pdata)
4664 {
4665         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4666 }
4667
4668 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4669                             u32 msr_index, u64 data)
4670 {
4671         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4672 }
4673
4674 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4675 {
4676         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4677 }
4678
4679 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4680 {
4681         preempt_disable();
4682         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4683         /*
4684          * CR0.TS may reference the host fpu state, not the guest fpu state,
4685          * so it may be clear at this point.
4686          */
4687         clts();
4688 }
4689
4690 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4691 {
4692         preempt_enable();
4693 }
4694
4695 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4696                               struct x86_instruction_info *info,
4697                               enum x86_intercept_stage stage)
4698 {
4699         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4700 }
4701
4702 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4703                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4704 {
4705         struct kvm_cpuid_entry2 *cpuid = NULL;
4706
4707         if (eax && ecx)
4708                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4709                                             *eax, *ecx);
4710
4711         if (cpuid) {
4712                 *eax = cpuid->eax;
4713                 *ecx = cpuid->ecx;
4714                 if (ebx)
4715                         *ebx = cpuid->ebx;
4716                 if (edx)
4717                         *edx = cpuid->edx;
4718                 return true;
4719         }
4720
4721         return false;
4722 }
4723
4724 static struct x86_emulate_ops emulate_ops = {
4725         .read_std            = kvm_read_guest_virt_system,
4726         .write_std           = kvm_write_guest_virt_system,
4727         .fetch               = kvm_fetch_guest_virt,
4728         .read_emulated       = emulator_read_emulated,
4729         .write_emulated      = emulator_write_emulated,
4730         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4731         .invlpg              = emulator_invlpg,
4732         .pio_in_emulated     = emulator_pio_in_emulated,
4733         .pio_out_emulated    = emulator_pio_out_emulated,
4734         .get_segment         = emulator_get_segment,
4735         .set_segment         = emulator_set_segment,
4736         .get_cached_segment_base = emulator_get_cached_segment_base,
4737         .get_gdt             = emulator_get_gdt,
4738         .get_idt             = emulator_get_idt,
4739         .set_gdt             = emulator_set_gdt,
4740         .set_idt             = emulator_set_idt,
4741         .get_cr              = emulator_get_cr,
4742         .set_cr              = emulator_set_cr,
4743         .cpl                 = emulator_get_cpl,
4744         .get_dr              = emulator_get_dr,
4745         .set_dr              = emulator_set_dr,
4746         .set_msr             = emulator_set_msr,
4747         .get_msr             = emulator_get_msr,
4748         .halt                = emulator_halt,
4749         .wbinvd              = emulator_wbinvd,
4750         .fix_hypercall       = emulator_fix_hypercall,
4751         .get_fpu             = emulator_get_fpu,
4752         .put_fpu             = emulator_put_fpu,
4753         .intercept           = emulator_intercept,
4754         .get_cpuid           = emulator_get_cpuid,
4755 };
4756
4757 static void cache_all_regs(struct kvm_vcpu *vcpu)
4758 {
4759         kvm_register_read(vcpu, VCPU_REGS_RAX);
4760         kvm_register_read(vcpu, VCPU_REGS_RSP);
4761         kvm_register_read(vcpu, VCPU_REGS_RIP);
4762         vcpu->arch.regs_dirty = ~0;
4763 }
4764
4765 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4766 {
4767         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4768         /*
4769          * an sti; sti; sequence only disable interrupts for the first
4770          * instruction. So, if the last instruction, be it emulated or
4771          * not, left the system with the INT_STI flag enabled, it
4772          * means that the last instruction is an sti. We should not
4773          * leave the flag on in this case. The same goes for mov ss
4774          */
4775         if (!(int_shadow & mask))
4776                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4777 }
4778
4779 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4780 {
4781         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4782         if (ctxt->exception.vector == PF_VECTOR)
4783                 kvm_propagate_fault(vcpu, &ctxt->exception);
4784         else if (ctxt->exception.error_code_valid)
4785                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4786                                       ctxt->exception.error_code);
4787         else
4788                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4789 }
4790
4791 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4792                               const unsigned long *regs)
4793 {
4794         memset(&ctxt->twobyte, 0,
4795                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4796         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4797
4798         ctxt->fetch.start = 0;
4799         ctxt->fetch.end = 0;
4800         ctxt->io_read.pos = 0;
4801         ctxt->io_read.end = 0;
4802         ctxt->mem_read.pos = 0;
4803         ctxt->mem_read.end = 0;
4804 }
4805
4806 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4807 {
4808         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4809         int cs_db, cs_l;
4810
4811         /*
4812          * TODO: fix emulate.c to use guest_read/write_register
4813          * instead of direct ->regs accesses, can save hundred cycles
4814          * on Intel for instructions that don't read/change RSP, for
4815          * for example.
4816          */
4817         cache_all_regs(vcpu);
4818
4819         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4820
4821         ctxt->eflags = kvm_get_rflags(vcpu);
4822         ctxt->eip = kvm_rip_read(vcpu);
4823         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4824                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4825                      cs_l                               ? X86EMUL_MODE_PROT64 :
4826                      cs_db                              ? X86EMUL_MODE_PROT32 :
4827                                                           X86EMUL_MODE_PROT16;
4828         ctxt->guest_mode = is_guest_mode(vcpu);
4829
4830         init_decode_cache(ctxt, vcpu->arch.regs);
4831         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4832 }
4833
4834 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4835 {
4836         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4837         int ret;
4838
4839         init_emulate_ctxt(vcpu);
4840
4841         ctxt->op_bytes = 2;
4842         ctxt->ad_bytes = 2;
4843         ctxt->_eip = ctxt->eip + inc_eip;
4844         ret = emulate_int_real(ctxt, irq);
4845
4846         if (ret != X86EMUL_CONTINUE)
4847                 return EMULATE_FAIL;
4848
4849         ctxt->eip = ctxt->_eip;
4850         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4851         kvm_rip_write(vcpu, ctxt->eip);
4852         kvm_set_rflags(vcpu, ctxt->eflags);
4853
4854         if (irq == NMI_VECTOR)
4855                 vcpu->arch.nmi_pending = 0;
4856         else
4857                 vcpu->arch.interrupt.pending = false;
4858
4859         return EMULATE_DONE;
4860 }
4861 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4862
4863 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4864 {
4865         int r = EMULATE_DONE;
4866
4867         ++vcpu->stat.insn_emulation_fail;
4868         trace_kvm_emulate_insn_failed(vcpu);
4869         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4870                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4871                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4872                 vcpu->run->internal.ndata = 0;
4873                 r = EMULATE_FAIL;
4874         }
4875         kvm_queue_exception(vcpu, UD_VECTOR);
4876
4877         return r;
4878 }
4879
4880 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4881 {
4882         gpa_t gpa;
4883
4884         if (tdp_enabled)
4885                 return false;
4886
4887         /*
4888          * if emulation was due to access to shadowed page table
4889          * and it failed try to unshadow page and re-entetr the
4890          * guest to let CPU execute the instruction.
4891          */
4892         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4893                 return true;
4894
4895         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4896
4897         if (gpa == UNMAPPED_GVA)
4898                 return true; /* let cpu generate fault */
4899
4900         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4901                 return true;
4902
4903         return false;
4904 }
4905
4906 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4907                             unsigned long cr2,
4908                             int emulation_type,
4909                             void *insn,
4910                             int insn_len)
4911 {
4912         int r;
4913         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4914         bool writeback = true;
4915
4916         kvm_clear_exception_queue(vcpu);
4917
4918         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4919                 init_emulate_ctxt(vcpu);
4920                 ctxt->interruptibility = 0;
4921                 ctxt->have_exception = false;
4922                 ctxt->perm_ok = false;
4923
4924                 ctxt->only_vendor_specific_insn
4925                         = emulation_type & EMULTYPE_TRAP_UD;
4926
4927                 r = x86_decode_insn(ctxt, insn, insn_len);
4928
4929                 trace_kvm_emulate_insn_start(vcpu);
4930                 ++vcpu->stat.insn_emulation;
4931                 if (r != EMULATION_OK)  {
4932                         if (emulation_type & EMULTYPE_TRAP_UD)
4933                                 return EMULATE_FAIL;
4934                         if (reexecute_instruction(vcpu, cr2))
4935                                 return EMULATE_DONE;
4936                         if (emulation_type & EMULTYPE_SKIP)
4937                                 return EMULATE_FAIL;
4938                         return handle_emulation_failure(vcpu);
4939                 }
4940         }
4941
4942         if (emulation_type & EMULTYPE_SKIP) {
4943                 kvm_rip_write(vcpu, ctxt->_eip);
4944                 return EMULATE_DONE;
4945         }
4946
4947         /* this is needed for vmware backdoor interface to work since it
4948            changes registers values  during IO operation */
4949         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4950                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4951                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4952         }
4953
4954 restart:
4955         r = x86_emulate_insn(ctxt);
4956
4957         if (r == EMULATION_INTERCEPTED)
4958                 return EMULATE_DONE;
4959
4960         if (r == EMULATION_FAILED) {
4961                 if (reexecute_instruction(vcpu, cr2))
4962                         return EMULATE_DONE;
4963
4964                 return handle_emulation_failure(vcpu);
4965         }
4966
4967         if (ctxt->have_exception) {
4968                 inject_emulated_exception(vcpu);
4969                 r = EMULATE_DONE;
4970         } else if (vcpu->arch.pio.count) {
4971                 if (!vcpu->arch.pio.in)
4972                         vcpu->arch.pio.count = 0;
4973                 else
4974                         writeback = false;
4975                 r = EMULATE_DO_MMIO;
4976         } else if (vcpu->mmio_needed) {
4977                 if (!vcpu->mmio_is_write)
4978                         writeback = false;
4979                 r = EMULATE_DO_MMIO;
4980         } else if (r == EMULATION_RESTART)
4981                 goto restart;
4982         else
4983                 r = EMULATE_DONE;
4984
4985         if (writeback) {
4986                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4987                 kvm_set_rflags(vcpu, ctxt->eflags);
4988                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4989                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4990                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4991                 kvm_rip_write(vcpu, ctxt->eip);
4992         } else
4993                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4994
4995         return r;
4996 }
4997 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4998
4999 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5000 {
5001         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5002         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5003                                             size, port, &val, 1);
5004         /* do not return to emulator after return from userspace */
5005         vcpu->arch.pio.count = 0;
5006         return ret;
5007 }
5008 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5009
5010 static void tsc_bad(void *info)
5011 {
5012         __this_cpu_write(cpu_tsc_khz, 0);
5013 }
5014
5015 static void tsc_khz_changed(void *data)
5016 {
5017         struct cpufreq_freqs *freq = data;
5018         unsigned long khz = 0;
5019
5020         if (data)
5021                 khz = freq->new;
5022         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5023                 khz = cpufreq_quick_get(raw_smp_processor_id());
5024         if (!khz)
5025                 khz = tsc_khz;
5026         __this_cpu_write(cpu_tsc_khz, khz);
5027 }
5028
5029 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5030                                      void *data)
5031 {
5032         struct cpufreq_freqs *freq = data;
5033         struct kvm *kvm;
5034         struct kvm_vcpu *vcpu;
5035         int i, send_ipi = 0;
5036
5037         /*
5038          * We allow guests to temporarily run on slowing clocks,
5039          * provided we notify them after, or to run on accelerating
5040          * clocks, provided we notify them before.  Thus time never
5041          * goes backwards.
5042          *
5043          * However, we have a problem.  We can't atomically update
5044          * the frequency of a given CPU from this function; it is
5045          * merely a notifier, which can be called from any CPU.
5046          * Changing the TSC frequency at arbitrary points in time
5047          * requires a recomputation of local variables related to
5048          * the TSC for each VCPU.  We must flag these local variables
5049          * to be updated and be sure the update takes place with the
5050          * new frequency before any guests proceed.
5051          *
5052          * Unfortunately, the combination of hotplug CPU and frequency
5053          * change creates an intractable locking scenario; the order
5054          * of when these callouts happen is undefined with respect to
5055          * CPU hotplug, and they can race with each other.  As such,
5056          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5057          * undefined; you can actually have a CPU frequency change take
5058          * place in between the computation of X and the setting of the
5059          * variable.  To protect against this problem, all updates of
5060          * the per_cpu tsc_khz variable are done in an interrupt
5061          * protected IPI, and all callers wishing to update the value
5062          * must wait for a synchronous IPI to complete (which is trivial
5063          * if the caller is on the CPU already).  This establishes the
5064          * necessary total order on variable updates.
5065          *
5066          * Note that because a guest time update may take place
5067          * anytime after the setting of the VCPU's request bit, the
5068          * correct TSC value must be set before the request.  However,
5069          * to ensure the update actually makes it to any guest which
5070          * starts running in hardware virtualization between the set
5071          * and the acquisition of the spinlock, we must also ping the
5072          * CPU after setting the request bit.
5073          *
5074          */
5075
5076         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5077                 return 0;
5078         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5079                 return 0;
5080
5081         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5082
5083         raw_spin_lock(&kvm_lock);
5084         list_for_each_entry(kvm, &vm_list, vm_list) {
5085                 kvm_for_each_vcpu(i, vcpu, kvm) {
5086                         if (vcpu->cpu != freq->cpu)
5087                                 continue;
5088                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5089                         if (vcpu->cpu != smp_processor_id())
5090                                 send_ipi = 1;
5091                 }
5092         }
5093         raw_spin_unlock(&kvm_lock);
5094
5095         if (freq->old < freq->new && send_ipi) {
5096                 /*
5097                  * We upscale the frequency.  Must make the guest
5098                  * doesn't see old kvmclock values while running with
5099                  * the new frequency, otherwise we risk the guest sees
5100                  * time go backwards.
5101                  *
5102                  * In case we update the frequency for another cpu
5103                  * (which might be in guest context) send an interrupt
5104                  * to kick the cpu out of guest context.  Next time
5105                  * guest context is entered kvmclock will be updated,
5106                  * so the guest will not see stale values.
5107                  */
5108                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5109         }
5110         return 0;
5111 }
5112
5113 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5114         .notifier_call  = kvmclock_cpufreq_notifier
5115 };
5116
5117 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5118                                         unsigned long action, void *hcpu)
5119 {
5120         unsigned int cpu = (unsigned long)hcpu;
5121
5122         switch (action) {
5123                 case CPU_ONLINE:
5124                 case CPU_DOWN_FAILED:
5125                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5126                         break;
5127                 case CPU_DOWN_PREPARE:
5128                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5129                         break;
5130         }
5131         return NOTIFY_OK;
5132 }
5133
5134 static struct notifier_block kvmclock_cpu_notifier_block = {
5135         .notifier_call  = kvmclock_cpu_notifier,
5136         .priority = -INT_MAX
5137 };
5138
5139 static void kvm_timer_init(void)
5140 {
5141         int cpu;
5142
5143         max_tsc_khz = tsc_khz;
5144         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5145         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5146 #ifdef CONFIG_CPU_FREQ
5147                 struct cpufreq_policy policy;
5148                 memset(&policy, 0, sizeof(policy));
5149                 cpu = get_cpu();
5150                 cpufreq_get_policy(&policy, cpu);
5151                 if (policy.cpuinfo.max_freq)
5152                         max_tsc_khz = policy.cpuinfo.max_freq;
5153                 put_cpu();
5154 #endif
5155                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5156                                           CPUFREQ_TRANSITION_NOTIFIER);
5157         }
5158         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5159         for_each_online_cpu(cpu)
5160                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5161 }
5162
5163 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5164
5165 static int kvm_is_in_guest(void)
5166 {
5167         return percpu_read(current_vcpu) != NULL;
5168 }
5169
5170 static int kvm_is_user_mode(void)
5171 {
5172         int user_mode = 3;
5173
5174         if (percpu_read(current_vcpu))
5175                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5176
5177         return user_mode != 0;
5178 }
5179
5180 static unsigned long kvm_get_guest_ip(void)
5181 {
5182         unsigned long ip = 0;
5183
5184         if (percpu_read(current_vcpu))
5185                 ip = kvm_rip_read(percpu_read(current_vcpu));
5186
5187         return ip;
5188 }
5189
5190 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5191         .is_in_guest            = kvm_is_in_guest,
5192         .is_user_mode           = kvm_is_user_mode,
5193         .get_guest_ip           = kvm_get_guest_ip,
5194 };
5195
5196 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5197 {
5198         percpu_write(current_vcpu, vcpu);
5199 }
5200 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5201
5202 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5203 {
5204         percpu_write(current_vcpu, NULL);
5205 }
5206 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5207
5208 static void kvm_set_mmio_spte_mask(void)
5209 {
5210         u64 mask;
5211         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5212
5213         /*
5214          * Set the reserved bits and the present bit of an paging-structure
5215          * entry to generate page fault with PFER.RSV = 1.
5216          */
5217         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5218         mask |= 1ull;
5219
5220 #ifdef CONFIG_X86_64
5221         /*
5222          * If reserved bit is not supported, clear the present bit to disable
5223          * mmio page fault.
5224          */
5225         if (maxphyaddr == 52)
5226                 mask &= ~1ull;
5227 #endif
5228
5229         kvm_mmu_set_mmio_spte_mask(mask);
5230 }
5231
5232 int kvm_arch_init(void *opaque)
5233 {
5234         int r;
5235         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5236
5237         if (kvm_x86_ops) {
5238                 printk(KERN_ERR "kvm: already loaded the other module\n");
5239                 r = -EEXIST;
5240                 goto out;
5241         }
5242
5243         if (!ops->cpu_has_kvm_support()) {
5244                 printk(KERN_ERR "kvm: no hardware support\n");
5245                 r = -EOPNOTSUPP;
5246                 goto out;
5247         }
5248         if (ops->disabled_by_bios()) {
5249                 printk(KERN_ERR "kvm: disabled by bios\n");
5250                 r = -EOPNOTSUPP;
5251                 goto out;
5252         }
5253
5254         r = kvm_mmu_module_init();
5255         if (r)
5256                 goto out;
5257
5258         kvm_set_mmio_spte_mask();
5259
5260         kvm_x86_ops = ops;
5261         kvm_init_msr_list();
5262
5263         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5264                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5265
5266         kvm_timer_init();
5267
5268         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5269
5270         if (cpu_has_xsave)
5271                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5272
5273         return 0;
5274
5275 out:
5276         return r;
5277 }
5278
5279 void kvm_arch_exit(void)
5280 {
5281         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5282
5283         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5284                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5285                                             CPUFREQ_TRANSITION_NOTIFIER);
5286         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5287         kvm_x86_ops = NULL;
5288         kvm_mmu_module_exit();
5289 }
5290
5291 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5292 {
5293         ++vcpu->stat.halt_exits;
5294         if (irqchip_in_kernel(vcpu->kvm)) {
5295                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5296                 return 1;
5297         } else {
5298                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5299                 return 0;
5300         }
5301 }
5302 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5303
5304 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5305                            unsigned long a1)
5306 {
5307         if (is_long_mode(vcpu))
5308                 return a0;
5309         else
5310                 return a0 | ((gpa_t)a1 << 32);
5311 }
5312
5313 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5314 {
5315         u64 param, ingpa, outgpa, ret;
5316         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5317         bool fast, longmode;
5318         int cs_db, cs_l;
5319
5320         /*
5321          * hypercall generates UD from non zero cpl and real mode
5322          * per HYPER-V spec
5323          */
5324         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5325                 kvm_queue_exception(vcpu, UD_VECTOR);
5326                 return 0;
5327         }
5328
5329         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5330         longmode = is_long_mode(vcpu) && cs_l == 1;
5331
5332         if (!longmode) {
5333                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5334                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5335                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5336                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5337                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5338                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5339         }
5340 #ifdef CONFIG_X86_64
5341         else {
5342                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5343                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5344                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5345         }
5346 #endif
5347
5348         code = param & 0xffff;
5349         fast = (param >> 16) & 0x1;
5350         rep_cnt = (param >> 32) & 0xfff;
5351         rep_idx = (param >> 48) & 0xfff;
5352
5353         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5354
5355         switch (code) {
5356         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5357                 kvm_vcpu_on_spin(vcpu);
5358                 break;
5359         default:
5360                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5361                 break;
5362         }
5363
5364         ret = res | (((u64)rep_done & 0xfff) << 32);
5365         if (longmode) {
5366                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5367         } else {
5368                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5369                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5370         }
5371
5372         return 1;
5373 }
5374
5375 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5376 {
5377         unsigned long nr, a0, a1, a2, a3, ret;
5378         int r = 1;
5379
5380         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5381                 return kvm_hv_hypercall(vcpu);
5382
5383         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5384         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5385         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5386         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5387         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5388
5389         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5390
5391         if (!is_long_mode(vcpu)) {
5392                 nr &= 0xFFFFFFFF;
5393                 a0 &= 0xFFFFFFFF;
5394                 a1 &= 0xFFFFFFFF;
5395                 a2 &= 0xFFFFFFFF;
5396                 a3 &= 0xFFFFFFFF;
5397         }
5398
5399         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5400                 ret = -KVM_EPERM;
5401                 goto out;
5402         }
5403
5404         switch (nr) {
5405         case KVM_HC_VAPIC_POLL_IRQ:
5406                 ret = 0;
5407                 break;
5408         case KVM_HC_MMU_OP:
5409                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5410                 break;
5411         default:
5412                 ret = -KVM_ENOSYS;
5413                 break;
5414         }
5415 out:
5416         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5417         ++vcpu->stat.hypercalls;
5418         return r;
5419 }
5420 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5421
5422 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5423 {
5424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5425         char instruction[3];
5426         unsigned long rip = kvm_rip_read(vcpu);
5427
5428         /*
5429          * Blow out the MMU to ensure that no other VCPU has an active mapping
5430          * to ensure that the updated hypercall appears atomically across all
5431          * VCPUs.
5432          */
5433         kvm_mmu_zap_all(vcpu->kvm);
5434
5435         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5436
5437         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5438 }
5439
5440 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5441 {
5442         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5443         int j, nent = vcpu->arch.cpuid_nent;
5444
5445         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5446         /* when no next entry is found, the current entry[i] is reselected */
5447         for (j = i + 1; ; j = (j + 1) % nent) {
5448                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5449                 if (ej->function == e->function) {
5450                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5451                         return j;
5452                 }
5453         }
5454         return 0; /* silence gcc, even though control never reaches here */
5455 }
5456
5457 /* find an entry with matching function, matching index (if needed), and that
5458  * should be read next (if it's stateful) */
5459 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5460         u32 function, u32 index)
5461 {
5462         if (e->function != function)
5463                 return 0;
5464         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5465                 return 0;
5466         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5467             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5468                 return 0;
5469         return 1;
5470 }
5471
5472 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5473                                               u32 function, u32 index)
5474 {
5475         int i;
5476         struct kvm_cpuid_entry2 *best = NULL;
5477
5478         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5479                 struct kvm_cpuid_entry2 *e;
5480
5481                 e = &vcpu->arch.cpuid_entries[i];
5482                 if (is_matching_cpuid_entry(e, function, index)) {
5483                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5484                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5485                         best = e;
5486                         break;
5487                 }
5488         }
5489         return best;
5490 }
5491 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5492
5493 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5494 {
5495         struct kvm_cpuid_entry2 *best;
5496
5497         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5498         if (!best || best->eax < 0x80000008)
5499                 goto not_found;
5500         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5501         if (best)
5502                 return best->eax & 0xff;
5503 not_found:
5504         return 36;
5505 }
5506
5507 /*
5508  * If no match is found, check whether we exceed the vCPU's limit
5509  * and return the content of the highest valid _standard_ leaf instead.
5510  * This is to satisfy the CPUID specification.
5511  */
5512 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5513                                                   u32 function, u32 index)
5514 {
5515         struct kvm_cpuid_entry2 *maxlevel;
5516
5517         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5518         if (!maxlevel || maxlevel->eax >= function)
5519                 return NULL;
5520         if (function & 0x80000000) {
5521                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5522                 if (!maxlevel)
5523                         return NULL;
5524         }
5525         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5526 }
5527
5528 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5529 {
5530         u32 function, index;
5531         struct kvm_cpuid_entry2 *best;
5532
5533         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5534         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5535         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5536         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5537         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5538         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5539         best = kvm_find_cpuid_entry(vcpu, function, index);
5540
5541         if (!best)
5542                 best = check_cpuid_limit(vcpu, function, index);
5543
5544         if (best) {
5545                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5546                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5547                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5548                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5549         }
5550         kvm_x86_ops->skip_emulated_instruction(vcpu);
5551         trace_kvm_cpuid(function,
5552                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5553                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5554                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5555                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5556 }
5557 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5558
5559 /*
5560  * Check if userspace requested an interrupt window, and that the
5561  * interrupt window is open.
5562  *
5563  * No need to exit to userspace if we already have an interrupt queued.
5564  */
5565 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5566 {
5567         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5568                 vcpu->run->request_interrupt_window &&
5569                 kvm_arch_interrupt_allowed(vcpu));
5570 }
5571
5572 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5573 {
5574         struct kvm_run *kvm_run = vcpu->run;
5575
5576         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5577         kvm_run->cr8 = kvm_get_cr8(vcpu);
5578         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5579         if (irqchip_in_kernel(vcpu->kvm))
5580                 kvm_run->ready_for_interrupt_injection = 1;
5581         else
5582                 kvm_run->ready_for_interrupt_injection =
5583                         kvm_arch_interrupt_allowed(vcpu) &&
5584                         !kvm_cpu_has_interrupt(vcpu) &&
5585                         !kvm_event_needs_reinjection(vcpu);
5586 }
5587
5588 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5589 {
5590         int max_irr, tpr;
5591
5592         if (!kvm_x86_ops->update_cr8_intercept)
5593                 return;
5594
5595         if (!vcpu->arch.apic)
5596                 return;
5597
5598         if (!vcpu->arch.apic->vapic_addr)
5599                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5600         else
5601                 max_irr = -1;
5602
5603         if (max_irr != -1)
5604                 max_irr >>= 4;
5605
5606         tpr = kvm_lapic_get_cr8(vcpu);
5607
5608         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5609 }
5610
5611 static void inject_pending_event(struct kvm_vcpu *vcpu)
5612 {
5613         /* try to reinject previous events if any */
5614         if (vcpu->arch.exception.pending) {
5615                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5616                                         vcpu->arch.exception.has_error_code,
5617                                         vcpu->arch.exception.error_code);
5618                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5619                                           vcpu->arch.exception.has_error_code,
5620                                           vcpu->arch.exception.error_code,
5621                                           vcpu->arch.exception.reinject);
5622                 return;
5623         }
5624
5625         if (vcpu->arch.nmi_injected) {
5626                 kvm_x86_ops->set_nmi(vcpu);
5627                 return;
5628         }
5629
5630         if (vcpu->arch.interrupt.pending) {
5631                 kvm_x86_ops->set_irq(vcpu);
5632                 return;
5633         }
5634
5635         /* try to inject new event if pending */
5636         if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
5637                 --vcpu->arch.nmi_pending;
5638                 vcpu->arch.nmi_injected = true;
5639                 kvm_x86_ops->set_nmi(vcpu);
5640         } else if (kvm_cpu_has_interrupt(vcpu)) {
5641                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5642                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5643                                             false);
5644                         kvm_x86_ops->set_irq(vcpu);
5645                 }
5646         }
5647 }
5648
5649 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5650 {
5651         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5652                         !vcpu->guest_xcr0_loaded) {
5653                 /* kvm_set_xcr() also depends on this */
5654                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5655                 vcpu->guest_xcr0_loaded = 1;
5656         }
5657 }
5658
5659 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5660 {
5661         if (vcpu->guest_xcr0_loaded) {
5662                 if (vcpu->arch.xcr0 != host_xcr0)
5663                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5664                 vcpu->guest_xcr0_loaded = 0;
5665         }
5666 }
5667
5668 static void process_nmi(struct kvm_vcpu *vcpu)
5669 {
5670         unsigned limit = 2;
5671
5672         /*
5673          * x86 is limited to one NMI running, and one NMI pending after it.
5674          * If an NMI is already in progress, limit further NMIs to just one.
5675          * Otherwise, allow two (and we'll inject the first one immediately).
5676          */
5677         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5678                 limit = 1;
5679
5680         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5681         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5682         kvm_make_request(KVM_REQ_EVENT, vcpu);
5683 }
5684
5685 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5686 {
5687         int r;
5688         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5689                 vcpu->run->request_interrupt_window;
5690
5691         if (vcpu->requests) {
5692                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5693                         kvm_mmu_unload(vcpu);
5694                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5695                         __kvm_migrate_timers(vcpu);
5696                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5697                         r = kvm_guest_time_update(vcpu);
5698                         if (unlikely(r))
5699                                 goto out;
5700                 }
5701                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5702                         kvm_mmu_sync_roots(vcpu);
5703                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5704                         kvm_x86_ops->tlb_flush(vcpu);
5705                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5706                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5707                         r = 0;
5708                         goto out;
5709                 }
5710                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5711                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5712                         r = 0;
5713                         goto out;
5714                 }
5715                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5716                         vcpu->fpu_active = 0;
5717                         kvm_x86_ops->fpu_deactivate(vcpu);
5718                 }
5719                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5720                         /* Page is swapped out. Do synthetic halt */
5721                         vcpu->arch.apf.halted = true;
5722                         r = 1;
5723                         goto out;
5724                 }
5725                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5726                         record_steal_time(vcpu);
5727                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5728                         process_nmi(vcpu);
5729
5730         }
5731
5732         r = kvm_mmu_reload(vcpu);
5733         if (unlikely(r))
5734                 goto out;
5735
5736         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5737                 inject_pending_event(vcpu);
5738
5739                 /* enable NMI/IRQ window open exits if needed */
5740                 if (vcpu->arch.nmi_pending)
5741                         kvm_x86_ops->enable_nmi_window(vcpu);
5742                 if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5743                         kvm_x86_ops->enable_irq_window(vcpu);
5744
5745                 if (kvm_lapic_enabled(vcpu)) {
5746                         update_cr8_intercept(vcpu);
5747                         kvm_lapic_sync_to_vapic(vcpu);
5748                 }
5749         }
5750
5751         preempt_disable();
5752
5753         kvm_x86_ops->prepare_guest_switch(vcpu);
5754         if (vcpu->fpu_active)
5755                 kvm_load_guest_fpu(vcpu);
5756         vcpu->mode = IN_GUEST_MODE;
5757
5758         /* We should set ->mode before check ->requests,
5759          * see the comment in make_all_cpus_request.
5760          */
5761         smp_mb();
5762
5763         local_irq_disable();
5764
5765         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5766             || need_resched() || signal_pending(current)) {
5767                 vcpu->mode = OUTSIDE_GUEST_MODE;
5768                 smp_wmb();
5769                 local_irq_enable();
5770                 preempt_enable();
5771                 kvm_x86_ops->cancel_injection(vcpu);
5772                 r = 1;
5773                 goto out;
5774         }
5775
5776         kvm_load_guest_xcr0(vcpu);
5777
5778         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5779
5780         kvm_guest_enter();
5781
5782         if (unlikely(vcpu->arch.switch_db_regs)) {
5783                 set_debugreg(0, 7);
5784                 set_debugreg(vcpu->arch.eff_db[0], 0);
5785                 set_debugreg(vcpu->arch.eff_db[1], 1);
5786                 set_debugreg(vcpu->arch.eff_db[2], 2);
5787                 set_debugreg(vcpu->arch.eff_db[3], 3);
5788         }
5789
5790         trace_kvm_entry(vcpu->vcpu_id);
5791         kvm_x86_ops->run(vcpu);
5792
5793         /*
5794          * If the guest has used debug registers, at least dr7
5795          * will be disabled while returning to the host.
5796          * If we don't have active breakpoints in the host, we don't
5797          * care about the messed up debug address registers. But if
5798          * we have some of them active, restore the old state.
5799          */
5800         if (hw_breakpoint_active())
5801                 hw_breakpoint_restore();
5802
5803         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5804
5805         vcpu->mode = OUTSIDE_GUEST_MODE;
5806         smp_wmb();
5807
5808         kvm_put_guest_xcr0(vcpu);
5809
5810         local_irq_enable();
5811
5812         ++vcpu->stat.exits;
5813
5814         /*
5815          * We must have an instruction between local_irq_enable() and
5816          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5817          * the interrupt shadow.  The stat.exits increment will do nicely.
5818          * But we need to prevent reordering, hence this barrier():
5819          */
5820         barrier();
5821
5822         kvm_guest_exit();
5823
5824         preempt_enable();
5825
5826         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5827
5828         /*
5829          * Profile KVM exit RIPs:
5830          */
5831         if (unlikely(prof_on == KVM_PROFILING)) {
5832                 unsigned long rip = kvm_rip_read(vcpu);
5833                 profile_hit(KVM_PROFILING, (void *)rip);
5834         }
5835
5836
5837         kvm_lapic_sync_from_vapic(vcpu);
5838
5839         r = kvm_x86_ops->handle_exit(vcpu);
5840 out:
5841         return r;
5842 }
5843
5844
5845 static int __vcpu_run(struct kvm_vcpu *vcpu)
5846 {
5847         int r;
5848         struct kvm *kvm = vcpu->kvm;
5849
5850         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5851                 pr_debug("vcpu %d received sipi with vector # %x\n",
5852                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5853                 kvm_lapic_reset(vcpu);
5854                 r = kvm_arch_vcpu_reset(vcpu);
5855                 if (r)
5856                         return r;
5857                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5858         }
5859
5860         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5861
5862         r = 1;
5863         while (r > 0) {
5864                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5865                     !vcpu->arch.apf.halted)
5866                         r = vcpu_enter_guest(vcpu);
5867                 else {
5868                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5869                         kvm_vcpu_block(vcpu);
5870                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5871                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5872                         {
5873                                 switch(vcpu->arch.mp_state) {
5874                                 case KVM_MP_STATE_HALTED:
5875                                         vcpu->arch.mp_state =
5876                                                 KVM_MP_STATE_RUNNABLE;
5877                                 case KVM_MP_STATE_RUNNABLE:
5878                                         vcpu->arch.apf.halted = false;
5879                                         break;
5880                                 case KVM_MP_STATE_SIPI_RECEIVED:
5881                                 default:
5882                                         r = -EINTR;
5883                                         break;
5884                                 }
5885                         }
5886                 }
5887
5888                 if (r <= 0)
5889                         break;
5890
5891                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5892                 if (kvm_cpu_has_pending_timer(vcpu))
5893                         kvm_inject_pending_timer_irqs(vcpu);
5894
5895                 if (dm_request_for_irq_injection(vcpu)) {
5896                         r = -EINTR;
5897                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5898                         ++vcpu->stat.request_irq_exits;
5899                 }
5900
5901                 kvm_check_async_pf_completion(vcpu);
5902
5903                 if (signal_pending(current)) {
5904                         r = -EINTR;
5905                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5906                         ++vcpu->stat.signal_exits;
5907                 }
5908                 if (need_resched()) {
5909                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5910                         kvm_resched(vcpu);
5911                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5912                 }
5913         }
5914
5915         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5916
5917         return r;
5918 }
5919
5920 static int complete_mmio(struct kvm_vcpu *vcpu)
5921 {
5922         struct kvm_run *run = vcpu->run;
5923         int r;
5924
5925         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5926                 return 1;
5927
5928         if (vcpu->mmio_needed) {
5929                 vcpu->mmio_needed = 0;
5930                 if (!vcpu->mmio_is_write)
5931                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5932                                run->mmio.data, 8);
5933                 vcpu->mmio_index += 8;
5934                 if (vcpu->mmio_index < vcpu->mmio_size) {
5935                         run->exit_reason = KVM_EXIT_MMIO;
5936                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5937                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5938                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5939                         run->mmio.is_write = vcpu->mmio_is_write;
5940                         vcpu->mmio_needed = 1;
5941                         return 0;
5942                 }
5943                 if (vcpu->mmio_is_write)
5944                         return 1;
5945                 vcpu->mmio_read_completed = 1;
5946         }
5947         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5948         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5949         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5950         if (r != EMULATE_DONE)
5951                 return 0;
5952         return 1;
5953 }
5954
5955 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5956 {
5957         int r;
5958         sigset_t sigsaved;
5959
5960         if (!tsk_used_math(current) && init_fpu(current))
5961                 return -ENOMEM;
5962
5963         if (vcpu->sigset_active)
5964                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5965
5966         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5967                 kvm_vcpu_block(vcpu);
5968                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5969                 r = -EAGAIN;
5970                 goto out;
5971         }
5972
5973         /* re-sync apic's tpr */
5974         if (!irqchip_in_kernel(vcpu->kvm)) {
5975                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5976                         r = -EINVAL;
5977                         goto out;
5978                 }
5979         }
5980
5981         r = complete_mmio(vcpu);
5982         if (r <= 0)
5983                 goto out;
5984
5985         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5986                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5987                                      kvm_run->hypercall.ret);
5988
5989         r = __vcpu_run(vcpu);
5990
5991 out:
5992         post_kvm_run_save(vcpu);
5993         if (vcpu->sigset_active)
5994                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5995
5996         return r;
5997 }
5998
5999 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6000 {
6001         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6002                 /*
6003                  * We are here if userspace calls get_regs() in the middle of
6004                  * instruction emulation. Registers state needs to be copied
6005                  * back from emulation context to vcpu. Usrapace shouldn't do
6006                  * that usually, but some bad designed PV devices (vmware
6007                  * backdoor interface) need this to work
6008                  */
6009                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6010                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6011                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6012         }
6013         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6014         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6015         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6016         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6017         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6018         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6019         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6020         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6021 #ifdef CONFIG_X86_64
6022         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6023         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6024         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6025         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6026         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6027         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6028         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6029         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6030 #endif
6031
6032         regs->rip = kvm_rip_read(vcpu);
6033         regs->rflags = kvm_get_rflags(vcpu);
6034
6035         return 0;
6036 }
6037
6038 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6039 {
6040         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6041         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6042
6043         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6044         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6045         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6046         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6047         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6048         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6049         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6050         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6051 #ifdef CONFIG_X86_64
6052         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6053         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6054         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6055         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6056         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6057         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6058         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6059         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6060 #endif
6061
6062         kvm_rip_write(vcpu, regs->rip);
6063         kvm_set_rflags(vcpu, regs->rflags);
6064
6065         vcpu->arch.exception.pending = false;
6066
6067         kvm_make_request(KVM_REQ_EVENT, vcpu);
6068
6069         return 0;
6070 }
6071
6072 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6073 {
6074         struct kvm_segment cs;
6075
6076         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6077         *db = cs.db;
6078         *l = cs.l;
6079 }
6080 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6081
6082 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6083                                   struct kvm_sregs *sregs)
6084 {
6085         struct desc_ptr dt;
6086
6087         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6088         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6089         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6090         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6091         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6092         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6093
6094         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6095         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6096
6097         kvm_x86_ops->get_idt(vcpu, &dt);
6098         sregs->idt.limit = dt.size;
6099         sregs->idt.base = dt.address;
6100         kvm_x86_ops->get_gdt(vcpu, &dt);
6101         sregs->gdt.limit = dt.size;
6102         sregs->gdt.base = dt.address;
6103
6104         sregs->cr0 = kvm_read_cr0(vcpu);
6105         sregs->cr2 = vcpu->arch.cr2;
6106         sregs->cr3 = kvm_read_cr3(vcpu);
6107         sregs->cr4 = kvm_read_cr4(vcpu);
6108         sregs->cr8 = kvm_get_cr8(vcpu);
6109         sregs->efer = vcpu->arch.efer;
6110         sregs->apic_base = kvm_get_apic_base(vcpu);
6111
6112         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6113
6114         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6115                 set_bit(vcpu->arch.interrupt.nr,
6116                         (unsigned long *)sregs->interrupt_bitmap);
6117
6118         return 0;
6119 }
6120
6121 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6122                                     struct kvm_mp_state *mp_state)
6123 {
6124         mp_state->mp_state = vcpu->arch.mp_state;
6125         return 0;
6126 }
6127
6128 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6129                                     struct kvm_mp_state *mp_state)
6130 {
6131         vcpu->arch.mp_state = mp_state->mp_state;
6132         kvm_make_request(KVM_REQ_EVENT, vcpu);
6133         return 0;
6134 }
6135
6136 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6137                     bool has_error_code, u32 error_code)
6138 {
6139         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6140         int ret;
6141
6142         init_emulate_ctxt(vcpu);
6143
6144         ret = emulator_task_switch(ctxt, tss_selector, reason,
6145                                    has_error_code, error_code);
6146
6147         if (ret)
6148                 return EMULATE_FAIL;
6149
6150         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6151         kvm_rip_write(vcpu, ctxt->eip);
6152         kvm_set_rflags(vcpu, ctxt->eflags);
6153         kvm_make_request(KVM_REQ_EVENT, vcpu);
6154         return EMULATE_DONE;
6155 }
6156 EXPORT_SYMBOL_GPL(kvm_task_switch);
6157
6158 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6159                                   struct kvm_sregs *sregs)
6160 {
6161         int mmu_reset_needed = 0;
6162         int pending_vec, max_bits, idx;
6163         struct desc_ptr dt;
6164
6165         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6166                 return -EINVAL;
6167
6168         dt.size = sregs->idt.limit;
6169         dt.address = sregs->idt.base;
6170         kvm_x86_ops->set_idt(vcpu, &dt);
6171         dt.size = sregs->gdt.limit;
6172         dt.address = sregs->gdt.base;
6173         kvm_x86_ops->set_gdt(vcpu, &dt);
6174
6175         vcpu->arch.cr2 = sregs->cr2;
6176         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6177         vcpu->arch.cr3 = sregs->cr3;
6178         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6179
6180         kvm_set_cr8(vcpu, sregs->cr8);
6181
6182         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6183         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6184         kvm_set_apic_base(vcpu, sregs->apic_base);
6185
6186         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6187         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6188         vcpu->arch.cr0 = sregs->cr0;
6189
6190         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6191         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6192         if (sregs->cr4 & X86_CR4_OSXSAVE)
6193                 update_cpuid(vcpu);
6194
6195         idx = srcu_read_lock(&vcpu->kvm->srcu);
6196         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6197                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6198                 mmu_reset_needed = 1;
6199         }
6200         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6201
6202         if (mmu_reset_needed)
6203                 kvm_mmu_reset_context(vcpu);
6204
6205         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6206         pending_vec = find_first_bit(
6207                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6208         if (pending_vec < max_bits) {
6209                 kvm_queue_interrupt(vcpu, pending_vec, false);
6210                 pr_debug("Set back pending irq %d\n", pending_vec);
6211         }
6212
6213         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6214         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6215         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6216         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6217         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6218         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6219
6220         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6221         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6222
6223         update_cr8_intercept(vcpu);
6224
6225         /* Older userspace won't unhalt the vcpu on reset. */
6226         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6227             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6228             !is_protmode(vcpu))
6229                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6230
6231         kvm_make_request(KVM_REQ_EVENT, vcpu);
6232
6233         return 0;
6234 }
6235
6236 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6237                                         struct kvm_guest_debug *dbg)
6238 {
6239         unsigned long rflags;
6240         int i, r;
6241
6242         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6243                 r = -EBUSY;
6244                 if (vcpu->arch.exception.pending)
6245                         goto out;
6246                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6247                         kvm_queue_exception(vcpu, DB_VECTOR);
6248                 else
6249                         kvm_queue_exception(vcpu, BP_VECTOR);
6250         }
6251
6252         /*
6253          * Read rflags as long as potentially injected trace flags are still
6254          * filtered out.
6255          */
6256         rflags = kvm_get_rflags(vcpu);
6257
6258         vcpu->guest_debug = dbg->control;
6259         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6260                 vcpu->guest_debug = 0;
6261
6262         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6263                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6264                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6265                 vcpu->arch.switch_db_regs =
6266                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6267         } else {
6268                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6269                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6270                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6271         }
6272
6273         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6274                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6275                         get_segment_base(vcpu, VCPU_SREG_CS);
6276
6277         /*
6278          * Trigger an rflags update that will inject or remove the trace
6279          * flags.
6280          */
6281         kvm_set_rflags(vcpu, rflags);
6282
6283         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6284
6285         r = 0;
6286
6287 out:
6288
6289         return r;
6290 }
6291
6292 /*
6293  * Translate a guest virtual address to a guest physical address.
6294  */
6295 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6296                                     struct kvm_translation *tr)
6297 {
6298         unsigned long vaddr = tr->linear_address;
6299         gpa_t gpa;
6300         int idx;
6301
6302         idx = srcu_read_lock(&vcpu->kvm->srcu);
6303         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6304         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6305         tr->physical_address = gpa;
6306         tr->valid = gpa != UNMAPPED_GVA;
6307         tr->writeable = 1;
6308         tr->usermode = 0;
6309
6310         return 0;
6311 }
6312
6313 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6314 {
6315         struct i387_fxsave_struct *fxsave =
6316                         &vcpu->arch.guest_fpu.state->fxsave;
6317
6318         memcpy(fpu->fpr, fxsave->st_space, 128);
6319         fpu->fcw = fxsave->cwd;
6320         fpu->fsw = fxsave->swd;
6321         fpu->ftwx = fxsave->twd;
6322         fpu->last_opcode = fxsave->fop;
6323         fpu->last_ip = fxsave->rip;
6324         fpu->last_dp = fxsave->rdp;
6325         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6326
6327         return 0;
6328 }
6329
6330 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6331 {
6332         struct i387_fxsave_struct *fxsave =
6333                         &vcpu->arch.guest_fpu.state->fxsave;
6334
6335         memcpy(fxsave->st_space, fpu->fpr, 128);
6336         fxsave->cwd = fpu->fcw;
6337         fxsave->swd = fpu->fsw;
6338         fxsave->twd = fpu->ftwx;
6339         fxsave->fop = fpu->last_opcode;
6340         fxsave->rip = fpu->last_ip;
6341         fxsave->rdp = fpu->last_dp;
6342         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6343
6344         return 0;
6345 }
6346
6347 int fx_init(struct kvm_vcpu *vcpu)
6348 {
6349         int err;
6350
6351         err = fpu_alloc(&vcpu->arch.guest_fpu);
6352         if (err)
6353                 return err;
6354
6355         fpu_finit(&vcpu->arch.guest_fpu);
6356
6357         /*
6358          * Ensure guest xcr0 is valid for loading
6359          */
6360         vcpu->arch.xcr0 = XSTATE_FP;
6361
6362         vcpu->arch.cr0 |= X86_CR0_ET;
6363
6364         return 0;
6365 }
6366 EXPORT_SYMBOL_GPL(fx_init);
6367
6368 static void fx_free(struct kvm_vcpu *vcpu)
6369 {
6370         fpu_free(&vcpu->arch.guest_fpu);
6371 }
6372
6373 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6374 {
6375         if (vcpu->guest_fpu_loaded)
6376                 return;
6377
6378         /*
6379          * Restore all possible states in the guest,
6380          * and assume host would use all available bits.
6381          * Guest xcr0 would be loaded later.
6382          */
6383         vcpu->guest_fpu_loaded = 1;
6384         unlazy_fpu(current);
6385         fpu_restore_checking(&vcpu->arch.guest_fpu);
6386         trace_kvm_fpu(1);
6387 }
6388
6389 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6390 {
6391         if (!vcpu->guest_fpu_loaded)
6392                 return;
6393
6394         vcpu->guest_fpu_loaded = 0;
6395         fpu_save_init(&vcpu->arch.guest_fpu);
6396         ++vcpu->stat.fpu_reload;
6397         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6398         trace_kvm_fpu(0);
6399 }
6400
6401 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6402 {
6403         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
6404
6405         kvmclock_reset(vcpu);
6406
6407         fx_free(vcpu);
6408         kvm_x86_ops->vcpu_free(vcpu);
6409         free_cpumask_var(wbinvd_dirty_mask);
6410 }
6411
6412 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6413                                                 unsigned int id)
6414 {
6415         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6416                 printk_once(KERN_WARNING
6417                 "kvm: SMP vm created on host with unstable TSC; "
6418                 "guest TSC will not be reliable\n");
6419         return kvm_x86_ops->vcpu_create(kvm, id);
6420 }
6421
6422 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6423 {
6424         int r;
6425
6426         vcpu->arch.mtrr_state.have_fixed = 1;
6427         vcpu_load(vcpu);
6428         r = kvm_arch_vcpu_reset(vcpu);
6429         if (r == 0)
6430                 r = kvm_mmu_setup(vcpu);
6431         vcpu_put(vcpu);
6432
6433         return r;
6434 }
6435
6436 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6437 {
6438         vcpu->arch.apf.msr_val = 0;
6439
6440         vcpu_load(vcpu);
6441         kvm_mmu_unload(vcpu);
6442         vcpu_put(vcpu);
6443
6444         fx_free(vcpu);
6445         kvm_x86_ops->vcpu_free(vcpu);
6446 }
6447
6448 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6449 {
6450         atomic_set(&vcpu->arch.nmi_queued, 0);
6451         vcpu->arch.nmi_pending = 0;
6452         vcpu->arch.nmi_injected = false;
6453
6454         vcpu->arch.switch_db_regs = 0;
6455         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6456         vcpu->arch.dr6 = DR6_FIXED_1;
6457         vcpu->arch.dr7 = DR7_FIXED_1;
6458
6459         kvm_make_request(KVM_REQ_EVENT, vcpu);
6460         vcpu->arch.apf.msr_val = 0;
6461         vcpu->arch.st.msr_val = 0;
6462
6463         kvmclock_reset(vcpu);
6464
6465         kvm_clear_async_pf_completion_queue(vcpu);
6466         kvm_async_pf_hash_reset(vcpu);
6467         vcpu->arch.apf.halted = false;
6468
6469         return kvm_x86_ops->vcpu_reset(vcpu);
6470 }
6471
6472 int kvm_arch_hardware_enable(void *garbage)
6473 {
6474         struct kvm *kvm;
6475         struct kvm_vcpu *vcpu;
6476         int i;
6477
6478         kvm_shared_msr_cpu_online();
6479         list_for_each_entry(kvm, &vm_list, vm_list)
6480                 kvm_for_each_vcpu(i, vcpu, kvm)
6481                         if (vcpu->cpu == smp_processor_id())
6482                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6483         return kvm_x86_ops->hardware_enable(garbage);
6484 }
6485
6486 void kvm_arch_hardware_disable(void *garbage)
6487 {
6488         kvm_x86_ops->hardware_disable(garbage);
6489         drop_user_return_notifiers(garbage);
6490 }
6491
6492 int kvm_arch_hardware_setup(void)
6493 {
6494         return kvm_x86_ops->hardware_setup();
6495 }
6496
6497 void kvm_arch_hardware_unsetup(void)
6498 {
6499         kvm_x86_ops->hardware_unsetup();
6500 }
6501
6502 void kvm_arch_check_processor_compat(void *rtn)
6503 {
6504         kvm_x86_ops->check_processor_compatibility(rtn);
6505 }
6506
6507 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6508 {
6509         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6510 }
6511
6512 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6513 {
6514         struct page *page;
6515         struct kvm *kvm;
6516         int r;
6517
6518         BUG_ON(vcpu->kvm == NULL);
6519         kvm = vcpu->kvm;
6520
6521         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6522         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6523         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6524         vcpu->arch.mmu.translate_gpa = translate_gpa;
6525         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6526         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6527                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6528         else
6529                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6530
6531         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6532         if (!page) {
6533                 r = -ENOMEM;
6534                 goto fail;
6535         }
6536         vcpu->arch.pio_data = page_address(page);
6537
6538         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6539
6540         r = kvm_mmu_create(vcpu);
6541         if (r < 0)
6542                 goto fail_free_pio_data;
6543
6544         if (irqchip_in_kernel(kvm)) {
6545                 r = kvm_create_lapic(vcpu);
6546                 if (r < 0)
6547                         goto fail_mmu_destroy;
6548         }
6549
6550         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6551                                        GFP_KERNEL);
6552         if (!vcpu->arch.mce_banks) {
6553                 r = -ENOMEM;
6554                 goto fail_free_lapic;
6555         }
6556         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6557
6558         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6559                 goto fail_free_mce_banks;
6560
6561         vcpu->arch.pv_time_enabled = false;
6562         kvm_async_pf_hash_reset(vcpu);
6563
6564         return 0;
6565 fail_free_mce_banks:
6566         kfree(vcpu->arch.mce_banks);
6567 fail_free_lapic:
6568         kvm_free_lapic(vcpu);
6569 fail_mmu_destroy:
6570         kvm_mmu_destroy(vcpu);
6571 fail_free_pio_data:
6572         free_page((unsigned long)vcpu->arch.pio_data);
6573 fail:
6574         return r;
6575 }
6576
6577 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6578 {
6579         int idx;
6580
6581         kfree(vcpu->arch.mce_banks);
6582         kvm_free_lapic(vcpu);
6583         idx = srcu_read_lock(&vcpu->kvm->srcu);
6584         kvm_mmu_destroy(vcpu);
6585         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6586         free_page((unsigned long)vcpu->arch.pio_data);
6587 }
6588
6589 int kvm_arch_init_vm(struct kvm *kvm)
6590 {
6591         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6592         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6593
6594         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6595         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6596
6597         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6598
6599         return 0;
6600 }
6601
6602 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6603 {
6604         vcpu_load(vcpu);
6605         kvm_mmu_unload(vcpu);
6606         vcpu_put(vcpu);
6607 }
6608
6609 static void kvm_free_vcpus(struct kvm *kvm)
6610 {
6611         unsigned int i;
6612         struct kvm_vcpu *vcpu;
6613
6614         /*
6615          * Unpin any mmu pages first.
6616          */
6617         kvm_for_each_vcpu(i, vcpu, kvm) {
6618                 kvm_clear_async_pf_completion_queue(vcpu);
6619                 kvm_unload_vcpu_mmu(vcpu);
6620         }
6621         kvm_for_each_vcpu(i, vcpu, kvm)
6622                 kvm_arch_vcpu_free(vcpu);
6623
6624         mutex_lock(&kvm->lock);
6625         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6626                 kvm->vcpus[i] = NULL;
6627
6628         atomic_set(&kvm->online_vcpus, 0);
6629         mutex_unlock(&kvm->lock);
6630 }
6631
6632 void kvm_arch_sync_events(struct kvm *kvm)
6633 {
6634         kvm_free_all_assigned_devices(kvm);
6635         kvm_free_pit(kvm);
6636 }
6637
6638 void kvm_arch_destroy_vm(struct kvm *kvm)
6639 {
6640         kvm_iommu_unmap_guest(kvm);
6641         kfree(kvm->arch.vpic);
6642         kfree(kvm->arch.vioapic);
6643         kvm_free_vcpus(kvm);
6644         if (kvm->arch.apic_access_page)
6645                 put_page(kvm->arch.apic_access_page);
6646         if (kvm->arch.ept_identity_pagetable)
6647                 put_page(kvm->arch.ept_identity_pagetable);
6648 }
6649
6650 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6651                                 struct kvm_memory_slot *memslot,
6652                                 struct kvm_memory_slot old,
6653                                 struct kvm_userspace_memory_region *mem,
6654                                 int user_alloc)
6655 {
6656         int npages = memslot->npages;
6657         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6658
6659         /* Prevent internal slot pages from being moved by fork()/COW. */
6660         if (memslot->id >= KVM_MEMORY_SLOTS)
6661                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6662
6663         /*To keep backward compatibility with older userspace,
6664          *x86 needs to hanlde !user_alloc case.
6665          */
6666         if (!user_alloc) {
6667                 if (npages && !old.rmap) {
6668                         unsigned long userspace_addr;
6669
6670                         down_write(&current->mm->mmap_sem);
6671                         userspace_addr = do_mmap(NULL, 0,
6672                                                  npages * PAGE_SIZE,
6673                                                  PROT_READ | PROT_WRITE,
6674                                                  map_flags,
6675                                                  0);
6676                         up_write(&current->mm->mmap_sem);
6677
6678                         if (IS_ERR((void *)userspace_addr))
6679                                 return PTR_ERR((void *)userspace_addr);
6680
6681                         memslot->userspace_addr = userspace_addr;
6682                 }
6683         }
6684
6685
6686         return 0;
6687 }
6688
6689 void kvm_arch_commit_memory_region(struct kvm *kvm,
6690                                 struct kvm_userspace_memory_region *mem,
6691                                 struct kvm_memory_slot old,
6692                                 int user_alloc)
6693 {
6694
6695         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6696
6697         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6698                 int ret;
6699
6700                 down_write(&current->mm->mmap_sem);
6701                 ret = do_munmap(current->mm, old.userspace_addr,
6702                                 old.npages * PAGE_SIZE);
6703                 up_write(&current->mm->mmap_sem);
6704                 if (ret < 0)
6705                         printk(KERN_WARNING
6706                                "kvm_vm_ioctl_set_memory_region: "
6707                                "failed to munmap memory\n");
6708         }
6709
6710         if (!kvm->arch.n_requested_mmu_pages)
6711                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6712
6713         spin_lock(&kvm->mmu_lock);
6714         if (nr_mmu_pages)
6715                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6716         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6717         spin_unlock(&kvm->mmu_lock);
6718 }
6719
6720 void kvm_arch_flush_shadow(struct kvm *kvm)
6721 {
6722         kvm_mmu_zap_all(kvm);
6723         kvm_reload_remote_mmus(kvm);
6724 }
6725
6726 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6727 {
6728         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6729                 !vcpu->arch.apf.halted)
6730                 || !list_empty_careful(&vcpu->async_pf.done)
6731                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6732                 || atomic_read(&vcpu->arch.nmi_queued) ||
6733                 (kvm_arch_interrupt_allowed(vcpu) &&
6734                  kvm_cpu_has_interrupt(vcpu));
6735 }
6736
6737 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6738 {
6739         int me;
6740         int cpu = vcpu->cpu;
6741
6742         if (waitqueue_active(&vcpu->wq)) {
6743                 wake_up_interruptible(&vcpu->wq);
6744                 ++vcpu->stat.halt_wakeup;
6745         }
6746
6747         me = get_cpu();
6748         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6749                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6750                         smp_send_reschedule(cpu);
6751         put_cpu();
6752 }
6753
6754 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6755 {
6756         return kvm_x86_ops->interrupt_allowed(vcpu);
6757 }
6758
6759 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6760 {
6761         unsigned long current_rip = kvm_rip_read(vcpu) +
6762                 get_segment_base(vcpu, VCPU_SREG_CS);
6763
6764         return current_rip == linear_rip;
6765 }
6766 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6767
6768 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6769 {
6770         unsigned long rflags;
6771
6772         rflags = kvm_x86_ops->get_rflags(vcpu);
6773         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6774                 rflags &= ~X86_EFLAGS_TF;
6775         return rflags;
6776 }
6777 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6778
6779 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6780 {
6781         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6782             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6783                 rflags |= X86_EFLAGS_TF;
6784         kvm_x86_ops->set_rflags(vcpu, rflags);
6785         kvm_make_request(KVM_REQ_EVENT, vcpu);
6786 }
6787 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6788
6789 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6790 {
6791         int r;
6792
6793         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6794               is_error_page(work->page))
6795                 return;
6796
6797         r = kvm_mmu_reload(vcpu);
6798         if (unlikely(r))
6799                 return;
6800
6801         if (!vcpu->arch.mmu.direct_map &&
6802               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6803                 return;
6804
6805         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6806 }
6807
6808 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6809 {
6810         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6811 }
6812
6813 static inline u32 kvm_async_pf_next_probe(u32 key)
6814 {
6815         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6816 }
6817
6818 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6819 {
6820         u32 key = kvm_async_pf_hash_fn(gfn);
6821
6822         while (vcpu->arch.apf.gfns[key] != ~0)
6823                 key = kvm_async_pf_next_probe(key);
6824
6825         vcpu->arch.apf.gfns[key] = gfn;
6826 }
6827
6828 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6829 {
6830         int i;
6831         u32 key = kvm_async_pf_hash_fn(gfn);
6832
6833         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6834                      (vcpu->arch.apf.gfns[key] != gfn &&
6835                       vcpu->arch.apf.gfns[key] != ~0); i++)
6836                 key = kvm_async_pf_next_probe(key);
6837
6838         return key;
6839 }
6840
6841 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6842 {
6843         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6844 }
6845
6846 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6847 {
6848         u32 i, j, k;
6849
6850         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6851         while (true) {
6852                 vcpu->arch.apf.gfns[i] = ~0;
6853                 do {
6854                         j = kvm_async_pf_next_probe(j);
6855                         if (vcpu->arch.apf.gfns[j] == ~0)
6856                                 return;
6857                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6858                         /*
6859                          * k lies cyclically in ]i,j]
6860                          * |    i.k.j |
6861                          * |....j i.k.| or  |.k..j i...|
6862                          */
6863                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6864                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6865                 i = j;
6866         }
6867 }
6868
6869 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6870 {
6871
6872         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6873                                       sizeof(val));
6874 }
6875
6876 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6877                                      struct kvm_async_pf *work)
6878 {
6879         struct x86_exception fault;
6880
6881         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6882         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6883
6884         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6885             (vcpu->arch.apf.send_user_only &&
6886              kvm_x86_ops->get_cpl(vcpu) == 0))
6887                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6888         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6889                 fault.vector = PF_VECTOR;
6890                 fault.error_code_valid = true;
6891                 fault.error_code = 0;
6892                 fault.nested_page_fault = false;
6893                 fault.address = work->arch.token;
6894                 kvm_inject_page_fault(vcpu, &fault);
6895         }
6896 }
6897
6898 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6899                                  struct kvm_async_pf *work)
6900 {
6901         struct x86_exception fault;
6902
6903         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6904         if (is_error_page(work->page))
6905                 work->arch.token = ~0; /* broadcast wakeup */
6906         else
6907                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6908
6909         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6910             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6911                 fault.vector = PF_VECTOR;
6912                 fault.error_code_valid = true;
6913                 fault.error_code = 0;
6914                 fault.nested_page_fault = false;
6915                 fault.address = work->arch.token;
6916                 kvm_inject_page_fault(vcpu, &fault);
6917         }
6918         vcpu->arch.apf.halted = false;
6919 }
6920
6921 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6922 {
6923         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6924                 return true;
6925         else
6926                 return !kvm_event_needs_reinjection(vcpu) &&
6927                         kvm_x86_ops->interrupt_allowed(vcpu);
6928 }
6929
6930 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6931 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6932 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6933 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6934 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6935 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6936 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6937 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6938 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6939 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6940 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6941 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);