arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <trace/events/kvm.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include "trace.h"
  50
  51 #include <asm/debugreg.h>
  52 #include <asm/msr.h>
  53 #include <asm/desc.h>
  54 #include <asm/mtrr.h>
  55 #include <asm/mce.h>
  56 #include <asm/i387.h>
  57 #include <asm/xcr.h>
  58 #include <asm/pvclock.h>
  59 #include <asm/div64.h>
  60
  61 #define MAX_IO_MSRS 256
  62 #define CR0_RESERVED_BITS                                               \
  63         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  64                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  65                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  66 #define CR4_RESERVED_BITS                                               \
  67         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  68                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  69                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  70                           | X86_CR4_OSXSAVE \
  71                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  72
  73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  74
  75 #define KVM_MAX_MCE_BANKS 32
  76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  84 #else
  85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  86 #endif
  87
  88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  90
  91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  93                                     struct kvm_cpuid_entry2 __user *entries);
  94
  95 struct kvm_x86_ops *kvm_x86_ops;
  96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  97
  98 int ignore_msrs = 0;
  99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 100
 101 #define KVM_NR_SHARED_MSRS 16
 102
 103 struct kvm_shared_msrs_global {
 104         int nr;
 105         u32 msrs[KVM_NR_SHARED_MSRS];
 106 };
 107
 108 struct kvm_shared_msrs {
 109         struct user_return_notifier urn;
 110         bool registered;
 111         struct kvm_shared_msr_values {
 112                 u64 host;
 113                 u64 curr;
 114         } values[KVM_NR_SHARED_MSRS];
 115 };
 116
 117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 119
 120 struct kvm_stats_debugfs_item debugfs_entries[] = {
 121         { "pf_fixed", VCPU_STAT(pf_fixed) },
 122         { "pf_guest", VCPU_STAT(pf_guest) },
 123         { "tlb_flush", VCPU_STAT(tlb_flush) },
 124         { "invlpg", VCPU_STAT(invlpg) },
 125         { "exits", VCPU_STAT(exits) },
 126         { "io_exits", VCPU_STAT(io_exits) },
 127         { "mmio_exits", VCPU_STAT(mmio_exits) },
 128         { "signal_exits", VCPU_STAT(signal_exits) },
 129         { "irq_window", VCPU_STAT(irq_window_exits) },
 130         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 131         { "halt_exits", VCPU_STAT(halt_exits) },
 132         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 133         { "hypercalls", VCPU_STAT(hypercalls) },
 134         { "request_irq", VCPU_STAT(request_irq_exits) },
 135         { "irq_exits", VCPU_STAT(irq_exits) },
 136         { "host_state_reload", VCPU_STAT(host_state_reload) },
 137         { "efer_reload", VCPU_STAT(efer_reload) },
 138         { "fpu_reload", VCPU_STAT(fpu_reload) },
 139         { "insn_emulation", VCPU_STAT(insn_emulation) },
 140         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 141         { "irq_injections", VCPU_STAT(irq_injections) },
 142         { "nmi_injections", VCPU_STAT(nmi_injections) },
 143         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 144         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 145         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 146         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 147         { "mmu_flooded", VM_STAT(mmu_flooded) },
 148         { "mmu_recycled", VM_STAT(mmu_recycled) },
 149         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 150         { "mmu_unsync", VM_STAT(mmu_unsync) },
 151         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 152         { "largepages", VM_STAT(lpages) },
 153         { NULL }
 154 };
 155
 156 u64 __read_mostly host_xcr0;
 157
 158 static inline u32 bit(int bitno)
 159 {
 160         return 1 << (bitno & 31);
 161 }
 162
 163 static void kvm_on_user_return(struct user_return_notifier *urn)
 164 {
 165         unsigned slot;
 166         struct kvm_shared_msrs *locals
 167                 = container_of(urn, struct kvm_shared_msrs, urn);
 168         struct kvm_shared_msr_values *values;
 169
 170         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 171                 values = &locals->values[slot];
 172                 if (values->host != values->curr) {
 173                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 174                         values->curr = values->host;
 175                 }
 176         }
 177         locals->registered = false;
 178         user_return_notifier_unregister(urn);
 179 }
 180
 181 static void shared_msr_update(unsigned slot, u32 msr)
 182 {
 183         struct kvm_shared_msrs *smsr;
 184         u64 value;
 185
 186         smsr = &__get_cpu_var(shared_msrs);
 187         /* only read, and nobody should modify it at this time,
 188          * so don't need lock */
 189         if (slot >= shared_msrs_global.nr) {
 190                 printk(KERN_ERR "kvm: invalid MSR slot!");
 191                 return;
 192         }
 193         rdmsrl_safe(msr, &value);
 194         smsr->values[slot].host = value;
 195         smsr->values[slot].curr = value;
 196 }
 197
 198 void kvm_define_shared_msr(unsigned slot, u32 msr)
 199 {
 200         if (slot >= shared_msrs_global.nr)
 201                 shared_msrs_global.nr = slot + 1;
 202         shared_msrs_global.msrs[slot] = msr;
 203         /* we need ensured the shared_msr_global have been updated */
 204         smp_wmb();
 205 }
 206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 207
 208 static void kvm_shared_msr_cpu_online(void)
 209 {
 210         unsigned i;
 211
 212         for (i = 0; i < shared_msrs_global.nr; ++i)
 213                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 214 }
 215
 216 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 217 {
 218         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 219
 220         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 221                 return;
 222         smsr->values[slot].curr = value;
 223         wrmsrl(shared_msrs_global.msrs[slot], value);
 224         if (!smsr->registered) {
 225                 smsr->urn.on_user_return = kvm_on_user_return;
 226                 user_return_notifier_register(&smsr->urn);
 227                 smsr->registered = true;
 228         }
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 231
 232 static void drop_user_return_notifiers(void *ignore)
 233 {
 234         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 235
 236         if (smsr->registered)
 237                 kvm_on_user_return(&smsr->urn);
 238 }
 239
 240 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 241 {
 242         if (irqchip_in_kernel(vcpu->kvm))
 243                 return vcpu->arch.apic_base;
 244         else
 245                 return vcpu->arch.apic_base;
 246 }
 247 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 248
 249 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 250 {
 251         /* TODO: reserve bits check */
 252         if (irqchip_in_kernel(vcpu->kvm))
 253                 kvm_lapic_set_base(vcpu, data);
 254         else
 255                 vcpu->arch.apic_base = data;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 258
 259 #define EXCPT_BENIGN            0
 260 #define EXCPT_CONTRIBUTORY      1
 261 #define EXCPT_PF                2
 262
 263 static int exception_class(int vector)
 264 {
 265         switch (vector) {
 266         case PF_VECTOR:
 267                 return EXCPT_PF;
 268         case DE_VECTOR:
 269         case TS_VECTOR:
 270         case NP_VECTOR:
 271         case SS_VECTOR:
 272         case GP_VECTOR:
 273                 return EXCPT_CONTRIBUTORY;
 274         default:
 275                 break;
 276         }
 277         return EXCPT_BENIGN;
 278 }
 279
 280 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 281                 unsigned nr, bool has_error, u32 error_code,
 282                 bool reinject)
 283 {
 284         u32 prev_nr;
 285         int class1, class2;
 286
 287         kvm_make_request(KVM_REQ_EVENT, vcpu);
 288
 289         if (!vcpu->arch.exception.pending) {
 290         queue:
 291                 vcpu->arch.exception.pending = true;
 292                 vcpu->arch.exception.has_error_code = has_error;
 293                 vcpu->arch.exception.nr = nr;
 294                 vcpu->arch.exception.error_code = error_code;
 295                 vcpu->arch.exception.reinject = reinject;
 296                 return;
 297         }
 298
 299         /* to check exception */
 300         prev_nr = vcpu->arch.exception.nr;
 301         if (prev_nr == DF_VECTOR) {
 302                 /* triple fault -> shutdown */
 303                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 304                 return;
 305         }
 306         class1 = exception_class(prev_nr);
 307         class2 = exception_class(nr);
 308         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 309                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 310                 /* generate double fault per SDM Table 5-5 */
 311                 vcpu->arch.exception.pending = true;
 312                 vcpu->arch.exception.has_error_code = true;
 313                 vcpu->arch.exception.nr = DF_VECTOR;
 314                 vcpu->arch.exception.error_code = 0;
 315         } else
 316                 /* replace previous exception with a new one in a hope
 317                    that instruction re-execution will regenerate lost
 318                    exception */
 319                 goto queue;
 320 }
 321
 322 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 323 {
 324         kvm_multiple_exception(vcpu, nr, false, 0, false);
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 327
 328 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, true);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 333
 334 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
 335 {
 336         unsigned error_code = vcpu->arch.fault.error_code;
 337
 338         ++vcpu->stat.pf_guest;
 339         vcpu->arch.cr2 = vcpu->arch.fault.address;
 340         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
 341 }
 342
 343 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
 344 {
 345         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
 346                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
 347         else
 348                 vcpu->arch.mmu.inject_page_fault(vcpu);
 349
 350         vcpu->arch.fault.nested = false;
 351 }
 352
 353 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 354 {
 355         kvm_make_request(KVM_REQ_EVENT, vcpu);
 356         vcpu->arch.nmi_pending = 1;
 357 }
 358 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 359
 360 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 361 {
 362         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 365
 366 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 367 {
 368         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 371
 372 /*
 373  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 374  * a #GP and return false.
 375  */
 376 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 377 {
 378         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 379                 return true;
 380         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 381         return false;
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 384
 385 /*
 386  * This function will be used to read from the physical memory of the currently
 387  * running guest. The difference to kvm_read_guest_page is that this function
 388  * can read from guest physical or from the guest's guest physical memory.
 389  */
 390 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 391                             gfn_t ngfn, void *data, int offset, int len,
 392                             u32 access)
 393 {
 394         gfn_t real_gfn;
 395         gpa_t ngpa;
 396
 397         ngpa     = gfn_to_gpa(ngfn);
 398         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 399         if (real_gfn == UNMAPPED_GVA)
 400                 return -EFAULT;
 401
 402         real_gfn = gpa_to_gfn(real_gfn);
 403
 404         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 405 }
 406 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 407
 408 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 409                                void *data, int offset, int len, u32 access)
 410 {
 411         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 412                                        data, offset, len, access);
 413 }
 414
 415 /*
 416  * Load the pae pdptrs.  Return true is they are all valid.
 417  */
 418 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 419 {
 420         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 421         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 422         int i;
 423         int ret;
 424         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 425
 426         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 427                                       offset * sizeof(u64), sizeof(pdpte),
 428                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 429         if (ret < 0) {
 430                 ret = 0;
 431                 goto out;
 432         }
 433         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 434                 if (is_present_gpte(pdpte[i]) &&
 435                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 436                         ret = 0;
 437                         goto out;
 438                 }
 439         }
 440         ret = 1;
 441
 442         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 443         __set_bit(VCPU_EXREG_PDPTR,
 444                   (unsigned long *)&vcpu->arch.regs_avail);
 445         __set_bit(VCPU_EXREG_PDPTR,
 446                   (unsigned long *)&vcpu->arch.regs_dirty);
 447 out:
 448
 449         return ret;
 450 }
 451 EXPORT_SYMBOL_GPL(load_pdptrs);
 452
 453 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 454 {
 455         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 456         bool changed = true;
 457         int offset;
 458         gfn_t gfn;
 459         int r;
 460
 461         if (is_long_mode(vcpu) || !is_pae(vcpu))
 462                 return false;
 463
 464         if (!test_bit(VCPU_EXREG_PDPTR,
 465                       (unsigned long *)&vcpu->arch.regs_avail))
 466                 return true;
 467
 468         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
 469         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
 470         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 471                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 472         if (r < 0)
 473                 goto out;
 474         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 475 out:
 476
 477         return changed;
 478 }
 479
 480 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 481 {
 482         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 483         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 484                                     X86_CR0_CD | X86_CR0_NW;
 485
 486         cr0 |= X86_CR0_ET;
 487
 488 #ifdef CONFIG_X86_64
 489         if (cr0 & 0xffffffff00000000UL)
 490                 return 1;
 491 #endif
 492
 493         cr0 &= ~CR0_RESERVED_BITS;
 494
 495         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 496                 return 1;
 497
 498         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 499                 return 1;
 500
 501         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 502 #ifdef CONFIG_X86_64
 503                 if ((vcpu->arch.efer & EFER_LME)) {
 504                         int cs_db, cs_l;
 505
 506                         if (!is_pae(vcpu))
 507                                 return 1;
 508                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 509                         if (cs_l)
 510                                 return 1;
 511                 } else
 512 #endif
 513                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 514                                                  vcpu->arch.cr3))
 515                         return 1;
 516         }
 517
 518         kvm_x86_ops->set_cr0(vcpu, cr0);
 519
 520         if ((cr0 ^ old_cr0) & update_bits)
 521                 kvm_mmu_reset_context(vcpu);
 522         return 0;
 523 }
 524 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 525
 526 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 527 {
 528         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 529 }
 530 EXPORT_SYMBOL_GPL(kvm_lmsw);
 531
 532 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 533 {
 534         u64 xcr0;
 535
 536         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 537         if (index != XCR_XFEATURE_ENABLED_MASK)
 538                 return 1;
 539         xcr0 = xcr;
 540         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 541                 return 1;
 542         if (!(xcr0 & XSTATE_FP))
 543                 return 1;
 544         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 545                 return 1;
 546         if (xcr0 & ~host_xcr0)
 547                 return 1;
 548         vcpu->arch.xcr0 = xcr0;
 549         vcpu->guest_xcr0_loaded = 0;
 550         return 0;
 551 }
 552
 553 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 554 {
 555         if (__kvm_set_xcr(vcpu, index, xcr)) {
 556                 kvm_inject_gp(vcpu, 0);
 557                 return 1;
 558         }
 559         return 0;
 560 }
 561 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 562
 563 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 564 {
 565         struct kvm_cpuid_entry2 *best;
 566
 567         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 568         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 569 }
 570
 571 static void update_cpuid(struct kvm_vcpu *vcpu)
 572 {
 573         struct kvm_cpuid_entry2 *best;
 574
 575         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 576         if (!best)
 577                 return;
 578
 579         /* Update OSXSAVE bit */
 580         if (cpu_has_xsave && best->function == 0x1) {
 581                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 582                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 583                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 584         }
 585 }
 586
 587 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 588 {
 589         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 590         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 591
 592         if (cr4 & CR4_RESERVED_BITS)
 593                 return 1;
 594
 595         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 596                 return 1;
 597
 598         if (is_long_mode(vcpu)) {
 599                 if (!(cr4 & X86_CR4_PAE))
 600                         return 1;
 601         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 602                    && ((cr4 ^ old_cr4) & pdptr_bits)
 603                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
 604                 return 1;
 605
 606         if (cr4 & X86_CR4_VMXE)
 607                 return 1;
 608
 609         kvm_x86_ops->set_cr4(vcpu, cr4);
 610
 611         if ((cr4 ^ old_cr4) & pdptr_bits)
 612                 kvm_mmu_reset_context(vcpu);
 613
 614         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 615                 update_cpuid(vcpu);
 616
 617         return 0;
 618 }
 619 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 620
 621 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 622 {
 623         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
 624                 kvm_mmu_sync_roots(vcpu);
 625                 kvm_mmu_flush_tlb(vcpu);
 626                 return 0;
 627         }
 628
 629         if (is_long_mode(vcpu)) {
 630                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 631                         return 1;
 632         } else {
 633                 if (is_pae(vcpu)) {
 634                         if (cr3 & CR3_PAE_RESERVED_BITS)
 635                                 return 1;
 636                         if (is_paging(vcpu) &&
 637                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 638                                 return 1;
 639                 }
 640                 /*
 641                  * We don't check reserved bits in nonpae mode, because
 642                  * this isn't enforced, and VMware depends on this.
 643                  */
 644         }
 645
 646         /*
 647          * Does the new cr3 value map to physical memory? (Note, we
 648          * catch an invalid cr3 even in real-mode, because it would
 649          * cause trouble later on when we turn on paging anyway.)
 650          *
 651          * A real CPU would silently accept an invalid cr3 and would
 652          * attempt to use it - with largely undefined (and often hard
 653          * to debug) behavior on the guest side.
 654          */
 655         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 656                 return 1;
 657         vcpu->arch.cr3 = cr3;
 658         vcpu->arch.mmu.new_cr3(vcpu);
 659         return 0;
 660 }
 661 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 662
 663 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 664 {
 665         if (cr8 & CR8_RESERVED_BITS)
 666                 return 1;
 667         if (irqchip_in_kernel(vcpu->kvm))
 668                 kvm_lapic_set_tpr(vcpu, cr8);
 669         else
 670                 vcpu->arch.cr8 = cr8;
 671         return 0;
 672 }
 673
 674 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 675 {
 676         if (__kvm_set_cr8(vcpu, cr8))
 677                 kvm_inject_gp(vcpu, 0);
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 680
 681 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 682 {
 683         if (irqchip_in_kernel(vcpu->kvm))
 684                 return kvm_lapic_get_cr8(vcpu);
 685         else
 686                 return vcpu->arch.cr8;
 687 }
 688 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 689
 690 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 691 {
 692         switch (dr) {
 693         case 0 ... 3:
 694                 vcpu->arch.db[dr] = val;
 695                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 696                         vcpu->arch.eff_db[dr] = val;
 697                 break;
 698         case 4:
 699                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 700                         return 1; /* #UD */
 701                 /* fall through */
 702         case 6:
 703                 if (val & 0xffffffff00000000ULL)
 704                         return -1; /* #GP */
 705                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 706                 break;
 707         case 5:
 708                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 709                         return 1; /* #UD */
 710                 /* fall through */
 711         default: /* 7 */
 712                 if (val & 0xffffffff00000000ULL)
 713                         return -1; /* #GP */
 714                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 715                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 716                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 717                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 718                 }
 719                 break;
 720         }
 721
 722         return 0;
 723 }
 724
 725 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 726 {
 727         int res;
 728
 729         res = __kvm_set_dr(vcpu, dr, val);
 730         if (res > 0)
 731                 kvm_queue_exception(vcpu, UD_VECTOR);
 732         else if (res < 0)
 733                 kvm_inject_gp(vcpu, 0);
 734
 735         return res;
 736 }
 737 EXPORT_SYMBOL_GPL(kvm_set_dr);
 738
 739 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 740 {
 741         switch (dr) {
 742         case 0 ... 3:
 743                 *val = vcpu->arch.db[dr];
 744                 break;
 745         case 4:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         case 6:
 750                 *val = vcpu->arch.dr6;
 751                 break;
 752         case 5:
 753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                         return 1;
 755                 /* fall through */
 756         default: /* 7 */
 757                 *val = vcpu->arch.dr7;
 758                 break;
 759         }
 760
 761         return 0;
 762 }
 763
 764 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 765 {
 766         if (_kvm_get_dr(vcpu, dr, val)) {
 767                 kvm_queue_exception(vcpu, UD_VECTOR);
 768                 return 1;
 769         }
 770         return 0;
 771 }
 772 EXPORT_SYMBOL_GPL(kvm_get_dr);
 773
 774 /*
 775  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 776  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 777  *
 778  * This list is modified at module load time to reflect the
 779  * capabilities of the host cpu. This capabilities test skips MSRs that are
 780  * kvm-specific. Those are put in the beginning of the list.
 781  */
 782
 783 #define KVM_SAVE_MSRS_BEGIN     7
 784 static u32 msrs_to_save[] = {
 785         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 786         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 787         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 788         HV_X64_MSR_APIC_ASSIST_PAGE,
 789         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 790         MSR_STAR,
 791 #ifdef CONFIG_X86_64
 792         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 793 #endif
 794         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 795 };
 796
 797 static unsigned num_msrs_to_save;
 798
 799 static u32 emulated_msrs[] = {
 800         MSR_IA32_MISC_ENABLE,
 801         MSR_IA32_MCG_STATUS,
 802         MSR_IA32_MCG_CTL,
 803 };
 804
 805 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 806 {
 807         u64 old_efer = vcpu->arch.efer;
 808
 809         if (efer & efer_reserved_bits)
 810                 return 1;
 811
 812         if (is_paging(vcpu)
 813             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 814                 return 1;
 815
 816         if (efer & EFER_FFXSR) {
 817                 struct kvm_cpuid_entry2 *feat;
 818
 819                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 820                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 821                         return 1;
 822         }
 823
 824         if (efer & EFER_SVME) {
 825                 struct kvm_cpuid_entry2 *feat;
 826
 827                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 828                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 829                         return 1;
 830         }
 831
 832         efer &= ~EFER_LMA;
 833         efer |= vcpu->arch.efer & EFER_LMA;
 834
 835         kvm_x86_ops->set_efer(vcpu, efer);
 836
 837         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 838         kvm_mmu_reset_context(vcpu);
 839
 840         /* Update reserved bits */
 841         if ((efer ^ old_efer) & EFER_NX)
 842                 kvm_mmu_reset_context(vcpu);
 843
 844         return 0;
 845 }
 846
 847 void kvm_enable_efer_bits(u64 mask)
 848 {
 849        efer_reserved_bits &= ~mask;
 850 }
 851 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 852
 853
 854 /*
 855  * Writes msr value into into the appropriate "register".
 856  * Returns 0 on success, non-0 otherwise.
 857  * Assumes vcpu_load() was already called.
 858  */
 859 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 860 {
 861         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 862 }
 863
 864 /*
 865  * Adapt set_msr() to msr_io()'s calling convention
 866  */
 867 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 868 {
 869         return kvm_set_msr(vcpu, index, *data);
 870 }
 871
 872 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 873 {
 874         int version;
 875         int r;
 876         struct pvclock_wall_clock wc;
 877         struct timespec boot;
 878
 879         if (!wall_clock)
 880                 return;
 881
 882         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 883         if (r)
 884                 return;
 885
 886         if (version & 1)
 887                 ++version;  /* first time write, random junk */
 888
 889         ++version;
 890
 891         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 892
 893         /*
 894          * The guest calculates current wall clock time by adding
 895          * system time (updated by kvm_write_guest_time below) to the
 896          * wall clock specified here.  guest system time equals host
 897          * system time for us, thus we must fill in host boot time here.
 898          */
 899         getboottime(&boot);
 900
 901         wc.sec = boot.tv_sec;
 902         wc.nsec = boot.tv_nsec;
 903         wc.version = version;
 904
 905         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 906
 907         version++;
 908         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 909 }
 910
 911 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 912 {
 913         uint32_t quotient, remainder;
 914
 915         /* Don't try to replace with do_div(), this one calculates
 916          * "(dividend << 32) / divisor" */
 917         __asm__ ( "divl %4"
 918                   : "=a" (quotient), "=d" (remainder)
 919                   : "0" (0), "1" (dividend), "r" (divisor) );
 920         return quotient;
 921 }
 922
 923 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
 924 {
 925         uint64_t nsecs = 1000000000LL;
 926         int32_t  shift = 0;
 927         uint64_t tps64;
 928         uint32_t tps32;
 929
 930         tps64 = tsc_khz * 1000LL;
 931         while (tps64 > nsecs*2) {
 932                 tps64 >>= 1;
 933                 shift--;
 934         }
 935
 936         tps32 = (uint32_t)tps64;
 937         while (tps32 <= (uint32_t)nsecs) {
 938                 tps32 <<= 1;
 939                 shift++;
 940         }
 941
 942         hv_clock->tsc_shift = shift;
 943         hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
 944
 945         pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
 946                  __func__, tsc_khz, hv_clock->tsc_shift,
 947                  hv_clock->tsc_to_system_mul);
 948 }
 949
 950 static inline u64 get_kernel_ns(void)
 951 {
 952         struct timespec ts;
 953
 954         WARN_ON(preemptible());
 955         ktime_get_ts(&ts);
 956         monotonic_to_bootbased(&ts);
 957         return timespec_to_ns(&ts);
 958 }
 959
 960 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 961
 962 static inline int kvm_tsc_changes_freq(void)
 963 {
 964         int cpu = get_cpu();
 965         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 966                   cpufreq_quick_get(cpu) != 0;
 967         put_cpu();
 968         return ret;
 969 }
 970
 971 static inline u64 nsec_to_cycles(u64 nsec)
 972 {
 973         u64 ret;
 974
 975         WARN_ON(preemptible());
 976         if (kvm_tsc_changes_freq())
 977                 printk_once(KERN_WARNING
 978                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 979         ret = nsec * __get_cpu_var(cpu_tsc_khz);
 980         do_div(ret, USEC_PER_SEC);
 981         return ret;
 982 }
 983
 984 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
 985 {
 986         struct kvm *kvm = vcpu->kvm;
 987         u64 offset, ns, elapsed;
 988         unsigned long flags;
 989         s64 sdiff;
 990
 991         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
 992         offset = data - native_read_tsc();
 993         ns = get_kernel_ns();
 994         elapsed = ns - kvm->arch.last_tsc_nsec;
 995         sdiff = data - kvm->arch.last_tsc_write;
 996         if (sdiff < 0)
 997                 sdiff = -sdiff;
 998
 999         /*
1000          * Special case: close write to TSC within 5 seconds of
1001          * another CPU is interpreted as an attempt to synchronize
1002          * The 5 seconds is to accomodate host load / swapping as
1003          * well as any reset of TSC during the boot process.
1004          *
1005          * In that case, for a reliable TSC, we can match TSC offsets,
1006          * or make a best guest using elapsed value.
1007          */
1008         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1009             elapsed < 5ULL * NSEC_PER_SEC) {
1010                 if (!check_tsc_unstable()) {
1011                         offset = kvm->arch.last_tsc_offset;
1012                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1013                 } else {
1014                         u64 delta = nsec_to_cycles(elapsed);
1015                         offset += delta;
1016                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1017                 }
1018                 ns = kvm->arch.last_tsc_nsec;
1019         }
1020         kvm->arch.last_tsc_nsec = ns;
1021         kvm->arch.last_tsc_write = data;
1022         kvm->arch.last_tsc_offset = offset;
1023         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1024         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1025
1026         /* Reset of TSC must disable overshoot protection below */
1027         vcpu->arch.hv_clock.tsc_timestamp = 0;
1028 }
1029 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1030
1031 static int kvm_write_guest_time(struct kvm_vcpu *v)
1032 {
1033         unsigned long flags;
1034         struct kvm_vcpu_arch *vcpu = &v->arch;
1035         void *shared_kaddr;
1036         unsigned long this_tsc_khz;
1037         s64 kernel_ns, max_kernel_ns;
1038         u64 tsc_timestamp;
1039
1040         if ((!vcpu->time_page))
1041                 return 0;
1042
1043         /* Keep irq disabled to prevent changes to the clock */
1044         local_irq_save(flags);
1045         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1046         kernel_ns = get_kernel_ns();
1047         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1048         local_irq_restore(flags);
1049
1050         if (unlikely(this_tsc_khz == 0)) {
1051                 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1052                 return 1;
1053         }
1054
1055         /*
1056          * Time as measured by the TSC may go backwards when resetting the base
1057          * tsc_timestamp.  The reason for this is that the TSC resolution is
1058          * higher than the resolution of the other clock scales.  Thus, many
1059          * possible measurments of the TSC correspond to one measurement of any
1060          * other clock, and so a spread of values is possible.  This is not a
1061          * problem for the computation of the nanosecond clock; with TSC rates
1062          * around 1GHZ, there can only be a few cycles which correspond to one
1063          * nanosecond value, and any path through this code will inevitably
1064          * take longer than that.  However, with the kernel_ns value itself,
1065          * the precision may be much lower, down to HZ granularity.  If the
1066          * first sampling of TSC against kernel_ns ends in the low part of the
1067          * range, and the second in the high end of the range, we can get:
1068          *
1069          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1070          *
1071          * As the sampling errors potentially range in the thousands of cycles,
1072          * it is possible such a time value has already been observed by the
1073          * guest.  To protect against this, we must compute the system time as
1074          * observed by the guest and ensure the new system time is greater.
1075          */
1076         max_kernel_ns = 0;
1077         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1078                 max_kernel_ns = vcpu->last_guest_tsc -
1079                                 vcpu->hv_clock.tsc_timestamp;
1080                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1081                                     vcpu->hv_clock.tsc_to_system_mul,
1082                                     vcpu->hv_clock.tsc_shift);
1083                 max_kernel_ns += vcpu->last_kernel_ns;
1084         }
1085
1086         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1087                 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
1088                 vcpu->hw_tsc_khz = this_tsc_khz;
1089         }
1090
1091         if (max_kernel_ns > kernel_ns)
1092                 kernel_ns = max_kernel_ns;
1093
1094         /* With all the info we got, fill in the values */
1095         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1096         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1097         vcpu->last_kernel_ns = kernel_ns;
1098         vcpu->hv_clock.flags = 0;
1099
1100         /*
1101          * The interface expects us to write an even number signaling that the
1102          * update is finished. Since the guest won't see the intermediate
1103          * state, we just increase by 2 at the end.
1104          */
1105         vcpu->hv_clock.version += 2;
1106
1107         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1108
1109         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1110                sizeof(vcpu->hv_clock));
1111
1112         kunmap_atomic(shared_kaddr, KM_USER0);
1113
1114         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1115         return 0;
1116 }
1117
1118 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
1119 {
1120         struct kvm_vcpu_arch *vcpu = &v->arch;
1121
1122         if (!vcpu->time_page)
1123                 return 0;
1124         kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE, v);
1125         return 1;
1126 }
1127
1128 static bool msr_mtrr_valid(unsigned msr)
1129 {
1130         switch (msr) {
1131         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1132         case MSR_MTRRfix64K_00000:
1133         case MSR_MTRRfix16K_80000:
1134         case MSR_MTRRfix16K_A0000:
1135         case MSR_MTRRfix4K_C0000:
1136         case MSR_MTRRfix4K_C8000:
1137         case MSR_MTRRfix4K_D0000:
1138         case MSR_MTRRfix4K_D8000:
1139         case MSR_MTRRfix4K_E0000:
1140         case MSR_MTRRfix4K_E8000:
1141         case MSR_MTRRfix4K_F0000:
1142         case MSR_MTRRfix4K_F8000:
1143         case MSR_MTRRdefType:
1144         case MSR_IA32_CR_PAT:
1145                 return true;
1146         case 0x2f8:
1147                 return true;
1148         }
1149         return false;
1150 }
1151
1152 static bool valid_pat_type(unsigned t)
1153 {
1154         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1155 }
1156
1157 static bool valid_mtrr_type(unsigned t)
1158 {
1159         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1160 }
1161
1162 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1163 {
1164         int i;
1165
1166         if (!msr_mtrr_valid(msr))
1167                 return false;
1168
1169         if (msr == MSR_IA32_CR_PAT) {
1170                 for (i = 0; i < 8; i++)
1171                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1172                                 return false;
1173                 return true;
1174         } else if (msr == MSR_MTRRdefType) {
1175                 if (data & ~0xcff)
1176                         return false;
1177                 return valid_mtrr_type(data & 0xff);
1178         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1179                 for (i = 0; i < 8 ; i++)
1180                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1181                                 return false;
1182                 return true;
1183         }
1184
1185         /* variable MTRRs */
1186         return valid_mtrr_type(data & 0xff);
1187 }
1188
1189 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1190 {
1191         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1192
1193         if (!mtrr_valid(vcpu, msr, data))
1194                 return 1;
1195
1196         if (msr == MSR_MTRRdefType) {
1197                 vcpu->arch.mtrr_state.def_type = data;
1198                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1199         } else if (msr == MSR_MTRRfix64K_00000)
1200                 p[0] = data;
1201         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1202                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1203         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1204                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1205         else if (msr == MSR_IA32_CR_PAT)
1206                 vcpu->arch.pat = data;
1207         else {  /* Variable MTRRs */
1208                 int idx, is_mtrr_mask;
1209                 u64 *pt;
1210
1211                 idx = (msr - 0x200) / 2;
1212                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1213                 if (!is_mtrr_mask)
1214                         pt =
1215                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1216                 else
1217                         pt =
1218                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1219                 *pt = data;
1220         }
1221
1222         kvm_mmu_reset_context(vcpu);
1223         return 0;
1224 }
1225
1226 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1227 {
1228         u64 mcg_cap = vcpu->arch.mcg_cap;
1229         unsigned bank_num = mcg_cap & 0xff;
1230
1231         switch (msr) {
1232         case MSR_IA32_MCG_STATUS:
1233                 vcpu->arch.mcg_status = data;
1234                 break;
1235         case MSR_IA32_MCG_CTL:
1236                 if (!(mcg_cap & MCG_CTL_P))
1237                         return 1;
1238                 if (data != 0 && data != ~(u64)0)
1239                         return -1;
1240                 vcpu->arch.mcg_ctl = data;
1241                 break;
1242         default:
1243                 if (msr >= MSR_IA32_MC0_CTL &&
1244                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1245                         u32 offset = msr - MSR_IA32_MC0_CTL;
1246                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1247                          * some Linux kernels though clear bit 10 in bank 4 to
1248                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1249                          * this to avoid an uncatched #GP in the guest
1250                          */
1251                         if ((offset & 0x3) == 0 &&
1252                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1253                                 return -1;
1254                         vcpu->arch.mce_banks[offset] = data;
1255                         break;
1256                 }
1257                 return 1;
1258         }
1259         return 0;
1260 }
1261
1262 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1263 {
1264         struct kvm *kvm = vcpu->kvm;
1265         int lm = is_long_mode(vcpu);
1266         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1267                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1268         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1269                 : kvm->arch.xen_hvm_config.blob_size_32;
1270         u32 page_num = data & ~PAGE_MASK;
1271         u64 page_addr = data & PAGE_MASK;
1272         u8 *page;
1273         int r;
1274
1275         r = -E2BIG;
1276         if (page_num >= blob_size)
1277                 goto out;
1278         r = -ENOMEM;
1279         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1280         if (!page)
1281                 goto out;
1282         r = -EFAULT;
1283         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1284                 goto out_free;
1285         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1286                 goto out_free;
1287         r = 0;
1288 out_free:
1289         kfree(page);
1290 out:
1291         return r;
1292 }
1293
1294 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1295 {
1296         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1297 }
1298
1299 static bool kvm_hv_msr_partition_wide(u32 msr)
1300 {
1301         bool r = false;
1302         switch (msr) {
1303         case HV_X64_MSR_GUEST_OS_ID:
1304         case HV_X64_MSR_HYPERCALL:
1305                 r = true;
1306                 break;
1307         }
1308
1309         return r;
1310 }
1311
1312 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1313 {
1314         struct kvm *kvm = vcpu->kvm;
1315
1316         switch (msr) {
1317         case HV_X64_MSR_GUEST_OS_ID:
1318                 kvm->arch.hv_guest_os_id = data;
1319                 /* setting guest os id to zero disables hypercall page */
1320                 if (!kvm->arch.hv_guest_os_id)
1321                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1322                 break;
1323         case HV_X64_MSR_HYPERCALL: {
1324                 u64 gfn;
1325                 unsigned long addr;
1326                 u8 instructions[4];
1327
1328                 /* if guest os id is not set hypercall should remain disabled */
1329                 if (!kvm->arch.hv_guest_os_id)
1330                         break;
1331                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1332                         kvm->arch.hv_hypercall = data;
1333                         break;
1334                 }
1335                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1336                 addr = gfn_to_hva(kvm, gfn);
1337                 if (kvm_is_error_hva(addr))
1338                         return 1;
1339                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1340                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1341                 if (copy_to_user((void __user *)addr, instructions, 4))
1342                         return 1;
1343                 kvm->arch.hv_hypercall = data;
1344                 break;
1345         }
1346         default:
1347                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1348                           "data 0x%llx\n", msr, data);
1349                 return 1;
1350         }
1351         return 0;
1352 }
1353
1354 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1355 {
1356         switch (msr) {
1357         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1358                 unsigned long addr;
1359
1360                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1361                         vcpu->arch.hv_vapic = data;
1362                         break;
1363                 }
1364                 addr = gfn_to_hva(vcpu->kvm, data >>
1365                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1366                 if (kvm_is_error_hva(addr))
1367                         return 1;
1368                 if (clear_user((void __user *)addr, PAGE_SIZE))
1369                         return 1;
1370                 vcpu->arch.hv_vapic = data;
1371                 break;
1372         }
1373         case HV_X64_MSR_EOI:
1374                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1375         case HV_X64_MSR_ICR:
1376                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1377         case HV_X64_MSR_TPR:
1378                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1379         default:
1380                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1381                           "data 0x%llx\n", msr, data);
1382                 return 1;
1383         }
1384
1385         return 0;
1386 }
1387
1388 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1389 {
1390         switch (msr) {
1391         case MSR_EFER:
1392                 return set_efer(vcpu, data);
1393         case MSR_K7_HWCR:
1394                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1395                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1396                 if (data != 0) {
1397                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1398                                 data);
1399                         return 1;
1400                 }
1401                 break;
1402         case MSR_FAM10H_MMIO_CONF_BASE:
1403                 if (data != 0) {
1404                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1405                                 "0x%llx\n", data);
1406                         return 1;
1407                 }
1408                 break;
1409         case MSR_AMD64_NB_CFG:
1410                 break;
1411         case MSR_IA32_DEBUGCTLMSR:
1412                 if (!data) {
1413                         /* We support the non-activated case already */
1414                         break;
1415                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1416                         /* Values other than LBR and BTF are vendor-specific,
1417                            thus reserved and should throw a #GP */
1418                         return 1;
1419                 }
1420                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1421                         __func__, data);
1422                 break;
1423         case MSR_IA32_UCODE_REV:
1424         case MSR_IA32_UCODE_WRITE:
1425         case MSR_VM_HSAVE_PA:
1426         case MSR_AMD64_PATCH_LOADER:
1427                 break;
1428         case 0x200 ... 0x2ff:
1429                 return set_msr_mtrr(vcpu, msr, data);
1430         case MSR_IA32_APICBASE:
1431                 kvm_set_apic_base(vcpu, data);
1432                 break;
1433         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1434                 return kvm_x2apic_msr_write(vcpu, msr, data);
1435         case MSR_IA32_MISC_ENABLE:
1436                 vcpu->arch.ia32_misc_enable_msr = data;
1437                 break;
1438         case MSR_KVM_WALL_CLOCK_NEW:
1439         case MSR_KVM_WALL_CLOCK:
1440                 vcpu->kvm->arch.wall_clock = data;
1441                 kvm_write_wall_clock(vcpu->kvm, data);
1442                 break;
1443         case MSR_KVM_SYSTEM_TIME_NEW:
1444         case MSR_KVM_SYSTEM_TIME: {
1445                 if (vcpu->arch.time_page) {
1446                         kvm_release_page_dirty(vcpu->arch.time_page);
1447                         vcpu->arch.time_page = NULL;
1448                 }
1449
1450                 vcpu->arch.time = data;
1451
1452                 /* we verify if the enable bit is set... */
1453                 if (!(data & 1))
1454                         break;
1455
1456                 /* ...but clean it before doing the actual write */
1457                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1458
1459                 vcpu->arch.time_page =
1460                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1461
1462                 if (is_error_page(vcpu->arch.time_page)) {
1463                         kvm_release_page_clean(vcpu->arch.time_page);
1464                         vcpu->arch.time_page = NULL;
1465                 }
1466
1467                 kvm_request_guest_time_update(vcpu);
1468                 break;
1469         }
1470         case MSR_IA32_MCG_CTL:
1471         case MSR_IA32_MCG_STATUS:
1472         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1473                 return set_msr_mce(vcpu, msr, data);
1474
1475         /* Performance counters are not protected by a CPUID bit,
1476          * so we should check all of them in the generic path for the sake of
1477          * cross vendor migration.
1478          * Writing a zero into the event select MSRs disables them,
1479          * which we perfectly emulate ;-). Any other value should be at least
1480          * reported, some guests depend on them.
1481          */
1482         case MSR_P6_EVNTSEL0:
1483         case MSR_P6_EVNTSEL1:
1484         case MSR_K7_EVNTSEL0:
1485         case MSR_K7_EVNTSEL1:
1486         case MSR_K7_EVNTSEL2:
1487         case MSR_K7_EVNTSEL3:
1488                 if (data != 0)
1489                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1490                                 "0x%x data 0x%llx\n", msr, data);
1491                 break;
1492         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1493          * so we ignore writes to make it happy.
1494          */
1495         case MSR_P6_PERFCTR0:
1496         case MSR_P6_PERFCTR1:
1497         case MSR_K7_PERFCTR0:
1498         case MSR_K7_PERFCTR1:
1499         case MSR_K7_PERFCTR2:
1500         case MSR_K7_PERFCTR3:
1501                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1502                         "0x%x data 0x%llx\n", msr, data);
1503                 break;
1504         case MSR_K7_CLK_CTL:
1505                 /*
1506                  * Ignore all writes to this no longer documented MSR.
1507                  * Writes are only relevant for old K7 processors,
1508                  * all pre-dating SVM, but a recommended workaround from
1509                  * AMD for these chips. It is possible to speicify the
1510                  * affected processor models on the command line, hence
1511                  * the need to ignore the workaround.
1512                  */
1513                 break;
1514         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1515                 if (kvm_hv_msr_partition_wide(msr)) {
1516                         int r;
1517                         mutex_lock(&vcpu->kvm->lock);
1518                         r = set_msr_hyperv_pw(vcpu, msr, data);
1519                         mutex_unlock(&vcpu->kvm->lock);
1520                         return r;
1521                 } else
1522                         return set_msr_hyperv(vcpu, msr, data);
1523                 break;
1524         default:
1525                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1526                         return xen_hvm_config(vcpu, data);
1527                 if (!ignore_msrs) {
1528                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1529                                 msr, data);
1530                         return 1;
1531                 } else {
1532                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1533                                 msr, data);
1534                         break;
1535                 }
1536         }
1537         return 0;
1538 }
1539 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1540
1541
1542 /*
1543  * Reads an msr value (of 'msr_index') into 'pdata'.
1544  * Returns 0 on success, non-0 otherwise.
1545  * Assumes vcpu_load() was already called.
1546  */
1547 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1548 {
1549         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1550 }
1551
1552 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1553 {
1554         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1555
1556         if (!msr_mtrr_valid(msr))
1557                 return 1;
1558
1559         if (msr == MSR_MTRRdefType)
1560                 *pdata = vcpu->arch.mtrr_state.def_type +
1561                          (vcpu->arch.mtrr_state.enabled << 10);
1562         else if (msr == MSR_MTRRfix64K_00000)
1563                 *pdata = p[0];
1564         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1565                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1566         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1567                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1568         else if (msr == MSR_IA32_CR_PAT)
1569                 *pdata = vcpu->arch.pat;
1570         else {  /* Variable MTRRs */
1571                 int idx, is_mtrr_mask;
1572                 u64 *pt;
1573
1574                 idx = (msr - 0x200) / 2;
1575                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1576                 if (!is_mtrr_mask)
1577                         pt =
1578                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1579                 else
1580                         pt =
1581                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1582                 *pdata = *pt;
1583         }
1584
1585         return 0;
1586 }
1587
1588 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1589 {
1590         u64 data;
1591         u64 mcg_cap = vcpu->arch.mcg_cap;
1592         unsigned bank_num = mcg_cap & 0xff;
1593
1594         switch (msr) {
1595         case MSR_IA32_P5_MC_ADDR:
1596         case MSR_IA32_P5_MC_TYPE:
1597                 data = 0;
1598                 break;
1599         case MSR_IA32_MCG_CAP:
1600                 data = vcpu->arch.mcg_cap;
1601                 break;
1602         case MSR_IA32_MCG_CTL:
1603                 if (!(mcg_cap & MCG_CTL_P))
1604                         return 1;
1605                 data = vcpu->arch.mcg_ctl;
1606                 break;
1607         case MSR_IA32_MCG_STATUS:
1608                 data = vcpu->arch.mcg_status;
1609                 break;
1610         default:
1611                 if (msr >= MSR_IA32_MC0_CTL &&
1612                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1613                         u32 offset = msr - MSR_IA32_MC0_CTL;
1614                         data = vcpu->arch.mce_banks[offset];
1615                         break;
1616                 }
1617                 return 1;
1618         }
1619         *pdata = data;
1620         return 0;
1621 }
1622
1623 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1624 {
1625         u64 data = 0;
1626         struct kvm *kvm = vcpu->kvm;
1627
1628         switch (msr) {
1629         case HV_X64_MSR_GUEST_OS_ID:
1630                 data = kvm->arch.hv_guest_os_id;
1631                 break;
1632         case HV_X64_MSR_HYPERCALL:
1633                 data = kvm->arch.hv_hypercall;
1634                 break;
1635         default:
1636                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1637                 return 1;
1638         }
1639
1640         *pdata = data;
1641         return 0;
1642 }
1643
1644 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1645 {
1646         u64 data = 0;
1647
1648         switch (msr) {
1649         case HV_X64_MSR_VP_INDEX: {
1650                 int r;
1651                 struct kvm_vcpu *v;
1652                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1653                         if (v == vcpu)
1654                                 data = r;
1655                 break;
1656         }
1657         case HV_X64_MSR_EOI:
1658                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1659         case HV_X64_MSR_ICR:
1660                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1661         case HV_X64_MSR_TPR:
1662                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1663         default:
1664                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1665                 return 1;
1666         }
1667         *pdata = data;
1668         return 0;
1669 }
1670
1671 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1672 {
1673         u64 data;
1674
1675         switch (msr) {
1676         case MSR_IA32_PLATFORM_ID:
1677         case MSR_IA32_UCODE_REV:
1678         case MSR_IA32_EBL_CR_POWERON:
1679         case MSR_IA32_DEBUGCTLMSR:
1680         case MSR_IA32_LASTBRANCHFROMIP:
1681         case MSR_IA32_LASTBRANCHTOIP:
1682         case MSR_IA32_LASTINTFROMIP:
1683         case MSR_IA32_LASTINTTOIP:
1684         case MSR_K8_SYSCFG:
1685         case MSR_K7_HWCR:
1686         case MSR_VM_HSAVE_PA:
1687         case MSR_P6_PERFCTR0:
1688         case MSR_P6_PERFCTR1:
1689         case MSR_P6_EVNTSEL0:
1690         case MSR_P6_EVNTSEL1:
1691         case MSR_K7_EVNTSEL0:
1692         case MSR_K7_PERFCTR0:
1693         case MSR_K8_INT_PENDING_MSG:
1694         case MSR_AMD64_NB_CFG:
1695         case MSR_FAM10H_MMIO_CONF_BASE:
1696                 data = 0;
1697                 break;
1698         case MSR_MTRRcap:
1699                 data = 0x500 | KVM_NR_VAR_MTRR;
1700                 break;
1701         case 0x200 ... 0x2ff:
1702                 return get_msr_mtrr(vcpu, msr, pdata);
1703         case 0xcd: /* fsb frequency */
1704                 data = 3;
1705                 break;
1706                 /*
1707                  * MSR_EBC_FREQUENCY_ID
1708                  * Conservative value valid for even the basic CPU models.
1709                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1710                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1711                  * and 266MHz for model 3, or 4. Set Core Clock
1712                  * Frequency to System Bus Frequency Ratio to 1 (bits
1713                  * 31:24) even though these are only valid for CPU
1714                  * models > 2, however guests may end up dividing or
1715                  * multiplying by zero otherwise.
1716                  */
1717         case MSR_EBC_FREQUENCY_ID:
1718                 data = 1 << 24;
1719                 break;
1720         case MSR_IA32_APICBASE:
1721                 data = kvm_get_apic_base(vcpu);
1722                 break;
1723         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1724                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1725                 break;
1726         case MSR_IA32_MISC_ENABLE:
1727                 data = vcpu->arch.ia32_misc_enable_msr;
1728                 break;
1729         case MSR_IA32_PERF_STATUS:
1730                 /* TSC increment by tick */
1731                 data = 1000ULL;
1732                 /* CPU multiplier */
1733                 data |= (((uint64_t)4ULL) << 40);
1734                 break;
1735         case MSR_EFER:
1736                 data = vcpu->arch.efer;
1737                 break;
1738         case MSR_KVM_WALL_CLOCK:
1739         case MSR_KVM_WALL_CLOCK_NEW:
1740                 data = vcpu->kvm->arch.wall_clock;
1741                 break;
1742         case MSR_KVM_SYSTEM_TIME:
1743         case MSR_KVM_SYSTEM_TIME_NEW:
1744                 data = vcpu->arch.time;
1745                 break;
1746         case MSR_IA32_P5_MC_ADDR:
1747         case MSR_IA32_P5_MC_TYPE:
1748         case MSR_IA32_MCG_CAP:
1749         case MSR_IA32_MCG_CTL:
1750         case MSR_IA32_MCG_STATUS:
1751         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1752                 return get_msr_mce(vcpu, msr, pdata);
1753         case MSR_K7_CLK_CTL:
1754                 /*
1755                  * Provide expected ramp-up count for K7. All other
1756                  * are set to zero, indicating minimum divisors for
1757                  * every field.
1758                  *
1759                  * This prevents guest kernels on AMD host with CPU
1760                  * type 6, model 8 and higher from exploding due to
1761                  * the rdmsr failing.
1762                  */
1763                 data = 0x20000000;
1764                 break;
1765         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1766                 if (kvm_hv_msr_partition_wide(msr)) {
1767                         int r;
1768                         mutex_lock(&vcpu->kvm->lock);
1769                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1770                         mutex_unlock(&vcpu->kvm->lock);
1771                         return r;
1772                 } else
1773                         return get_msr_hyperv(vcpu, msr, pdata);
1774                 break;
1775         default:
1776                 if (!ignore_msrs) {
1777                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1778                         return 1;
1779                 } else {
1780                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1781                         data = 0;
1782                 }
1783                 break;
1784         }
1785         *pdata = data;
1786         return 0;
1787 }
1788 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1789
1790 /*
1791  * Read or write a bunch of msrs. All parameters are kernel addresses.
1792  *
1793  * @return number of msrs set successfully.
1794  */
1795 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1796                     struct kvm_msr_entry *entries,
1797                     int (*do_msr)(struct kvm_vcpu *vcpu,
1798                                   unsigned index, u64 *data))
1799 {
1800         int i, idx;
1801
1802         idx = srcu_read_lock(&vcpu->kvm->srcu);
1803         for (i = 0; i < msrs->nmsrs; ++i)
1804                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1805                         break;
1806         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1807
1808         return i;
1809 }
1810
1811 /*
1812  * Read or write a bunch of msrs. Parameters are user addresses.
1813  *
1814  * @return number of msrs set successfully.
1815  */
1816 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1817                   int (*do_msr)(struct kvm_vcpu *vcpu,
1818                                 unsigned index, u64 *data),
1819                   int writeback)
1820 {
1821         struct kvm_msrs msrs;
1822         struct kvm_msr_entry *entries;
1823         int r, n;
1824         unsigned size;
1825
1826         r = -EFAULT;
1827         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1828                 goto out;
1829
1830         r = -E2BIG;
1831         if (msrs.nmsrs >= MAX_IO_MSRS)
1832                 goto out;
1833
1834         r = -ENOMEM;
1835         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1836         entries = kmalloc(size, GFP_KERNEL);
1837         if (!entries)
1838                 goto out;
1839
1840         r = -EFAULT;
1841         if (copy_from_user(entries, user_msrs->entries, size))
1842                 goto out_free;
1843
1844         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1845         if (r < 0)
1846                 goto out_free;
1847
1848         r = -EFAULT;
1849         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1850                 goto out_free;
1851
1852         r = n;
1853
1854 out_free:
1855         kfree(entries);
1856 out:
1857         return r;
1858 }
1859
1860 int kvm_dev_ioctl_check_extension(long ext)
1861 {
1862         int r;
1863
1864         switch (ext) {
1865         case KVM_CAP_IRQCHIP:
1866         case KVM_CAP_HLT:
1867         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1868         case KVM_CAP_SET_TSS_ADDR:
1869         case KVM_CAP_EXT_CPUID:
1870         case KVM_CAP_CLOCKSOURCE:
1871         case KVM_CAP_PIT:
1872         case KVM_CAP_NOP_IO_DELAY:
1873         case KVM_CAP_MP_STATE:
1874         case KVM_CAP_SYNC_MMU:
1875         case KVM_CAP_REINJECT_CONTROL:
1876         case KVM_CAP_IRQ_INJECT_STATUS:
1877         case KVM_CAP_ASSIGN_DEV_IRQ:
1878         case KVM_CAP_IRQFD:
1879         case KVM_CAP_IOEVENTFD:
1880         case KVM_CAP_PIT2:
1881         case KVM_CAP_PIT_STATE2:
1882         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1883         case KVM_CAP_XEN_HVM:
1884         case KVM_CAP_ADJUST_CLOCK:
1885         case KVM_CAP_VCPU_EVENTS:
1886         case KVM_CAP_HYPERV:
1887         case KVM_CAP_HYPERV_VAPIC:
1888         case KVM_CAP_HYPERV_SPIN:
1889         case KVM_CAP_PCI_SEGMENT:
1890         case KVM_CAP_DEBUGREGS:
1891         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1892         case KVM_CAP_XSAVE:
1893                 r = 1;
1894                 break;
1895         case KVM_CAP_COALESCED_MMIO:
1896                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1897                 break;
1898         case KVM_CAP_VAPIC:
1899                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1900                 break;
1901         case KVM_CAP_NR_VCPUS:
1902                 r = KVM_MAX_VCPUS;
1903                 break;
1904         case KVM_CAP_NR_MEMSLOTS:
1905                 r = KVM_MEMORY_SLOTS;
1906                 break;
1907         case KVM_CAP_PV_MMU:    /* obsolete */
1908                 r = 0;
1909                 break;
1910         case KVM_CAP_IOMMU:
1911                 r = iommu_found();
1912                 break;
1913         case KVM_CAP_MCE:
1914                 r = KVM_MAX_MCE_BANKS;
1915                 break;
1916         case KVM_CAP_XCRS:
1917                 r = cpu_has_xsave;
1918                 break;
1919         default:
1920                 r = 0;
1921                 break;
1922         }
1923         return r;
1924
1925 }
1926
1927 long kvm_arch_dev_ioctl(struct file *filp,
1928                         unsigned int ioctl, unsigned long arg)
1929 {
1930         void __user *argp = (void __user *)arg;
1931         long r;
1932
1933         switch (ioctl) {
1934         case KVM_GET_MSR_INDEX_LIST: {
1935                 struct kvm_msr_list __user *user_msr_list = argp;
1936                 struct kvm_msr_list msr_list;
1937                 unsigned n;
1938
1939                 r = -EFAULT;
1940                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1941                         goto out;
1942                 n = msr_list.nmsrs;
1943                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1944                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1945                         goto out;
1946                 r = -E2BIG;
1947                 if (n < msr_list.nmsrs)
1948                         goto out;
1949                 r = -EFAULT;
1950                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1951                                  num_msrs_to_save * sizeof(u32)))
1952                         goto out;
1953                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1954                                  &emulated_msrs,
1955                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1956                         goto out;
1957                 r = 0;
1958                 break;
1959         }
1960         case KVM_GET_SUPPORTED_CPUID: {
1961                 struct kvm_cpuid2 __user *cpuid_arg = argp;
1962                 struct kvm_cpuid2 cpuid;
1963
1964                 r = -EFAULT;
1965                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1966                         goto out;
1967                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1968                                                       cpuid_arg->entries);
1969                 if (r)
1970                         goto out;
1971
1972                 r = -EFAULT;
1973                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1974                         goto out;
1975                 r = 0;
1976                 break;
1977         }
1978         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1979                 u64 mce_cap;
1980
1981                 mce_cap = KVM_MCE_CAP_SUPPORTED;
1982                 r = -EFAULT;
1983                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1984                         goto out;
1985                 r = 0;
1986                 break;
1987         }
1988         default:
1989                 r = -EINVAL;
1990         }
1991 out:
1992         return r;
1993 }
1994
1995 static void wbinvd_ipi(void *garbage)
1996 {
1997         wbinvd();
1998 }
1999
2000 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2001 {
2002         return vcpu->kvm->arch.iommu_domain &&
2003                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2004 }
2005
2006 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2007 {
2008         /* Address WBINVD may be executed by guest */
2009         if (need_emulate_wbinvd(vcpu)) {
2010                 if (kvm_x86_ops->has_wbinvd_exit())
2011                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2012                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2013                         smp_call_function_single(vcpu->cpu,
2014                                         wbinvd_ipi, NULL, 1);
2015         }
2016
2017         kvm_x86_ops->vcpu_load(vcpu, cpu);
2018         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2019                 /* Make sure TSC doesn't go backwards */
2020                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2021                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2022                 if (tsc_delta < 0)
2023                         mark_tsc_unstable("KVM discovered backwards TSC");
2024                 if (check_tsc_unstable())
2025                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2026                 kvm_migrate_timers(vcpu);
2027                 vcpu->cpu = cpu;
2028         }
2029 }
2030
2031 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2032 {
2033         kvm_x86_ops->vcpu_put(vcpu);
2034         kvm_put_guest_fpu(vcpu);
2035         vcpu->arch.last_host_tsc = native_read_tsc();
2036 }
2037
2038 static int is_efer_nx(void)
2039 {
2040         unsigned long long efer = 0;
2041
2042         rdmsrl_safe(MSR_EFER, &efer);
2043         return efer & EFER_NX;
2044 }
2045
2046 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2047 {
2048         int i;
2049         struct kvm_cpuid_entry2 *e, *entry;
2050
2051         entry = NULL;
2052         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2053                 e = &vcpu->arch.cpuid_entries[i];
2054                 if (e->function == 0x80000001) {
2055                         entry = e;
2056                         break;
2057                 }
2058         }
2059         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2060                 entry->edx &= ~(1 << 20);
2061                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2062         }
2063 }
2064
2065 /* when an old userspace process fills a new kernel module */
2066 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2067                                     struct kvm_cpuid *cpuid,
2068                                     struct kvm_cpuid_entry __user *entries)
2069 {
2070         int r, i;
2071         struct kvm_cpuid_entry *cpuid_entries;
2072
2073         r = -E2BIG;
2074         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2075                 goto out;
2076         r = -ENOMEM;
2077         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2078         if (!cpuid_entries)
2079                 goto out;
2080         r = -EFAULT;
2081         if (copy_from_user(cpuid_entries, entries,
2082                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2083                 goto out_free;
2084         for (i = 0; i < cpuid->nent; i++) {
2085                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2086                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2087                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2088                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2089                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2090                 vcpu->arch.cpuid_entries[i].index = 0;
2091                 vcpu->arch.cpuid_entries[i].flags = 0;
2092                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2093                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2094                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2095         }
2096         vcpu->arch.cpuid_nent = cpuid->nent;
2097         cpuid_fix_nx_cap(vcpu);
2098         r = 0;
2099         kvm_apic_set_version(vcpu);
2100         kvm_x86_ops->cpuid_update(vcpu);
2101         update_cpuid(vcpu);
2102
2103 out_free:
2104         vfree(cpuid_entries);
2105 out:
2106         return r;
2107 }
2108
2109 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2110                                      struct kvm_cpuid2 *cpuid,
2111                                      struct kvm_cpuid_entry2 __user *entries)
2112 {
2113         int r;
2114
2115         r = -E2BIG;
2116         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2117                 goto out;
2118         r = -EFAULT;
2119         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2120                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2121                 goto out;
2122         vcpu->arch.cpuid_nent = cpuid->nent;
2123         kvm_apic_set_version(vcpu);
2124         kvm_x86_ops->cpuid_update(vcpu);
2125         update_cpuid(vcpu);
2126         return 0;
2127
2128 out:
2129         return r;
2130 }
2131
2132 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2133                                      struct kvm_cpuid2 *cpuid,
2134                                      struct kvm_cpuid_entry2 __user *entries)
2135 {
2136         int r;
2137
2138         r = -E2BIG;
2139         if (cpuid->nent < vcpu->arch.cpuid_nent)
2140                 goto out;
2141         r = -EFAULT;
2142         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2143                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2144                 goto out;
2145         return 0;
2146
2147 out:
2148         cpuid->nent = vcpu->arch.cpuid_nent;
2149         return r;
2150 }
2151
2152 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2153                            u32 index)
2154 {
2155         entry->function = function;
2156         entry->index = index;
2157         cpuid_count(entry->function, entry->index,
2158                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2159         entry->flags = 0;
2160 }
2161
2162 #define F(x) bit(X86_FEATURE_##x)
2163
2164 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2165                          u32 index, int *nent, int maxnent)
2166 {
2167         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2168 #ifdef CONFIG_X86_64
2169         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2170                                 ? F(GBPAGES) : 0;
2171         unsigned f_lm = F(LM);
2172 #else
2173         unsigned f_gbpages = 0;
2174         unsigned f_lm = 0;
2175 #endif
2176         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2177
2178         /* cpuid 1.edx */
2179         const u32 kvm_supported_word0_x86_features =
2180                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2181                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2182                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2183                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2184                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2185                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2186                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2187                 0 /* HTT, TM, Reserved, PBE */;
2188         /* cpuid 0x80000001.edx */
2189         const u32 kvm_supported_word1_x86_features =
2190                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2191                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2192                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2193                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2194                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2195                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2196                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2197                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2198         /* cpuid 1.ecx */
2199         const u32 kvm_supported_word4_x86_features =
2200                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2201                 0 /* DS-CPL, VMX, SMX, EST */ |
2202                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2203                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2204                 0 /* Reserved, DCA */ | F(XMM4_1) |
2205                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2206                 0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);
2207         /* cpuid 0x80000001.ecx */
2208         const u32 kvm_supported_word6_x86_features =
2209                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2210                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2211                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
2212                 0 /* SKINIT */ | 0 /* WDT */;
2213
2214         /* all calls to cpuid_count() should be made on the same cpu */
2215         get_cpu();
2216         do_cpuid_1_ent(entry, function, index);
2217         ++*nent;
2218
2219         switch (function) {
2220         case 0:
2221                 entry->eax = min(entry->eax, (u32)0xd);
2222                 break;
2223         case 1:
2224                 entry->edx &= kvm_supported_word0_x86_features;
2225                 entry->ecx &= kvm_supported_word4_x86_features;
2226                 /* we support x2apic emulation even if host does not support
2227                  * it since we emulate x2apic in software */
2228                 entry->ecx |= F(X2APIC);
2229                 break;
2230         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2231          * may return different values. This forces us to get_cpu() before
2232          * issuing the first command, and also to emulate this annoying behavior
2233          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2234         case 2: {
2235                 int t, times = entry->eax & 0xff;
2236
2237                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2238                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2239                 for (t = 1; t < times && *nent < maxnent; ++t) {
2240                         do_cpuid_1_ent(&entry[t], function, 0);
2241                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2242                         ++*nent;
2243                 }
2244                 break;
2245         }
2246         /* function 4 and 0xb have additional index. */
2247         case 4: {
2248                 int i, cache_type;
2249
2250                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2251                 /* read more entries until cache_type is zero */
2252                 for (i = 1; *nent < maxnent; ++i) {
2253                         cache_type = entry[i - 1].eax & 0x1f;
2254                         if (!cache_type)
2255                                 break;
2256                         do_cpuid_1_ent(&entry[i], function, i);
2257                         entry[i].flags |=
2258                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2259                         ++*nent;
2260                 }
2261                 break;
2262         }
2263         case 0xb: {
2264                 int i, level_type;
2265
2266                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2267                 /* read more entries until level_type is zero */
2268                 for (i = 1; *nent < maxnent; ++i) {
2269                         level_type = entry[i - 1].ecx & 0xff00;
2270                         if (!level_type)
2271                                 break;
2272                         do_cpuid_1_ent(&entry[i], function, i);
2273                         entry[i].flags |=
2274                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2275                         ++*nent;
2276                 }
2277                 break;
2278         }
2279         case 0xd: {
2280                 int i;
2281
2282                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2283                 for (i = 1; *nent < maxnent; ++i) {
2284                         if (entry[i - 1].eax == 0 && i != 2)
2285                                 break;
2286                         do_cpuid_1_ent(&entry[i], function, i);
2287                         entry[i].flags |=
2288                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2289                         ++*nent;
2290                 }
2291                 break;
2292         }
2293         case KVM_CPUID_SIGNATURE: {
2294                 char signature[12] = "KVMKVMKVM\0\0";
2295                 u32 *sigptr = (u32 *)signature;
2296                 entry->eax = 0;
2297                 entry->ebx = sigptr[0];
2298                 entry->ecx = sigptr[1];
2299                 entry->edx = sigptr[2];
2300                 break;
2301         }
2302         case KVM_CPUID_FEATURES:
2303                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2304                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2305                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2306                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2307                 entry->ebx = 0;
2308                 entry->ecx = 0;
2309                 entry->edx = 0;
2310                 break;
2311         case 0x80000000:
2312                 entry->eax = min(entry->eax, 0x8000001a);
2313                 break;
2314         case 0x80000001:
2315                 entry->edx &= kvm_supported_word1_x86_features;
2316                 entry->ecx &= kvm_supported_word6_x86_features;
2317                 break;
2318         }
2319
2320         kvm_x86_ops->set_supported_cpuid(function, entry);
2321
2322         put_cpu();
2323 }
2324
2325 #undef F
2326
2327 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2328                                      struct kvm_cpuid_entry2 __user *entries)
2329 {
2330         struct kvm_cpuid_entry2 *cpuid_entries;
2331         int limit, nent = 0, r = -E2BIG;
2332         u32 func;
2333
2334         if (cpuid->nent < 1)
2335                 goto out;
2336         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2337                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2338         r = -ENOMEM;
2339         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2340         if (!cpuid_entries)
2341                 goto out;
2342
2343         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2344         limit = cpuid_entries[0].eax;
2345         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2346                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2347                              &nent, cpuid->nent);
2348         r = -E2BIG;
2349         if (nent >= cpuid->nent)
2350                 goto out_free;
2351
2352         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2353         limit = cpuid_entries[nent - 1].eax;
2354         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2355                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2356                              &nent, cpuid->nent);
2357
2358
2359
2360         r = -E2BIG;
2361         if (nent >= cpuid->nent)
2362                 goto out_free;
2363
2364         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2365                      cpuid->nent);
2366
2367         r = -E2BIG;
2368         if (nent >= cpuid->nent)
2369                 goto out_free;
2370
2371         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2372                      cpuid->nent);
2373
2374         r = -E2BIG;
2375         if (nent >= cpuid->nent)
2376                 goto out_free;
2377
2378         r = -EFAULT;
2379         if (copy_to_user(entries, cpuid_entries,
2380                          nent * sizeof(struct kvm_cpuid_entry2)))
2381                 goto out_free;
2382         cpuid->nent = nent;
2383         r = 0;
2384
2385 out_free:
2386         vfree(cpuid_entries);
2387 out:
2388         return r;
2389 }
2390
2391 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2392                                     struct kvm_lapic_state *s)
2393 {
2394         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2395
2396         return 0;
2397 }
2398
2399 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2400                                     struct kvm_lapic_state *s)
2401 {
2402         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2403         kvm_apic_post_state_restore(vcpu);
2404         update_cr8_intercept(vcpu);
2405
2406         return 0;
2407 }
2408
2409 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2410                                     struct kvm_interrupt *irq)
2411 {
2412         if (irq->irq < 0 || irq->irq >= 256)
2413                 return -EINVAL;
2414         if (irqchip_in_kernel(vcpu->kvm))
2415                 return -ENXIO;
2416
2417         kvm_queue_interrupt(vcpu, irq->irq, false);
2418         kvm_make_request(KVM_REQ_EVENT, vcpu);
2419
2420         return 0;
2421 }
2422
2423 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2424 {
2425         kvm_inject_nmi(vcpu);
2426
2427         return 0;
2428 }
2429
2430 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2431                                            struct kvm_tpr_access_ctl *tac)
2432 {
2433         if (tac->flags)
2434                 return -EINVAL;
2435         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2436         return 0;
2437 }
2438
2439 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2440                                         u64 mcg_cap)
2441 {
2442         int r;
2443         unsigned bank_num = mcg_cap & 0xff, bank;
2444
2445         r = -EINVAL;
2446         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2447                 goto out;
2448         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2449                 goto out;
2450         r = 0;
2451         vcpu->arch.mcg_cap = mcg_cap;
2452         /* Init IA32_MCG_CTL to all 1s */
2453         if (mcg_cap & MCG_CTL_P)
2454                 vcpu->arch.mcg_ctl = ~(u64)0;
2455         /* Init IA32_MCi_CTL to all 1s */
2456         for (bank = 0; bank < bank_num; bank++)
2457                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2458 out:
2459         return r;
2460 }
2461
2462 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2463                                       struct kvm_x86_mce *mce)
2464 {
2465         u64 mcg_cap = vcpu->arch.mcg_cap;
2466         unsigned bank_num = mcg_cap & 0xff;
2467         u64 *banks = vcpu->arch.mce_banks;
2468
2469         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2470                 return -EINVAL;
2471         /*
2472          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2473          * reporting is disabled
2474          */
2475         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2476             vcpu->arch.mcg_ctl != ~(u64)0)
2477                 return 0;
2478         banks += 4 * mce->bank;
2479         /*
2480          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2481          * reporting is disabled for the bank
2482          */
2483         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2484                 return 0;
2485         if (mce->status & MCI_STATUS_UC) {
2486                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2487                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2488                         printk(KERN_DEBUG "kvm: set_mce: "
2489                                "injects mce exception while "
2490                                "previous one is in progress!\n");
2491                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2492                         return 0;
2493                 }
2494                 if (banks[1] & MCI_STATUS_VAL)
2495                         mce->status |= MCI_STATUS_OVER;
2496                 banks[2] = mce->addr;
2497                 banks[3] = mce->misc;
2498                 vcpu->arch.mcg_status = mce->mcg_status;
2499                 banks[1] = mce->status;
2500                 kvm_queue_exception(vcpu, MC_VECTOR);
2501         } else if (!(banks[1] & MCI_STATUS_VAL)
2502                    || !(banks[1] & MCI_STATUS_UC)) {
2503                 if (banks[1] & MCI_STATUS_VAL)
2504                         mce->status |= MCI_STATUS_OVER;
2505                 banks[2] = mce->addr;
2506                 banks[3] = mce->misc;
2507                 banks[1] = mce->status;
2508         } else
2509                 banks[1] |= MCI_STATUS_OVER;
2510         return 0;
2511 }
2512
2513 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2514                                                struct kvm_vcpu_events *events)
2515 {
2516         events->exception.injected =
2517                 vcpu->arch.exception.pending &&
2518                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2519         events->exception.nr = vcpu->arch.exception.nr;
2520         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2521         events->exception.error_code = vcpu->arch.exception.error_code;
2522
2523         events->interrupt.injected =
2524                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2525         events->interrupt.nr = vcpu->arch.interrupt.nr;
2526         events->interrupt.soft = 0;
2527         events->interrupt.shadow =
2528                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2529                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2530
2531         events->nmi.injected = vcpu->arch.nmi_injected;
2532         events->nmi.pending = vcpu->arch.nmi_pending;
2533         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2534
2535         events->sipi_vector = vcpu->arch.sipi_vector;
2536
2537         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2538                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2539                          | KVM_VCPUEVENT_VALID_SHADOW);
2540 }
2541
2542 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2543                                               struct kvm_vcpu_events *events)
2544 {
2545         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2546                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2547                               | KVM_VCPUEVENT_VALID_SHADOW))
2548                 return -EINVAL;
2549
2550         vcpu->arch.exception.pending = events->exception.injected;
2551         vcpu->arch.exception.nr = events->exception.nr;
2552         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2553         vcpu->arch.exception.error_code = events->exception.error_code;
2554
2555         vcpu->arch.interrupt.pending = events->interrupt.injected;
2556         vcpu->arch.interrupt.nr = events->interrupt.nr;
2557         vcpu->arch.interrupt.soft = events->interrupt.soft;
2558         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2559                 kvm_pic_clear_isr_ack(vcpu->kvm);
2560         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2561                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2562                                                   events->interrupt.shadow);
2563
2564         vcpu->arch.nmi_injected = events->nmi.injected;
2565         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2566                 vcpu->arch.nmi_pending = events->nmi.pending;
2567         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2568
2569         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2570                 vcpu->arch.sipi_vector = events->sipi_vector;
2571
2572         kvm_make_request(KVM_REQ_EVENT, vcpu);
2573
2574         return 0;
2575 }
2576
2577 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2578                                              struct kvm_debugregs *dbgregs)
2579 {
2580         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2581         dbgregs->dr6 = vcpu->arch.dr6;
2582         dbgregs->dr7 = vcpu->arch.dr7;
2583         dbgregs->flags = 0;
2584 }
2585
2586 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2587                                             struct kvm_debugregs *dbgregs)
2588 {
2589         if (dbgregs->flags)
2590                 return -EINVAL;
2591
2592         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2593         vcpu->arch.dr6 = dbgregs->dr6;
2594         vcpu->arch.dr7 = dbgregs->dr7;
2595
2596         return 0;
2597 }
2598
2599 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2600                                          struct kvm_xsave *guest_xsave)
2601 {
2602         if (cpu_has_xsave)
2603                 memcpy(guest_xsave->region,
2604                         &vcpu->arch.guest_fpu.state->xsave,
2605                         xstate_size);
2606         else {
2607                 memcpy(guest_xsave->region,
2608                         &vcpu->arch.guest_fpu.state->fxsave,
2609                         sizeof(struct i387_fxsave_struct));
2610                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2611                         XSTATE_FPSSE;
2612         }
2613 }
2614
2615 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2616                                         struct kvm_xsave *guest_xsave)
2617 {
2618         u64 xstate_bv =
2619                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2620
2621         if (cpu_has_xsave)
2622                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2623                         guest_xsave->region, xstate_size);
2624         else {
2625                 if (xstate_bv & ~XSTATE_FPSSE)
2626                         return -EINVAL;
2627                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2628                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2629         }
2630         return 0;
2631 }
2632
2633 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2634                                         struct kvm_xcrs *guest_xcrs)
2635 {
2636         if (!cpu_has_xsave) {
2637                 guest_xcrs->nr_xcrs = 0;
2638                 return;
2639         }
2640
2641         guest_xcrs->nr_xcrs = 1;
2642         guest_xcrs->flags = 0;
2643         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2644         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2645 }
2646
2647 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2648                                        struct kvm_xcrs *guest_xcrs)
2649 {
2650         int i, r = 0;
2651
2652         if (!cpu_has_xsave)
2653                 return -EINVAL;
2654
2655         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2656                 return -EINVAL;
2657
2658         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2659                 /* Only support XCR0 currently */
2660                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2661                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2662                                 guest_xcrs->xcrs[0].value);
2663                         break;
2664                 }
2665         if (r)
2666                 r = -EINVAL;
2667         return r;
2668 }
2669
2670 long kvm_arch_vcpu_ioctl(struct file *filp,
2671                          unsigned int ioctl, unsigned long arg)
2672 {
2673         struct kvm_vcpu *vcpu = filp->private_data;
2674         void __user *argp = (void __user *)arg;
2675         int r;
2676         union {
2677                 struct kvm_lapic_state *lapic;
2678                 struct kvm_xsave *xsave;
2679                 struct kvm_xcrs *xcrs;
2680                 void *buffer;
2681         } u;
2682
2683         u.buffer = NULL;
2684         switch (ioctl) {
2685         case KVM_GET_LAPIC: {
2686                 r = -EINVAL;
2687                 if (!vcpu->arch.apic)
2688                         goto out;
2689                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2690
2691                 r = -ENOMEM;
2692                 if (!u.lapic)
2693                         goto out;
2694                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2695                 if (r)
2696                         goto out;
2697                 r = -EFAULT;
2698                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2699                         goto out;
2700                 r = 0;
2701                 break;
2702         }
2703         case KVM_SET_LAPIC: {
2704                 r = -EINVAL;
2705                 if (!vcpu->arch.apic)
2706                         goto out;
2707                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2708                 r = -ENOMEM;
2709                 if (!u.lapic)
2710                         goto out;
2711                 r = -EFAULT;
2712                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2713                         goto out;
2714                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2715                 if (r)
2716                         goto out;
2717                 r = 0;
2718                 break;
2719         }
2720         case KVM_INTERRUPT: {
2721                 struct kvm_interrupt irq;
2722
2723                 r = -EFAULT;
2724                 if (copy_from_user(&irq, argp, sizeof irq))
2725                         goto out;
2726                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2727                 if (r)
2728                         goto out;
2729                 r = 0;
2730                 break;
2731         }
2732         case KVM_NMI: {
2733                 r = kvm_vcpu_ioctl_nmi(vcpu);
2734                 if (r)
2735                         goto out;
2736                 r = 0;
2737                 break;
2738         }
2739         case KVM_SET_CPUID: {
2740                 struct kvm_cpuid __user *cpuid_arg = argp;
2741                 struct kvm_cpuid cpuid;
2742
2743                 r = -EFAULT;
2744                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2745                         goto out;
2746                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2747                 if (r)
2748                         goto out;
2749                 break;
2750         }
2751         case KVM_SET_CPUID2: {
2752                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2753                 struct kvm_cpuid2 cpuid;
2754
2755                 r = -EFAULT;
2756                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2757                         goto out;
2758                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2759                                               cpuid_arg->entries);
2760                 if (r)
2761                         goto out;
2762                 break;
2763         }
2764         case KVM_GET_CPUID2: {
2765                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2766                 struct kvm_cpuid2 cpuid;
2767
2768                 r = -EFAULT;
2769                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2770                         goto out;
2771                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2772                                               cpuid_arg->entries);
2773                 if (r)
2774                         goto out;
2775                 r = -EFAULT;
2776                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2777                         goto out;
2778                 r = 0;
2779                 break;
2780         }
2781         case KVM_GET_MSRS:
2782                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2783                 break;
2784         case KVM_SET_MSRS:
2785                 r = msr_io(vcpu, argp, do_set_msr, 0);
2786                 break;
2787         case KVM_TPR_ACCESS_REPORTING: {
2788                 struct kvm_tpr_access_ctl tac;
2789
2790                 r = -EFAULT;
2791                 if (copy_from_user(&tac, argp, sizeof tac))
2792                         goto out;
2793                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2794                 if (r)
2795                         goto out;
2796                 r = -EFAULT;
2797                 if (copy_to_user(argp, &tac, sizeof tac))
2798                         goto out;
2799                 r = 0;
2800                 break;
2801         };
2802         case KVM_SET_VAPIC_ADDR: {
2803                 struct kvm_vapic_addr va;
2804
2805                 r = -EINVAL;
2806                 if (!irqchip_in_kernel(vcpu->kvm))
2807                         goto out;
2808                 r = -EFAULT;
2809                 if (copy_from_user(&va, argp, sizeof va))
2810                         goto out;
2811                 r = 0;
2812                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2813                 break;
2814         }
2815         case KVM_X86_SETUP_MCE: {
2816                 u64 mcg_cap;
2817
2818                 r = -EFAULT;
2819                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2820                         goto out;
2821                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2822                 break;
2823         }
2824         case KVM_X86_SET_MCE: {
2825                 struct kvm_x86_mce mce;
2826
2827                 r = -EFAULT;
2828                 if (copy_from_user(&mce, argp, sizeof mce))
2829                         goto out;
2830                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2831                 break;
2832         }
2833         case KVM_GET_VCPU_EVENTS: {
2834                 struct kvm_vcpu_events events;
2835
2836                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2837
2838                 r = -EFAULT;
2839                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2840                         break;
2841                 r = 0;
2842                 break;
2843         }
2844         case KVM_SET_VCPU_EVENTS: {
2845                 struct kvm_vcpu_events events;
2846
2847                 r = -EFAULT;
2848                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2849                         break;
2850
2851                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2852                 break;
2853         }
2854         case KVM_GET_DEBUGREGS: {
2855                 struct kvm_debugregs dbgregs;
2856
2857                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2858
2859                 r = -EFAULT;
2860                 if (copy_to_user(argp, &dbgregs,
2861                                  sizeof(struct kvm_debugregs)))
2862                         break;
2863                 r = 0;
2864                 break;
2865         }
2866         case KVM_SET_DEBUGREGS: {
2867                 struct kvm_debugregs dbgregs;
2868
2869                 r = -EFAULT;
2870                 if (copy_from_user(&dbgregs, argp,
2871                                    sizeof(struct kvm_debugregs)))
2872                         break;
2873
2874                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2875                 break;
2876         }
2877         case KVM_GET_XSAVE: {
2878                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2879                 r = -ENOMEM;
2880                 if (!u.xsave)
2881                         break;
2882
2883                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2884
2885                 r = -EFAULT;
2886                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2887                         break;
2888                 r = 0;
2889                 break;
2890         }
2891         case KVM_SET_XSAVE: {
2892                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2893                 r = -ENOMEM;
2894                 if (!u.xsave)
2895                         break;
2896
2897                 r = -EFAULT;
2898                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2899                         break;
2900
2901                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2902                 break;
2903         }
2904         case KVM_GET_XCRS: {
2905                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2906                 r = -ENOMEM;
2907                 if (!u.xcrs)
2908                         break;
2909
2910                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2911
2912                 r = -EFAULT;
2913                 if (copy_to_user(argp, u.xcrs,
2914                                  sizeof(struct kvm_xcrs)))
2915                         break;
2916                 r = 0;
2917                 break;
2918         }
2919         case KVM_SET_XCRS: {
2920                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2921                 r = -ENOMEM;
2922                 if (!u.xcrs)
2923                         break;
2924
2925                 r = -EFAULT;
2926                 if (copy_from_user(u.xcrs, argp,
2927                                    sizeof(struct kvm_xcrs)))
2928                         break;
2929
2930                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2931                 break;
2932         }
2933         default:
2934                 r = -EINVAL;
2935         }
2936 out:
2937         kfree(u.buffer);
2938         return r;
2939 }
2940
2941 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2942 {
2943         int ret;
2944
2945         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2946                 return -1;
2947         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2948         return ret;
2949 }
2950
2951 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2952                                               u64 ident_addr)
2953 {
2954         kvm->arch.ept_identity_map_addr = ident_addr;
2955         return 0;
2956 }
2957
2958 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2959                                           u32 kvm_nr_mmu_pages)
2960 {
2961         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2962                 return -EINVAL;
2963
2964         mutex_lock(&kvm->slots_lock);
2965         spin_lock(&kvm->mmu_lock);
2966
2967         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2968         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2969
2970         spin_unlock(&kvm->mmu_lock);
2971         mutex_unlock(&kvm->slots_lock);
2972         return 0;
2973 }
2974
2975 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2976 {
2977         return kvm->arch.n_max_mmu_pages;
2978 }
2979
2980 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2981 {
2982         int r;
2983
2984         r = 0;
2985         switch (chip->chip_id) {
2986         case KVM_IRQCHIP_PIC_MASTER:
2987                 memcpy(&chip->chip.pic,
2988                         &pic_irqchip(kvm)->pics[0],
2989                         sizeof(struct kvm_pic_state));
2990                 break;
2991         case KVM_IRQCHIP_PIC_SLAVE:
2992                 memcpy(&chip->chip.pic,
2993                         &pic_irqchip(kvm)->pics[1],
2994                         sizeof(struct kvm_pic_state));
2995                 break;
2996         case KVM_IRQCHIP_IOAPIC:
2997                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2998                 break;
2999         default:
3000                 r = -EINVAL;
3001                 break;
3002         }
3003         return r;
3004 }
3005
3006 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3007 {
3008         int r;
3009
3010         r = 0;
3011         switch (chip->chip_id) {
3012         case KVM_IRQCHIP_PIC_MASTER:
3013                 raw_spin_lock(&pic_irqchip(kvm)->lock);
3014                 memcpy(&pic_irqchip(kvm)->pics[0],
3015                         &chip->chip.pic,
3016                         sizeof(struct kvm_pic_state));
3017                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3018                 break;
3019         case KVM_IRQCHIP_PIC_SLAVE:
3020                 raw_spin_lock(&pic_irqchip(kvm)->lock);
3021                 memcpy(&pic_irqchip(kvm)->pics[1],
3022                         &chip->chip.pic,
3023                         sizeof(struct kvm_pic_state));
3024                 raw_spin_unlock(&pic_irqchip(kvm)->lock);
3025                 break;
3026         case KVM_IRQCHIP_IOAPIC:
3027                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3028                 break;
3029         default:
3030                 r = -EINVAL;
3031                 break;
3032         }
3033         kvm_pic_update_irq(pic_irqchip(kvm));
3034         return r;
3035 }
3036
3037 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3038 {
3039         int r = 0;
3040
3041         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3042         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3043         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3044         return r;
3045 }
3046
3047 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3048 {
3049         int r = 0;
3050
3051         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3052         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3053         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3054         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3055         return r;
3056 }
3057
3058 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3059 {
3060         int r = 0;
3061
3062         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3063         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3064                 sizeof(ps->channels));
3065         ps->flags = kvm->arch.vpit->pit_state.flags;
3066         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3067         return r;
3068 }
3069
3070 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3071 {
3072         int r = 0, start = 0;
3073         u32 prev_legacy, cur_legacy;
3074         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3075         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3076         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3077         if (!prev_legacy && cur_legacy)
3078                 start = 1;
3079         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3080                sizeof(kvm->arch.vpit->pit_state.channels));
3081         kvm->arch.vpit->pit_state.flags = ps->flags;
3082         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3083         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3084         return r;
3085 }
3086
3087 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3088                                  struct kvm_reinject_control *control)
3089 {
3090         if (!kvm->arch.vpit)
3091                 return -ENXIO;
3092         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3093         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3094         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3095         return 0;
3096 }
3097
3098 /*
3099  * Get (and clear) the dirty memory log for a memory slot.
3100  */
3101 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3102                                       struct kvm_dirty_log *log)
3103 {
3104         int r, i;
3105         struct kvm_memory_slot *memslot;
3106         unsigned long n;
3107         unsigned long is_dirty = 0;
3108
3109         mutex_lock(&kvm->slots_lock);
3110
3111         r = -EINVAL;
3112         if (log->slot >= KVM_MEMORY_SLOTS)
3113                 goto out;
3114
3115         memslot = &kvm->memslots->memslots[log->slot];
3116         r = -ENOENT;
3117         if (!memslot->dirty_bitmap)
3118                 goto out;
3119
3120         n = kvm_dirty_bitmap_bytes(memslot);
3121
3122         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3123                 is_dirty = memslot->dirty_bitmap[i];
3124
3125         /* If nothing is dirty, don't bother messing with page tables. */
3126         if (is_dirty) {
3127                 struct kvm_memslots *slots, *old_slots;
3128                 unsigned long *dirty_bitmap;
3129
3130                 spin_lock(&kvm->mmu_lock);
3131                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3132                 spin_unlock(&kvm->mmu_lock);
3133
3134                 r = -ENOMEM;
3135                 dirty_bitmap = vmalloc(n);
3136                 if (!dirty_bitmap)
3137                         goto out;
3138                 memset(dirty_bitmap, 0, n);
3139
3140                 r = -ENOMEM;
3141                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3142                 if (!slots) {
3143                         vfree(dirty_bitmap);
3144                         goto out;
3145                 }
3146                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3147                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3148
3149                 old_slots = kvm->memslots;
3150                 rcu_assign_pointer(kvm->memslots, slots);
3151                 synchronize_srcu_expedited(&kvm->srcu);
3152                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3153                 kfree(old_slots);
3154
3155                 r = -EFAULT;
3156                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3157                         vfree(dirty_bitmap);
3158                         goto out;
3159                 }
3160                 vfree(dirty_bitmap);
3161         } else {
3162                 r = -EFAULT;
3163                 if (clear_user(log->dirty_bitmap, n))
3164                         goto out;
3165         }
3166
3167         r = 0;
3168 out:
3169         mutex_unlock(&kvm->slots_lock);
3170         return r;
3171 }
3172
3173 long kvm_arch_vm_ioctl(struct file *filp,
3174                        unsigned int ioctl, unsigned long arg)
3175 {
3176         struct kvm *kvm = filp->private_data;
3177         void __user *argp = (void __user *)arg;
3178         int r = -ENOTTY;
3179         /*
3180          * This union makes it completely explicit to gcc-3.x
3181          * that these two variables' stack usage should be
3182          * combined, not added together.
3183          */
3184         union {
3185                 struct kvm_pit_state ps;
3186                 struct kvm_pit_state2 ps2;
3187                 struct kvm_pit_config pit_config;
3188         } u;
3189
3190         switch (ioctl) {
3191         case KVM_SET_TSS_ADDR:
3192                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3193                 if (r < 0)
3194                         goto out;
3195                 break;
3196         case KVM_SET_IDENTITY_MAP_ADDR: {
3197                 u64 ident_addr;
3198
3199                 r = -EFAULT;
3200                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3201                         goto out;
3202                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3203                 if (r < 0)
3204                         goto out;
3205                 break;
3206         }
3207         case KVM_SET_NR_MMU_PAGES:
3208                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3209                 if (r)
3210                         goto out;
3211                 break;
3212         case KVM_GET_NR_MMU_PAGES:
3213                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3214                 break;
3215         case KVM_CREATE_IRQCHIP: {
3216                 struct kvm_pic *vpic;
3217
3218                 mutex_lock(&kvm->lock);
3219                 r = -EEXIST;
3220                 if (kvm->arch.vpic)
3221                         goto create_irqchip_unlock;
3222                 r = -ENOMEM;
3223                 vpic = kvm_create_pic(kvm);
3224                 if (vpic) {
3225                         r = kvm_ioapic_init(kvm);
3226                         if (r) {
3227                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3228                                                           &vpic->dev);
3229                                 kfree(vpic);
3230                                 goto create_irqchip_unlock;
3231                         }
3232                 } else
3233                         goto create_irqchip_unlock;
3234                 smp_wmb();
3235                 kvm->arch.vpic = vpic;
3236                 smp_wmb();
3237                 r = kvm_setup_default_irq_routing(kvm);
3238                 if (r) {
3239                         mutex_lock(&kvm->irq_lock);
3240                         kvm_ioapic_destroy(kvm);
3241                         kvm_destroy_pic(kvm);
3242                         mutex_unlock(&kvm->irq_lock);
3243                 }
3244         create_irqchip_unlock:
3245                 mutex_unlock(&kvm->lock);
3246                 break;
3247         }
3248         case KVM_CREATE_PIT:
3249                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3250                 goto create_pit;
3251         case KVM_CREATE_PIT2:
3252                 r = -EFAULT;
3253                 if (copy_from_user(&u.pit_config, argp,
3254                                    sizeof(struct kvm_pit_config)))
3255                         goto out;
3256         create_pit:
3257                 mutex_lock(&kvm->slots_lock);
3258                 r = -EEXIST;
3259                 if (kvm->arch.vpit)
3260                         goto create_pit_unlock;
3261                 r = -ENOMEM;
3262                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3263                 if (kvm->arch.vpit)
3264                         r = 0;
3265         create_pit_unlock:
3266                 mutex_unlock(&kvm->slots_lock);
3267                 break;
3268         case KVM_IRQ_LINE_STATUS:
3269         case KVM_IRQ_LINE: {
3270                 struct kvm_irq_level irq_event;
3271
3272                 r = -EFAULT;
3273                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3274                         goto out;
3275                 r = -ENXIO;
3276                 if (irqchip_in_kernel(kvm)) {
3277                         __s32 status;
3278                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3279                                         irq_event.irq, irq_event.level);
3280                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3281                                 r = -EFAULT;
3282                                 irq_event.status = status;
3283                                 if (copy_to_user(argp, &irq_event,
3284                                                         sizeof irq_event))
3285                                         goto out;
3286                         }
3287                         r = 0;
3288                 }
3289                 break;
3290         }
3291         case KVM_GET_IRQCHIP: {
3292                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3293                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3294
3295                 r = -ENOMEM;
3296                 if (!chip)
3297                         goto out;
3298                 r = -EFAULT;
3299                 if (copy_from_user(chip, argp, sizeof *chip))
3300                         goto get_irqchip_out;
3301                 r = -ENXIO;
3302                 if (!irqchip_in_kernel(kvm))
3303                         goto get_irqchip_out;
3304                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3305                 if (r)
3306                         goto get_irqchip_out;
3307                 r = -EFAULT;
3308                 if (copy_to_user(argp, chip, sizeof *chip))
3309                         goto get_irqchip_out;
3310                 r = 0;
3311         get_irqchip_out:
3312                 kfree(chip);
3313                 if (r)
3314                         goto out;
3315                 break;
3316         }
3317         case KVM_SET_IRQCHIP: {
3318                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3319                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3320
3321                 r = -ENOMEM;
3322                 if (!chip)
3323                         goto out;
3324                 r = -EFAULT;
3325                 if (copy_from_user(chip, argp, sizeof *chip))
3326                         goto set_irqchip_out;
3327                 r = -ENXIO;
3328                 if (!irqchip_in_kernel(kvm))
3329                         goto set_irqchip_out;
3330                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3331                 if (r)
3332                         goto set_irqchip_out;
3333                 r = 0;
3334         set_irqchip_out:
3335                 kfree(chip);
3336                 if (r)
3337                         goto out;
3338                 break;
3339         }
3340         case KVM_GET_PIT: {
3341                 r = -EFAULT;
3342                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3343                         goto out;
3344                 r = -ENXIO;
3345                 if (!kvm->arch.vpit)
3346                         goto out;
3347                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3348                 if (r)
3349                         goto out;
3350                 r = -EFAULT;
3351                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3352                         goto out;
3353                 r = 0;
3354                 break;
3355         }
3356         case KVM_SET_PIT: {
3357                 r = -EFAULT;
3358                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3359                         goto out;
3360                 r = -ENXIO;
3361                 if (!kvm->arch.vpit)
3362                         goto out;
3363                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3364                 if (r)
3365                         goto out;
3366                 r = 0;
3367                 break;
3368         }
3369         case KVM_GET_PIT2: {
3370                 r = -ENXIO;
3371                 if (!kvm->arch.vpit)
3372                         goto out;
3373                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3374                 if (r)
3375                         goto out;
3376                 r = -EFAULT;
3377                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3378                         goto out;
3379                 r = 0;
3380                 break;
3381         }
3382         case KVM_SET_PIT2: {
3383                 r = -EFAULT;
3384                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3385                         goto out;
3386                 r = -ENXIO;
3387                 if (!kvm->arch.vpit)
3388                         goto out;
3389                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3390                 if (r)
3391                         goto out;
3392                 r = 0;
3393                 break;
3394         }
3395         case KVM_REINJECT_CONTROL: {
3396                 struct kvm_reinject_control control;
3397                 r =  -EFAULT;
3398                 if (copy_from_user(&control, argp, sizeof(control)))
3399                         goto out;
3400                 r = kvm_vm_ioctl_reinject(kvm, &control);
3401                 if (r)
3402                         goto out;
3403                 r = 0;
3404                 break;
3405         }
3406         case KVM_XEN_HVM_CONFIG: {
3407                 r = -EFAULT;
3408                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3409                                    sizeof(struct kvm_xen_hvm_config)))
3410                         goto out;
3411                 r = -EINVAL;
3412                 if (kvm->arch.xen_hvm_config.flags)
3413                         goto out;
3414                 r = 0;
3415                 break;
3416         }
3417         case KVM_SET_CLOCK: {
3418                 struct kvm_clock_data user_ns;
3419                 u64 now_ns;
3420                 s64 delta;
3421
3422                 r = -EFAULT;
3423                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3424                         goto out;
3425
3426                 r = -EINVAL;
3427                 if (user_ns.flags)
3428                         goto out;
3429
3430                 r = 0;
3431                 now_ns = get_kernel_ns();
3432                 delta = user_ns.clock - now_ns;
3433                 kvm->arch.kvmclock_offset = delta;
3434                 break;
3435         }
3436         case KVM_GET_CLOCK: {
3437                 struct kvm_clock_data user_ns;
3438                 u64 now_ns;
3439
3440                 now_ns = get_kernel_ns();
3441                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3442                 user_ns.flags = 0;
3443
3444                 r = -EFAULT;
3445                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3446                         goto out;
3447                 r = 0;
3448                 break;
3449         }
3450
3451         default:
3452                 ;
3453         }
3454 out:
3455         return r;
3456 }
3457
3458 static void kvm_init_msr_list(void)
3459 {
3460         u32 dummy[2];
3461         unsigned i, j;
3462
3463         /* skip the first msrs in the list. KVM-specific */
3464         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3465                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3466                         continue;
3467                 if (j < i)
3468                         msrs_to_save[j] = msrs_to_save[i];
3469                 j++;
3470         }
3471         num_msrs_to_save = j;
3472 }
3473
3474 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3475                            const void *v)
3476 {
3477         if (vcpu->arch.apic &&
3478             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3479                 return 0;
3480
3481         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3482 }
3483
3484 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3485 {
3486         if (vcpu->arch.apic &&
3487             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3488                 return 0;
3489
3490         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3491 }
3492
3493 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3494                         struct kvm_segment *var, int seg)
3495 {
3496         kvm_x86_ops->set_segment(vcpu, var, seg);
3497 }
3498
3499 void kvm_get_segment(struct kvm_vcpu *vcpu,
3500                      struct kvm_segment *var, int seg)
3501 {
3502         kvm_x86_ops->get_segment(vcpu, var, seg);
3503 }
3504
3505 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3506 {
3507         return gpa;
3508 }
3509
3510 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3511 {
3512         gpa_t t_gpa;
3513         u32 error;
3514
3515         BUG_ON(!mmu_is_nested(vcpu));
3516
3517         /* NPT walks are always user-walks */
3518         access |= PFERR_USER_MASK;
3519         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3520         if (t_gpa == UNMAPPED_GVA)
3521                 vcpu->arch.fault.nested = true;
3522
3523         return t_gpa;
3524 }
3525
3526 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3527 {
3528         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3529         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3530 }
3531
3532  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3533 {
3534         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3535         access |= PFERR_FETCH_MASK;
3536         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3537 }
3538
3539 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3540 {
3541         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3542         access |= PFERR_WRITE_MASK;
3543         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3544 }
3545
3546 /* uses this to access any guest's mapped memory without checking CPL */
3547 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3548 {
3549         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3550 }
3551
3552 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3553                                       struct kvm_vcpu *vcpu, u32 access,
3554                                       u32 *error)
3555 {
3556         void *data = val;
3557         int r = X86EMUL_CONTINUE;
3558
3559         while (bytes) {
3560                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3561                                                             error);
3562                 unsigned offset = addr & (PAGE_SIZE-1);
3563                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3564                 int ret;
3565
3566                 if (gpa == UNMAPPED_GVA) {
3567                         r = X86EMUL_PROPAGATE_FAULT;
3568                         goto out;
3569                 }
3570                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3571                 if (ret < 0) {
3572                         r = X86EMUL_IO_NEEDED;
3573                         goto out;
3574                 }
3575
3576                 bytes -= toread;
3577                 data += toread;
3578                 addr += toread;
3579         }
3580 out:
3581         return r;
3582 }
3583
3584 /* used for instruction fetching */
3585 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3586                                 struct kvm_vcpu *vcpu, u32 *error)
3587 {
3588         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3589         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3590                                           access | PFERR_FETCH_MASK, error);
3591 }
3592
3593 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3594                                struct kvm_vcpu *vcpu, u32 *error)
3595 {
3596         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3597         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3598                                           error);
3599 }
3600
3601 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3602                                struct kvm_vcpu *vcpu, u32 *error)
3603 {
3604         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3605 }
3606
3607 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3608                                        unsigned int bytes,
3609                                        struct kvm_vcpu *vcpu,
3610                                        u32 *error)
3611 {
3612         void *data = val;
3613         int r = X86EMUL_CONTINUE;
3614
3615         while (bytes) {
3616                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3617                                                              PFERR_WRITE_MASK,
3618                                                              error);
3619                 unsigned offset = addr & (PAGE_SIZE-1);
3620                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3621                 int ret;
3622
3623                 if (gpa == UNMAPPED_GVA) {
3624                         r = X86EMUL_PROPAGATE_FAULT;
3625                         goto out;
3626                 }
3627                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3628                 if (ret < 0) {
3629                         r = X86EMUL_IO_NEEDED;
3630                         goto out;
3631                 }
3632
3633                 bytes -= towrite;
3634                 data += towrite;
3635                 addr += towrite;
3636         }
3637 out:
3638         return r;
3639 }
3640
3641 static int emulator_read_emulated(unsigned long addr,
3642                                   void *val,
3643                                   unsigned int bytes,
3644                                   unsigned int *error_code,
3645                                   struct kvm_vcpu *vcpu)
3646 {
3647         gpa_t                 gpa;
3648
3649         if (vcpu->mmio_read_completed) {
3650                 memcpy(val, vcpu->mmio_data, bytes);
3651                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3652                                vcpu->mmio_phys_addr, *(u64 *)val);
3653                 vcpu->mmio_read_completed = 0;
3654                 return X86EMUL_CONTINUE;
3655         }
3656
3657         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3658
3659         if (gpa == UNMAPPED_GVA)
3660                 return X86EMUL_PROPAGATE_FAULT;
3661
3662         /* For APIC access vmexit */
3663         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3664                 goto mmio;
3665
3666         if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3667                                 == X86EMUL_CONTINUE)
3668                 return X86EMUL_CONTINUE;
3669
3670 mmio:
3671         /*
3672          * Is this MMIO handled locally?
3673          */
3674         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3675                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3676                 return X86EMUL_CONTINUE;
3677         }
3678
3679         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3680
3681         vcpu->mmio_needed = 1;
3682         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3683         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3684         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3685         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3686
3687         return X86EMUL_IO_NEEDED;
3688 }
3689
3690 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3691                           const void *val, int bytes)
3692 {
3693         int ret;
3694
3695         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3696         if (ret < 0)
3697                 return 0;
3698         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3699         return 1;
3700 }
3701
3702 static int emulator_write_emulated_onepage(unsigned long addr,
3703                                            const void *val,
3704                                            unsigned int bytes,
3705                                            unsigned int *error_code,
3706                                            struct kvm_vcpu *vcpu)
3707 {
3708         gpa_t                 gpa;
3709
3710         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3711
3712         if (gpa == UNMAPPED_GVA)
3713                 return X86EMUL_PROPAGATE_FAULT;
3714
3715         /* For APIC access vmexit */
3716         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3717                 goto mmio;
3718
3719         if (emulator_write_phys(vcpu, gpa, val, bytes))
3720                 return X86EMUL_CONTINUE;
3721
3722 mmio:
3723         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3724         /*
3725          * Is this MMIO handled locally?
3726          */
3727         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3728                 return X86EMUL_CONTINUE;
3729
3730         vcpu->mmio_needed = 1;
3731         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3732         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3733         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3734         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3735         memcpy(vcpu->run->mmio.data, val, bytes);
3736
3737         return X86EMUL_CONTINUE;
3738 }
3739
3740 int emulator_write_emulated(unsigned long addr,
3741                             const void *val,
3742                             unsigned int bytes,
3743                             unsigned int *error_code,
3744                             struct kvm_vcpu *vcpu)
3745 {
3746         /* Crossing a page boundary? */
3747         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3748                 int rc, now;
3749
3750                 now = -addr & ~PAGE_MASK;
3751                 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3752                                                      vcpu);
3753                 if (rc != X86EMUL_CONTINUE)
3754                         return rc;
3755                 addr += now;
3756                 val += now;
3757                 bytes -= now;
3758         }
3759         return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3760                                                vcpu);
3761 }
3762
3763 #define CMPXCHG_TYPE(t, ptr, old, new) \
3764         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3765
3766 #ifdef CONFIG_X86_64
3767 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3768 #else
3769 #  define CMPXCHG64(ptr, old, new) \
3770         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3771 #endif
3772
3773 static int emulator_cmpxchg_emulated(unsigned long addr,
3774                                      const void *old,
3775                                      const void *new,
3776                                      unsigned int bytes,
3777                                      unsigned int *error_code,
3778                                      struct kvm_vcpu *vcpu)
3779 {
3780         gpa_t gpa;
3781         struct page *page;
3782         char *kaddr;
3783         bool exchanged;
3784
3785         /* guests cmpxchg8b have to be emulated atomically */
3786         if (bytes > 8 || (bytes & (bytes - 1)))
3787                 goto emul_write;
3788
3789         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3790
3791         if (gpa == UNMAPPED_GVA ||
3792             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3793                 goto emul_write;
3794
3795         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3796                 goto emul_write;
3797
3798         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3799         if (is_error_page(page)) {
3800                 kvm_release_page_clean(page);
3801                 goto emul_write;
3802         }
3803
3804         kaddr = kmap_atomic(page, KM_USER0);
3805         kaddr += offset_in_page(gpa);
3806         switch (bytes) {
3807         case 1:
3808                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3809                 break;
3810         case 2:
3811                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3812                 break;
3813         case 4:
3814                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3815                 break;
3816         case 8:
3817                 exchanged = CMPXCHG64(kaddr, old, new);
3818                 break;
3819         default:
3820                 BUG();
3821         }
3822         kunmap_atomic(kaddr, KM_USER0);
3823         kvm_release_page_dirty(page);
3824
3825         if (!exchanged)
3826                 return X86EMUL_CMPXCHG_FAILED;
3827
3828         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3829
3830         return X86EMUL_CONTINUE;
3831
3832 emul_write:
3833         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3834
3835         return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3836 }
3837
3838 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3839 {
3840         /* TODO: String I/O for in kernel device */
3841         int r;
3842
3843         if (vcpu->arch.pio.in)
3844                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3845                                     vcpu->arch.pio.size, pd);
3846         else
3847                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3848                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3849                                      pd);
3850         return r;
3851 }
3852
3853
3854 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3855                              unsigned int count, struct kvm_vcpu *vcpu)
3856 {
3857         if (vcpu->arch.pio.count)
3858                 goto data_avail;
3859
3860         trace_kvm_pio(0, port, size, 1);
3861
3862         vcpu->arch.pio.port = port;
3863         vcpu->arch.pio.in = 1;
3864         vcpu->arch.pio.count  = count;
3865         vcpu->arch.pio.size = size;
3866
3867         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3868         data_avail:
3869                 memcpy(val, vcpu->arch.pio_data, size * count);
3870                 vcpu->arch.pio.count = 0;
3871                 return 1;
3872         }
3873
3874         vcpu->run->exit_reason = KVM_EXIT_IO;
3875         vcpu->run->io.direction = KVM_EXIT_IO_IN;
3876         vcpu->run->io.size = size;
3877         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3878         vcpu->run->io.count = count;
3879         vcpu->run->io.port = port;
3880
3881         return 0;
3882 }
3883
3884 static int emulator_pio_out_emulated(int size, unsigned short port,
3885                               const void *val, unsigned int count,
3886                               struct kvm_vcpu *vcpu)
3887 {
3888         trace_kvm_pio(1, port, size, 1);
3889
3890         vcpu->arch.pio.port = port;
3891         vcpu->arch.pio.in = 0;
3892         vcpu->arch.pio.count = count;
3893         vcpu->arch.pio.size = size;
3894
3895         memcpy(vcpu->arch.pio_data, val, size * count);
3896
3897         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3898                 vcpu->arch.pio.count = 0;
3899                 return 1;
3900         }
3901
3902         vcpu->run->exit_reason = KVM_EXIT_IO;
3903         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3904         vcpu->run->io.size = size;
3905         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3906         vcpu->run->io.count = count;
3907         vcpu->run->io.port = port;
3908
3909         return 0;
3910 }
3911
3912 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3913 {
3914         return kvm_x86_ops->get_segment_base(vcpu, seg);
3915 }
3916
3917 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3918 {
3919         kvm_mmu_invlpg(vcpu, address);
3920         return X86EMUL_CONTINUE;
3921 }
3922
3923 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3924 {
3925         if (!need_emulate_wbinvd(vcpu))
3926                 return X86EMUL_CONTINUE;
3927
3928         if (kvm_x86_ops->has_wbinvd_exit()) {
3929                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3930                                 wbinvd_ipi, NULL, 1);
3931                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3932         }
3933         wbinvd();
3934         return X86EMUL_CONTINUE;
3935 }
3936 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3937
3938 int emulate_clts(struct kvm_vcpu *vcpu)
3939 {
3940         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3941         kvm_x86_ops->fpu_activate(vcpu);
3942         return X86EMUL_CONTINUE;
3943 }
3944
3945 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3946 {
3947         return _kvm_get_dr(vcpu, dr, dest);
3948 }
3949
3950 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
3951 {
3952
3953         return __kvm_set_dr(vcpu, dr, value);
3954 }
3955
3956 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3957 {
3958         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3959 }
3960
3961 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
3962 {
3963         unsigned long value;
3964
3965         switch (cr) {
3966         case 0:
3967                 value = kvm_read_cr0(vcpu);
3968                 break;
3969         case 2:
3970                 value = vcpu->arch.cr2;
3971                 break;
3972         case 3:
3973                 value = vcpu->arch.cr3;
3974                 break;
3975         case 4:
3976                 value = kvm_read_cr4(vcpu);
3977                 break;
3978         case 8:
3979                 value = kvm_get_cr8(vcpu);
3980                 break;
3981         default:
3982                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3983                 return 0;
3984         }
3985
3986         return value;
3987 }
3988
3989 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
3990 {
3991         int res = 0;
3992
3993         switch (cr) {
3994         case 0:
3995                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
3996                 break;
3997         case 2:
3998                 vcpu->arch.cr2 = val;
3999                 break;
4000         case 3:
4001                 res = kvm_set_cr3(vcpu, val);
4002                 break;
4003         case 4:
4004                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4005                 break;
4006         case 8:
4007                 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4008                 break;
4009         default:
4010                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4011                 res = -1;
4012         }
4013
4014         return res;
4015 }
4016
4017 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4018 {
4019         return kvm_x86_ops->get_cpl(vcpu);
4020 }
4021
4022 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4023 {
4024         kvm_x86_ops->get_gdt(vcpu, dt);
4025 }
4026
4027 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4028 {
4029         kvm_x86_ops->get_idt(vcpu, dt);
4030 }
4031
4032 static unsigned long emulator_get_cached_segment_base(int seg,
4033                                                       struct kvm_vcpu *vcpu)
4034 {
4035         return get_segment_base(vcpu, seg);
4036 }
4037
4038 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4039                                            struct kvm_vcpu *vcpu)
4040 {
4041         struct kvm_segment var;
4042
4043         kvm_get_segment(vcpu, &var, seg);
4044
4045         if (var.unusable)
4046                 return false;
4047
4048         if (var.g)
4049                 var.limit >>= 12;
4050         set_desc_limit(desc, var.limit);
4051         set_desc_base(desc, (unsigned long)var.base);
4052         desc->type = var.type;
4053         desc->s = var.s;
4054         desc->dpl = var.dpl;
4055         desc->p = var.present;
4056         desc->avl = var.avl;
4057         desc->l = var.l;
4058         desc->d = var.db;
4059         desc->g = var.g;
4060
4061         return true;
4062 }
4063
4064 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4065                                            struct kvm_vcpu *vcpu)
4066 {
4067         struct kvm_segment var;
4068
4069         /* needed to preserve selector */
4070         kvm_get_segment(vcpu, &var, seg);
4071
4072         var.base = get_desc_base(desc);
4073         var.limit = get_desc_limit(desc);
4074         if (desc->g)
4075                 var.limit = (var.limit << 12) | 0xfff;
4076         var.type = desc->type;
4077         var.present = desc->p;
4078         var.dpl = desc->dpl;
4079         var.db = desc->d;
4080         var.s = desc->s;
4081         var.l = desc->l;
4082         var.g = desc->g;
4083         var.avl = desc->avl;
4084         var.present = desc->p;
4085         var.unusable = !var.present;
4086         var.padding = 0;
4087
4088         kvm_set_segment(vcpu, &var, seg);
4089         return;
4090 }
4091
4092 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4093 {
4094         struct kvm_segment kvm_seg;
4095
4096         kvm_get_segment(vcpu, &kvm_seg, seg);
4097         return kvm_seg.selector;
4098 }
4099
4100 static void emulator_set_segment_selector(u16 sel, int seg,
4101                                           struct kvm_vcpu *vcpu)
4102 {
4103         struct kvm_segment kvm_seg;
4104
4105         kvm_get_segment(vcpu, &kvm_seg, seg);
4106         kvm_seg.selector = sel;
4107         kvm_set_segment(vcpu, &kvm_seg, seg);
4108 }
4109
4110 static struct x86_emulate_ops emulate_ops = {
4111         .read_std            = kvm_read_guest_virt_system,
4112         .write_std           = kvm_write_guest_virt_system,
4113         .fetch               = kvm_fetch_guest_virt,
4114         .read_emulated       = emulator_read_emulated,
4115         .write_emulated      = emulator_write_emulated,
4116         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4117         .pio_in_emulated     = emulator_pio_in_emulated,
4118         .pio_out_emulated    = emulator_pio_out_emulated,
4119         .get_cached_descriptor = emulator_get_cached_descriptor,
4120         .set_cached_descriptor = emulator_set_cached_descriptor,
4121         .get_segment_selector = emulator_get_segment_selector,
4122         .set_segment_selector = emulator_set_segment_selector,
4123         .get_cached_segment_base = emulator_get_cached_segment_base,
4124         .get_gdt             = emulator_get_gdt,
4125         .get_idt             = emulator_get_idt,
4126         .get_cr              = emulator_get_cr,
4127         .set_cr              = emulator_set_cr,
4128         .cpl                 = emulator_get_cpl,
4129         .get_dr              = emulator_get_dr,
4130         .set_dr              = emulator_set_dr,
4131         .set_msr             = kvm_set_msr,
4132         .get_msr             = kvm_get_msr,
4133 };
4134
4135 static void cache_all_regs(struct kvm_vcpu *vcpu)
4136 {
4137         kvm_register_read(vcpu, VCPU_REGS_RAX);
4138         kvm_register_read(vcpu, VCPU_REGS_RSP);
4139         kvm_register_read(vcpu, VCPU_REGS_RIP);
4140         vcpu->arch.regs_dirty = ~0;
4141 }
4142
4143 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4144 {
4145         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4146         /*
4147          * an sti; sti; sequence only disable interrupts for the first
4148          * instruction. So, if the last instruction, be it emulated or
4149          * not, left the system with the INT_STI flag enabled, it
4150          * means that the last instruction is an sti. We should not
4151          * leave the flag on in this case. The same goes for mov ss
4152          */
4153         if (!(int_shadow & mask))
4154                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4155 }
4156
4157 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4158 {
4159         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4160         if (ctxt->exception == PF_VECTOR)
4161                 kvm_propagate_fault(vcpu);
4162         else if (ctxt->error_code_valid)
4163                 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4164         else
4165                 kvm_queue_exception(vcpu, ctxt->exception);
4166 }
4167
4168 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4169 {
4170         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4171         int cs_db, cs_l;
4172
4173         cache_all_regs(vcpu);
4174
4175         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4176
4177         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4178         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4179         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4180         vcpu->arch.emulate_ctxt.mode =
4181                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4182                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4183                 ? X86EMUL_MODE_VM86 : cs_l
4184                 ? X86EMUL_MODE_PROT64 : cs_db
4185                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4186         memset(c, 0, sizeof(struct decode_cache));
4187         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4188 }
4189
4190 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4191 {
4192         ++vcpu->stat.insn_emulation_fail;
4193         trace_kvm_emulate_insn_failed(vcpu);
4194         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4195         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4196         vcpu->run->internal.ndata = 0;
4197         kvm_queue_exception(vcpu, UD_VECTOR);
4198         return EMULATE_FAIL;
4199 }
4200
4201 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4202 {
4203         gpa_t gpa;
4204
4205         if (tdp_enabled)
4206                 return false;
4207
4208         /*
4209          * if emulation was due to access to shadowed page table
4210          * and it failed try to unshadow page and re-entetr the
4211          * guest to let CPU execute the instruction.
4212          */
4213         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4214                 return true;
4215
4216         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4217
4218         if (gpa == UNMAPPED_GVA)
4219                 return true; /* let cpu generate fault */
4220
4221         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4222                 return true;
4223
4224         return false;
4225 }
4226
4227 int emulate_instruction(struct kvm_vcpu *vcpu,
4228                         unsigned long cr2,
4229                         u16 error_code,
4230                         int emulation_type)
4231 {
4232         int r;
4233         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4234
4235         kvm_clear_exception_queue(vcpu);
4236         vcpu->arch.mmio_fault_cr2 = cr2;
4237         /*
4238          * TODO: fix emulate.c to use guest_read/write_register
4239          * instead of direct ->regs accesses, can save hundred cycles
4240          * on Intel for instructions that don't read/change RSP, for
4241          * for example.
4242          */
4243         cache_all_regs(vcpu);
4244
4245         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4246                 init_emulate_ctxt(vcpu);
4247                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4248                 vcpu->arch.emulate_ctxt.exception = -1;
4249                 vcpu->arch.emulate_ctxt.perm_ok = false;
4250
4251                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4252                 if (r == X86EMUL_PROPAGATE_FAULT)
4253                         goto done;
4254
4255                 trace_kvm_emulate_insn_start(vcpu);
4256
4257                 /* Only allow emulation of specific instructions on #UD
4258                  * (namely VMMCALL, sysenter, sysexit, syscall)*/
4259                 if (emulation_type & EMULTYPE_TRAP_UD) {
4260                         if (!c->twobyte)
4261                                 return EMULATE_FAIL;
4262                         switch (c->b) {
4263                         case 0x01: /* VMMCALL */
4264                                 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4265                                         return EMULATE_FAIL;
4266                                 break;
4267                         case 0x34: /* sysenter */
4268                         case 0x35: /* sysexit */
4269                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4270                                         return EMULATE_FAIL;
4271                                 break;
4272                         case 0x05: /* syscall */
4273                                 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4274                                         return EMULATE_FAIL;
4275                                 break;
4276                         default:
4277                                 return EMULATE_FAIL;
4278                         }
4279
4280                         if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4281                                 return EMULATE_FAIL;
4282                 }
4283
4284                 ++vcpu->stat.insn_emulation;
4285                 if (r)  {
4286                         if (reexecute_instruction(vcpu, cr2))
4287                                 return EMULATE_DONE;
4288                         if (emulation_type & EMULTYPE_SKIP)
4289                                 return EMULATE_FAIL;
4290                         return handle_emulation_failure(vcpu);
4291                 }
4292         }
4293
4294         if (emulation_type & EMULTYPE_SKIP) {
4295                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4296                 return EMULATE_DONE;
4297         }
4298
4299         /* this is needed for vmware backdor interface to work since it
4300            changes registers values  during IO operation */
4301         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4302
4303 restart:
4304         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4305
4306         if (r == EMULATION_FAILED) {
4307                 if (reexecute_instruction(vcpu, cr2))
4308                         return EMULATE_DONE;
4309
4310                 return handle_emulation_failure(vcpu);
4311         }
4312
4313 done:
4314         if (vcpu->arch.emulate_ctxt.exception >= 0) {
4315                 inject_emulated_exception(vcpu);
4316                 r = EMULATE_DONE;
4317         } else if (vcpu->arch.pio.count) {
4318                 if (!vcpu->arch.pio.in)
4319                         vcpu->arch.pio.count = 0;
4320                 r = EMULATE_DO_MMIO;
4321         } else if (vcpu->mmio_needed) {
4322                 if (vcpu->mmio_is_write)
4323                         vcpu->mmio_needed = 0;
4324                 r = EMULATE_DO_MMIO;
4325         } else if (r == EMULATION_RESTART)
4326                 goto restart;
4327         else
4328                 r = EMULATE_DONE;
4329
4330         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4331         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4332         kvm_make_request(KVM_REQ_EVENT, vcpu);
4333         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4334         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4335
4336         return r;
4337 }
4338 EXPORT_SYMBOL_GPL(emulate_instruction);
4339
4340 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4341 {
4342         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4343         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4344         /* do not return to emulator after return from userspace */
4345         vcpu->arch.pio.count = 0;
4346         return ret;
4347 }
4348 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4349
4350 static void tsc_bad(void *info)
4351 {
4352         __get_cpu_var(cpu_tsc_khz) = 0;
4353 }
4354
4355 static void tsc_khz_changed(void *data)
4356 {
4357         struct cpufreq_freqs *freq = data;
4358         unsigned long khz = 0;
4359
4360         if (data)
4361                 khz = freq->new;
4362         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4363                 khz = cpufreq_quick_get(raw_smp_processor_id());
4364         if (!khz)
4365                 khz = tsc_khz;
4366         __get_cpu_var(cpu_tsc_khz) = khz;
4367 }
4368
4369 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4370                                      void *data)
4371 {
4372         struct cpufreq_freqs *freq = data;
4373         struct kvm *kvm;
4374         struct kvm_vcpu *vcpu;
4375         int i, send_ipi = 0;
4376
4377         /*
4378          * We allow guests to temporarily run on slowing clocks,
4379          * provided we notify them after, or to run on accelerating
4380          * clocks, provided we notify them before.  Thus time never
4381          * goes backwards.
4382          *
4383          * However, we have a problem.  We can't atomically update
4384          * the frequency of a given CPU from this function; it is
4385          * merely a notifier, which can be called from any CPU.
4386          * Changing the TSC frequency at arbitrary points in time
4387          * requires a recomputation of local variables related to
4388          * the TSC for each VCPU.  We must flag these local variables
4389          * to be updated and be sure the update takes place with the
4390          * new frequency before any guests proceed.
4391          *
4392          * Unfortunately, the combination of hotplug CPU and frequency
4393          * change creates an intractable locking scenario; the order
4394          * of when these callouts happen is undefined with respect to
4395          * CPU hotplug, and they can race with each other.  As such,
4396          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4397          * undefined; you can actually have a CPU frequency change take
4398          * place in between the computation of X and the setting of the
4399          * variable.  To protect against this problem, all updates of
4400          * the per_cpu tsc_khz variable are done in an interrupt
4401          * protected IPI, and all callers wishing to update the value
4402          * must wait for a synchronous IPI to complete (which is trivial
4403          * if the caller is on the CPU already).  This establishes the
4404          * necessary total order on variable updates.
4405          *
4406          * Note that because a guest time update may take place
4407          * anytime after the setting of the VCPU's request bit, the
4408          * correct TSC value must be set before the request.  However,
4409          * to ensure the update actually makes it to any guest which
4410          * starts running in hardware virtualization between the set
4411          * and the acquisition of the spinlock, we must also ping the
4412          * CPU after setting the request bit.
4413          *
4414          */
4415
4416         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4417                 return 0;
4418         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4419                 return 0;
4420
4421         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4422
4423         spin_lock(&kvm_lock);
4424         list_for_each_entry(kvm, &vm_list, vm_list) {
4425                 kvm_for_each_vcpu(i, vcpu, kvm) {
4426                         if (vcpu->cpu != freq->cpu)
4427                                 continue;
4428                         if (!kvm_request_guest_time_update(vcpu))
4429                                 continue;
4430                         if (vcpu->cpu != smp_processor_id())
4431                                 send_ipi = 1;
4432                 }
4433         }
4434         spin_unlock(&kvm_lock);
4435
4436         if (freq->old < freq->new && send_ipi) {
4437                 /*
4438                  * We upscale the frequency.  Must make the guest
4439                  * doesn't see old kvmclock values while running with
4440                  * the new frequency, otherwise we risk the guest sees
4441                  * time go backwards.
4442                  *
4443                  * In case we update the frequency for another cpu
4444                  * (which might be in guest context) send an interrupt
4445                  * to kick the cpu out of guest context.  Next time
4446                  * guest context is entered kvmclock will be updated,
4447                  * so the guest will not see stale values.
4448                  */
4449                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4450         }
4451         return 0;
4452 }
4453
4454 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4455         .notifier_call  = kvmclock_cpufreq_notifier
4456 };
4457
4458 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4459                                         unsigned long action, void *hcpu)
4460 {
4461         unsigned int cpu = (unsigned long)hcpu;
4462
4463         switch (action) {
4464                 case CPU_ONLINE:
4465                 case CPU_DOWN_FAILED:
4466                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4467                         break;
4468                 case CPU_DOWN_PREPARE:
4469                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4470                         break;
4471         }
4472         return NOTIFY_OK;
4473 }
4474
4475 static struct notifier_block kvmclock_cpu_notifier_block = {
4476         .notifier_call  = kvmclock_cpu_notifier,
4477         .priority = -INT_MAX
4478 };
4479
4480 static void kvm_timer_init(void)
4481 {
4482         int cpu;
4483
4484         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4485         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4486                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4487                                           CPUFREQ_TRANSITION_NOTIFIER);
4488         }
4489         for_each_online_cpu(cpu)
4490                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4491 }
4492
4493 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4494
4495 static int kvm_is_in_guest(void)
4496 {
4497         return percpu_read(current_vcpu) != NULL;
4498 }
4499
4500 static int kvm_is_user_mode(void)
4501 {
4502         int user_mode = 3;
4503
4504         if (percpu_read(current_vcpu))
4505                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4506
4507         return user_mode != 0;
4508 }
4509
4510 static unsigned long kvm_get_guest_ip(void)
4511 {
4512         unsigned long ip = 0;
4513
4514         if (percpu_read(current_vcpu))
4515                 ip = kvm_rip_read(percpu_read(current_vcpu));
4516
4517         return ip;
4518 }
4519
4520 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4521         .is_in_guest            = kvm_is_in_guest,
4522         .is_user_mode           = kvm_is_user_mode,
4523         .get_guest_ip           = kvm_get_guest_ip,
4524 };
4525
4526 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4527 {
4528         percpu_write(current_vcpu, vcpu);
4529 }
4530 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4531
4532 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4533 {
4534         percpu_write(current_vcpu, NULL);
4535 }
4536 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4537
4538 int kvm_arch_init(void *opaque)
4539 {
4540         int r;
4541         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4542
4543         if (kvm_x86_ops) {
4544                 printk(KERN_ERR "kvm: already loaded the other module\n");
4545                 r = -EEXIST;
4546                 goto out;
4547         }
4548
4549         if (!ops->cpu_has_kvm_support()) {
4550                 printk(KERN_ERR "kvm: no hardware support\n");
4551                 r = -EOPNOTSUPP;
4552                 goto out;
4553         }
4554         if (ops->disabled_by_bios()) {
4555                 printk(KERN_ERR "kvm: disabled by bios\n");
4556                 r = -EOPNOTSUPP;
4557                 goto out;
4558         }
4559
4560         r = kvm_mmu_module_init();
4561         if (r)
4562                 goto out;
4563
4564         kvm_init_msr_list();
4565
4566         kvm_x86_ops = ops;
4567         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4568         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4569         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4570                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4571
4572         kvm_timer_init();
4573
4574         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4575
4576         if (cpu_has_xsave)
4577                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4578
4579         return 0;
4580
4581 out:
4582         return r;
4583 }
4584
4585 void kvm_arch_exit(void)
4586 {
4587         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4588
4589         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4590                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4591                                             CPUFREQ_TRANSITION_NOTIFIER);
4592         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4593         kvm_x86_ops = NULL;
4594         kvm_mmu_module_exit();
4595 }
4596
4597 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4598 {
4599         ++vcpu->stat.halt_exits;
4600         if (irqchip_in_kernel(vcpu->kvm)) {
4601                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4602                 return 1;
4603         } else {
4604                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4605                 return 0;
4606         }
4607 }
4608 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4609
4610 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4611                            unsigned long a1)
4612 {
4613         if (is_long_mode(vcpu))
4614                 return a0;
4615         else
4616                 return a0 | ((gpa_t)a1 << 32);
4617 }
4618
4619 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4620 {
4621         u64 param, ingpa, outgpa, ret;
4622         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4623         bool fast, longmode;
4624         int cs_db, cs_l;
4625
4626         /*
4627          * hypercall generates UD from non zero cpl and real mode
4628          * per HYPER-V spec
4629          */
4630         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4631                 kvm_queue_exception(vcpu, UD_VECTOR);
4632                 return 0;
4633         }
4634
4635         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4636         longmode = is_long_mode(vcpu) && cs_l == 1;
4637
4638         if (!longmode) {
4639                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4640                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4641                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4642                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4643                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4644                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4645         }
4646 #ifdef CONFIG_X86_64
4647         else {
4648                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4649                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4650                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4651         }
4652 #endif
4653
4654         code = param & 0xffff;
4655         fast = (param >> 16) & 0x1;
4656         rep_cnt = (param >> 32) & 0xfff;
4657         rep_idx = (param >> 48) & 0xfff;
4658
4659         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4660
4661         switch (code) {
4662         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4663                 kvm_vcpu_on_spin(vcpu);
4664                 break;
4665         default:
4666                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4667                 break;
4668         }
4669
4670         ret = res | (((u64)rep_done & 0xfff) << 32);
4671         if (longmode) {
4672                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4673         } else {
4674                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4675                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4676         }
4677
4678         return 1;
4679 }
4680
4681 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4682 {
4683         unsigned long nr, a0, a1, a2, a3, ret;
4684         int r = 1;
4685
4686         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4687                 return kvm_hv_hypercall(vcpu);
4688
4689         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4690         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4691         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4692         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4693         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4694
4695         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4696
4697         if (!is_long_mode(vcpu)) {
4698                 nr &= 0xFFFFFFFF;
4699                 a0 &= 0xFFFFFFFF;
4700                 a1 &= 0xFFFFFFFF;
4701                 a2 &= 0xFFFFFFFF;
4702                 a3 &= 0xFFFFFFFF;
4703         }
4704
4705         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4706                 ret = -KVM_EPERM;
4707                 goto out;
4708         }
4709
4710         switch (nr) {
4711         case KVM_HC_VAPIC_POLL_IRQ:
4712                 ret = 0;
4713                 break;
4714         case KVM_HC_MMU_OP:
4715                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4716                 break;
4717         default:
4718                 ret = -KVM_ENOSYS;
4719                 break;
4720         }
4721 out:
4722         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4723         ++vcpu->stat.hypercalls;
4724         return r;
4725 }
4726 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4727
4728 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4729 {
4730         char instruction[3];
4731         unsigned long rip = kvm_rip_read(vcpu);
4732
4733         /*
4734          * Blow out the MMU to ensure that no other VCPU has an active mapping
4735          * to ensure that the updated hypercall appears atomically across all
4736          * VCPUs.
4737          */
4738         kvm_mmu_zap_all(vcpu->kvm);
4739
4740         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4741
4742         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4743 }
4744
4745 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4746 {
4747         struct desc_ptr dt = { limit, base };
4748
4749         kvm_x86_ops->set_gdt(vcpu, &dt);
4750 }
4751
4752 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4753 {
4754         struct desc_ptr dt = { limit, base };
4755
4756         kvm_x86_ops->set_idt(vcpu, &dt);
4757 }
4758
4759 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4760 {
4761         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4762         int j, nent = vcpu->arch.cpuid_nent;
4763
4764         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4765         /* when no next entry is found, the current entry[i] is reselected */
4766         for (j = i + 1; ; j = (j + 1) % nent) {
4767                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4768                 if (ej->function == e->function) {
4769                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4770                         return j;
4771                 }
4772         }
4773         return 0; /* silence gcc, even though control never reaches here */
4774 }
4775
4776 /* find an entry with matching function, matching index (if needed), and that
4777  * should be read next (if it's stateful) */
4778 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4779         u32 function, u32 index)
4780 {
4781         if (e->function != function)
4782                 return 0;
4783         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4784                 return 0;
4785         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4786             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4787                 return 0;
4788         return 1;
4789 }
4790
4791 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4792                                               u32 function, u32 index)
4793 {
4794         int i;
4795         struct kvm_cpuid_entry2 *best = NULL;
4796
4797         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4798                 struct kvm_cpuid_entry2 *e;
4799
4800                 e = &vcpu->arch.cpuid_entries[i];
4801                 if (is_matching_cpuid_entry(e, function, index)) {
4802                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4803                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4804                         best = e;
4805                         break;
4806                 }
4807                 /*
4808                  * Both basic or both extended?
4809                  */
4810                 if (((e->function ^ function) & 0x80000000) == 0)
4811                         if (!best || e->function > best->function)
4812                                 best = e;
4813         }
4814         return best;
4815 }
4816 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4817
4818 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4819 {
4820         struct kvm_cpuid_entry2 *best;
4821
4822         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4823         if (!best || best->eax < 0x80000008)
4824                 goto not_found;
4825         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4826         if (best)
4827                 return best->eax & 0xff;
4828 not_found:
4829         return 36;
4830 }
4831
4832 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4833 {
4834         u32 function, index;
4835         struct kvm_cpuid_entry2 *best;
4836
4837         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4838         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4839         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4840         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4841         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4842         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4843         best = kvm_find_cpuid_entry(vcpu, function, index);
4844         if (best) {
4845                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4846                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4847                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4848                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4849         }
4850         kvm_x86_ops->skip_emulated_instruction(vcpu);
4851         trace_kvm_cpuid(function,
4852                         kvm_register_read(vcpu, VCPU_REGS_RAX),
4853                         kvm_register_read(vcpu, VCPU_REGS_RBX),
4854                         kvm_register_read(vcpu, VCPU_REGS_RCX),
4855                         kvm_register_read(vcpu, VCPU_REGS_RDX));
4856 }
4857 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4858
4859 /*
4860  * Check if userspace requested an interrupt window, and that the
4861  * interrupt window is open.
4862  *
4863  * No need to exit to userspace if we already have an interrupt queued.
4864  */
4865 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4866 {
4867         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4868                 vcpu->run->request_interrupt_window &&
4869                 kvm_arch_interrupt_allowed(vcpu));
4870 }
4871
4872 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4873 {
4874         struct kvm_run *kvm_run = vcpu->run;
4875
4876         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4877         kvm_run->cr8 = kvm_get_cr8(vcpu);
4878         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4879         if (irqchip_in_kernel(vcpu->kvm))
4880                 kvm_run->ready_for_interrupt_injection = 1;
4881         else
4882                 kvm_run->ready_for_interrupt_injection =
4883                         kvm_arch_interrupt_allowed(vcpu) &&
4884                         !kvm_cpu_has_interrupt(vcpu) &&
4885                         !kvm_event_needs_reinjection(vcpu);
4886 }
4887
4888 static void vapic_enter(struct kvm_vcpu *vcpu)
4889 {
4890         struct kvm_lapic *apic = vcpu->arch.apic;
4891         struct page *page;
4892
4893         if (!apic || !apic->vapic_addr)
4894                 return;
4895
4896         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4897
4898         vcpu->arch.apic->vapic_page = page;
4899 }
4900
4901 static void vapic_exit(struct kvm_vcpu *vcpu)
4902 {
4903         struct kvm_lapic *apic = vcpu->arch.apic;
4904         int idx;
4905
4906         if (!apic || !apic->vapic_addr)
4907                 return;
4908
4909         idx = srcu_read_lock(&vcpu->kvm->srcu);
4910         kvm_release_page_dirty(apic->vapic_page);
4911         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4912         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4913 }
4914
4915 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4916 {
4917         int max_irr, tpr;
4918
4919         if (!kvm_x86_ops->update_cr8_intercept)
4920                 return;
4921
4922         if (!vcpu->arch.apic)
4923                 return;
4924
4925         if (!vcpu->arch.apic->vapic_addr)
4926                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4927         else
4928                 max_irr = -1;
4929
4930         if (max_irr != -1)
4931                 max_irr >>= 4;
4932
4933         tpr = kvm_lapic_get_cr8(vcpu);
4934
4935         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
4936 }
4937
4938 static void inject_pending_event(struct kvm_vcpu *vcpu)
4939 {
4940         /* try to reinject previous events if any */
4941         if (vcpu->arch.exception.pending) {
4942                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
4943                                         vcpu->arch.exception.has_error_code,
4944                                         vcpu->arch.exception.error_code);
4945                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
4946                                           vcpu->arch.exception.has_error_code,
4947                                           vcpu->arch.exception.error_code,
4948                                           vcpu->arch.exception.reinject);
4949                 return;
4950         }
4951
4952         if (vcpu->arch.nmi_injected) {
4953                 kvm_x86_ops->set_nmi(vcpu);
4954                 return;
4955         }
4956
4957         if (vcpu->arch.interrupt.pending) {
4958                 kvm_x86_ops->set_irq(vcpu);
4959                 return;
4960         }
4961
4962         /* try to inject new event if pending */
4963         if (vcpu->arch.nmi_pending) {
4964                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
4965                         vcpu->arch.nmi_pending = false;
4966                         vcpu->arch.nmi_injected = true;
4967                         kvm_x86_ops->set_nmi(vcpu);
4968                 }
4969         } else if (kvm_cpu_has_interrupt(vcpu)) {
4970                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
4971                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
4972                                             false);
4973                         kvm_x86_ops->set_irq(vcpu);
4974                 }
4975         }
4976 }
4977
4978 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
4979 {
4980         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
4981                         !vcpu->guest_xcr0_loaded) {
4982                 /* kvm_set_xcr() also depends on this */
4983                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
4984                 vcpu->guest_xcr0_loaded = 1;
4985         }
4986 }
4987
4988 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
4989 {
4990         if (vcpu->guest_xcr0_loaded) {
4991                 if (vcpu->arch.xcr0 != host_xcr0)
4992                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
4993                 vcpu->guest_xcr0_loaded = 0;
4994         }
4995 }
4996
4997 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
4998 {
4999         int r;
5000         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5001                 vcpu->run->request_interrupt_window;
5002
5003         if (vcpu->requests) {
5004                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5005                         kvm_mmu_unload(vcpu);
5006                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5007                         __kvm_migrate_timers(vcpu);
5008                 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE, vcpu)) {
5009                         r = kvm_write_guest_time(vcpu);
5010                         if (unlikely(r))
5011                                 goto out;
5012                 }
5013                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5014                         kvm_mmu_sync_roots(vcpu);
5015                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5016                         kvm_x86_ops->tlb_flush(vcpu);
5017                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5018                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5019                         r = 0;
5020                         goto out;
5021                 }
5022                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5023                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5024                         r = 0;
5025                         goto out;
5026                 }
5027                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5028                         vcpu->fpu_active = 0;
5029                         kvm_x86_ops->fpu_deactivate(vcpu);
5030                 }
5031         }
5032
5033         r = kvm_mmu_reload(vcpu);
5034         if (unlikely(r))
5035                 goto out;
5036
5037         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5038                 inject_pending_event(vcpu);
5039
5040                 /* enable NMI/IRQ window open exits if needed */
5041                 if (vcpu->arch.nmi_pending)
5042                         kvm_x86_ops->enable_nmi_window(vcpu);
5043                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5044                         kvm_x86_ops->enable_irq_window(vcpu);
5045
5046                 if (kvm_lapic_enabled(vcpu)) {
5047                         update_cr8_intercept(vcpu);
5048                         kvm_lapic_sync_to_vapic(vcpu);
5049                 }
5050         }
5051
5052         preempt_disable();
5053
5054         kvm_x86_ops->prepare_guest_switch(vcpu);
5055         if (vcpu->fpu_active)
5056                 kvm_load_guest_fpu(vcpu);
5057         kvm_load_guest_xcr0(vcpu);
5058
5059         atomic_set(&vcpu->guest_mode, 1);
5060         smp_wmb();
5061
5062         local_irq_disable();
5063
5064         if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5065             || need_resched() || signal_pending(current)) {
5066                 atomic_set(&vcpu->guest_mode, 0);
5067                 smp_wmb();
5068                 local_irq_enable();
5069                 preempt_enable();
5070                 kvm_x86_ops->cancel_injection(vcpu);
5071                 r = 1;
5072                 goto out;
5073         }
5074
5075         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5076
5077         kvm_guest_enter();
5078
5079         if (unlikely(vcpu->arch.switch_db_regs)) {
5080                 set_debugreg(0, 7);
5081                 set_debugreg(vcpu->arch.eff_db[0], 0);
5082                 set_debugreg(vcpu->arch.eff_db[1], 1);
5083                 set_debugreg(vcpu->arch.eff_db[2], 2);
5084                 set_debugreg(vcpu->arch.eff_db[3], 3);
5085         }
5086
5087         trace_kvm_entry(vcpu->vcpu_id);
5088         kvm_x86_ops->run(vcpu);
5089
5090         /*
5091          * If the guest has used debug registers, at least dr7
5092          * will be disabled while returning to the host.
5093          * If we don't have active breakpoints in the host, we don't
5094          * care about the messed up debug address registers. But if
5095          * we have some of them active, restore the old state.
5096          */
5097         if (hw_breakpoint_active())
5098                 hw_breakpoint_restore();
5099
5100         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5101
5102         atomic_set(&vcpu->guest_mode, 0);
5103         smp_wmb();
5104         local_irq_enable();
5105
5106         ++vcpu->stat.exits;
5107
5108         /*
5109          * We must have an instruction between local_irq_enable() and
5110          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5111          * the interrupt shadow.  The stat.exits increment will do nicely.
5112          * But we need to prevent reordering, hence this barrier():
5113          */
5114         barrier();
5115
5116         kvm_guest_exit();
5117
5118         preempt_enable();
5119
5120         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5121
5122         /*
5123          * Profile KVM exit RIPs:
5124          */
5125         if (unlikely(prof_on == KVM_PROFILING)) {
5126                 unsigned long rip = kvm_rip_read(vcpu);
5127                 profile_hit(KVM_PROFILING, (void *)rip);
5128         }
5129
5130
5131         kvm_lapic_sync_from_vapic(vcpu);
5132
5133         r = kvm_x86_ops->handle_exit(vcpu);
5134 out:
5135         return r;
5136 }
5137
5138
5139 static int __vcpu_run(struct kvm_vcpu *vcpu)
5140 {
5141         int r;
5142         struct kvm *kvm = vcpu->kvm;
5143
5144         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5145                 pr_debug("vcpu %d received sipi with vector # %x\n",
5146                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5147                 kvm_lapic_reset(vcpu);
5148                 r = kvm_arch_vcpu_reset(vcpu);
5149                 if (r)
5150                         return r;
5151                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5152         }
5153
5154         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5155         vapic_enter(vcpu);
5156
5157         r = 1;
5158         while (r > 0) {
5159                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5160                         r = vcpu_enter_guest(vcpu);
5161                 else {
5162                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5163                         kvm_vcpu_block(vcpu);
5164                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5165                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5166                         {
5167                                 switch(vcpu->arch.mp_state) {
5168                                 case KVM_MP_STATE_HALTED:
5169                                         vcpu->arch.mp_state =
5170                                                 KVM_MP_STATE_RUNNABLE;
5171                                 case KVM_MP_STATE_RUNNABLE:
5172                                         break;
5173                                 case KVM_MP_STATE_SIPI_RECEIVED:
5174                                 default:
5175                                         r = -EINTR;
5176                                         break;
5177                                 }
5178                         }
5179                 }
5180
5181                 if (r <= 0)
5182                         break;
5183
5184                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5185                 if (kvm_cpu_has_pending_timer(vcpu))
5186                         kvm_inject_pending_timer_irqs(vcpu);
5187
5188                 if (dm_request_for_irq_injection(vcpu)) {
5189                         r = -EINTR;
5190                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5191                         ++vcpu->stat.request_irq_exits;
5192                 }
5193                 if (signal_pending(current)) {
5194                         r = -EINTR;
5195                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5196                         ++vcpu->stat.signal_exits;
5197                 }
5198                 if (need_resched()) {
5199                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5200                         kvm_resched(vcpu);
5201                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5202                 }
5203         }
5204
5205         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5206
5207         vapic_exit(vcpu);
5208
5209         return r;
5210 }
5211
5212 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5213 {
5214         int r;
5215         sigset_t sigsaved;
5216
5217         if (vcpu->sigset_active)
5218                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5219
5220         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5221                 kvm_vcpu_block(vcpu);
5222                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5223                 r = -EAGAIN;
5224                 goto out;
5225         }
5226
5227         /* re-sync apic's tpr */
5228         if (!irqchip_in_kernel(vcpu->kvm))
5229                 kvm_set_cr8(vcpu, kvm_run->cr8);
5230
5231         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5232                 if (vcpu->mmio_needed) {
5233                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5234                         vcpu->mmio_read_completed = 1;
5235                         vcpu->mmio_needed = 0;
5236                 }
5237                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5238                 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5239                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5240                 if (r != EMULATE_DONE) {
5241                         r = 0;
5242                         goto out;
5243                 }
5244         }
5245         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5246                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5247                                      kvm_run->hypercall.ret);
5248
5249         r = __vcpu_run(vcpu);
5250
5251 out:
5252         post_kvm_run_save(vcpu);
5253         if (vcpu->sigset_active)
5254                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5255
5256         return r;
5257 }
5258
5259 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5260 {
5261         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5262         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5263         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5264         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5265         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5266         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5267         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5268         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5269 #ifdef CONFIG_X86_64
5270         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5271         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5272         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5273         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5274         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5275         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5276         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5277         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5278 #endif
5279
5280         regs->rip = kvm_rip_read(vcpu);
5281         regs->rflags = kvm_get_rflags(vcpu);
5282
5283         return 0;
5284 }
5285
5286 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5287 {
5288         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5289         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5290         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5291         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5292         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5293         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5294         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5295         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5296 #ifdef CONFIG_X86_64
5297         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5298         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5299         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5300         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5301         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5302         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5303         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5304         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5305 #endif
5306
5307         kvm_rip_write(vcpu, regs->rip);
5308         kvm_set_rflags(vcpu, regs->rflags);
5309
5310         vcpu->arch.exception.pending = false;
5311
5312         kvm_make_request(KVM_REQ_EVENT, vcpu);
5313
5314         return 0;
5315 }
5316
5317 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5318 {
5319         struct kvm_segment cs;
5320
5321         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5322         *db = cs.db;
5323         *l = cs.l;
5324 }
5325 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5326
5327 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5328                                   struct kvm_sregs *sregs)
5329 {
5330         struct desc_ptr dt;
5331
5332         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5333         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5334         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5335         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5336         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5337         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5338
5339         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5340         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5341
5342         kvm_x86_ops->get_idt(vcpu, &dt);
5343         sregs->idt.limit = dt.size;
5344         sregs->idt.base = dt.address;
5345         kvm_x86_ops->get_gdt(vcpu, &dt);
5346         sregs->gdt.limit = dt.size;
5347         sregs->gdt.base = dt.address;
5348
5349         sregs->cr0 = kvm_read_cr0(vcpu);
5350         sregs->cr2 = vcpu->arch.cr2;
5351         sregs->cr3 = vcpu->arch.cr3;
5352         sregs->cr4 = kvm_read_cr4(vcpu);
5353         sregs->cr8 = kvm_get_cr8(vcpu);
5354         sregs->efer = vcpu->arch.efer;
5355         sregs->apic_base = kvm_get_apic_base(vcpu);
5356
5357         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5358
5359         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5360                 set_bit(vcpu->arch.interrupt.nr,
5361                         (unsigned long *)sregs->interrupt_bitmap);
5362
5363         return 0;
5364 }
5365
5366 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5367                                     struct kvm_mp_state *mp_state)
5368 {
5369         mp_state->mp_state = vcpu->arch.mp_state;
5370         return 0;
5371 }
5372
5373 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5374                                     struct kvm_mp_state *mp_state)
5375 {
5376         vcpu->arch.mp_state = mp_state->mp_state;
5377         kvm_make_request(KVM_REQ_EVENT, vcpu);
5378         return 0;
5379 }
5380
5381 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5382                     bool has_error_code, u32 error_code)
5383 {
5384         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5385         int ret;
5386
5387         init_emulate_ctxt(vcpu);
5388
5389         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5390                                    tss_selector, reason, has_error_code,
5391                                    error_code);
5392
5393         if (ret)
5394                 return EMULATE_FAIL;
5395
5396         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5397         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5398         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5399         kvm_make_request(KVM_REQ_EVENT, vcpu);
5400         return EMULATE_DONE;
5401 }
5402 EXPORT_SYMBOL_GPL(kvm_task_switch);
5403
5404 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5405                                   struct kvm_sregs *sregs)
5406 {
5407         int mmu_reset_needed = 0;
5408         int pending_vec, max_bits;
5409         struct desc_ptr dt;
5410
5411         dt.size = sregs->idt.limit;
5412         dt.address = sregs->idt.base;
5413         kvm_x86_ops->set_idt(vcpu, &dt);
5414         dt.size = sregs->gdt.limit;
5415         dt.address = sregs->gdt.base;
5416         kvm_x86_ops->set_gdt(vcpu, &dt);
5417
5418         vcpu->arch.cr2 = sregs->cr2;
5419         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5420         vcpu->arch.cr3 = sregs->cr3;
5421
5422         kvm_set_cr8(vcpu, sregs->cr8);
5423
5424         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5425         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5426         kvm_set_apic_base(vcpu, sregs->apic_base);
5427
5428         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5429         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5430         vcpu->arch.cr0 = sregs->cr0;
5431
5432         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5433         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5434         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5435                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5436                 mmu_reset_needed = 1;
5437         }
5438
5439         if (mmu_reset_needed)
5440                 kvm_mmu_reset_context(vcpu);
5441
5442         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5443         pending_vec = find_first_bit(
5444                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5445         if (pending_vec < max_bits) {
5446                 kvm_queue_interrupt(vcpu, pending_vec, false);
5447                 pr_debug("Set back pending irq %d\n", pending_vec);
5448                 if (irqchip_in_kernel(vcpu->kvm))
5449                         kvm_pic_clear_isr_ack(vcpu->kvm);
5450         }
5451
5452         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5453         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5454         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5455         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5456         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5457         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5458
5459         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5460         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5461
5462         update_cr8_intercept(vcpu);
5463
5464         /* Older userspace won't unhalt the vcpu on reset. */
5465         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5466             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5467             !is_protmode(vcpu))
5468                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5469
5470         kvm_make_request(KVM_REQ_EVENT, vcpu);
5471
5472         return 0;
5473 }
5474
5475 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5476                                         struct kvm_guest_debug *dbg)
5477 {
5478         unsigned long rflags;
5479         int i, r;
5480
5481         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5482                 r = -EBUSY;
5483                 if (vcpu->arch.exception.pending)
5484                         goto out;
5485                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5486                         kvm_queue_exception(vcpu, DB_VECTOR);
5487                 else
5488                         kvm_queue_exception(vcpu, BP_VECTOR);
5489         }
5490
5491         /*
5492          * Read rflags as long as potentially injected trace flags are still
5493          * filtered out.
5494          */
5495         rflags = kvm_get_rflags(vcpu);
5496
5497         vcpu->guest_debug = dbg->control;
5498         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5499                 vcpu->guest_debug = 0;
5500
5501         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5502                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5503                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5504                 vcpu->arch.switch_db_regs =
5505                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5506         } else {
5507                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5508                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5509                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5510         }
5511
5512         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5513                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5514                         get_segment_base(vcpu, VCPU_SREG_CS);
5515
5516         /*
5517          * Trigger an rflags update that will inject or remove the trace
5518          * flags.
5519          */
5520         kvm_set_rflags(vcpu, rflags);
5521
5522         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5523
5524         r = 0;
5525
5526 out:
5527
5528         return r;
5529 }
5530
5531 /*
5532  * Translate a guest virtual address to a guest physical address.
5533  */
5534 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5535                                     struct kvm_translation *tr)
5536 {
5537         unsigned long vaddr = tr->linear_address;
5538         gpa_t gpa;
5539         int idx;
5540
5541         idx = srcu_read_lock(&vcpu->kvm->srcu);
5542         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5543         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5544         tr->physical_address = gpa;
5545         tr->valid = gpa != UNMAPPED_GVA;
5546         tr->writeable = 1;
5547         tr->usermode = 0;
5548
5549         return 0;
5550 }
5551
5552 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5553 {
5554         struct i387_fxsave_struct *fxsave =
5555                         &vcpu->arch.guest_fpu.state->fxsave;
5556
5557         memcpy(fpu->fpr, fxsave->st_space, 128);
5558         fpu->fcw = fxsave->cwd;
5559         fpu->fsw = fxsave->swd;
5560         fpu->ftwx = fxsave->twd;
5561         fpu->last_opcode = fxsave->fop;
5562         fpu->last_ip = fxsave->rip;
5563         fpu->last_dp = fxsave->rdp;
5564         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5565
5566         return 0;
5567 }
5568
5569 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5570 {
5571         struct i387_fxsave_struct *fxsave =
5572                         &vcpu->arch.guest_fpu.state->fxsave;
5573
5574         memcpy(fxsave->st_space, fpu->fpr, 128);
5575         fxsave->cwd = fpu->fcw;
5576         fxsave->swd = fpu->fsw;
5577         fxsave->twd = fpu->ftwx;
5578         fxsave->fop = fpu->last_opcode;
5579         fxsave->rip = fpu->last_ip;
5580         fxsave->rdp = fpu->last_dp;
5581         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5582
5583         return 0;
5584 }
5585
5586 int fx_init(struct kvm_vcpu *vcpu)
5587 {
5588         int err;
5589
5590         err = fpu_alloc(&vcpu->arch.guest_fpu);
5591         if (err)
5592                 return err;
5593
5594         fpu_finit(&vcpu->arch.guest_fpu);
5595
5596         /*
5597          * Ensure guest xcr0 is valid for loading
5598          */
5599         vcpu->arch.xcr0 = XSTATE_FP;
5600
5601         vcpu->arch.cr0 |= X86_CR0_ET;
5602
5603         return 0;
5604 }
5605 EXPORT_SYMBOL_GPL(fx_init);
5606
5607 static void fx_free(struct kvm_vcpu *vcpu)
5608 {
5609         fpu_free(&vcpu->arch.guest_fpu);
5610 }
5611
5612 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5613 {
5614         if (vcpu->guest_fpu_loaded)
5615                 return;
5616
5617         /*
5618          * Restore all possible states in the guest,
5619          * and assume host would use all available bits.
5620          * Guest xcr0 would be loaded later.
5621          */
5622         kvm_put_guest_xcr0(vcpu);
5623         vcpu->guest_fpu_loaded = 1;
5624         unlazy_fpu(current);
5625         fpu_restore_checking(&vcpu->arch.guest_fpu);
5626         trace_kvm_fpu(1);
5627 }
5628
5629 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5630 {
5631         kvm_put_guest_xcr0(vcpu);
5632
5633         if (!vcpu->guest_fpu_loaded)
5634                 return;
5635
5636         vcpu->guest_fpu_loaded = 0;
5637         fpu_save_init(&vcpu->arch.guest_fpu);
5638         ++vcpu->stat.fpu_reload;
5639         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5640         trace_kvm_fpu(0);
5641 }
5642
5643 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5644 {
5645         if (vcpu->arch.time_page) {
5646                 kvm_release_page_dirty(vcpu->arch.time_page);
5647                 vcpu->arch.time_page = NULL;
5648         }
5649
5650         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5651         fx_free(vcpu);
5652         kvm_x86_ops->vcpu_free(vcpu);
5653 }
5654
5655 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5656                                                 unsigned int id)
5657 {
5658         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5659                 printk_once(KERN_WARNING
5660                 "kvm: SMP vm created on host with unstable TSC; "
5661                 "guest TSC will not be reliable\n");
5662         return kvm_x86_ops->vcpu_create(kvm, id);
5663 }
5664
5665 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5666 {
5667         int r;
5668
5669         vcpu->arch.mtrr_state.have_fixed = 1;
5670         vcpu_load(vcpu);
5671         r = kvm_arch_vcpu_reset(vcpu);
5672         if (r == 0)
5673                 r = kvm_mmu_setup(vcpu);
5674         vcpu_put(vcpu);
5675         if (r < 0)
5676                 goto free_vcpu;
5677
5678         return 0;
5679 free_vcpu:
5680         kvm_x86_ops->vcpu_free(vcpu);
5681         return r;
5682 }
5683
5684 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5685 {
5686         vcpu_load(vcpu);
5687         kvm_mmu_unload(vcpu);
5688         vcpu_put(vcpu);
5689
5690         fx_free(vcpu);
5691         kvm_x86_ops->vcpu_free(vcpu);
5692 }
5693
5694 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5695 {
5696         vcpu->arch.nmi_pending = false;
5697         vcpu->arch.nmi_injected = false;
5698
5699         vcpu->arch.switch_db_regs = 0;
5700         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5701         vcpu->arch.dr6 = DR6_FIXED_1;
5702         vcpu->arch.dr7 = DR7_FIXED_1;
5703
5704         kvm_make_request(KVM_REQ_EVENT, vcpu);
5705
5706         return kvm_x86_ops->vcpu_reset(vcpu);
5707 }
5708
5709 int kvm_arch_hardware_enable(void *garbage)
5710 {
5711         struct kvm *kvm;
5712         struct kvm_vcpu *vcpu;
5713         int i;
5714
5715         kvm_shared_msr_cpu_online();
5716         list_for_each_entry(kvm, &vm_list, vm_list)
5717                 kvm_for_each_vcpu(i, vcpu, kvm)
5718                         if (vcpu->cpu == smp_processor_id())
5719                                 kvm_request_guest_time_update(vcpu);
5720         return kvm_x86_ops->hardware_enable(garbage);
5721 }
5722
5723 void kvm_arch_hardware_disable(void *garbage)
5724 {
5725         kvm_x86_ops->hardware_disable(garbage);
5726         drop_user_return_notifiers(garbage);
5727 }
5728
5729 int kvm_arch_hardware_setup(void)
5730 {
5731         return kvm_x86_ops->hardware_setup();
5732 }
5733
5734 void kvm_arch_hardware_unsetup(void)
5735 {
5736         kvm_x86_ops->hardware_unsetup();
5737 }
5738
5739 void kvm_arch_check_processor_compat(void *rtn)
5740 {
5741         kvm_x86_ops->check_processor_compatibility(rtn);
5742 }
5743
5744 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5745 {
5746         struct page *page;
5747         struct kvm *kvm;
5748         int r;
5749
5750         BUG_ON(vcpu->kvm == NULL);
5751         kvm = vcpu->kvm;
5752
5753         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5754         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5755         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5756         vcpu->arch.mmu.translate_gpa = translate_gpa;
5757         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5758         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5759                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5760         else
5761                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5762
5763         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5764         if (!page) {
5765                 r = -ENOMEM;
5766                 goto fail;
5767         }
5768         vcpu->arch.pio_data = page_address(page);
5769
5770         r = kvm_mmu_create(vcpu);
5771         if (r < 0)
5772                 goto fail_free_pio_data;
5773
5774         if (irqchip_in_kernel(kvm)) {
5775                 r = kvm_create_lapic(vcpu);
5776                 if (r < 0)
5777                         goto fail_mmu_destroy;
5778         }
5779
5780         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5781                                        GFP_KERNEL);
5782         if (!vcpu->arch.mce_banks) {
5783                 r = -ENOMEM;
5784                 goto fail_free_lapic;
5785         }
5786         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5787
5788         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5789                 goto fail_free_mce_banks;
5790
5791         return 0;
5792 fail_free_mce_banks:
5793         kfree(vcpu->arch.mce_banks);
5794 fail_free_lapic:
5795         kvm_free_lapic(vcpu);
5796 fail_mmu_destroy:
5797         kvm_mmu_destroy(vcpu);
5798 fail_free_pio_data:
5799         free_page((unsigned long)vcpu->arch.pio_data);
5800 fail:
5801         return r;
5802 }
5803
5804 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5805 {
5806         int idx;
5807
5808         kfree(vcpu->arch.mce_banks);
5809         kvm_free_lapic(vcpu);
5810         idx = srcu_read_lock(&vcpu->kvm->srcu);
5811         kvm_mmu_destroy(vcpu);
5812         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5813         free_page((unsigned long)vcpu->arch.pio_data);
5814 }
5815
5816 struct  kvm *kvm_arch_create_vm(void)
5817 {
5818         struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5819
5820         if (!kvm)
5821                 return ERR_PTR(-ENOMEM);
5822
5823         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5824         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5825
5826         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5827         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5828
5829         spin_lock_init(&kvm->arch.tsc_write_lock);
5830
5831         return kvm;
5832 }
5833
5834 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5835 {
5836         vcpu_load(vcpu);
5837         kvm_mmu_unload(vcpu);
5838         vcpu_put(vcpu);
5839 }
5840
5841 static void kvm_free_vcpus(struct kvm *kvm)
5842 {
5843         unsigned int i;
5844         struct kvm_vcpu *vcpu;
5845
5846         /*
5847          * Unpin any mmu pages first.
5848          */
5849         kvm_for_each_vcpu(i, vcpu, kvm)
5850                 kvm_unload_vcpu_mmu(vcpu);
5851         kvm_for_each_vcpu(i, vcpu, kvm)
5852                 kvm_arch_vcpu_free(vcpu);
5853
5854         mutex_lock(&kvm->lock);
5855         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5856                 kvm->vcpus[i] = NULL;
5857
5858         atomic_set(&kvm->online_vcpus, 0);
5859         mutex_unlock(&kvm->lock);
5860 }
5861
5862 void kvm_arch_sync_events(struct kvm *kvm)
5863 {
5864         kvm_free_all_assigned_devices(kvm);
5865         kvm_free_pit(kvm);
5866 }
5867
5868 void kvm_arch_destroy_vm(struct kvm *kvm)
5869 {
5870         kvm_iommu_unmap_guest(kvm);
5871         kfree(kvm->arch.vpic);
5872         kfree(kvm->arch.vioapic);
5873         kvm_free_vcpus(kvm);
5874         kvm_free_physmem(kvm);
5875         if (kvm->arch.apic_access_page)
5876                 put_page(kvm->arch.apic_access_page);
5877         if (kvm->arch.ept_identity_pagetable)
5878                 put_page(kvm->arch.ept_identity_pagetable);
5879         cleanup_srcu_struct(&kvm->srcu);
5880         kfree(kvm);
5881 }
5882
5883 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5884                                 struct kvm_memory_slot *memslot,
5885                                 struct kvm_memory_slot old,
5886                                 struct kvm_userspace_memory_region *mem,
5887                                 int user_alloc)
5888 {
5889         int npages = memslot->npages;
5890         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5891
5892         /* Prevent internal slot pages from being moved by fork()/COW. */
5893         if (memslot->id >= KVM_MEMORY_SLOTS)
5894                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5895
5896         /*To keep backward compatibility with older userspace,
5897          *x86 needs to hanlde !user_alloc case.
5898          */
5899         if (!user_alloc) {
5900                 if (npages && !old.rmap) {
5901                         unsigned long userspace_addr;
5902
5903                         down_write(&current->mm->mmap_sem);
5904                         userspace_addr = do_mmap(NULL, 0,
5905                                                  npages * PAGE_SIZE,
5906                                                  PROT_READ | PROT_WRITE,
5907                                                  map_flags,
5908                                                  0);
5909                         up_write(&current->mm->mmap_sem);
5910
5911                         if (IS_ERR((void *)userspace_addr))
5912                                 return PTR_ERR((void *)userspace_addr);
5913
5914                         memslot->userspace_addr = userspace_addr;
5915                 }
5916         }
5917
5918
5919         return 0;
5920 }
5921
5922 void kvm_arch_commit_memory_region(struct kvm *kvm,
5923                                 struct kvm_userspace_memory_region *mem,
5924                                 struct kvm_memory_slot old,
5925                                 int user_alloc)
5926 {
5927
5928         int npages = mem->memory_size >> PAGE_SHIFT;
5929
5930         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
5931                 int ret;
5932
5933                 down_write(&current->mm->mmap_sem);
5934                 ret = do_munmap(current->mm, old.userspace_addr,
5935                                 old.npages * PAGE_SIZE);
5936                 up_write(&current->mm->mmap_sem);
5937                 if (ret < 0)
5938                         printk(KERN_WARNING
5939                                "kvm_vm_ioctl_set_memory_region: "
5940                                "failed to munmap memory\n");
5941         }
5942
5943         spin_lock(&kvm->mmu_lock);
5944         if (!kvm->arch.n_requested_mmu_pages) {
5945                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5946                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5947         }
5948
5949         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5950         spin_unlock(&kvm->mmu_lock);
5951 }
5952
5953 void kvm_arch_flush_shadow(struct kvm *kvm)
5954 {
5955         kvm_mmu_zap_all(kvm);
5956         kvm_reload_remote_mmus(kvm);
5957 }
5958
5959 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5960 {
5961         return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5962                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5963                 || vcpu->arch.nmi_pending ||
5964                 (kvm_arch_interrupt_allowed(vcpu) &&
5965                  kvm_cpu_has_interrupt(vcpu));
5966 }
5967
5968 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5969 {
5970         int me;
5971         int cpu = vcpu->cpu;
5972
5973         if (waitqueue_active(&vcpu->wq)) {
5974                 wake_up_interruptible(&vcpu->wq);
5975                 ++vcpu->stat.halt_wakeup;
5976         }
5977
5978         me = get_cpu();
5979         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5980                 if (atomic_xchg(&vcpu->guest_mode, 0))
5981                         smp_send_reschedule(cpu);
5982         put_cpu();
5983 }
5984
5985 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5986 {
5987         return kvm_x86_ops->interrupt_allowed(vcpu);
5988 }
5989
5990 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
5991 {
5992         unsigned long current_rip = kvm_rip_read(vcpu) +
5993                 get_segment_base(vcpu, VCPU_SREG_CS);
5994
5995         return current_rip == linear_rip;
5996 }
5997 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
5998
5999 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6000 {
6001         unsigned long rflags;
6002
6003         rflags = kvm_x86_ops->get_rflags(vcpu);
6004         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6005                 rflags &= ~X86_EFLAGS_TF;
6006         return rflags;
6007 }
6008 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6009
6010 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6011 {
6012         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6013             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6014                 rflags |= X86_EFLAGS_TF;
6015         kvm_x86_ops->set_rflags(vcpu, rflags);
6016         kvm_make_request(KVM_REQ_EVENT, vcpu);
6017 }
6018 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6019
6020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6021 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6022 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6023 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);