3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
25 /* Physical address */
26 #define pa(X) ((X) - __PAGE_OFFSET)
29 * References to members of the new_cpu_data structure.
32 #define X86 new_cpu_data+CPUINFO_x86
33 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
34 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
35 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
36 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
37 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
38 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
39 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
42 * This is how much memory in addition to the memory covered up to
43 * and including _end we need mapped initially.
45 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
46 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
51 * This should be a multiple of a page.
53 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
54 * and small than max_low_pfn, otherwise will waste some page table entries
58 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
60 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
63 /* Enough space to fit pagetables for the low memory linear map */
64 MAPPING_BEYOND_END = \
65 PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
68 * Worst-case size of the kernel mapping we need to make:
69 * the worst-case size of the kernel itself, plus the extra we need
70 * to map for the linear map.
72 KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
74 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
75 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
78 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
79 * %esi points to the real-mode code as a 32-bit pointer.
80 * CS and DS must be 4 GB flat segments, but we don't depend on
81 * any particular GDT layout, because we load our own as soon as we
86 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
87 us to not reload segments */
88 testb $(1<<6), BP_loadflags(%esi)
92 * Set segments to known values.
94 lgdt pa(boot_gdt_descr)
95 movl $(__BOOT_DS),%eax
103 * Clear BSS first so that there are no surprises...
107 movl $pa(__bss_start),%edi
108 movl $pa(__bss_stop),%ecx
113 * Copy bootup parameters out of the way.
114 * Note: %esi still has the pointer to the real-mode data.
115 * With the kexec as boot loader, parameter segment might be loaded beyond
116 * kernel image and might not even be addressable by early boot page tables.
117 * (kexec on panic case). Hence copy out the parameters before initializing
120 movl $pa(boot_params),%edi
121 movl $(PARAM_SIZE/4),%ecx
125 movl pa(boot_params) + NEW_CL_POINTER,%esi
127 jz 1f # No comand line
128 movl $pa(boot_command_line),%edi
129 movl $(COMMAND_LINE_SIZE/4),%ecx
134 #ifdef CONFIG_OLPC_OPENFIRMWARE
135 /* save OFW's pgdir table for later use when calling into OFW */
137 movl %eax, pa(olpc_ofw_pgd)
140 #ifdef CONFIG_PARAVIRT
141 /* This is can only trip for a broken bootloader... */
142 cmpw $0x207, pa(boot_params + BP_version)
145 /* Paravirt-compatible boot parameters. Look to see what architecture
146 we're booting under. */
147 movl pa(boot_params + BP_hardware_subarch), %eax
148 cmpl $num_subarch_entries, %eax
151 movl pa(subarch_entries)(,%eax,4), %eax
152 subl $__PAGE_OFFSET, %eax
158 /* Unknown implementation; there's really
159 nothing we can do at this point. */
165 .long default_entry /* normal x86/PC */
166 .long lguest_entry /* lguest hypervisor */
167 .long xen_entry /* Xen hypervisor */
168 .long default_entry /* Moorestown MID */
169 num_subarch_entries = (. - subarch_entries) / 4
171 #endif /* CONFIG_PARAVIRT */
174 * Initialize page tables. This creates a PDE and a set of page
175 * tables, which are located immediately beyond __brk_base. The variable
176 * _brk_end is set up to point to the first "safe" location.
177 * Mappings are created both at virtual address 0 (identity mapping)
178 * and PAGE_OFFSET for up to _end.
180 * Note that the stack is not yet set up!
183 #ifdef CONFIG_X86_PAE
186 * In PAE mode initial_page_table is statically defined to contain
187 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
188 * entries). The identity mapping is handled by pointing two PGD entries
189 * to the first kernel PMD.
191 * Note the upper half of each PMD or PTE are always zero at this stage.
194 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
196 xorl %ebx,%ebx /* %ebx is kept at zero */
198 movl $pa(__brk_base), %edi
199 movl $pa(initial_pg_pmd), %edx
200 movl $PTE_IDENT_ATTR, %eax
202 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
203 movl %ecx,(%edx) /* Store PMD entry */
204 /* Upper half already zero */
216 * End condition: we must map up to the end + MAPPING_BEYOND_END.
218 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
222 addl $__PAGE_OFFSET, %edi
223 movl %edi, pa(_brk_end)
225 movl %eax, pa(max_pfn_mapped)
227 /* Do early initialization of the fixmap area */
228 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
229 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
232 page_pde_offset = (__PAGE_OFFSET >> 20);
234 movl $pa(__brk_base), %edi
235 movl $pa(initial_page_table), %edx
236 movl $PTE_IDENT_ATTR, %eax
238 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
239 movl %ecx,(%edx) /* Store identity PDE entry */
240 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
248 * End condition: we must map up to the end + MAPPING_BEYOND_END.
250 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
253 addl $__PAGE_OFFSET, %edi
254 movl %edi, pa(_brk_end)
256 movl %eax, pa(max_pfn_mapped)
258 /* Do early initialization of the fixmap area */
259 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
260 movl %eax,pa(initial_page_table+0xffc)
264 * Non-boot CPU entry point; entered from trampoline.S
265 * We can't lgdt here, because lgdt itself uses a data segment, but
266 * we know the trampoline has already loaded the boot_gdt for us.
268 * If cpu hotplug is not supported then this code can go in init section
269 * which will be freed later
275 ENTRY(startup_32_smp)
277 movl $(__BOOT_DS),%eax
282 #endif /* CONFIG_SMP */
286 * New page tables may be in 4Mbyte page mode and may
287 * be using the global pages.
289 * NOTE! If we are on a 486 we may have no cr4 at all!
290 * So we do not try to touch it unless we really have
291 * some bits in it to set. This won't work if the BSP
292 * implements cr4 but this AP does not -- very unlikely
293 * but be warned! The same applies to the pse feature
294 * if not equally supported. --macro
296 * NOTE! We have to correct for the fact that we're
297 * not yet offset PAGE_OFFSET..
299 #define cr4_bits pa(mmu_cr4_features)
303 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
307 testb $X86_CR4_PAE, %al # check if PAE is enabled
310 /* Check if extended functions are implemented */
311 movl $0x80000000, %eax
313 /* Value must be in the range 0x80000001 to 0x8000ffff */
314 subl $0x80000001, %eax
315 cmpl $(0x8000ffff-0x80000001), %eax
318 /* Clear bogus XD_DISABLE bits */
321 mov $0x80000001, %eax
323 /* Execute Disable bit supported? */
324 btl $(X86_FEATURE_NX & 31), %edx
327 /* Setup EFER (Extended Feature Enable Register) */
332 /* Make changes effective */
340 movl $pa(initial_page_table), %eax
341 movl %eax,%cr3 /* set the page table pointer.. */
344 movl %eax,%cr0 /* ..and set paging (PG) bit */
345 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
347 /* Set up the stack pointer */
351 * Initialize eflags. Some BIOS's leave bits like NT set. This would
352 * confuse the debugger if this code is traced.
353 * XXX - best to initialize before switching to protected mode.
360 jz 1f /* Initial CPU cleans BSS */
363 #endif /* CONFIG_SMP */
366 * start system 32-bit setup. We need to re-do some of the things done
367 * in 16-bit mode for the "real" operations.
373 movl $-1,X86_CPUID # -1 for no CPUID initially
375 /* check if it is 486 or 386. */
377 * XXX - this does a lot of unnecessary setup. Alignment checks don't
378 * apply at our cpl of 0 and the stack ought to be aligned already, and
379 * we don't need to preserve eflags.
382 movb $3,X86 # at least 386
384 popl %eax # get EFLAGS
385 movl %eax,%ecx # save original EFLAGS
386 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
387 pushl %eax # copy to EFLAGS
389 pushfl # get new EFLAGS
390 popl %eax # put it in eax
391 xorl %ecx,%eax # change in flags
392 pushl %ecx # restore original EFLAGS
394 testl $0x40000,%eax # check if AC bit changed
397 movb $4,X86 # at least 486
398 testl $0x200000,%eax # check if ID bit changed
401 /* get vendor info */
402 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
404 movl %eax,X86_CPUID # save CPUID level
405 movl %ebx,X86_VENDOR_ID # lo 4 chars
406 movl %edx,X86_VENDOR_ID+4 # next 4 chars
407 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
409 orl %eax,%eax # do we have processor info as well?
412 movl $1,%eax # Use the CPUID instruction to get CPU type
414 movb %al,%cl # save reg for future use
415 andb $0x0f,%ah # mask processor family
417 andb $0xf0,%al # mask model
420 andb $0x0f,%cl # mask mask revision
422 movl %edx,X86_CAPABILITY
424 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
427 is386: movl $2,%ecx # set MP
429 andl $0x80000011,%eax # Save PG,PE,ET
436 ljmp $(__KERNEL_CS),$1f
437 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
438 movl %eax,%ss # after changing gdt.
440 movl $(__USER_DS),%eax # DS/ES contains default USER segment
444 movl $(__KERNEL_PERCPU), %eax
445 movl %eax,%fs # set this cpu's percpu
447 #ifdef CONFIG_CC_STACKPROTECTOR
449 * The linker can't handle this by relocation. Manually set
450 * base address in stack canary segment descriptor.
455 movl $stack_canary,%ecx
456 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
458 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
459 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
462 movl $(__KERNEL_STACK_CANARY),%eax
465 xorl %eax,%eax # Clear LDT
468 cld # gcc2 wants the direction flag cleared at all times
469 pushl $0 # fake return address for unwinder
473 cmpb $0,%cl # the first CPU calls start_kernel
475 movl (stack_start), %esp
477 #endif /* CONFIG_SMP */
481 * We depend on ET to be correct. This checks for 287/387.
484 movb $0,X86_HARD_MATH
490 movl %cr0,%eax /* no coprocessor: have to set bits */
491 xorl $4,%eax /* set EM */
495 1: movb $1,X86_HARD_MATH
496 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
502 * sets up a idt with 256 entries pointing to
503 * ignore_int, interrupt gates. It doesn't actually load
504 * idt - that can be done only after paging has been enabled
505 * and the kernel moved to PAGE_OFFSET. Interrupts
506 * are enabled elsewhere, when we can be relatively
507 * sure everything is ok.
509 * Warning: %esi is live across this function.
513 movl $(__KERNEL_CS << 16),%eax
514 movw %dx,%ax /* selector = 0x0010 = cs */
515 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
526 .macro set_early_handler handler,trapno
528 movl $(__KERNEL_CS << 16),%eax
530 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
532 movl %eax,8*\trapno(%edi)
533 movl %edx,8*\trapno+4(%edi)
536 set_early_handler handler=early_divide_err,trapno=0
537 set_early_handler handler=early_illegal_opcode,trapno=6
538 set_early_handler handler=early_protection_fault,trapno=13
539 set_early_handler handler=early_page_fault,trapno=14
545 pushl $0 /* fake errcode */
548 early_illegal_opcode:
550 pushl $0 /* fake errcode */
553 early_protection_fault:
565 movl $(__KERNEL_DS),%eax
568 cmpl $2,early_recursion_flag
570 incl early_recursion_flag
573 pushl %edx /* trapno */
582 /* This is the default interrupt "handler" :-) */
592 movl $(__KERNEL_DS),%eax
595 cmpl $2,early_recursion_flag
597 incl early_recursion_flag
616 #include "verify_cpu.S"
621 .long i386_start_kernel
628 #ifdef CONFIG_X86_PAE
632 ENTRY(initial_page_table)
637 ENTRY(empty_zero_page)
639 ENTRY(swapper_pg_dir)
643 * This starts the data section.
645 #ifdef CONFIG_X86_PAE
647 /* Page-aligned for the benefit of paravirt? */
649 ENTRY(initial_page_table)
650 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
652 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
653 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
654 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
657 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
658 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
662 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
664 # error "Kernel PMDs should be 1, 2 or 3"
666 .align PAGE_SIZE_asm /* needs to be page-sized too */
671 .long init_thread_union+THREAD_SIZE
676 early_recursion_flag:
680 .asciz "Unknown interrupt or fault at: %p %p %p\n"
684 .ascii "BUG: Int %d: CR2 %p\n"
686 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
687 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
689 .ascii " err %p EIP %p CS %p flg %p\n"
690 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
691 .ascii " %p %p %p %p %p %p %p %p\n"
692 .asciz " %p %p %p %p %p %p %p %p\n"
694 #include "../../x86/xen/xen-head.S"
697 * The IDT and GDT 'descriptors' are a strange 48-bit object
698 * only used by the lidt and lgdt instructions. They are not
699 * like usual segment descriptors - they consist of a 16-bit
700 * segment size, and 32-bit linear address value:
703 .globl boot_gdt_descr
707 # early boot GDT descriptor (must use 1:1 address mapping)
708 .word 0 # 32 bit align gdt_desc.address
711 .long boot_gdt - __PAGE_OFFSET
713 .word 0 # 32-bit align idt_desc.address
715 .word IDT_ENTRIES*8-1 # idt contains 256 entries
718 # boot GDT descriptor (later on used by CPU#0):
719 .word 0 # 32 bit align gdt_desc.address
720 ENTRY(early_gdt_descr)
721 .word GDT_ENTRIES*8-1
722 .long gdt_page /* Overwritten for secondary CPUs */
725 * The boot_gdt must mirror the equivalent in setup.S and is
726 * used only for booting.
728 .align L1_CACHE_BYTES
730 .fill GDT_ENTRY_BOOT_CS,8,0
731 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
732 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */