x86/devicetree: Use generic PCI <-> OF matching
[pandora-kernel.git] / arch / x86 / kernel / devicetree.c
1 /*
2  * Architecture specific OF callbacks.
3  */
4 #include <linux/bootmem.h>
5 #include <linux/io.h>
6 #include <linux/interrupt.h>
7 #include <linux/list.h>
8 #include <linux/of.h>
9 #include <linux/of_fdt.h>
10 #include <linux/of_address.h>
11 #include <linux/of_platform.h>
12 #include <linux/of_irq.h>
13 #include <linux/slab.h>
14 #include <linux/pci.h>
15 #include <linux/of_pci.h>
16
17 #include <asm/hpet.h>
18 #include <asm/irq_controller.h>
19 #include <asm/apic.h>
20 #include <asm/pci_x86.h>
21
22 __initdata u64 initial_dtb;
23 char __initdata cmd_line[COMMAND_LINE_SIZE];
24 static LIST_HEAD(irq_domains);
25 static DEFINE_RAW_SPINLOCK(big_irq_lock);
26
27 int __initdata of_ioapic;
28
29 #ifdef CONFIG_X86_IO_APIC
30 static void add_interrupt_host(struct irq_domain *ih)
31 {
32         unsigned long flags;
33
34         raw_spin_lock_irqsave(&big_irq_lock, flags);
35         list_add(&ih->l, &irq_domains);
36         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
37 }
38 #endif
39
40 static struct irq_domain *get_ih_from_node(struct device_node *controller)
41 {
42         struct irq_domain *ih, *found = NULL;
43         unsigned long flags;
44
45         raw_spin_lock_irqsave(&big_irq_lock, flags);
46         list_for_each_entry(ih, &irq_domains, l) {
47                 if (ih->controller ==  controller) {
48                         found = ih;
49                         break;
50                 }
51         }
52         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
53         return found;
54 }
55
56 unsigned int irq_create_of_mapping(struct device_node *controller,
57                                    const u32 *intspec, unsigned int intsize)
58 {
59         struct irq_domain *ih;
60         u32 virq, type;
61         int ret;
62
63         ih = get_ih_from_node(controller);
64         if (!ih)
65                 return 0;
66         ret = ih->xlate(ih, intspec, intsize, &virq, &type);
67         if (ret)
68                 return 0;
69         if (type == IRQ_TYPE_NONE)
70                 return virq;
71         irq_set_irq_type(virq, type);
72         return virq;
73 }
74 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
75
76 unsigned long pci_address_to_pio(phys_addr_t address)
77 {
78         /*
79          * The ioport address can be directly used by inX / outX
80          */
81         BUG_ON(address >= (1 << 16));
82         return (unsigned long)address;
83 }
84 EXPORT_SYMBOL_GPL(pci_address_to_pio);
85
86 void __init early_init_dt_scan_chosen_arch(unsigned long node)
87 {
88         BUG();
89 }
90
91 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
92 {
93         BUG();
94 }
95
96 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
97 {
98         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
99 }
100
101 void __init add_dtb(u64 data)
102 {
103         initial_dtb = data + offsetof(struct setup_data, data);
104 }
105
106 /*
107  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
108  */
109 static struct of_device_id __initdata ce4100_ids[] = {
110         { .compatible = "intel,ce4100-cp", },
111         { .compatible = "isa", },
112         { .compatible = "pci", },
113         {},
114 };
115
116 static int __init add_bus_probe(void)
117 {
118         if (!of_have_populated_dt())
119                 return 0;
120
121         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
122 }
123 module_init(add_bus_probe);
124
125 #ifdef CONFIG_PCI
126 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
127 {
128         struct device_node *np;
129
130         for_each_node_by_type(np, "pci") {
131                 const void *prop;
132                 unsigned int bus_min;
133
134                 prop = of_get_property(np, "bus-range", NULL);
135                 if (!prop)
136                         continue;
137                 bus_min = be32_to_cpup(prop);
138                 if (bus->number == bus_min)
139                         return np;
140         }
141         return NULL;
142 }
143
144 static int x86_of_pci_irq_enable(struct pci_dev *dev)
145 {
146         struct of_irq oirq;
147         u32 virq;
148         int ret;
149         u8 pin;
150
151         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
152         if (ret)
153                 return ret;
154         if (!pin)
155                 return 0;
156
157         ret = of_irq_map_pci(dev, &oirq);
158         if (ret)
159                 return ret;
160
161         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
162                         oirq.size);
163         if (virq == 0)
164                 return -EINVAL;
165         dev->irq = virq;
166         return 0;
167 }
168
169 static void x86_of_pci_irq_disable(struct pci_dev *dev)
170 {
171 }
172
173 void __cpuinit x86_of_pci_init(void)
174 {
175         pcibios_enable_irq = x86_of_pci_irq_enable;
176         pcibios_disable_irq = x86_of_pci_irq_disable;
177 }
178 #endif
179
180 static void __init dtb_setup_hpet(void)
181 {
182 #ifdef CONFIG_HPET_TIMER
183         struct device_node *dn;
184         struct resource r;
185         int ret;
186
187         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
188         if (!dn)
189                 return;
190         ret = of_address_to_resource(dn, 0, &r);
191         if (ret) {
192                 WARN_ON(1);
193                 return;
194         }
195         hpet_address = r.start;
196 #endif
197 }
198
199 static void __init dtb_lapic_setup(void)
200 {
201 #ifdef CONFIG_X86_LOCAL_APIC
202         struct device_node *dn;
203         struct resource r;
204         int ret;
205
206         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
207         if (!dn)
208                 return;
209
210         ret = of_address_to_resource(dn, 0, &r);
211         if (WARN_ON(ret))
212                 return;
213
214         /* Did the boot loader setup the local APIC ? */
215         if (!cpu_has_apic) {
216                 if (apic_force_enable(r.start))
217                         return;
218         }
219         smp_found_config = 1;
220         pic_mode = 1;
221         register_lapic_address(r.start);
222         generic_processor_info(boot_cpu_physical_apicid,
223                                GET_APIC_VERSION(apic_read(APIC_LVR)));
224 #endif
225 }
226
227 #ifdef CONFIG_X86_IO_APIC
228 static unsigned int ioapic_id;
229
230 static void __init dtb_add_ioapic(struct device_node *dn)
231 {
232         struct resource r;
233         int ret;
234
235         ret = of_address_to_resource(dn, 0, &r);
236         if (ret) {
237                 printk(KERN_ERR "Can't obtain address from node %s.\n",
238                                 dn->full_name);
239                 return;
240         }
241         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
242 }
243
244 static void __init dtb_ioapic_setup(void)
245 {
246         struct device_node *dn;
247
248         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
249                 dtb_add_ioapic(dn);
250
251         if (nr_ioapics) {
252                 of_ioapic = 1;
253                 return;
254         }
255         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
256 }
257 #else
258 static void __init dtb_ioapic_setup(void) {}
259 #endif
260
261 static void __init dtb_apic_setup(void)
262 {
263         dtb_lapic_setup();
264         dtb_ioapic_setup();
265 }
266
267 #ifdef CONFIG_OF_FLATTREE
268 static void __init x86_flattree_get_config(void)
269 {
270         u32 size, map_len;
271         void *new_dtb;
272
273         if (!initial_dtb)
274                 return;
275
276         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
277                         (u64)sizeof(struct boot_param_header));
278
279         initial_boot_params = early_memremap(initial_dtb, map_len);
280         size = be32_to_cpu(initial_boot_params->totalsize);
281         if (map_len < size) {
282                 early_iounmap(initial_boot_params, map_len);
283                 initial_boot_params = early_memremap(initial_dtb, size);
284                 map_len = size;
285         }
286
287         new_dtb = alloc_bootmem(size);
288         memcpy(new_dtb, initial_boot_params, size);
289         early_iounmap(initial_boot_params, map_len);
290
291         initial_boot_params = new_dtb;
292
293         /* root level address cells */
294         of_scan_flat_dt(early_init_dt_scan_root, NULL);
295
296         unflatten_device_tree();
297 }
298 #else
299 static inline void x86_flattree_get_config(void) { }
300 #endif
301
302 void __init x86_dtb_init(void)
303 {
304         x86_flattree_get_config();
305
306         if (!of_have_populated_dt())
307                 return;
308
309         dtb_setup_hpet();
310         dtb_apic_setup();
311 }
312
313 #ifdef CONFIG_X86_IO_APIC
314
315 struct of_ioapic_type {
316         u32 out_type;
317         u32 trigger;
318         u32 polarity;
319 };
320
321 static struct of_ioapic_type of_ioapic_type[] =
322 {
323         {
324                 .out_type       = IRQ_TYPE_EDGE_RISING,
325                 .trigger        = IOAPIC_EDGE,
326                 .polarity       = 1,
327         },
328         {
329                 .out_type       = IRQ_TYPE_LEVEL_LOW,
330                 .trigger        = IOAPIC_LEVEL,
331                 .polarity       = 0,
332         },
333         {
334                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
335                 .trigger        = IOAPIC_LEVEL,
336                 .polarity       = 1,
337         },
338         {
339                 .out_type       = IRQ_TYPE_EDGE_FALLING,
340                 .trigger        = IOAPIC_EDGE,
341                 .polarity       = 0,
342         },
343 };
344
345 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
346                         u32 *out_hwirq, u32 *out_type)
347 {
348         struct mp_ioapic_gsi *gsi_cfg;
349         struct io_apic_irq_attr attr;
350         struct of_ioapic_type *it;
351         u32 line, idx, type;
352
353         if (intsize < 2)
354                 return -EINVAL;
355
356         line = *intspec;
357         idx = (u32) id->priv;
358         gsi_cfg = mp_ioapic_gsi_routing(idx);
359         *out_hwirq = line + gsi_cfg->gsi_base;
360
361         intspec++;
362         type = *intspec;
363
364         if (type >= ARRAY_SIZE(of_ioapic_type))
365                 return -EINVAL;
366
367         it = of_ioapic_type + type;
368         *out_type = it->out_type;
369
370         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
371
372         return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
373 }
374
375 static void __init ioapic_add_ofnode(struct device_node *np)
376 {
377         struct resource r;
378         int i, ret;
379
380         ret = of_address_to_resource(np, 0, &r);
381         if (ret) {
382                 printk(KERN_ERR "Failed to obtain address for %s\n",
383                                 np->full_name);
384                 return;
385         }
386
387         for (i = 0; i < nr_ioapics; i++) {
388                 if (r.start == mpc_ioapic_addr(i)) {
389                         struct irq_domain *id;
390
391                         id = kzalloc(sizeof(*id), GFP_KERNEL);
392                         BUG_ON(!id);
393                         id->controller = np;
394                         id->xlate = ioapic_xlate;
395                         id->priv = (void *)i;
396                         add_interrupt_host(id);
397                         return;
398                 }
399         }
400         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
401 }
402
403 void __init x86_add_irq_domains(void)
404 {
405         struct device_node *dp;
406
407         if (!of_have_populated_dt())
408                 return;
409
410         for_each_node_with_property(dp, "interrupt-controller") {
411                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
412                         ioapic_add_ofnode(dp);
413         }
414 }
415 #else
416 void __init x86_add_irq_domains(void) { }
417 #endif