arch/x86/kernel/cpu/mcheck/mce_amd.c

   1 /*
   2  *  (c) 2005, 2006 Advanced Micro Devices, Inc.
   3  *  Your use of this code is subject to the terms and conditions of the
   4  *  GNU general public license version 2. See "COPYING" or
   5  *  http://www.gnu.org/licenses/gpl.html
   6  *
   7  *  Written by Jacob Shin - AMD, Inc.
   8  *
   9  *  Support : jacob.shin@amd.com
  10  *
  11  *  April 2006
  12  *     - added support for AMD Family 0x10 processors
  13  *
  14  *  All MC4_MISCi registers are shared between multi-cores
  15  */
  16 #include <linux/interrupt.h>
  17 #include <linux/notifier.h>
  18 #include <linux/kobject.h>
  19 #include <linux/percpu.h>
  20 #include <linux/sysdev.h>
  21 #include <linux/errno.h>
  22 #include <linux/sched.h>
  23 #include <linux/sysfs.h>
  24 #include <linux/slab.h>
  25 #include <linux/init.h>
  26 #include <linux/cpu.h>
  27 #include <linux/smp.h>
  28
  29 #include <asm/apic.h>
  30 #include <asm/idle.h>
  31 #include <asm/mce.h>
  32 #include <asm/msr.h>
  33
  34 #define NR_BANKS          6
  35 #define NR_BLOCKS         9
  36 #define THRESHOLD_MAX     0xFFF
  37 #define INT_TYPE_APIC     0x00020000
  38 #define MASK_VALID_HI     0x80000000
  39 #define MASK_CNTP_HI      0x40000000
  40 #define MASK_LOCKED_HI    0x20000000
  41 #define MASK_LVTOFF_HI    0x00F00000
  42 #define MASK_COUNT_EN_HI  0x00080000
  43 #define MASK_INT_TYPE_HI  0x00060000
  44 #define MASK_OVERFLOW_HI  0x00010000
  45 #define MASK_ERR_COUNT_HI 0x00000FFF
  46 #define MASK_BLKPTR_LO    0xFF000000
  47 #define MCG_XBLK_ADDR     0xC0000400
  48
  49 struct threshold_block {
  50         unsigned int            block;
  51         unsigned int            bank;
  52         unsigned int            cpu;
  53         u32                     address;
  54         u16                     interrupt_enable;
  55         bool                    interrupt_capable;
  56         u16                     threshold_limit;
  57         struct kobject          kobj;
  58         struct list_head        miscj;
  59 };
  60
  61 struct threshold_bank {
  62         struct kobject          *kobj;
  63         struct threshold_block  *blocks;
  64         cpumask_var_t           cpus;
  65 };
  66 static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks);
  67
  68 static unsigned char shared_bank[NR_BANKS] = {
  69         0, 0, 0, 0, 1
  70 };
  71
  72 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
  73
  74 static void amd_threshold_interrupt(void);
  75
  76 /*
  77  * CPU Initialization
  78  */
  79
  80 struct thresh_restart {
  81         struct threshold_block  *b;
  82         int                     reset;
  83         int                     set_lvt_off;
  84         int                     lvt_off;
  85         u16                     old_limit;
  86 };
  87
  88 static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits)
  89 {
  90         /*
  91          * bank 4 supports APIC LVT interrupts implicitly since forever.
  92          */
  93         if (bank == 4)
  94                 return true;
  95
  96         /*
  97          * IntP: interrupt present; if this bit is set, the thresholding
  98          * bank can generate APIC LVT interrupts
  99          */
 100         return msr_high_bits & BIT(28);
 101 }
 102
 103 static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi)
 104 {
 105         int msr = (hi & MASK_LVTOFF_HI) >> 20;
 106
 107         if (apic < 0) {
 108                 pr_err(FW_BUG "cpu %d, failed to setup threshold interrupt "
 109                        "for bank %d, block %d (MSR%08X=0x%x%08x)\n", b->cpu,
 110                        b->bank, b->block, b->address, hi, lo);
 111                 return 0;
 112         }
 113
 114         if (apic != msr) {
 115                 pr_err(FW_BUG "cpu %d, invalid threshold interrupt offset %d "
 116                        "for bank %d, block %d (MSR%08X=0x%x%08x)\n",
 117                        b->cpu, apic, b->bank, b->block, b->address, hi, lo);
 118                 return 0;
 119         }
 120
 121         return 1;
 122 };
 123
 124 /*
 125  * Called via smp_call_function_single(), must be called with correct
 126  * cpu affinity.
 127  */
 128 static void threshold_restart_bank(void *_tr)
 129 {
 130         struct thresh_restart *tr = _tr;
 131         u32 hi, lo;
 132
 133         rdmsr(tr->b->address, lo, hi);
 134
 135         if (tr->b->threshold_limit < (hi & THRESHOLD_MAX))
 136                 tr->reset = 1;  /* limit cannot be lower than err count */
 137
 138         if (tr->reset) {                /* reset err count and overflow bit */
 139                 hi =
 140                     (hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
 141                     (THRESHOLD_MAX - tr->b->threshold_limit);
 142         } else if (tr->old_limit) {     /* change limit w/o reset */
 143                 int new_count = (hi & THRESHOLD_MAX) +
 144                     (tr->old_limit - tr->b->threshold_limit);
 145
 146                 hi = (hi & ~MASK_ERR_COUNT_HI) |
 147                     (new_count & THRESHOLD_MAX);
 148         }
 149
 150         /* clear IntType */
 151         hi &= ~MASK_INT_TYPE_HI;
 152
 153         if (!tr->b->interrupt_capable)
 154                 goto done;
 155
 156         if (tr->set_lvt_off) {
 157                 if (lvt_off_valid(tr->b, tr->lvt_off, lo, hi)) {
 158                         /* set new lvt offset */
 159                         hi &= ~MASK_LVTOFF_HI;
 160                         hi |= tr->lvt_off << 20;
 161                 }
 162         }
 163
 164         if (tr->b->interrupt_enable)
 165                 hi |= INT_TYPE_APIC;
 166
 167  done:
 168
 169         hi |= MASK_COUNT_EN_HI;
 170         wrmsr(tr->b->address, lo, hi);
 171 }
 172
 173 static void mce_threshold_block_init(struct threshold_block *b, int offset)
 174 {
 175         struct thresh_restart tr = {
 176                 .b                      = b,
 177                 .set_lvt_off            = 1,
 178                 .lvt_off                = offset,
 179         };
 180
 181         b->threshold_limit              = THRESHOLD_MAX;
 182         threshold_restart_bank(&tr);
 183 };
 184
 185 static int setup_APIC_mce(int reserved, int new)
 186 {
 187         if (reserved < 0 && !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR,
 188                                               APIC_EILVT_MSG_FIX, 0))
 189                 return new;
 190
 191         return reserved;
 192 }
 193
 194 /* cpu init entry point, called from mce.c with preempt off */
 195 void mce_amd_feature_init(struct cpuinfo_x86 *c)
 196 {
 197         struct threshold_block b;
 198         unsigned int cpu = smp_processor_id();
 199         u32 low = 0, high = 0, address = 0;
 200         unsigned int bank, block;
 201         int offset = -1;
 202
 203         for (bank = 0; bank < NR_BANKS; ++bank) {
 204                 for (block = 0; block < NR_BLOCKS; ++block) {
 205                         if (block == 0)
 206                                 address = MSR_IA32_MC0_MISC + bank * 4;
 207                         else if (block == 1) {
 208                                 address = (low & MASK_BLKPTR_LO) >> 21;
 209                                 if (!address)
 210                                         break;
 211
 212                                 address += MCG_XBLK_ADDR;
 213                         } else
 214                                 ++address;
 215
 216                         if (rdmsr_safe(address, &low, &high))
 217                                 break;
 218
 219                         if (!(high & MASK_VALID_HI))
 220                                 continue;
 221
 222                         if (!(high & MASK_CNTP_HI)  ||
 223                              (high & MASK_LOCKED_HI))
 224                                 continue;
 225
 226                         if (!block)
 227                                 per_cpu(bank_map, cpu) |= (1 << bank);
 228
 229                         if (shared_bank[bank] && c->cpu_core_id)
 230                                 break;
 231
 232                         memset(&b, 0, sizeof(b));
 233                         b.cpu                   = cpu;
 234                         b.bank                  = bank;
 235                         b.block                 = block;
 236                         b.address               = address;
 237                         b.interrupt_capable     = lvt_interrupt_supported(bank, high);
 238
 239                         if (b.interrupt_capable) {
 240                                 int new = (high & MASK_LVTOFF_HI) >> 20;
 241                                 offset  = setup_APIC_mce(offset, new);
 242                         }
 243
 244                         mce_threshold_block_init(&b, offset);
 245                         mce_threshold_vector = amd_threshold_interrupt;
 246                 }
 247         }
 248 }
 249
 250 /*
 251  * APIC Interrupt Handler
 252  */
 253
 254 /*
 255  * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
 256  * the interrupt goes off when error_count reaches threshold_limit.
 257  * the handler will simply log mcelog w/ software defined bank number.
 258  */
 259 static void amd_threshold_interrupt(void)
 260 {
 261         u32 low = 0, high = 0, address = 0;
 262         unsigned int bank, block;
 263         struct mce m;
 264
 265         mce_setup(&m);
 266
 267         /* assume first bank caused it */
 268         for (bank = 0; bank < NR_BANKS; ++bank) {
 269                 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
 270                         continue;
 271                 for (block = 0; block < NR_BLOCKS; ++block) {
 272                         if (block == 0) {
 273                                 address = MSR_IA32_MC0_MISC + bank * 4;
 274                         } else if (block == 1) {
 275                                 address = (low & MASK_BLKPTR_LO) >> 21;
 276                                 if (!address)
 277                                         break;
 278                                 address += MCG_XBLK_ADDR;
 279                         } else {
 280                                 ++address;
 281                         }
 282
 283                         if (rdmsr_safe(address, &low, &high))
 284                                 break;
 285
 286                         if (!(high & MASK_VALID_HI)) {
 287                                 if (block)
 288                                         continue;
 289                                 else
 290                                         break;
 291                         }
 292
 293                         if (!(high & MASK_CNTP_HI)  ||
 294                              (high & MASK_LOCKED_HI))
 295                                 continue;
 296
 297                         /*
 298                          * Log the machine check that caused the threshold
 299                          * event.
 300                          */
 301                         machine_check_poll(MCP_TIMESTAMP,
 302                                         &__get_cpu_var(mce_poll_banks));
 303
 304                         if (high & MASK_OVERFLOW_HI) {
 305                                 rdmsrl(address, m.misc);
 306                                 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
 307                                        m.status);
 308                                 m.bank = K8_MCE_THRESHOLD_BASE
 309                                        + bank * NR_BLOCKS
 310                                        + block;
 311                                 mce_log(&m);
 312                                 return;
 313                         }
 314                 }
 315         }
 316 }
 317
 318 /*
 319  * Sysfs Interface
 320  */
 321
 322 struct threshold_attr {
 323         struct attribute attr;
 324         ssize_t (*show) (struct threshold_block *, char *);
 325         ssize_t (*store) (struct threshold_block *, const char *, size_t count);
 326 };
 327
 328 #define SHOW_FIELDS(name)                                               \
 329 static ssize_t show_ ## name(struct threshold_block *b, char *buf)      \
 330 {                                                                       \
 331         return sprintf(buf, "%lx\n", (unsigned long) b->name);          \
 332 }
 333 SHOW_FIELDS(interrupt_enable)
 334 SHOW_FIELDS(threshold_limit)
 335
 336 static ssize_t
 337 store_interrupt_enable(struct threshold_block *b, const char *buf, size_t size)
 338 {
 339         struct thresh_restart tr;
 340         unsigned long new;
 341
 342         if (!b->interrupt_capable)
 343                 return -EINVAL;
 344
 345         if (strict_strtoul(buf, 0, &new) < 0)
 346                 return -EINVAL;
 347
 348         b->interrupt_enable = !!new;
 349
 350         memset(&tr, 0, sizeof(tr));
 351         tr.b            = b;
 352
 353         smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 354
 355         return size;
 356 }
 357
 358 static ssize_t
 359 store_threshold_limit(struct threshold_block *b, const char *buf, size_t size)
 360 {
 361         struct thresh_restart tr;
 362         unsigned long new;
 363
 364         if (strict_strtoul(buf, 0, &new) < 0)
 365                 return -EINVAL;
 366
 367         if (new > THRESHOLD_MAX)
 368                 new = THRESHOLD_MAX;
 369         if (new < 1)
 370                 new = 1;
 371
 372         memset(&tr, 0, sizeof(tr));
 373         tr.old_limit = b->threshold_limit;
 374         b->threshold_limit = new;
 375         tr.b = b;
 376
 377         smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 378
 379         return size;
 380 }
 381
 382 struct threshold_block_cross_cpu {
 383         struct threshold_block  *tb;
 384         long                    retval;
 385 };
 386
 387 static void local_error_count_handler(void *_tbcc)
 388 {
 389         struct threshold_block_cross_cpu *tbcc = _tbcc;
 390         struct threshold_block *b = tbcc->tb;
 391         u32 low, high;
 392
 393         rdmsr(b->address, low, high);
 394         tbcc->retval = (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
 395 }
 396
 397 static ssize_t show_error_count(struct threshold_block *b, char *buf)
 398 {
 399         struct threshold_block_cross_cpu tbcc = { .tb = b, };
 400
 401         smp_call_function_single(b->cpu, local_error_count_handler, &tbcc, 1);
 402         return sprintf(buf, "%lx\n", tbcc.retval);
 403 }
 404
 405 static ssize_t store_error_count(struct threshold_block *b,
 406                                  const char *buf, size_t count)
 407 {
 408         struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
 409
 410         smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 411         return 1;
 412 }
 413
 414 #define RW_ATTR(val)                                                    \
 415 static struct threshold_attr val = {                                    \
 416         .attr   = {.name = __stringify(val), .mode = 0644 },            \
 417         .show   = show_## val,                                          \
 418         .store  = store_## val,                                         \
 419 };
 420
 421 RW_ATTR(interrupt_enable);
 422 RW_ATTR(threshold_limit);
 423 RW_ATTR(error_count);
 424
 425 static struct attribute *default_attrs[] = {
 426         &interrupt_enable.attr,
 427         &threshold_limit.attr,
 428         &error_count.attr,
 429         NULL
 430 };
 431
 432 #define to_block(k)     container_of(k, struct threshold_block, kobj)
 433 #define to_attr(a)      container_of(a, struct threshold_attr, attr)
 434
 435 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
 436 {
 437         struct threshold_block *b = to_block(kobj);
 438         struct threshold_attr *a = to_attr(attr);
 439         ssize_t ret;
 440
 441         ret = a->show ? a->show(b, buf) : -EIO;
 442
 443         return ret;
 444 }
 445
 446 static ssize_t store(struct kobject *kobj, struct attribute *attr,
 447                      const char *buf, size_t count)
 448 {
 449         struct threshold_block *b = to_block(kobj);
 450         struct threshold_attr *a = to_attr(attr);
 451         ssize_t ret;
 452
 453         ret = a->store ? a->store(b, buf, count) : -EIO;
 454
 455         return ret;
 456 }
 457
 458 static const struct sysfs_ops threshold_ops = {
 459         .show                   = show,
 460         .store                  = store,
 461 };
 462
 463 static struct kobj_type threshold_ktype = {
 464         .sysfs_ops              = &threshold_ops,
 465         .default_attrs          = default_attrs,
 466 };
 467
 468 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
 469                                                unsigned int bank,
 470                                                unsigned int block,
 471                                                u32 address)
 472 {
 473         struct threshold_block *b = NULL;
 474         u32 low, high;
 475         int err;
 476
 477         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
 478                 return 0;
 479
 480         if (rdmsr_safe_on_cpu(cpu, address, &low, &high))
 481                 return 0;
 482
 483         if (!(high & MASK_VALID_HI)) {
 484                 if (block)
 485                         goto recurse;
 486                 else
 487                         return 0;
 488         }
 489
 490         if (!(high & MASK_CNTP_HI)  ||
 491              (high & MASK_LOCKED_HI))
 492                 goto recurse;
 493
 494         b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
 495         if (!b)
 496                 return -ENOMEM;
 497
 498         b->block                = block;
 499         b->bank                 = bank;
 500         b->cpu                  = cpu;
 501         b->address              = address;
 502         b->interrupt_enable     = 0;
 503         b->interrupt_capable    = lvt_interrupt_supported(bank, high);
 504         b->threshold_limit      = THRESHOLD_MAX;
 505
 506         INIT_LIST_HEAD(&b->miscj);
 507
 508         if (per_cpu(threshold_banks, cpu)[bank]->blocks) {
 509                 list_add(&b->miscj,
 510                          &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
 511         } else {
 512                 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
 513         }
 514
 515         err = kobject_init_and_add(&b->kobj, &threshold_ktype,
 516                                    per_cpu(threshold_banks, cpu)[bank]->kobj,
 517                                    "misc%i", block);
 518         if (err)
 519                 goto out_free;
 520 recurse:
 521         if (!block) {
 522                 address = (low & MASK_BLKPTR_LO) >> 21;
 523                 if (!address)
 524                         return 0;
 525                 address += MCG_XBLK_ADDR;
 526         } else {
 527                 ++address;
 528         }
 529
 530         err = allocate_threshold_blocks(cpu, bank, ++block, address);
 531         if (err)
 532                 goto out_free;
 533
 534         if (b)
 535                 kobject_uevent(&b->kobj, KOBJ_ADD);
 536
 537         return err;
 538
 539 out_free:
 540         if (b) {
 541                 kobject_put(&b->kobj);
 542                 list_del(&b->miscj);
 543                 kfree(b);
 544         }
 545         return err;
 546 }
 547
 548 static __cpuinit long
 549 local_allocate_threshold_blocks(int cpu, unsigned int bank)
 550 {
 551         return allocate_threshold_blocks(cpu, bank, 0,
 552                                          MSR_IA32_MC0_MISC + bank * 4);
 553 }
 554
 555 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
 556 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 557 {
 558         int i, err = 0;
 559         struct threshold_bank *b = NULL;
 560         char name[32];
 561
 562         sprintf(name, "threshold_bank%i", bank);
 563
 564 #ifdef CONFIG_SMP
 565         if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {   /* symlink */
 566                 i = cpumask_first(cpu_llc_shared_mask(cpu));
 567
 568                 /* first core not up yet */
 569                 if (cpu_data(i).cpu_core_id)
 570                         goto out;
 571
 572                 /* already linked */
 573                 if (per_cpu(threshold_banks, cpu)[bank])
 574                         goto out;
 575
 576                 b = per_cpu(threshold_banks, i)[bank];
 577
 578                 if (!b)
 579                         goto out;
 580
 581                 err = sysfs_create_link(&per_cpu(mce_sysdev, cpu).kobj,
 582                                         b->kobj, name);
 583                 if (err)
 584                         goto out;
 585
 586                 cpumask_copy(b->cpus, cpu_llc_shared_mask(cpu));
 587                 per_cpu(threshold_banks, cpu)[bank] = b;
 588
 589                 goto out;
 590         }
 591 #endif
 592
 593         b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
 594         if (!b) {
 595                 err = -ENOMEM;
 596                 goto out;
 597         }
 598         if (!zalloc_cpumask_var(&b->cpus, GFP_KERNEL)) {
 599                 kfree(b);
 600                 err = -ENOMEM;
 601                 goto out;
 602         }
 603
 604         b->kobj = kobject_create_and_add(name, &per_cpu(mce_sysdev, cpu).kobj);
 605         if (!b->kobj)
 606                 goto out_free;
 607
 608 #ifndef CONFIG_SMP
 609         cpumask_setall(b->cpus);
 610 #else
 611         cpumask_set_cpu(cpu, b->cpus);
 612 #endif
 613
 614         per_cpu(threshold_banks, cpu)[bank] = b;
 615
 616         err = local_allocate_threshold_blocks(cpu, bank);
 617         if (err)
 618                 goto out_free;
 619
 620         for_each_cpu(i, b->cpus) {
 621                 if (i == cpu)
 622                         continue;
 623
 624                 err = sysfs_create_link(&per_cpu(mce_sysdev, i).kobj,
 625                                         b->kobj, name);
 626                 if (err)
 627                         goto out;
 628
 629                 per_cpu(threshold_banks, i)[bank] = b;
 630         }
 631
 632         goto out;
 633
 634 out_free:
 635         per_cpu(threshold_banks, cpu)[bank] = NULL;
 636         free_cpumask_var(b->cpus);
 637         kfree(b);
 638 out:
 639         return err;
 640 }
 641
 642 /* create dir/files for all valid threshold banks */
 643 static __cpuinit int threshold_create_device(unsigned int cpu)
 644 {
 645         unsigned int bank;
 646         int err = 0;
 647
 648         for (bank = 0; bank < NR_BANKS; ++bank) {
 649                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
 650                         continue;
 651                 err = threshold_create_bank(cpu, bank);
 652                 if (err)
 653                         return err;
 654         }
 655
 656         return err;
 657 }
 658
 659 /*
 660  * let's be hotplug friendly.
 661  * in case of multiple core processors, the first core always takes ownership
 662  *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
 663  */
 664
 665 static void deallocate_threshold_block(unsigned int cpu,
 666                                                  unsigned int bank)
 667 {
 668         struct threshold_block *pos = NULL;
 669         struct threshold_block *tmp = NULL;
 670         struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
 671
 672         if (!head)
 673                 return;
 674
 675         list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
 676                 kobject_put(&pos->kobj);
 677                 list_del(&pos->miscj);
 678                 kfree(pos);
 679         }
 680
 681         kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
 682         per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
 683 }
 684
 685 static void threshold_remove_bank(unsigned int cpu, int bank)
 686 {
 687         struct threshold_bank *b;
 688         char name[32];
 689         int i = 0;
 690
 691         b = per_cpu(threshold_banks, cpu)[bank];
 692         if (!b)
 693                 return;
 694         if (!b->blocks)
 695                 goto free_out;
 696
 697         sprintf(name, "threshold_bank%i", bank);
 698
 699 #ifdef CONFIG_SMP
 700         /* sibling symlink */
 701         if (shared_bank[bank] && b->blocks->cpu != cpu) {
 702                 sysfs_remove_link(&per_cpu(mce_sysdev, cpu).kobj, name);
 703                 per_cpu(threshold_banks, cpu)[bank] = NULL;
 704
 705                 return;
 706         }
 707 #endif
 708
 709         /* remove all sibling symlinks before unregistering */
 710         for_each_cpu(i, b->cpus) {
 711                 if (i == cpu)
 712                         continue;
 713
 714                 sysfs_remove_link(&per_cpu(mce_sysdev, i).kobj, name);
 715                 per_cpu(threshold_banks, i)[bank] = NULL;
 716         }
 717
 718         deallocate_threshold_block(cpu, bank);
 719
 720 free_out:
 721         kobject_del(b->kobj);
 722         kobject_put(b->kobj);
 723         free_cpumask_var(b->cpus);
 724         kfree(b);
 725         per_cpu(threshold_banks, cpu)[bank] = NULL;
 726 }
 727
 728 static void threshold_remove_device(unsigned int cpu)
 729 {
 730         unsigned int bank;
 731
 732         for (bank = 0; bank < NR_BANKS; ++bank) {
 733                 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
 734                         continue;
 735                 threshold_remove_bank(cpu, bank);
 736         }
 737 }
 738
 739 /* get notified when a cpu comes on/off */
 740 static void __cpuinit
 741 amd_64_threshold_cpu_callback(unsigned long action, unsigned int cpu)
 742 {
 743         switch (action) {
 744         case CPU_ONLINE:
 745         case CPU_ONLINE_FROZEN:
 746                 threshold_create_device(cpu);
 747                 break;
 748         case CPU_DEAD:
 749         case CPU_DEAD_FROZEN:
 750                 threshold_remove_device(cpu);
 751                 break;
 752         default:
 753                 break;
 754         }
 755 }
 756
 757 static __init int threshold_init_device(void)
 758 {
 759         unsigned lcpu = 0;
 760
 761         /* to hit CPUs online before the notifier is up */
 762         for_each_online_cpu(lcpu) {
 763                 int err = threshold_create_device(lcpu);
 764
 765                 if (err)
 766                         return err;
 767         }
 768         threshold_cpu_callback = amd_64_threshold_cpu_callback;
 769
 770         return 0;
 771 }
 772 device_initcall(threshold_init_device);