arch/x86/kernel/apic/numaq_32.c

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar
   6  *
   7  * All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  17  * NON INFRINGEMENT.  See the GNU General Public License for more
  18  * details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  *
  24  * Send feedback to <gone@us.ibm.com>
  25  */
  26 #include <linux/nodemask.h>
  27 #include <linux/topology.h>
  28 #include <linux/bootmem.h>
  29 #include <linux/memblock.h>
  30 #include <linux/threads.h>
  31 #include <linux/cpumask.h>
  32 #include <linux/kernel.h>
  33 #include <linux/mmzone.h>
  34 #include <linux/module.h>
  35 #include <linux/string.h>
  36 #include <linux/init.h>
  37 #include <linux/numa.h>
  38 #include <linux/smp.h>
  39 #include <linux/io.h>
  40 #include <linux/mm.h>
  41
  42 #include <asm/processor.h>
  43 #include <asm/fixmap.h>
  44 #include <asm/mpspec.h>
  45 #include <asm/numaq.h>
  46 #include <asm/setup.h>
  47 #include <asm/apic.h>
  48 #include <asm/e820.h>
  49 #include <asm/ipi.h>
  50
  51 #define MB_TO_PAGES(addr)               ((addr) << (20 - PAGE_SHIFT))
  52
  53 int found_numaq;
  54
  55 /*
  56  * Have to match translation table entries to main table entries by counter
  57  * hence the mpc_record variable .... can't see a less disgusting way of
  58  * doing this ....
  59  */
  60 struct mpc_trans {
  61         unsigned char                   mpc_type;
  62         unsigned char                   trans_len;
  63         unsigned char                   trans_type;
  64         unsigned char                   trans_quad;
  65         unsigned char                   trans_global;
  66         unsigned char                   trans_local;
  67         unsigned short                  trans_reserved;
  68 };
  69
  70 static int                              mpc_record;
  71
  72 static struct mpc_trans                 *translation_table[MAX_MPC_ENTRY];
  73
  74 int                                     mp_bus_id_to_node[MAX_MP_BUSSES];
  75 int                                     mp_bus_id_to_local[MAX_MP_BUSSES];
  76 int                                     quad_local_to_mp_bus_id[NR_CPUS/4][4];
  77
  78
  79 static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
  80 {
  81         struct eachquadmem *eq = scd->eq + node;
  82
  83         node_set_online(node);
  84
  85         /* Convert to pages */
  86         node_start_pfn[node] =
  87                  MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
  88
  89         node_end_pfn[node] =
  90                  MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
  91
  92         memblock_x86_register_active_regions(node, node_start_pfn[node],
  93                                                 node_end_pfn[node]);
  94
  95         memory_present(node, node_start_pfn[node], node_end_pfn[node]);
  96
  97         node_remap_size[node] = node_memmap_size_bytes(node,
  98                                         node_start_pfn[node],
  99                                         node_end_pfn[node]);
 100 }
 101
 102 /*
 103  * Function: smp_dump_qct()
 104  *
 105  * Description: gets memory layout from the quad config table.  This
 106  * function also updates node_online_map with the nodes (quads) present.
 107  */
 108 static void __init smp_dump_qct(void)
 109 {
 110         struct sys_cfg_data *scd;
 111         int node;
 112
 113         scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
 114
 115         nodes_clear(node_online_map);
 116         for_each_node(node) {
 117                 if (scd->quads_present31_0 & (1 << node))
 118                         numaq_register_node(node, scd);
 119         }
 120 }
 121
 122 void __cpuinit numaq_tsc_disable(void)
 123 {
 124         if (!found_numaq)
 125                 return;
 126
 127         if (num_online_nodes() > 1) {
 128                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
 129                 setup_clear_cpu_cap(X86_FEATURE_TSC);
 130         }
 131 }
 132
 133 static void __init numaq_tsc_init(void)
 134 {
 135         numaq_tsc_disable();
 136 }
 137
 138 static inline int generate_logical_apicid(int quad, int phys_apicid)
 139 {
 140         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
 141 }
 142
 143 /* x86_quirks member */
 144 static int mpc_apic_id(struct mpc_cpu *m)
 145 {
 146         int quad = translation_table[mpc_record]->trans_quad;
 147         int logical_apicid = generate_logical_apicid(quad, m->apicid);
 148
 149         printk(KERN_DEBUG
 150                 "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
 151                  m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
 152                 (m->cpufeature & CPU_MODEL_MASK) >> 4,
 153                  m->apicver, quad, logical_apicid);
 154
 155         return logical_apicid;
 156 }
 157
 158 /* x86_quirks member */
 159 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
 160 {
 161         int quad = translation_table[mpc_record]->trans_quad;
 162         int local = translation_table[mpc_record]->trans_local;
 163
 164         mp_bus_id_to_node[m->busid] = quad;
 165         mp_bus_id_to_local[m->busid] = local;
 166
 167         printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
 168 }
 169
 170 /* x86_quirks member */
 171 static void mpc_oem_pci_bus(struct mpc_bus *m)
 172 {
 173         int quad = translation_table[mpc_record]->trans_quad;
 174         int local = translation_table[mpc_record]->trans_local;
 175
 176         quad_local_to_mp_bus_id[quad][local] = m->busid;
 177 }
 178
 179 /*
 180  * Called from mpparse code.
 181  * mode = 0: prescan
 182  * mode = 1: one mpc entry scanned
 183  */
 184 static void numaq_mpc_record(unsigned int mode)
 185 {
 186         if (!mode)
 187                 mpc_record = 0;
 188         else
 189                 mpc_record++;
 190 }
 191
 192 static void __init MP_translation_info(struct mpc_trans *m)
 193 {
 194         printk(KERN_INFO
 195             "Translation: record %d, type %d, quad %d, global %d, local %d\n",
 196                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
 197                m->trans_local);
 198
 199         if (mpc_record >= MAX_MPC_ENTRY)
 200                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
 201         else
 202                 translation_table[mpc_record] = m; /* stash this for later */
 203
 204         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
 205                 node_set_online(m->trans_quad);
 206 }
 207
 208 static int __init mpf_checksum(unsigned char *mp, int len)
 209 {
 210         int sum = 0;
 211
 212         while (len--)
 213                 sum += *mp++;
 214
 215         return sum & 0xFF;
 216 }
 217
 218 /*
 219  * Read/parse the MPC oem tables
 220  */
 221 static void __init smp_read_mpc_oem(struct mpc_table *mpc)
 222 {
 223         struct mpc_oemtable *oemtable = (void *)(long)mpc->oemptr;
 224         int count = sizeof(*oemtable);  /* the header size */
 225         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 226
 227         mpc_record = 0;
 228         printk(KERN_INFO
 229                 "Found an OEM MPC table at %8p - parsing it...\n", oemtable);
 230
 231         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
 232                 printk(KERN_WARNING
 233                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
 234                        oemtable->signature[0], oemtable->signature[1],
 235                        oemtable->signature[2], oemtable->signature[3]);
 236                 return;
 237         }
 238
 239         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
 240                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
 241                 return;
 242         }
 243
 244         while (count < oemtable->length) {
 245                 switch (*oemptr) {
 246                 case MP_TRANSLATION:
 247                         {
 248                                 struct mpc_trans *m = (void *)oemptr;
 249
 250                                 MP_translation_info(m);
 251                                 oemptr += sizeof(*m);
 252                                 count += sizeof(*m);
 253                                 ++mpc_record;
 254                                 break;
 255                         }
 256                 default:
 257                         printk(KERN_WARNING
 258                                "Unrecognised OEM table entry type! - %d\n",
 259                                (int)*oemptr);
 260                         return;
 261                 }
 262         }
 263 }
 264
 265 static __init void early_check_numaq(void)
 266 {
 267         /*
 268          * get boot-time SMP configuration:
 269          */
 270         if (smp_found_config)
 271                 early_get_smp_config();
 272
 273         if (found_numaq) {
 274                 x86_init.mpparse.mpc_record = numaq_mpc_record;
 275                 x86_init.mpparse.setup_ioapic_ids = x86_init_noop;
 276                 x86_init.mpparse.mpc_apic_id = mpc_apic_id;
 277                 x86_init.mpparse.smp_read_mpc_oem = smp_read_mpc_oem;
 278                 x86_init.mpparse.mpc_oem_pci_bus = mpc_oem_pci_bus;
 279                 x86_init.mpparse.mpc_oem_bus_info = mpc_oem_bus_info;
 280                 x86_init.timers.tsc_pre_init = numaq_tsc_init;
 281                 x86_init.pci.init = pci_numaq_init;
 282         }
 283 }
 284
 285 int __init get_memcfg_numaq(void)
 286 {
 287         early_check_numaq();
 288         if (!found_numaq)
 289                 return 0;
 290         smp_dump_qct();
 291
 292         return 1;
 293 }
 294
 295 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
 296
 297 static inline unsigned int numaq_get_apic_id(unsigned long x)
 298 {
 299         return (x >> 24) & 0x0F;
 300 }
 301
 302 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
 303 {
 304         default_send_IPI_mask_sequence_logical(mask, vector);
 305 }
 306
 307 static inline void numaq_send_IPI_allbutself(int vector)
 308 {
 309         default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
 310 }
 311
 312 static inline void numaq_send_IPI_all(int vector)
 313 {
 314         numaq_send_IPI_mask(cpu_online_mask, vector);
 315 }
 316
 317 #define NUMAQ_TRAMPOLINE_PHYS_LOW       (0x8)
 318 #define NUMAQ_TRAMPOLINE_PHYS_HIGH      (0xa)
 319
 320 /*
 321  * Because we use NMIs rather than the INIT-STARTUP sequence to
 322  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
 323  */
 324 static inline void numaq_smp_callin_clear_local_apic(void)
 325 {
 326         clear_local_APIC();
 327 }
 328
 329 static inline const struct cpumask *numaq_target_cpus(void)
 330 {
 331         return cpu_all_mask;
 332 }
 333
 334 static unsigned long numaq_check_apicid_used(physid_mask_t *map, int apicid)
 335 {
 336         return physid_isset(apicid, *map);
 337 }
 338
 339 static inline unsigned long numaq_check_apicid_present(int bit)
 340 {
 341         return physid_isset(bit, phys_cpu_present_map);
 342 }
 343
 344 static inline int numaq_apic_id_registered(void)
 345 {
 346         return 1;
 347 }
 348
 349 static inline void numaq_init_apic_ldr(void)
 350 {
 351         /* Already done in NUMA-Q firmware */
 352 }
 353
 354 static inline void numaq_setup_apic_routing(void)
 355 {
 356         printk(KERN_INFO
 357                 "Enabling APIC mode:  NUMA-Q.  Using %d I/O APICs\n",
 358                 nr_ioapics);
 359 }
 360
 361 /*
 362  * Skip adding the timer int on secondary nodes, which causes
 363  * a small but painful rift in the time-space continuum.
 364  */
 365 static inline int numaq_multi_timer_check(int apic, int irq)
 366 {
 367         return apic != 0 && irq == 0;
 368 }
 369
 370 static inline void numaq_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap)
 371 {
 372         /* We don't have a good way to do this yet - hack */
 373         return physids_promote(0xFUL, retmap);
 374 }
 375
 376 /*
 377  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
 378  * cpu to APIC ID relation to properly interact with the intelligent
 379  * mode of the cluster controller.
 380  */
 381 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 382 {
 383         if (mps_cpu < 60)
 384                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
 385         else
 386                 return BAD_APICID;
 387 }
 388
 389 static inline int numaq_apicid_to_node(int logical_apicid)
 390 {
 391         return logical_apicid >> 4;
 392 }
 393
 394 static int numaq_numa_cpu_node(int cpu)
 395 {
 396         int logical_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu);
 397
 398         if (logical_apicid != BAD_APICID)
 399                 return numaq_apicid_to_node(logical_apicid);
 400         return NUMA_NO_NODE;
 401 }
 402
 403 static void numaq_apicid_to_cpu_present(int logical_apicid, physid_mask_t *retmap)
 404 {
 405         int node = numaq_apicid_to_node(logical_apicid);
 406         int cpu = __ffs(logical_apicid & 0xf);
 407
 408         physid_set_mask_of_physid(cpu + 4*node, retmap);
 409 }
 410
 411 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 412 void *xquad_portio;
 413
 414 static inline int numaq_check_phys_apicid_present(int phys_apicid)
 415 {
 416         return 1;
 417 }
 418
 419 /*
 420  * We use physical apicids here, not logical, so just return the default
 421  * physical broadcast to stop people from breaking us
 422  */
 423 static unsigned int numaq_cpu_mask_to_apicid(const struct cpumask *cpumask)
 424 {
 425         return 0x0F;
 426 }
 427
 428 static inline unsigned int
 429 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 430                              const struct cpumask *andmask)
 431 {
 432         return 0x0F;
 433 }
 434
 435 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 436 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
 437 {
 438         return cpuid_apic >> index_msb;
 439 }
 440
 441 static int
 442 numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 443 {
 444         if (strncmp(oem, "IBM NUMA", 8))
 445                 printk(KERN_ERR "Warning! Not a NUMA-Q system!\n");
 446         else
 447                 found_numaq = 1;
 448
 449         return found_numaq;
 450 }
 451
 452 static int probe_numaq(void)
 453 {
 454         /* already know from get_memcfg_numaq() */
 455         return found_numaq;
 456 }
 457
 458 static void numaq_vector_allocation_domain(int cpu, struct cpumask *retmask)
 459 {
 460         /* Careful. Some cpus do not strictly honor the set of cpus
 461          * specified in the interrupt destination when using lowest
 462          * priority interrupt delivery mode.
 463          *
 464          * In particular there was a hyperthreading cpu observed to
 465          * deliver interrupts to the wrong hyperthread when only one
 466          * hyperthread was specified in the interrupt desitination.
 467          */
 468         cpumask_clear(retmask);
 469         cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
 470 }
 471
 472 static void numaq_setup_portio_remap(void)
 473 {
 474         int num_quads = num_online_nodes();
 475
 476         if (num_quads <= 1)
 477                 return;
 478
 479         printk(KERN_INFO
 480                 "Remapping cross-quad port I/O for %d quads\n", num_quads);
 481
 482         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
 483
 484         printk(KERN_INFO
 485                 "xquad_portio vaddr 0x%08lx, len %08lx\n",
 486                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
 487 }
 488
 489 /* Use __refdata to keep false positive warning calm.   */
 490 struct apic __refdata apic_numaq = {
 491
 492         .name                           = "NUMAQ",
 493         .probe                          = probe_numaq,
 494         .acpi_madt_oem_check            = NULL,
 495         .apic_id_registered             = numaq_apic_id_registered,
 496
 497         .irq_delivery_mode              = dest_LowestPrio,
 498         /* physical delivery on LOCAL quad: */
 499         .irq_dest_mode                  = 0,
 500
 501         .target_cpus                    = numaq_target_cpus,
 502         .disable_esr                    = 1,
 503         .dest_logical                   = APIC_DEST_LOGICAL,
 504         .check_apicid_used              = numaq_check_apicid_used,
 505         .check_apicid_present           = numaq_check_apicid_present,
 506
 507         .vector_allocation_domain       = numaq_vector_allocation_domain,
 508         .init_apic_ldr                  = numaq_init_apic_ldr,
 509
 510         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
 511         .setup_apic_routing             = numaq_setup_apic_routing,
 512         .multi_timer_check              = numaq_multi_timer_check,
 513         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
 514         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
 515         .setup_portio_remap             = numaq_setup_portio_remap,
 516         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
 517         .enable_apic_mode               = NULL,
 518         .phys_pkg_id                    = numaq_phys_pkg_id,
 519         .mps_oem_check                  = numaq_mps_oem_check,
 520
 521         .get_apic_id                    = numaq_get_apic_id,
 522         .set_apic_id                    = NULL,
 523         .apic_id_mask                   = 0x0F << 24,
 524
 525         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
 526         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
 527
 528         .send_IPI_mask                  = numaq_send_IPI_mask,
 529         .send_IPI_mask_allbutself       = NULL,
 530         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
 531         .send_IPI_all                   = numaq_send_IPI_all,
 532         .send_IPI_self                  = default_send_IPI_self,
 533
 534         .wakeup_secondary_cpu           = wakeup_secondary_cpu_via_nmi,
 535         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
 536         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
 537
 538         /* We don't do anything here because we use NMI's to boot instead */
 539         .wait_for_init_deassert         = NULL,
 540
 541         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
 542         .inquire_remote_apic            = NULL,
 543
 544         .read                           = native_apic_mem_read,
 545         .write                          = native_apic_mem_write,
 546         .icr_read                       = native_apic_icr_read,
 547         .icr_write                      = native_apic_icr_write,
 548         .wait_icr_idle                  = native_apic_wait_icr_idle,
 549         .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 550
 551         .x86_32_early_logical_apicid    = noop_x86_32_early_logical_apicid,
 552         .x86_32_numa_cpu_node           = numaq_numa_cpu_node,
 553 };