arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9
  10 #include <asm/paravirt_types.h>
  11
  12 #ifndef __ASSEMBLY__
  13 #include <linux/types.h>
  14 #include <linux/cpumask.h>
  15
  16 static inline int paravirt_enabled(void)
  17 {
  18         return pv_info.paravirt_enabled;
  19 }
  20
  21 static inline void load_sp0(struct tss_struct *tss,
  22                              struct thread_struct *thread)
  23 {
  24         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
  25 }
  26
  27 /* The paravirtualized CPUID instruction. */
  28 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  29                            unsigned int *ecx, unsigned int *edx)
  30 {
  31         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
  32 }
  33
  34 /*
  35  * These special macros can be used to get or set a debugging register
  36  */
  37 static inline unsigned long paravirt_get_debugreg(int reg)
  38 {
  39         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
  40 }
  41 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  42 static inline void set_debugreg(unsigned long val, int reg)
  43 {
  44         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
  45 }
  46
  47 static inline void clts(void)
  48 {
  49         PVOP_VCALL0(pv_cpu_ops.clts);
  50 }
  51
  52 static inline unsigned long read_cr0(void)
  53 {
  54         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
  55 }
  56
  57 static inline void write_cr0(unsigned long x)
  58 {
  59         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
  60 }
  61
  62 static inline unsigned long read_cr2(void)
  63 {
  64         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
  65 }
  66
  67 static inline void write_cr2(unsigned long x)
  68 {
  69         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
  70 }
  71
  72 static inline unsigned long read_cr3(void)
  73 {
  74         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
  75 }
  76
  77 static inline void write_cr3(unsigned long x)
  78 {
  79         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
  80 }
  81
  82 static inline unsigned long read_cr4(void)
  83 {
  84         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
  85 }
  86 static inline unsigned long read_cr4_safe(void)
  87 {
  88         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
  89 }
  90
  91 static inline void write_cr4(unsigned long x)
  92 {
  93         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
  94 }
  95
  96 #ifdef CONFIG_X86_64
  97 static inline unsigned long read_cr8(void)
  98 {
  99         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 100 }
 101
 102 static inline void write_cr8(unsigned long x)
 103 {
 104         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 105 }
 106 #endif
 107
 108 static inline void arch_safe_halt(void)
 109 {
 110         PVOP_VCALL0(pv_irq_ops.safe_halt);
 111 }
 112
 113 static inline void halt(void)
 114 {
 115         PVOP_VCALL0(pv_irq_ops.halt);
 116 }
 117
 118 static inline void wbinvd(void)
 119 {
 120         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 121 }
 122
 123 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 124
 125 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 126 {
 127         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 128 }
 129
 130 static inline int paravirt_rdmsr_regs(u32 *regs)
 131 {
 132         return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
 133 }
 134
 135 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 136 {
 137         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 138 }
 139
 140 static inline int paravirt_wrmsr_regs(u32 *regs)
 141 {
 142         return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
 143 }
 144
 145 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 146 #define rdmsr(msr, val1, val2)                  \
 147 do {                                            \
 148         int _err;                               \
 149         u64 _l = paravirt_read_msr(msr, &_err); \
 150         val1 = (u32)_l;                         \
 151         val2 = _l >> 32;                        \
 152 } while (0)
 153
 154 #define wrmsr(msr, val1, val2)                  \
 155 do {                                            \
 156         paravirt_write_msr(msr, val1, val2);    \
 157 } while (0)
 158
 159 #define rdmsrl(msr, val)                        \
 160 do {                                            \
 161         int _err;                               \
 162         val = paravirt_read_msr(msr, &_err);    \
 163 } while (0)
 164
 165 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 166 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 167
 168 /* rdmsr with exception handling */
 169 #define rdmsr_safe(msr, a, b)                   \
 170 ({                                              \
 171         int _err;                               \
 172         u64 _l = paravirt_read_msr(msr, &_err); \
 173         (*a) = (u32)_l;                         \
 174         (*b) = _l >> 32;                        \
 175         _err;                                   \
 176 })
 177
 178 #define rdmsr_safe_regs(regs)   paravirt_rdmsr_regs(regs)
 179 #define wrmsr_safe_regs(regs)   paravirt_wrmsr_regs(regs)
 180
 181 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 182 {
 183         int err;
 184
 185         *p = paravirt_read_msr(msr, &err);
 186         return err;
 187 }
 188 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 189 {
 190         u32 gprs[8] = { 0 };
 191         int err;
 192
 193         gprs[1] = msr;
 194         gprs[7] = 0x9c5a203a;
 195
 196         err = paravirt_rdmsr_regs(gprs);
 197
 198         *p = gprs[0] | ((u64)gprs[2] << 32);
 199
 200         return err;
 201 }
 202
 203 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
 204 {
 205         u32 gprs[8] = { 0 };
 206
 207         gprs[0] = (u32)val;
 208         gprs[1] = msr;
 209         gprs[2] = val >> 32;
 210         gprs[7] = 0x9c5a203a;
 211
 212         return paravirt_wrmsr_regs(gprs);
 213 }
 214
 215 static inline u64 paravirt_read_tsc(void)
 216 {
 217         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 218 }
 219
 220 #define rdtscl(low)                             \
 221 do {                                            \
 222         u64 _l = paravirt_read_tsc();           \
 223         low = (int)_l;                          \
 224 } while (0)
 225
 226 #define rdtscll(val) (val = paravirt_read_tsc())
 227
 228 static inline unsigned long long paravirt_sched_clock(void)
 229 {
 230         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 231 }
 232
 233 static inline unsigned long long paravirt_read_pmc(int counter)
 234 {
 235         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 236 }
 237
 238 #define rdpmc(counter, low, high)               \
 239 do {                                            \
 240         u64 _l = paravirt_read_pmc(counter);    \
 241         low = (u32)_l;                          \
 242         high = _l >> 32;                        \
 243 } while (0)
 244
 245 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 246 {
 247         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 248 }
 249
 250 #define rdtscp(low, high, aux)                          \
 251 do {                                                    \
 252         int __aux;                                      \
 253         unsigned long __val = paravirt_rdtscp(&__aux);  \
 254         (low) = (u32)__val;                             \
 255         (high) = (u32)(__val >> 32);                    \
 256         (aux) = __aux;                                  \
 257 } while (0)
 258
 259 #define rdtscpll(val, aux)                              \
 260 do {                                                    \
 261         unsigned long __aux;                            \
 262         val = paravirt_rdtscp(&__aux);                  \
 263         (aux) = __aux;                                  \
 264 } while (0)
 265
 266 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 267 {
 268         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 269 }
 270
 271 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 272 {
 273         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 274 }
 275
 276 static inline void load_TR_desc(void)
 277 {
 278         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 279 }
 280 static inline void load_gdt(const struct desc_ptr *dtr)
 281 {
 282         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 283 }
 284 static inline void load_idt(const struct desc_ptr *dtr)
 285 {
 286         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 287 }
 288 static inline void set_ldt(const void *addr, unsigned entries)
 289 {
 290         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 291 }
 292 static inline void store_gdt(struct desc_ptr *dtr)
 293 {
 294         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 295 }
 296 static inline void store_idt(struct desc_ptr *dtr)
 297 {
 298         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 299 }
 300 static inline unsigned long paravirt_store_tr(void)
 301 {
 302         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 303 }
 304 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 305 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 306 {
 307         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 308 }
 309
 310 #ifdef CONFIG_X86_64
 311 static inline void load_gs_index(unsigned int gs)
 312 {
 313         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 314 }
 315 #endif
 316
 317 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 318                                    const void *desc)
 319 {
 320         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 321 }
 322
 323 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 324                                    void *desc, int type)
 325 {
 326         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 327 }
 328
 329 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 330 {
 331         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 332 }
 333 static inline void set_iopl_mask(unsigned mask)
 334 {
 335         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 336 }
 337
 338 /* The paravirtualized I/O functions */
 339 static inline void slow_down_io(void)
 340 {
 341         pv_cpu_ops.io_delay();
 342 #ifdef REALLY_SLOW_IO
 343         pv_cpu_ops.io_delay();
 344         pv_cpu_ops.io_delay();
 345         pv_cpu_ops.io_delay();
 346 #endif
 347 }
 348
 349 #ifdef CONFIG_SMP
 350 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 351                                     unsigned long start_esp)
 352 {
 353         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 354                     phys_apicid, start_eip, start_esp);
 355 }
 356 #endif
 357
 358 static inline void paravirt_activate_mm(struct mm_struct *prev,
 359                                         struct mm_struct *next)
 360 {
 361         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 362 }
 363
 364 static inline void arch_dup_mmap(struct mm_struct *oldmm,
 365                                  struct mm_struct *mm)
 366 {
 367         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 368 }
 369
 370 static inline void arch_exit_mmap(struct mm_struct *mm)
 371 {
 372         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 373 }
 374
 375 static inline void __flush_tlb(void)
 376 {
 377         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 378 }
 379 static inline void __flush_tlb_global(void)
 380 {
 381         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 382 }
 383 static inline void __flush_tlb_single(unsigned long addr)
 384 {
 385         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 386 }
 387
 388 static inline void flush_tlb_others(const struct cpumask *cpumask,
 389                                     struct mm_struct *mm,
 390                                     unsigned long va)
 391 {
 392         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
 393 }
 394
 395 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 396 {
 397         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 398 }
 399
 400 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 401 {
 402         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 403 }
 404
 405 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 406 {
 407         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 408 }
 409 static inline void paravirt_release_pte(unsigned long pfn)
 410 {
 411         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 412 }
 413
 414 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 415 {
 416         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 417 }
 418
 419 static inline void paravirt_release_pmd(unsigned long pfn)
 420 {
 421         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 422 }
 423
 424 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 425 {
 426         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 427 }
 428 static inline void paravirt_release_pud(unsigned long pfn)
 429 {
 430         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 431 }
 432
 433 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
 434                               pte_t *ptep)
 435 {
 436         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
 437 }
 438 static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
 439                               pmd_t *pmdp)
 440 {
 441         PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
 442 }
 443
 444 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
 445                                     pte_t *ptep)
 446 {
 447         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
 448 }
 449
 450 static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
 451                                     pmd_t *pmdp)
 452 {
 453         PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
 454 }
 455
 456 static inline pte_t __pte(pteval_t val)
 457 {
 458         pteval_t ret;
 459
 460         if (sizeof(pteval_t) > sizeof(long))
 461                 ret = PVOP_CALLEE2(pteval_t,
 462                                    pv_mmu_ops.make_pte,
 463                                    val, (u64)val >> 32);
 464         else
 465                 ret = PVOP_CALLEE1(pteval_t,
 466                                    pv_mmu_ops.make_pte,
 467                                    val);
 468
 469         return (pte_t) { .pte = ret };
 470 }
 471
 472 static inline pteval_t pte_val(pte_t pte)
 473 {
 474         pteval_t ret;
 475
 476         if (sizeof(pteval_t) > sizeof(long))
 477                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
 478                                    pte.pte, (u64)pte.pte >> 32);
 479         else
 480                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
 481                                    pte.pte);
 482
 483         return ret;
 484 }
 485
 486 static inline pgd_t __pgd(pgdval_t val)
 487 {
 488         pgdval_t ret;
 489
 490         if (sizeof(pgdval_t) > sizeof(long))
 491                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
 492                                    val, (u64)val >> 32);
 493         else
 494                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
 495                                    val);
 496
 497         return (pgd_t) { ret };
 498 }
 499
 500 static inline pgdval_t pgd_val(pgd_t pgd)
 501 {
 502         pgdval_t ret;
 503
 504         if (sizeof(pgdval_t) > sizeof(long))
 505                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
 506                                     pgd.pgd, (u64)pgd.pgd >> 32);
 507         else
 508                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
 509                                     pgd.pgd);
 510
 511         return ret;
 512 }
 513
 514 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 515 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 516                                            pte_t *ptep)
 517 {
 518         pteval_t ret;
 519
 520         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
 521                          mm, addr, ptep);
 522
 523         return (pte_t) { .pte = ret };
 524 }
 525
 526 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 527                                            pte_t *ptep, pte_t pte)
 528 {
 529         if (sizeof(pteval_t) > sizeof(long))
 530                 /* 5 arg words */
 531                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
 532         else
 533                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
 534                             mm, addr, ptep, pte.pte);
 535 }
 536
 537 static inline void set_pte(pte_t *ptep, pte_t pte)
 538 {
 539         if (sizeof(pteval_t) > sizeof(long))
 540                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
 541                             pte.pte, (u64)pte.pte >> 32);
 542         else
 543                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
 544                             pte.pte);
 545 }
 546
 547 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 548                               pte_t *ptep, pte_t pte)
 549 {
 550         if (sizeof(pteval_t) > sizeof(long))
 551                 /* 5 arg words */
 552                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
 553         else
 554                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
 555 }
 556
 557 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 558 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
 559                               pmd_t *pmdp, pmd_t pmd)
 560 {
 561 #if PAGETABLE_LEVELS >= 3
 562         if (sizeof(pmdval_t) > sizeof(long))
 563                 /* 5 arg words */
 564                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
 565         else
 566                 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp, pmd.pmd);
 567 #endif
 568 }
 569 #endif
 570
 571 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 572 {
 573         pmdval_t val = native_pmd_val(pmd);
 574
 575         if (sizeof(pmdval_t) > sizeof(long))
 576                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
 577         else
 578                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
 579 }
 580
 581 #if PAGETABLE_LEVELS >= 3
 582 static inline pmd_t __pmd(pmdval_t val)
 583 {
 584         pmdval_t ret;
 585
 586         if (sizeof(pmdval_t) > sizeof(long))
 587                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
 588                                    val, (u64)val >> 32);
 589         else
 590                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
 591                                    val);
 592
 593         return (pmd_t) { ret };
 594 }
 595
 596 static inline pmdval_t pmd_val(pmd_t pmd)
 597 {
 598         pmdval_t ret;
 599
 600         if (sizeof(pmdval_t) > sizeof(long))
 601                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
 602                                     pmd.pmd, (u64)pmd.pmd >> 32);
 603         else
 604                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
 605                                     pmd.pmd);
 606
 607         return ret;
 608 }
 609
 610 static inline void set_pud(pud_t *pudp, pud_t pud)
 611 {
 612         pudval_t val = native_pud_val(pud);
 613
 614         if (sizeof(pudval_t) > sizeof(long))
 615                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 616                             val, (u64)val >> 32);
 617         else
 618                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
 619                             val);
 620 }
 621 #if PAGETABLE_LEVELS == 4
 622 static inline pud_t __pud(pudval_t val)
 623 {
 624         pudval_t ret;
 625
 626         if (sizeof(pudval_t) > sizeof(long))
 627                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
 628                                    val, (u64)val >> 32);
 629         else
 630                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
 631                                    val);
 632
 633         return (pud_t) { ret };
 634 }
 635
 636 static inline pudval_t pud_val(pud_t pud)
 637 {
 638         pudval_t ret;
 639
 640         if (sizeof(pudval_t) > sizeof(long))
 641                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
 642                                     pud.pud, (u64)pud.pud >> 32);
 643         else
 644                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
 645                                     pud.pud);
 646
 647         return ret;
 648 }
 649
 650 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 651 {
 652         pgdval_t val = native_pgd_val(pgd);
 653
 654         if (sizeof(pgdval_t) > sizeof(long))
 655                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
 656                             val, (u64)val >> 32);
 657         else
 658                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
 659                             val);
 660 }
 661
 662 static inline void pgd_clear(pgd_t *pgdp)
 663 {
 664         set_pgd(pgdp, __pgd(0));
 665 }
 666
 667 static inline void pud_clear(pud_t *pudp)
 668 {
 669         set_pud(pudp, __pud(0));
 670 }
 671
 672 #endif  /* PAGETABLE_LEVELS == 4 */
 673
 674 #endif  /* PAGETABLE_LEVELS >= 3 */
 675
 676 #ifdef CONFIG_X86_PAE
 677 /* Special-case pte-setting operations for PAE, which can't update a
 678    64-bit pte atomically */
 679 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 680 {
 681         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
 682                     pte.pte, pte.pte >> 32);
 683 }
 684
 685 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 686                              pte_t *ptep)
 687 {
 688         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
 689 }
 690
 691 static inline void pmd_clear(pmd_t *pmdp)
 692 {
 693         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 694 }
 695 #else  /* !CONFIG_X86_PAE */
 696 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 697 {
 698         set_pte(ptep, pte);
 699 }
 700
 701 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 702                              pte_t *ptep)
 703 {
 704         set_pte_at(mm, addr, ptep, __pte(0));
 705 }
 706
 707 static inline void pmd_clear(pmd_t *pmdp)
 708 {
 709         set_pmd(pmdp, __pmd(0));
 710 }
 711 #endif  /* CONFIG_X86_PAE */
 712
 713 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 714 static inline void arch_start_context_switch(struct task_struct *prev)
 715 {
 716         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 717 }
 718
 719 static inline void arch_end_context_switch(struct task_struct *next)
 720 {
 721         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 722 }
 723
 724 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 725 static inline void arch_enter_lazy_mmu_mode(void)
 726 {
 727         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
 728 }
 729
 730 static inline void arch_leave_lazy_mmu_mode(void)
 731 {
 732         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
 733 }
 734
 735 void arch_flush_lazy_mmu_mode(void);
 736
 737 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 738                                 phys_addr_t phys, pgprot_t flags)
 739 {
 740         pv_mmu_ops.set_fixmap(idx, phys, flags);
 741 }
 742
 743 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 744
 745 static inline int arch_spin_is_locked(struct arch_spinlock *lock)
 746 {
 747         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
 748 }
 749
 750 static inline int arch_spin_is_contended(struct arch_spinlock *lock)
 751 {
 752         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
 753 }
 754 #define arch_spin_is_contended  arch_spin_is_contended
 755
 756 static __always_inline void arch_spin_lock(struct arch_spinlock *lock)
 757 {
 758         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
 759 }
 760
 761 static __always_inline void arch_spin_lock_flags(struct arch_spinlock *lock,
 762                                                   unsigned long flags)
 763 {
 764         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
 765 }
 766
 767 static __always_inline int arch_spin_trylock(struct arch_spinlock *lock)
 768 {
 769         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
 770 }
 771
 772 static __always_inline void arch_spin_unlock(struct arch_spinlock *lock)
 773 {
 774         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
 775 }
 776
 777 #endif
 778
 779 #ifdef CONFIG_X86_32
 780 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 781 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 782
 783 /* save and restore all caller-save registers, except return value */
 784 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 785 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 786
 787 #define PV_FLAGS_ARG "0"
 788 #define PV_EXTRA_CLOBBERS
 789 #define PV_VEXTRA_CLOBBERS
 790 #else
 791 /* save and restore all caller-save registers, except return value */
 792 #define PV_SAVE_ALL_CALLER_REGS                                         \
 793         "push %rcx;"                                                    \
 794         "push %rdx;"                                                    \
 795         "push %rsi;"                                                    \
 796         "push %rdi;"                                                    \
 797         "push %r8;"                                                     \
 798         "push %r9;"                                                     \
 799         "push %r10;"                                                    \
 800         "push %r11;"
 801 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 802         "pop %r11;"                                                     \
 803         "pop %r10;"                                                     \
 804         "pop %r9;"                                                      \
 805         "pop %r8;"                                                      \
 806         "pop %rdi;"                                                     \
 807         "pop %rsi;"                                                     \
 808         "pop %rdx;"                                                     \
 809         "pop %rcx;"
 810
 811 /* We save some registers, but all of them, that's too much. We clobber all
 812  * caller saved registers but the argument parameter */
 813 #define PV_SAVE_REGS "pushq %%rdi;"
 814 #define PV_RESTORE_REGS "popq %%rdi;"
 815 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 816 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 817 #define PV_FLAGS_ARG "D"
 818 #endif
 819
 820 /*
 821  * Generate a thunk around a function which saves all caller-save
 822  * registers except for the return value.  This allows C functions to
 823  * be called from assembler code where fewer than normal registers are
 824  * available.  It may also help code generation around calls from C
 825  * code if the common case doesn't use many registers.
 826  *
 827  * When a callee is wrapped in a thunk, the caller can assume that all
 828  * arg regs and all scratch registers are preserved across the
 829  * call. The return value in rax/eax will not be saved, even for void
 830  * functions.
 831  */
 832 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 833         extern typeof(func) __raw_callee_save_##func;                   \
 834         static void *__##func##__ __used = func;                        \
 835                                                                         \
 836         asm(".pushsection .text;"                                       \
 837             "__raw_callee_save_" #func ": "                             \
 838             PV_SAVE_ALL_CALLER_REGS                                     \
 839             "call " #func ";"                                           \
 840             PV_RESTORE_ALL_CALLER_REGS                                  \
 841             "ret;"                                                      \
 842             ".popsection")
 843
 844 /* Get a reference to a callee-save function */
 845 #define PV_CALLEE_SAVE(func)                                            \
 846         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 847
 848 /* Promise that "func" already uses the right calling convention */
 849 #define __PV_IS_CALLEE_SAVE(func)                       \
 850         ((struct paravirt_callee_save) { func })
 851
 852 static inline notrace unsigned long arch_local_save_flags(void)
 853 {
 854         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
 855 }
 856
 857 static inline notrace void arch_local_irq_restore(unsigned long f)
 858 {
 859         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
 860 }
 861
 862 static inline notrace void arch_local_irq_disable(void)
 863 {
 864         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
 865 }
 866
 867 static inline notrace void arch_local_irq_enable(void)
 868 {
 869         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
 870 }
 871
 872 static inline notrace unsigned long arch_local_irq_save(void)
 873 {
 874         unsigned long f;
 875
 876         f = arch_local_save_flags();
 877         arch_local_irq_disable();
 878         return f;
 879 }
 880
 881
 882 /* Make sure as little as possible of this mess escapes. */
 883 #undef PARAVIRT_CALL
 884 #undef __PVOP_CALL
 885 #undef __PVOP_VCALL
 886 #undef PVOP_VCALL0
 887 #undef PVOP_CALL0
 888 #undef PVOP_VCALL1
 889 #undef PVOP_CALL1
 890 #undef PVOP_VCALL2
 891 #undef PVOP_CALL2
 892 #undef PVOP_VCALL3
 893 #undef PVOP_CALL3
 894 #undef PVOP_VCALL4
 895 #undef PVOP_CALL4
 896
 897 extern void default_banner(void);
 898
 899 #else  /* __ASSEMBLY__ */
 900
 901 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
 902 771:;                                           \
 903         ops;                                    \
 904 772:;                                           \
 905         .pushsection .parainstructions,"a";     \
 906          .align algn;                           \
 907          word 771b;                             \
 908          .byte ptype;                           \
 909          .byte 772b-771b;                       \
 910          .short clobbers;                       \
 911         .popsection
 912
 913
 914 #define COND_PUSH(set, mask, reg)                       \
 915         .if ((~(set)) & mask); push %reg; .endif
 916 #define COND_POP(set, mask, reg)                        \
 917         .if ((~(set)) & mask); pop %reg; .endif
 918
 919 #ifdef CONFIG_X86_64
 920
 921 #define PV_SAVE_REGS(set)                       \
 922         COND_PUSH(set, CLBR_RAX, rax);          \
 923         COND_PUSH(set, CLBR_RCX, rcx);          \
 924         COND_PUSH(set, CLBR_RDX, rdx);          \
 925         COND_PUSH(set, CLBR_RSI, rsi);          \
 926         COND_PUSH(set, CLBR_RDI, rdi);          \
 927         COND_PUSH(set, CLBR_R8, r8);            \
 928         COND_PUSH(set, CLBR_R9, r9);            \
 929         COND_PUSH(set, CLBR_R10, r10);          \
 930         COND_PUSH(set, CLBR_R11, r11)
 931 #define PV_RESTORE_REGS(set)                    \
 932         COND_POP(set, CLBR_R11, r11);           \
 933         COND_POP(set, CLBR_R10, r10);           \
 934         COND_POP(set, CLBR_R9, r9);             \
 935         COND_POP(set, CLBR_R8, r8);             \
 936         COND_POP(set, CLBR_RDI, rdi);           \
 937         COND_POP(set, CLBR_RSI, rsi);           \
 938         COND_POP(set, CLBR_RDX, rdx);           \
 939         COND_POP(set, CLBR_RCX, rcx);           \
 940         COND_POP(set, CLBR_RAX, rax)
 941
 942 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 943 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 944 #define PARA_INDIRECT(addr)     *addr(%rip)
 945 #else
 946 #define PV_SAVE_REGS(set)                       \
 947         COND_PUSH(set, CLBR_EAX, eax);          \
 948         COND_PUSH(set, CLBR_EDI, edi);          \
 949         COND_PUSH(set, CLBR_ECX, ecx);          \
 950         COND_PUSH(set, CLBR_EDX, edx)
 951 #define PV_RESTORE_REGS(set)                    \
 952         COND_POP(set, CLBR_EDX, edx);           \
 953         COND_POP(set, CLBR_ECX, ecx);           \
 954         COND_POP(set, CLBR_EDI, edi);           \
 955         COND_POP(set, CLBR_EAX, eax)
 956
 957 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 958 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 959 #define PARA_INDIRECT(addr)     *%cs:addr
 960 #endif
 961
 962 #define INTERRUPT_RETURN                                                \
 963         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
 964                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
 965
 966 #define DISABLE_INTERRUPTS(clobbers)                                    \
 967         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
 968                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 969                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
 970                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 971
 972 #define ENABLE_INTERRUPTS(clobbers)                                     \
 973         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
 974                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 975                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
 976                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 977
 978 #define USERGS_SYSRET32                                                 \
 979         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
 980                   CLBR_NONE,                                            \
 981                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
 982
 983 #ifdef CONFIG_X86_32
 984 #define GET_CR0_INTO_EAX                                \
 985         push %ecx; push %edx;                           \
 986         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
 987         pop %edx; pop %ecx
 988
 989 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
 990         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
 991                   CLBR_NONE,                                            \
 992                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
 993
 994
 995 #else   /* !CONFIG_X86_32 */
 996
 997 /*
 998  * If swapgs is used while the userspace stack is still current,
 999  * there's no way to call a pvop.  The PV replacement *must* be
1000  * inlined, or the swapgs instruction must be trapped and emulated.
1001  */
1002 #define SWAPGS_UNSAFE_STACK                                             \
1003         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1004                   swapgs)
1005
1006 /*
1007  * Note: swapgs is very special, and in practise is either going to be
1008  * implemented with a single "swapgs" instruction or something very
1009  * special.  Either way, we don't need to save any registers for
1010  * it.
1011  */
1012 #define SWAPGS                                                          \
1013         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1014                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
1015                  )
1016
1017 #define GET_CR2_INTO_RCX                                \
1018         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1019         movq %rax, %rcx;                                \
1020         xorq %rax, %rax;
1021
1022 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1023         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1024                   CLBR_NONE,                                            \
1025                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1026
1027 #define USERGS_SYSRET64                                                 \
1028         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1029                   CLBR_NONE,                                            \
1030                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1031
1032 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1033         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1034                   CLBR_NONE,                                            \
1035                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1036 #endif  /* CONFIG_X86_32 */
1037
1038 #endif /* __ASSEMBLY__ */
1039 #else  /* CONFIG_PARAVIRT */
1040 # define default_banner x86_init_noop
1041 #endif /* !CONFIG_PARAVIRT */
1042 #endif /* _ASM_X86_PARAVIRT_H */