arch/x86/include/asm/msr.h

   1 #ifndef _ASM_X86_MSR_H
   2 #define _ASM_X86_MSR_H
   3
   4 #include <asm/msr-index.h>
   5
   6 #ifndef __ASSEMBLY__
   7 # include <linux/types.h>
   8 #endif
   9
  10 #ifdef __KERNEL__
  11 #ifndef __ASSEMBLY__
  12
  13 #include <asm/asm.h>
  14 #include <asm/errno.h>
  15 #include <asm/cpumask.h>
  16
  17 struct msr {
  18         union {
  19                 struct {
  20                         u32 l;
  21                         u32 h;
  22                 };
  23                 u64 q;
  24         };
  25 };
  26
  27 static inline unsigned long long native_read_tscp(unsigned int *aux)
  28 {
  29         unsigned long low, high;
  30         asm volatile(".byte 0x0f,0x01,0xf9"
  31                      : "=a" (low), "=d" (high), "=c" (*aux));
  32         return low | ((u64)high << 32);
  33 }
  34
  35 /*
  36  * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
  37  * constraint has different meanings. For i386, "A" means exactly
  38  * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
  39  * it means rax *or* rdx.
  40  */
  41 #ifdef CONFIG_X86_64
  42 #define DECLARE_ARGS(val, low, high)    unsigned low, high
  43 #define EAX_EDX_VAL(val, low, high)     ((low) | ((u64)(high) << 32))
  44 #define EAX_EDX_ARGS(val, low, high)    "a" (low), "d" (high)
  45 #define EAX_EDX_RET(val, low, high)     "=a" (low), "=d" (high)
  46 #else
  47 #define DECLARE_ARGS(val, low, high)    unsigned long long val
  48 #define EAX_EDX_VAL(val, low, high)     (val)
  49 #define EAX_EDX_ARGS(val, low, high)    "A" (val)
  50 #define EAX_EDX_RET(val, low, high)     "=A" (val)
  51 #endif
  52
  53 static inline unsigned long long native_read_msr(unsigned int msr)
  54 {
  55         DECLARE_ARGS(val, low, high);
  56
  57         asm volatile("rdmsr" : EAX_EDX_RET(val, low, high) : "c" (msr));
  58         return EAX_EDX_VAL(val, low, high);
  59 }
  60
  61 static inline unsigned long long native_read_msr_safe(unsigned int msr,
  62                                                       int *err)
  63 {
  64         DECLARE_ARGS(val, low, high);
  65
  66         asm volatile("2: rdmsr ; xor %[err],%[err]\n"
  67                      "1:\n\t"
  68                      ".section .fixup,\"ax\"\n\t"
  69                      "3:  mov %[fault],%[err] ; jmp 1b\n\t"
  70                      ".previous\n\t"
  71                      _ASM_EXTABLE(2b, 3b)
  72                      : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
  73                      : "c" (msr), [fault] "i" (-EFAULT));
  74         return EAX_EDX_VAL(val, low, high);
  75 }
  76
  77 static inline unsigned long long native_read_msr_amd_safe(unsigned int msr,
  78                                                       int *err)
  79 {
  80         DECLARE_ARGS(val, low, high);
  81
  82         asm volatile("2: rdmsr ; xor %0,%0\n"
  83                      "1:\n\t"
  84                      ".section .fixup,\"ax\"\n\t"
  85                      "3:  mov %3,%0 ; jmp 1b\n\t"
  86                      ".previous\n\t"
  87                      _ASM_EXTABLE(2b, 3b)
  88                      : "=r" (*err), EAX_EDX_RET(val, low, high)
  89                      : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT));
  90         return EAX_EDX_VAL(val, low, high);
  91 }
  92
  93 static inline void native_write_msr(unsigned int msr,
  94                                     unsigned low, unsigned high)
  95 {
  96         asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory");
  97 }
  98
  99 /* Can be uninlined because referenced by paravirt */
 100 notrace static inline int native_write_msr_safe(unsigned int msr,
 101                                         unsigned low, unsigned high)
 102 {
 103         int err;
 104         asm volatile("2: wrmsr ; xor %[err],%[err]\n"
 105                      "1:\n\t"
 106                      ".section .fixup,\"ax\"\n\t"
 107                      "3:  mov %[fault],%[err] ; jmp 1b\n\t"
 108                      ".previous\n\t"
 109                      _ASM_EXTABLE(2b, 3b)
 110                      : [err] "=a" (err)
 111                      : "c" (msr), "0" (low), "d" (high),
 112                        [fault] "i" (-EFAULT)
 113                      : "memory");
 114         return err;
 115 }
 116
 117 extern unsigned long long native_read_tsc(void);
 118
 119 static __always_inline unsigned long long __native_read_tsc(void)
 120 {
 121         DECLARE_ARGS(val, low, high);
 122
 123         asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
 124
 125         return EAX_EDX_VAL(val, low, high);
 126 }
 127
 128 static inline unsigned long long native_read_pmc(int counter)
 129 {
 130         DECLARE_ARGS(val, low, high);
 131
 132         asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
 133         return EAX_EDX_VAL(val, low, high);
 134 }
 135
 136 #ifdef CONFIG_PARAVIRT
 137 #include <asm/paravirt.h>
 138 #else
 139 #include <linux/errno.h>
 140 /*
 141  * Access to machine-specific registers (available on 586 and better only)
 142  * Note: the rd* operations modify the parameters directly (without using
 143  * pointer indirection), this allows gcc to optimize better
 144  */
 145
 146 #define rdmsr(msr, val1, val2)                                  \
 147 do {                                                            \
 148         u64 __val = native_read_msr((msr));                     \
 149         (val1) = (u32)__val;                                    \
 150         (val2) = (u32)(__val >> 32);                            \
 151 } while (0)
 152
 153 static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
 154 {
 155         native_write_msr(msr, low, high);
 156 }
 157
 158 #define rdmsrl(msr, val)                        \
 159         ((val) = native_read_msr((msr)))
 160
 161 #define wrmsrl(msr, val)                                                \
 162         native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
 163
 164 /* wrmsr with exception handling */
 165 static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
 166 {
 167         return native_write_msr_safe(msr, low, high);
 168 }
 169
 170 /* rdmsr with exception handling */
 171 #define rdmsr_safe(msr, p1, p2)                                 \
 172 ({                                                              \
 173         int __err;                                              \
 174         u64 __val = native_read_msr_safe((msr), &__err);        \
 175         (*p1) = (u32)__val;                                     \
 176         (*p2) = (u32)(__val >> 32);                             \
 177         __err;                                                  \
 178 })
 179
 180 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 181 {
 182         int err;
 183
 184         *p = native_read_msr_safe(msr, &err);
 185         return err;
 186 }
 187 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 188 {
 189         int err;
 190
 191         *p = native_read_msr_amd_safe(msr, &err);
 192         return err;
 193 }
 194
 195 #define rdtscl(low)                                             \
 196         ((low) = (u32)__native_read_tsc())
 197
 198 #define rdtscll(val)                                            \
 199         ((val) = __native_read_tsc())
 200
 201 #define rdpmc(counter, low, high)                       \
 202 do {                                                    \
 203         u64 _l = native_read_pmc((counter));            \
 204         (low)  = (u32)_l;                               \
 205         (high) = (u32)(_l >> 32);                       \
 206 } while (0)
 207
 208 #define rdtscp(low, high, aux)                                  \
 209 do {                                                            \
 210         unsigned long long _val = native_read_tscp(&(aux));     \
 211         (low) = (u32)_val;                                      \
 212         (high) = (u32)(_val >> 32);                             \
 213 } while (0)
 214
 215 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
 216
 217 #endif  /* !CONFIG_PARAVIRT */
 218
 219
 220 #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val),         \
 221                                              (u32)((val) >> 32))
 222
 223 #define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
 224
 225 #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
 226
 227 #ifdef CONFIG_SMP
 228 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 229 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 230 void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
 231 void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
 232 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 233 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 234 #else  /*  CONFIG_SMP  */
 235 static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
 236 {
 237         rdmsr(msr_no, *l, *h);
 238         return 0;
 239 }
 240 static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
 241 {
 242         wrmsr(msr_no, l, h);
 243         return 0;
 244 }
 245 static inline void rdmsr_on_cpus(const cpumask_t *m, u32 msr_no,
 246                                 struct msr *msrs)
 247 {
 248        rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
 249 }
 250 static inline void wrmsr_on_cpus(const cpumask_t *m, u32 msr_no,
 251                                 struct msr *msrs)
 252 {
 253        wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
 254 }
 255 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
 256                                     u32 *l, u32 *h)
 257 {
 258         return rdmsr_safe(msr_no, l, h);
 259 }
 260 static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
 261 {
 262         return wrmsr_safe(msr_no, l, h);
 263 }
 264 #endif  /* CONFIG_SMP */
 265 #endif /* __ASSEMBLY__ */
 266 #endif /* __KERNEL__ */
 267
 268
 269 #endif /* _ASM_X86_MSR_H */