2 * Copyright (C) 1994 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 * x86-64 work by Andi Kleen 2002
10 #ifndef _ASM_X86_I387_H
11 #define _ASM_X86_I387_H
15 #include <linux/sched.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/regset.h>
18 #include <linux/hardirq.h>
19 #include <linux/slab.h>
21 #include <asm/cpufeature.h>
22 #include <asm/processor.h>
23 #include <asm/sigcontext.h>
25 #include <asm/uaccess.h>
26 #include <asm/xsave.h>
28 extern unsigned int sig_xstate_size;
29 extern void fpu_init(void);
30 extern void mxcsr_feature_mask_init(void);
31 extern int init_fpu(struct task_struct *child);
32 extern asmlinkage void math_state_restore(void);
33 extern void __math_state_restore(void);
34 extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
36 extern user_regset_active_fn fpregs_active, xfpregs_active;
37 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
39 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,
43 * xstateregs_active == fpregs_active. Please refer to the comment
44 * at the definition of fpregs_active.
46 #define xstateregs_active fpregs_active
48 extern struct _fpx_sw_bytes fx_sw_reserved;
49 #ifdef CONFIG_IA32_EMULATION
50 extern unsigned int sig_xstate_ia32_size;
51 extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
54 extern int save_i387_xstate_ia32(void __user *buf);
55 extern int restore_i387_xstate_ia32(void __user *buf);
58 #ifdef CONFIG_MATH_EMULATION
59 extern void finit_soft_fpu(struct i387_soft_struct *soft);
61 static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
64 #define X87_FSW_ES (1 << 7) /* Exception Summary */
66 static __always_inline __pure bool use_xsaveopt(void)
68 return static_cpu_has(X86_FEATURE_XSAVEOPT);
71 static __always_inline __pure bool use_xsave(void)
73 return static_cpu_has(X86_FEATURE_XSAVE);
76 extern void __sanitize_i387_state(struct task_struct *);
78 static inline void sanitize_i387_state(struct task_struct *tsk)
82 __sanitize_i387_state(tsk);
86 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
90 /* See comment in fxsave() below. */
91 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
93 ".section .fixup,\"ax\"\n"
94 "3: movl $-1,%[err]\n"
99 : [fx] "R" (fx), "m" (*fx), "0" (0));
103 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
104 is pending. Clear the x87 state here by setting it to fixed
105 values. The kernel data segment can be sometimes 0 and sometimes
106 new user value. Both should be ok.
107 Use the PDA as safe address because it should be already in L1. */
108 static inline void fpu_clear(struct fpu *fpu)
110 struct xsave_struct *xstate = &fpu->state->xsave;
111 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
114 * xsave header may indicate the init state of the FP.
117 !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
120 if (unlikely(fx->swd & X87_FSW_ES))
121 asm volatile("fnclex");
122 alternative_input(ASM_NOP8 ASM_NOP2,
123 " emms\n" /* clear stack tags */
124 " fildl %%gs:0", /* load to clear state */
125 X86_FEATURE_FXSAVE_LEAK);
128 static inline void clear_fpu_state(struct task_struct *tsk)
130 fpu_clear(&tsk->thread.fpu);
133 static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
138 * Clear the bytes not touched by the fxsave and reserved
141 err = __clear_user(&fx->sw_reserved,
142 sizeof(struct _fpx_sw_bytes));
146 /* See comment in fxsave() below. */
147 asm volatile("1: rex64/fxsave (%[fx])\n\t"
149 ".section .fixup,\"ax\"\n"
150 "3: movl $-1,%[err]\n"
154 : [err] "=r" (err), "=m" (*fx)
155 : [fx] "R" (fx), "0" (0));
157 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
159 /* No need to clear here because the caller clears USED_MATH */
163 static inline void fpu_fxsave(struct fpu *fpu)
165 /* Using "rex64; fxsave %0" is broken because, if the memory operand
166 uses any extended registers for addressing, a second REX prefix
167 will be generated (to the assembler, rex64 followed by semicolon
168 is a separate instruction), and hence the 64-bitness is lost.
169 Using "fxsaveq %0" would be the ideal choice, but is only supported
170 starting with gas 2.16.
171 asm volatile("fxsaveq %0"
172 : "=m" (fpu->state->fxsave));
173 Using, as a workaround, the properly prefixed form below isn't
174 accepted by any binutils version so far released, complaining that
175 the same type of prefix is used twice if an extended register is
176 needed for addressing (fix submitted to mainline 2005-11-21).
177 asm volatile("rex64/fxsave %0"
178 : "=m" (fpu->state->fxsave));
179 This, however, we can work around by forcing the compiler to select
180 an addressing mode that doesn't require extended registers. */
181 asm volatile("rex64/fxsave (%[fx])"
182 : "=m" (fpu->state->fxsave)
183 : [fx] "R" (&fpu->state->fxsave));
186 static inline void fpu_save_init(struct fpu *fpu)
196 #else /* CONFIG_X86_32 */
198 /* perform fxrstor iff the processor has extended states, otherwise frstor */
199 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
202 * The "nop" is needed to make the instructions the same
214 /* We need a safe address that is cheap to find and that is already
215 in L1 during context switch. The best choices are unfortunately
216 different for UP and SMP */
218 #define safe_address (__per_cpu_offset[0])
220 #define safe_address (kstat_cpu(0).cpustat.user)
224 * These must be called with preempt disabled
226 static inline void fpu_save_init(struct fpu *fpu)
229 struct xsave_struct *xstate = &fpu->state->xsave;
230 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
235 * xsave header may indicate the init state of the FP.
237 if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
240 if (unlikely(fx->swd & X87_FSW_ES))
241 asm volatile("fnclex");
244 * we can do a simple return here or be paranoid :)
249 /* Use more nops than strictly needed in case the compiler
252 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
254 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
256 [fx] "m" (fpu->state->fxsave),
257 [fsw] "m" (fpu->state->fxsave.swd) : "memory");
259 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
260 is pending. Clear the x87 state here by setting it to fixed
261 values. safe_address is a random variable that should be in L1 */
263 GENERIC_NOP8 GENERIC_NOP2,
264 "emms\n\t" /* clear stack tags */
265 "fildl %[addr]", /* set F?P to defined value */
266 X86_FEATURE_FXSAVE_LEAK,
267 [addr] "m" (safe_address));
272 #endif /* CONFIG_X86_64 */
274 static inline void __save_init_fpu(struct task_struct *tsk)
276 fpu_save_init(&tsk->thread.fpu);
277 task_thread_info(tsk)->status &= ~TS_USEDFPU;
280 static inline int fpu_fxrstor_checking(struct fpu *fpu)
282 return fxrstor_checking(&fpu->state->fxsave);
285 static inline int fpu_restore_checking(struct fpu *fpu)
288 return fpu_xrstor_checking(fpu);
290 return fpu_fxrstor_checking(fpu);
293 static inline int restore_fpu_checking(struct task_struct *tsk)
295 return fpu_restore_checking(&tsk->thread.fpu);
299 * Signal frame handlers...
301 extern int save_i387_xstate(void __user *buf);
302 extern int restore_i387_xstate(void __user *buf);
304 static inline void __unlazy_fpu(struct task_struct *tsk)
306 if (task_thread_info(tsk)->status & TS_USEDFPU) {
307 __save_init_fpu(tsk);
310 tsk->fpu_counter = 0;
313 static inline void __clear_fpu(struct task_struct *tsk)
315 if (task_thread_info(tsk)->status & TS_USEDFPU) {
316 /* Ignore delayed exceptions from user space */
317 asm volatile("1: fwait\n"
319 _ASM_EXTABLE(1b, 2b));
320 task_thread_info(tsk)->status &= ~TS_USEDFPU;
325 static inline void kernel_fpu_begin(void)
327 struct thread_info *me = current_thread_info();
329 if (me->status & TS_USEDFPU)
330 __save_init_fpu(me->task);
335 static inline void kernel_fpu_end(void)
341 static inline bool irq_fpu_usable(void)
343 struct pt_regs *regs;
345 return !in_interrupt() || !(regs = get_irq_regs()) || \
346 user_mode(regs) || (read_cr0() & X86_CR0_TS);
350 * Some instructions like VIA's padlock instructions generate a spurious
351 * DNA fault but don't modify SSE registers. And these instructions
352 * get used from interrupt context as well. To prevent these kernel instructions
353 * in interrupt context interacting wrongly with other user/kernel fpu usage, we
354 * should use them only in the context of irq_ts_save/restore()
356 static inline int irq_ts_save(void)
359 * If in process context and not atomic, we can take a spurious DNA fault.
360 * Otherwise, doing clts() in process context requires disabling preemption
361 * or some heavy lifting like kernel_fpu_begin()
366 if (read_cr0() & X86_CR0_TS) {
374 static inline void irq_ts_restore(int TS_state)
381 * These disable preemption on their own and are safe
383 static inline void save_init_fpu(struct task_struct *tsk)
386 __save_init_fpu(tsk);
391 static inline void unlazy_fpu(struct task_struct *tsk)
398 static inline void clear_fpu(struct task_struct *tsk)
406 * i387 state interaction
408 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
411 return tsk->thread.fpu.state->fxsave.cwd;
413 return (unsigned short)tsk->thread.fpu.state->fsave.cwd;
417 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
420 return tsk->thread.fpu.state->fxsave.swd;
422 return (unsigned short)tsk->thread.fpu.state->fsave.swd;
426 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
429 return tsk->thread.fpu.state->fxsave.mxcsr;
431 return MXCSR_DEFAULT;
435 static bool fpu_allocated(struct fpu *fpu)
437 return fpu->state != NULL;
440 static inline int fpu_alloc(struct fpu *fpu)
442 if (fpu_allocated(fpu))
444 fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
447 WARN_ON((unsigned long)fpu->state & 15);
451 static inline void fpu_free(struct fpu *fpu)
454 kmem_cache_free(task_xstate_cachep, fpu->state);
459 static inline void fpu_copy(struct fpu *dst, struct fpu *src)
461 memcpy(dst->state, src->state, xstate_size);
464 extern void fpu_finit(struct fpu *fpu);
466 #endif /* __ASSEMBLY__ */
468 #define PSHUFB_XMM5_XMM0 .byte 0x66, 0x0f, 0x38, 0x00, 0xc5
469 #define PSHUFB_XMM5_XMM6 .byte 0x66, 0x0f, 0x38, 0x00, 0xf5
471 #endif /* _ASM_X86_I387_H */