arch/sparc64/kernel/irq.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007  David S. Miller  (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/ptrace.h>
  11 #include <linux/errno.h>
  12 #include <linux/kernel_stat.h>
  13 #include <linux/signal.h>
  14 #include <linux/mm.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/slab.h>
  17 #include <linux/random.h>
  18 #include <linux/init.h>
  19 #include <linux/delay.h>
  20 #include <linux/proc_fs.h>
  21 #include <linux/seq_file.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/irq.h>
  24 #include <linux/msi.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/sbus.h>
  33 #include <asm/iommu.h>
  34 #include <asm/upa.h>
  35 #include <asm/oplib.h>
  36 #include <asm/prom.h>
  37 #include <asm/timer.h>
  38 #include <asm/smp.h>
  39 #include <asm/starfire.h>
  40 #include <asm/uaccess.h>
  41 #include <asm/cache.h>
  42 #include <asm/cpudata.h>
  43 #include <asm/auxio.h>
  44 #include <asm/head.h>
  45 #include <asm/hypervisor.h>
  46
  47 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  48  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  49  * delivered.  We must translate this into a non-vector IRQ so we can
  50  * set the softint on this cpu.
  51  *
  52  * To make processing these packets efficient and race free we use
  53  * an array of irq buckets below.  The interrupt vector handler in
  54  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  55  * The IVEC handler does not need to act atomically, the PIL dispatch
  56  * code uses CAS to get an atomic snapshot of the list and clear it
  57  * at the same time.
  58  *
  59  * If you make changes to ino_bucket, please update hand coded assembler
  60  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
  61  */
  62 struct ino_bucket {
  63         /* Next handler in per-CPU IRQ worklist.  We know that
  64          * bucket pointers have the high 32-bits clear, so to
  65          * save space we only store the bits we need.
  66          */
  67 /*0x00*/unsigned int irq_chain;
  68
  69         /* Virtual interrupt number assigned to this INO.  */
  70 /*0x04*/unsigned int virt_irq;
  71 };
  72
  73 #define NUM_IVECS       (IMAP_INR + 1)
  74 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  75
  76 #define __irq_ino(irq) \
  77         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
  78 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
  79 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
  80
  81 /* This has to be in the main kernel image, it cannot be
  82  * turned into per-cpu data.  The reason is that the main
  83  * kernel image is locked into the TLB and this structure
  84  * is accessed from the vectored interrupt trap handler.  If
  85  * access to this structure takes a TLB miss it could cause
  86  * the 5-level sparc v9 trap stack to overflow.
  87  */
  88 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  89
  90 static struct {
  91         unsigned int irq;
  92         unsigned int dev_handle;
  93         unsigned int dev_ino;
  94 } virt_to_real_irq_table[NR_IRQS];
  95
  96 static unsigned char virt_irq_alloc(unsigned int real_irq)
  97 {
  98         unsigned char ent;
  99
 100         BUILD_BUG_ON(NR_IRQS >= 256);
 101
 102         for (ent = 1; ent < NR_IRQS; ent++) {
 103                 if (!virt_to_real_irq_table[ent].irq)
 104                         break;
 105         }
 106         if (ent >= NR_IRQS) {
 107                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 108                 return 0;
 109         }
 110
 111         virt_to_real_irq_table[ent].irq = real_irq;
 112
 113         return ent;
 114 }
 115
 116 #ifdef CONFIG_PCI_MSI
 117 static void virt_irq_free(unsigned int virt_irq)
 118 {
 119         unsigned int real_irq;
 120
 121         if (virt_irq >= NR_IRQS)
 122                 return;
 123
 124         real_irq = virt_to_real_irq_table[virt_irq].irq;
 125         virt_to_real_irq_table[virt_irq].irq = 0;
 126
 127         __bucket(real_irq)->virt_irq = 0;
 128 }
 129 #endif
 130
 131 static unsigned int virt_to_real_irq(unsigned char virt_irq)
 132 {
 133         return virt_to_real_irq_table[virt_irq].irq;
 134 }
 135
 136 /*
 137  * /proc/interrupts printing:
 138  */
 139
 140 int show_interrupts(struct seq_file *p, void *v)
 141 {
 142         int i = *(loff_t *) v, j;
 143         struct irqaction * action;
 144         unsigned long flags;
 145
 146         if (i == 0) {
 147                 seq_printf(p, "           ");
 148                 for_each_online_cpu(j)
 149                         seq_printf(p, "CPU%d       ",j);
 150                 seq_putc(p, '\n');
 151         }
 152
 153         if (i < NR_IRQS) {
 154                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 155                 action = irq_desc[i].action;
 156                 if (!action)
 157                         goto skip;
 158                 seq_printf(p, "%3d: ",i);
 159 #ifndef CONFIG_SMP
 160                 seq_printf(p, "%10u ", kstat_irqs(i));
 161 #else
 162                 for_each_online_cpu(j)
 163                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 164 #endif
 165                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 166                 seq_printf(p, "  %s", action->name);
 167
 168                 for (action=action->next; action; action = action->next)
 169                         seq_printf(p, ", %s", action->name);
 170
 171                 seq_putc(p, '\n');
 172 skip:
 173                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 174         }
 175         return 0;
 176 }
 177
 178 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 179 {
 180         unsigned int tid;
 181
 182         if (this_is_starfire) {
 183                 tid = starfire_translate(imap, cpuid);
 184                 tid <<= IMAP_TID_SHIFT;
 185                 tid &= IMAP_TID_UPA;
 186         } else {
 187                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 188                         unsigned long ver;
 189
 190                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 191                         if ((ver >> 32UL) == __JALAPENO_ID ||
 192                             (ver >> 32UL) == __SERRANO_ID) {
 193                                 tid = cpuid << IMAP_TID_SHIFT;
 194                                 tid &= IMAP_TID_JBUS;
 195                         } else {
 196                                 unsigned int a = cpuid & 0x1f;
 197                                 unsigned int n = (cpuid >> 5) & 0x1f;
 198
 199                                 tid = ((a << IMAP_AID_SHIFT) |
 200                                        (n << IMAP_NID_SHIFT));
 201                                 tid &= (IMAP_AID_SAFARI |
 202                                         IMAP_NID_SAFARI);;
 203                         }
 204                 } else {
 205                         tid = cpuid << IMAP_TID_SHIFT;
 206                         tid &= IMAP_TID_UPA;
 207                 }
 208         }
 209
 210         return tid;
 211 }
 212
 213 struct irq_handler_data {
 214         unsigned long   iclr;
 215         unsigned long   imap;
 216
 217         void            (*pre_handler)(unsigned int, void *, void *);
 218         void            *pre_handler_arg1;
 219         void            *pre_handler_arg2;
 220
 221         u32             msi;
 222 };
 223
 224 void sparc64_set_msi(unsigned int virt_irq, u32 msi)
 225 {
 226         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 227
 228         if (data)
 229                 data->msi = msi;
 230 }
 231
 232 u32 sparc64_get_msi(unsigned int virt_irq)
 233 {
 234         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 235
 236         if (data)
 237                 return data->msi;
 238         return 0xffffffff;
 239 }
 240
 241 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
 242 {
 243         unsigned int real_irq = virt_to_real_irq(virt_irq);
 244         struct ino_bucket *bucket = NULL;
 245
 246         if (likely(real_irq))
 247                 bucket = __bucket(real_irq);
 248
 249         return bucket;
 250 }
 251
 252 #ifdef CONFIG_SMP
 253 static int irq_choose_cpu(unsigned int virt_irq)
 254 {
 255         cpumask_t mask = irq_desc[virt_irq].affinity;
 256         int cpuid;
 257
 258         if (cpus_equal(mask, CPU_MASK_ALL)) {
 259                 static int irq_rover;
 260                 static DEFINE_SPINLOCK(irq_rover_lock);
 261                 unsigned long flags;
 262
 263                 /* Round-robin distribution... */
 264         do_round_robin:
 265                 spin_lock_irqsave(&irq_rover_lock, flags);
 266
 267                 while (!cpu_online(irq_rover)) {
 268                         if (++irq_rover >= NR_CPUS)
 269                                 irq_rover = 0;
 270                 }
 271                 cpuid = irq_rover;
 272                 do {
 273                         if (++irq_rover >= NR_CPUS)
 274                                 irq_rover = 0;
 275                 } while (!cpu_online(irq_rover));
 276
 277                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 278         } else {
 279                 cpumask_t tmp;
 280
 281                 cpus_and(tmp, cpu_online_map, mask);
 282
 283                 if (cpus_empty(tmp))
 284                         goto do_round_robin;
 285
 286                 cpuid = first_cpu(tmp);
 287         }
 288
 289         return cpuid;
 290 }
 291 #else
 292 static int irq_choose_cpu(unsigned int virt_irq)
 293 {
 294         return real_hard_smp_processor_id();
 295 }
 296 #endif
 297
 298 static void sun4u_irq_enable(unsigned int virt_irq)
 299 {
 300         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 301
 302         if (likely(data)) {
 303                 unsigned long cpuid, imap, val;
 304                 unsigned int tid;
 305
 306                 cpuid = irq_choose_cpu(virt_irq);
 307                 imap = data->imap;
 308
 309                 tid = sun4u_compute_tid(imap, cpuid);
 310
 311                 val = upa_readq(imap);
 312                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 313                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 314                 val |= tid | IMAP_VALID;
 315                 upa_writeq(val, imap);
 316         }
 317 }
 318
 319 static void sun4u_set_affinity(unsigned int virt_irq, cpumask_t mask)
 320 {
 321         sun4u_irq_enable(virt_irq);
 322 }
 323
 324 static void sun4u_irq_disable(unsigned int virt_irq)
 325 {
 326         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 327
 328         if (likely(data)) {
 329                 unsigned long imap = data->imap;
 330                 unsigned long tmp = upa_readq(imap);
 331
 332                 tmp &= ~IMAP_VALID;
 333                 upa_writeq(tmp, imap);
 334         }
 335 }
 336
 337 static void sun4u_irq_end(unsigned int virt_irq)
 338 {
 339         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 340         struct irq_desc *desc = irq_desc + virt_irq;
 341
 342         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 343                 return;
 344
 345         if (likely(data))
 346                 upa_writeq(ICLR_IDLE, data->iclr);
 347 }
 348
 349 static void sun4v_irq_enable(unsigned int virt_irq)
 350 {
 351         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 352         unsigned int ino = bucket - &ivector_table[0];
 353
 354         if (likely(bucket)) {
 355                 unsigned long cpuid;
 356                 int err;
 357
 358                 cpuid = irq_choose_cpu(virt_irq);
 359
 360                 err = sun4v_intr_settarget(ino, cpuid);
 361                 if (err != HV_EOK)
 362                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 363                                "err(%d)\n", ino, cpuid, err);
 364                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 365                 if (err != HV_EOK)
 366                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
 367                                "err(%d)\n", ino, err);
 368                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 369                 if (err != HV_EOK)
 370                         printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 371                                ino, err);
 372         }
 373 }
 374
 375 static void sun4v_set_affinity(unsigned int virt_irq, cpumask_t mask)
 376 {
 377         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 378         unsigned int ino = bucket - &ivector_table[0];
 379
 380         if (likely(bucket)) {
 381                 unsigned long cpuid;
 382                 int err;
 383
 384                 cpuid = irq_choose_cpu(virt_irq);
 385
 386                 err = sun4v_intr_settarget(ino, cpuid);
 387                 if (err != HV_EOK)
 388                         printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 389                                "err(%d)\n", ino, cpuid, err);
 390         }
 391 }
 392
 393 static void sun4v_irq_disable(unsigned int virt_irq)
 394 {
 395         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 396         unsigned int ino = bucket - &ivector_table[0];
 397
 398         if (likely(bucket)) {
 399                 int err;
 400
 401                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 402                 if (err != HV_EOK)
 403                         printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 404                                "err(%d)\n", ino, err);
 405         }
 406 }
 407
 408 #ifdef CONFIG_PCI_MSI
 409 static void sun4u_msi_enable(unsigned int virt_irq)
 410 {
 411         sun4u_irq_enable(virt_irq);
 412         unmask_msi_irq(virt_irq);
 413 }
 414
 415 static void sun4u_msi_disable(unsigned int virt_irq)
 416 {
 417         mask_msi_irq(virt_irq);
 418         sun4u_irq_disable(virt_irq);
 419 }
 420
 421 static void sun4v_msi_enable(unsigned int virt_irq)
 422 {
 423         sun4v_irq_enable(virt_irq);
 424         unmask_msi_irq(virt_irq);
 425 }
 426
 427 static void sun4v_msi_disable(unsigned int virt_irq)
 428 {
 429         mask_msi_irq(virt_irq);
 430         sun4v_irq_disable(virt_irq);
 431 }
 432 #endif
 433
 434 static void sun4v_irq_end(unsigned int virt_irq)
 435 {
 436         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 437         unsigned int ino = bucket - &ivector_table[0];
 438         struct irq_desc *desc = irq_desc + virt_irq;
 439
 440         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 441                 return;
 442
 443         if (likely(bucket)) {
 444                 int err;
 445
 446                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 447                 if (err != HV_EOK)
 448                         printk(KERN_ERR "sun4v_intr_setstate(%x): "
 449                                "err(%d)\n", ino, err);
 450         }
 451 }
 452
 453 static void sun4v_virq_enable(unsigned int virt_irq)
 454 {
 455         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 456
 457         if (likely(bucket)) {
 458                 unsigned long cpuid, dev_handle, dev_ino;
 459                 int err;
 460
 461                 cpuid = irq_choose_cpu(virt_irq);
 462
 463                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 464                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 465
 466                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 467                 if (err != HV_EOK)
 468                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 469                                "err(%d)\n",
 470                                dev_handle, dev_ino, cpuid, err);
 471                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 472                                             HV_INTR_STATE_IDLE);
 473                 if (err != HV_EOK)
 474                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 475                                 "HV_INTR_STATE_IDLE): err(%d)\n",
 476                                dev_handle, dev_ino, err);
 477                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 478                                             HV_INTR_ENABLED);
 479                 if (err != HV_EOK)
 480                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 481                                "HV_INTR_ENABLED): err(%d)\n",
 482                                dev_handle, dev_ino, err);
 483         }
 484 }
 485
 486 static void sun4v_virt_set_affinity(unsigned int virt_irq, cpumask_t mask)
 487 {
 488         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 489
 490         if (likely(bucket)) {
 491                 unsigned long cpuid, dev_handle, dev_ino;
 492                 int err;
 493
 494                 cpuid = irq_choose_cpu(virt_irq);
 495
 496                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 497                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 498
 499                 err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 500                 if (err != HV_EOK)
 501                         printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 502                                "err(%d)\n",
 503                                dev_handle, dev_ino, cpuid, err);
 504         }
 505 }
 506
 507 static void sun4v_virq_disable(unsigned int virt_irq)
 508 {
 509         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 510
 511         if (likely(bucket)) {
 512                 unsigned long dev_handle, dev_ino;
 513                 int err;
 514
 515                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 516                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 517
 518                 err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 519                                             HV_INTR_DISABLED);
 520                 if (err != HV_EOK)
 521                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 522                                "HV_INTR_DISABLED): err(%d)\n",
 523                                dev_handle, dev_ino, err);
 524         }
 525 }
 526
 527 static void sun4v_virq_end(unsigned int virt_irq)
 528 {
 529         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 530         struct irq_desc *desc = irq_desc + virt_irq;
 531
 532         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 533                 return;
 534
 535         if (likely(bucket)) {
 536                 unsigned long dev_handle, dev_ino;
 537                 int err;
 538
 539                 dev_handle = virt_to_real_irq_table[virt_irq].dev_handle;
 540                 dev_ino = virt_to_real_irq_table[virt_irq].dev_ino;
 541
 542                 err = sun4v_vintr_set_state(dev_handle, dev_ino,
 543                                             HV_INTR_STATE_IDLE);
 544                 if (err != HV_EOK)
 545                         printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 546                                 "HV_INTR_STATE_IDLE): err(%d)\n",
 547                                dev_handle, dev_ino, err);
 548         }
 549 }
 550
 551 static void run_pre_handler(unsigned int virt_irq)
 552 {
 553         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 554         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 555
 556         if (likely(data->pre_handler)) {
 557                 data->pre_handler(__irq_ino(__irq(bucket)),
 558                                   data->pre_handler_arg1,
 559                                   data->pre_handler_arg2);
 560         }
 561 }
 562
 563 static struct irq_chip sun4u_irq = {
 564         .typename       = "sun4u",
 565         .enable         = sun4u_irq_enable,
 566         .disable        = sun4u_irq_disable,
 567         .end            = sun4u_irq_end,
 568         .set_affinity   = sun4u_set_affinity,
 569 };
 570
 571 static struct irq_chip sun4u_irq_ack = {
 572         .typename       = "sun4u+ack",
 573         .enable         = sun4u_irq_enable,
 574         .disable        = sun4u_irq_disable,
 575         .ack            = run_pre_handler,
 576         .end            = sun4u_irq_end,
 577         .set_affinity   = sun4u_set_affinity,
 578 };
 579
 580 static struct irq_chip sun4v_irq = {
 581         .typename       = "sun4v",
 582         .enable         = sun4v_irq_enable,
 583         .disable        = sun4v_irq_disable,
 584         .end            = sun4v_irq_end,
 585         .set_affinity   = sun4v_set_affinity,
 586 };
 587
 588 static struct irq_chip sun4v_irq_ack = {
 589         .typename       = "sun4v+ack",
 590         .enable         = sun4v_irq_enable,
 591         .disable        = sun4v_irq_disable,
 592         .ack            = run_pre_handler,
 593         .end            = sun4v_irq_end,
 594         .set_affinity   = sun4v_set_affinity,
 595 };
 596
 597 #ifdef CONFIG_PCI_MSI
 598 static struct irq_chip sun4u_msi = {
 599         .typename       = "sun4u+msi",
 600         .mask           = mask_msi_irq,
 601         .unmask         = unmask_msi_irq,
 602         .enable         = sun4u_msi_enable,
 603         .disable        = sun4u_msi_disable,
 604         .ack            = run_pre_handler,
 605         .end            = sun4u_irq_end,
 606         .set_affinity   = sun4u_set_affinity,
 607 };
 608
 609 static struct irq_chip sun4v_msi = {
 610         .typename       = "sun4v+msi",
 611         .mask           = mask_msi_irq,
 612         .unmask         = unmask_msi_irq,
 613         .enable         = sun4v_msi_enable,
 614         .disable        = sun4v_msi_disable,
 615         .ack            = run_pre_handler,
 616         .end            = sun4v_irq_end,
 617         .set_affinity   = sun4v_set_affinity,
 618 };
 619 #endif
 620
 621 static struct irq_chip sun4v_virq = {
 622         .typename       = "vsun4v",
 623         .enable         = sun4v_virq_enable,
 624         .disable        = sun4v_virq_disable,
 625         .end            = sun4v_virq_end,
 626         .set_affinity   = sun4v_virt_set_affinity,
 627 };
 628
 629 static struct irq_chip sun4v_virq_ack = {
 630         .typename       = "vsun4v+ack",
 631         .enable         = sun4v_virq_enable,
 632         .disable        = sun4v_virq_disable,
 633         .ack            = run_pre_handler,
 634         .end            = sun4v_virq_end,
 635         .set_affinity   = sun4v_virt_set_affinity,
 636 };
 637
 638 void irq_install_pre_handler(int virt_irq,
 639                              void (*func)(unsigned int, void *, void *),
 640                              void *arg1, void *arg2)
 641 {
 642         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 643         struct irq_chip *chip;
 644
 645         data->pre_handler = func;
 646         data->pre_handler_arg1 = arg1;
 647         data->pre_handler_arg2 = arg2;
 648
 649         chip = get_irq_chip(virt_irq);
 650         if (chip == &sun4u_irq_ack ||
 651             chip == &sun4v_irq_ack ||
 652             chip == &sun4v_virq_ack
 653 #ifdef CONFIG_PCI_MSI
 654             || chip == &sun4u_msi
 655             || chip == &sun4v_msi
 656 #endif
 657             )
 658                 return;
 659
 660         chip = (chip == &sun4u_irq ?
 661                 &sun4u_irq_ack :
 662                 (chip == &sun4v_irq ?
 663                  &sun4v_irq_ack : &sun4v_virq_ack));
 664         set_irq_chip(virt_irq, chip);
 665 }
 666
 667 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 668 {
 669         struct ino_bucket *bucket;
 670         struct irq_handler_data *data;
 671         int ino;
 672
 673         BUG_ON(tlb_type == hypervisor);
 674
 675         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 676         bucket = &ivector_table[ino];
 677         if (!bucket->virt_irq) {
 678                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 679                 set_irq_chip(bucket->virt_irq, &sun4u_irq);
 680         }
 681
 682         data = get_irq_chip_data(bucket->virt_irq);
 683         if (unlikely(data))
 684                 goto out;
 685
 686         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 687         if (unlikely(!data)) {
 688                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 689                 prom_halt();
 690         }
 691         set_irq_chip_data(bucket->virt_irq, data);
 692
 693         data->imap  = imap;
 694         data->iclr  = iclr;
 695
 696 out:
 697         return bucket->virt_irq;
 698 }
 699
 700 static unsigned int sun4v_build_common(unsigned long sysino,
 701                                        struct irq_chip *chip)
 702 {
 703         struct ino_bucket *bucket;
 704         struct irq_handler_data *data;
 705
 706         BUG_ON(tlb_type != hypervisor);
 707
 708         bucket = &ivector_table[sysino];
 709         if (!bucket->virt_irq) {
 710                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 711                 set_irq_chip(bucket->virt_irq, chip);
 712         }
 713
 714         data = get_irq_chip_data(bucket->virt_irq);
 715         if (unlikely(data))
 716                 goto out;
 717
 718         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 719         if (unlikely(!data)) {
 720                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 721                 prom_halt();
 722         }
 723         set_irq_chip_data(bucket->virt_irq, data);
 724
 725         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 726          * is done by hypervisor calls on sun4v platforms, not by direct
 727          * register accesses.
 728          */
 729         data->imap = ~0UL;
 730         data->iclr = ~0UL;
 731
 732 out:
 733         return bucket->virt_irq;
 734 }
 735
 736 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 737 {
 738         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 739
 740         return sun4v_build_common(sysino, &sun4v_irq);
 741 }
 742
 743 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 744 {
 745         unsigned long sysino, hv_err;
 746         unsigned int virq;
 747
 748         BUG_ON(devhandle & devino);
 749
 750         sysino = devhandle | devino;
 751         BUG_ON(sysino & ~(IMAP_IGN | IMAP_INO));
 752
 753         hv_err = sun4v_vintr_set_cookie(devhandle, devino, sysino);
 754         if (hv_err) {
 755                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 756                             "err=%lu\n", devhandle, devino, hv_err);
 757                 prom_halt();
 758         }
 759
 760         virq = sun4v_build_common(sysino, &sun4v_virq);
 761
 762         virt_to_real_irq_table[virq].dev_handle = devhandle;
 763         virt_to_real_irq_table[virq].dev_ino = devino;
 764
 765         return virq;
 766 }
 767
 768 #ifdef CONFIG_PCI_MSI
 769 unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
 770                              unsigned int msi_start, unsigned int msi_end)
 771 {
 772         struct ino_bucket *bucket;
 773         struct irq_handler_data *data;
 774         unsigned long sysino;
 775         unsigned int devino;
 776
 777         BUG_ON(tlb_type != hypervisor);
 778
 779         /* Find a free devino in the given range.  */
 780         for (devino = msi_start; devino < msi_end; devino++) {
 781                 sysino = sun4v_devino_to_sysino(devhandle, devino);
 782                 bucket = &ivector_table[sysino];
 783                 if (!bucket->virt_irq)
 784                         break;
 785         }
 786         if (devino >= msi_end)
 787                 return -ENOSPC;
 788
 789         sysino = sun4v_devino_to_sysino(devhandle, devino);
 790         bucket = &ivector_table[sysino];
 791         bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 792         *virt_irq_p = bucket->virt_irq;
 793         set_irq_chip(bucket->virt_irq, &sun4v_msi);
 794
 795         data = get_irq_chip_data(bucket->virt_irq);
 796         if (unlikely(data))
 797                 return devino;
 798
 799         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 800         if (unlikely(!data)) {
 801                 virt_irq_free(*virt_irq_p);
 802                 return -ENOMEM;
 803         }
 804         set_irq_chip_data(bucket->virt_irq, data);
 805
 806         data->imap = ~0UL;
 807         data->iclr = ~0UL;
 808
 809         return devino;
 810 }
 811
 812 void sun4v_destroy_msi(unsigned int virt_irq)
 813 {
 814         virt_irq_free(virt_irq);
 815 }
 816
 817 unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
 818                              unsigned int msi_start, unsigned int msi_end,
 819                              unsigned long imap_base, unsigned long iclr_base)
 820 {
 821         struct ino_bucket *bucket;
 822         struct irq_handler_data *data;
 823         unsigned long sysino;
 824         unsigned int devino;
 825
 826         /* Find a free devino in the given range.  */
 827         for (devino = msi_start; devino < msi_end; devino++) {
 828                 sysino = (portid << 6) | devino;
 829                 bucket = &ivector_table[sysino];
 830                 if (!bucket->virt_irq)
 831                         break;
 832         }
 833         if (devino >= msi_end)
 834                 return -ENOSPC;
 835
 836         sysino = (portid << 6) | devino;
 837         bucket = &ivector_table[sysino];
 838         bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 839         *virt_irq_p = bucket->virt_irq;
 840         set_irq_chip(bucket->virt_irq, &sun4u_msi);
 841
 842         data = get_irq_chip_data(bucket->virt_irq);
 843         if (unlikely(data))
 844                 return devino;
 845
 846         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 847         if (unlikely(!data)) {
 848                 virt_irq_free(*virt_irq_p);
 849                 return -ENOMEM;
 850         }
 851         set_irq_chip_data(bucket->virt_irq, data);
 852
 853         data->imap = (imap_base + (devino * 0x8UL));
 854         data->iclr = (iclr_base + (devino * 0x8UL));
 855
 856         return devino;
 857 }
 858
 859 void sun4u_destroy_msi(unsigned int virt_irq)
 860 {
 861         virt_irq_free(virt_irq);
 862 }
 863 #endif
 864
 865 void ack_bad_irq(unsigned int virt_irq)
 866 {
 867         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 868         unsigned int ino = 0xdeadbeef;
 869
 870         if (bucket)
 871                 ino = bucket - &ivector_table[0];
 872
 873         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 874                ino, virt_irq);
 875 }
 876
 877 void handler_irq(int irq, struct pt_regs *regs)
 878 {
 879         struct ino_bucket *bucket;
 880         struct pt_regs *old_regs;
 881
 882         clear_softint(1 << irq);
 883
 884         old_regs = set_irq_regs(regs);
 885         irq_enter();
 886
 887         /* Sliiiick... */
 888         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
 889         while (bucket) {
 890                 struct ino_bucket *next = __bucket(bucket->irq_chain);
 891
 892                 bucket->irq_chain = 0;
 893                 __do_IRQ(bucket->virt_irq);
 894
 895                 bucket = next;
 896         }
 897
 898         irq_exit();
 899         set_irq_regs(old_regs);
 900 }
 901
 902 #ifdef CONFIG_HOTPLUG_CPU
 903 void fixup_irqs(void)
 904 {
 905         unsigned int irq;
 906
 907         for (irq = 0; irq < NR_IRQS; irq++) {
 908                 unsigned long flags;
 909
 910                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 911                 if (irq_desc[irq].action &&
 912                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 913                         if (irq_desc[irq].chip->set_affinity)
 914                                 irq_desc[irq].chip->set_affinity(irq,
 915                                         irq_desc[irq].affinity);
 916                 }
 917                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 918         }
 919 }
 920 #endif
 921
 922 struct sun5_timer {
 923         u64     count0;
 924         u64     limit0;
 925         u64     count1;
 926         u64     limit1;
 927 };
 928
 929 static struct sun5_timer *prom_timers;
 930 static u64 prom_limit0, prom_limit1;
 931
 932 static void map_prom_timers(void)
 933 {
 934         struct device_node *dp;
 935         const unsigned int *addr;
 936
 937         /* PROM timer node hangs out in the top level of device siblings... */
 938         dp = of_find_node_by_path("/");
 939         dp = dp->child;
 940         while (dp) {
 941                 if (!strcmp(dp->name, "counter-timer"))
 942                         break;
 943                 dp = dp->sibling;
 944         }
 945
 946         /* Assume if node is not present, PROM uses different tick mechanism
 947          * which we should not care about.
 948          */
 949         if (!dp) {
 950                 prom_timers = (struct sun5_timer *) 0;
 951                 return;
 952         }
 953
 954         /* If PROM is really using this, it must be mapped by him. */
 955         addr = of_get_property(dp, "address", NULL);
 956         if (!addr) {
 957                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 958                 prom_timers = (struct sun5_timer *) 0;
 959                 return;
 960         }
 961         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 962 }
 963
 964 static void kill_prom_timer(void)
 965 {
 966         if (!prom_timers)
 967                 return;
 968
 969         /* Save them away for later. */
 970         prom_limit0 = prom_timers->limit0;
 971         prom_limit1 = prom_timers->limit1;
 972
 973         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 974          * We turn both off here just to be paranoid.
 975          */
 976         prom_timers->limit0 = 0;
 977         prom_timers->limit1 = 0;
 978
 979         /* Wheee, eat the interrupt packet too... */
 980         __asm__ __volatile__(
 981 "       mov     0x40, %%g2\n"
 982 "       ldxa    [%%g0] %0, %%g1\n"
 983 "       ldxa    [%%g2] %1, %%g1\n"
 984 "       stxa    %%g0, [%%g0] %0\n"
 985 "       membar  #Sync\n"
 986         : /* no outputs */
 987         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 988         : "g1", "g2");
 989 }
 990
 991 void init_irqwork_curcpu(void)
 992 {
 993         int cpu = hard_smp_processor_id();
 994
 995         trap_block[cpu].irq_worklist = 0;
 996 }
 997
 998 /* Please be very careful with register_one_mondo() and
 999  * sun4v_register_mondo_queues().
1000  *
1001  * On SMP this gets invoked from the CPU trampoline before
1002  * the cpu has fully taken over the trap table from OBP,
1003  * and it's kernel stack + %g6 thread register state is
1004  * not fully cooked yet.
1005  *
1006  * Therefore you cannot make any OBP calls, not even prom_printf,
1007  * from these two routines.
1008  */
1009 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
1010 {
1011         unsigned long num_entries = (qmask + 1) / 64;
1012         unsigned long status;
1013
1014         status = sun4v_cpu_qconf(type, paddr, num_entries);
1015         if (status != HV_EOK) {
1016                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
1017                             "err %lu\n", type, paddr, num_entries, status);
1018                 prom_halt();
1019         }
1020 }
1021
1022 void __cpuinit sun4v_register_mondo_queues(int this_cpu)
1023 {
1024         struct trap_per_cpu *tb = &trap_block[this_cpu];
1025
1026         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
1027                            tb->cpu_mondo_qmask);
1028         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
1029                            tb->dev_mondo_qmask);
1030         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
1031                            tb->resum_qmask);
1032         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
1033                            tb->nonresum_qmask);
1034 }
1035
1036 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
1037 {
1038         unsigned long size = PAGE_ALIGN(qmask + 1);
1039         void *p = __alloc_bootmem_low(size, size, 0);
1040         if (!p) {
1041                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
1042                 prom_halt();
1043         }
1044
1045         *pa_ptr = __pa(p);
1046 }
1047
1048 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
1049 {
1050         unsigned long size = PAGE_ALIGN(qmask + 1);
1051         void *p = __alloc_bootmem_low(size, size, 0);
1052
1053         if (!p) {
1054                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
1055                 prom_halt();
1056         }
1057
1058         *pa_ptr = __pa(p);
1059 }
1060
1061 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
1062 {
1063 #ifdef CONFIG_SMP
1064         void *page;
1065
1066         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
1067
1068         page = alloc_bootmem_low_pages(PAGE_SIZE);
1069         if (!page) {
1070                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
1071                 prom_halt();
1072         }
1073
1074         tb->cpu_mondo_block_pa = __pa(page);
1075         tb->cpu_list_pa = __pa(page + 64);
1076 #endif
1077 }
1078
1079 /* Allocate mondo and error queues for all possible cpus.  */
1080 static void __init sun4v_init_mondo_queues(void)
1081 {
1082         int cpu;
1083
1084         for_each_possible_cpu(cpu) {
1085                 struct trap_per_cpu *tb = &trap_block[cpu];
1086
1087                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
1088                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
1089                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
1090                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
1091                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
1092                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
1093                                tb->nonresum_qmask);
1094
1095                 init_cpu_send_mondo_info(tb);
1096         }
1097
1098         /* Load up the boot cpu's entries.  */
1099         sun4v_register_mondo_queues(hard_smp_processor_id());
1100 }
1101
1102 static struct irqaction timer_irq_action = {
1103         .name = "timer",
1104 };
1105
1106 /* Only invoked on boot processor. */
1107 void __init init_IRQ(void)
1108 {
1109         map_prom_timers();
1110         kill_prom_timer();
1111         memset(&ivector_table[0], 0, sizeof(ivector_table));
1112
1113         if (tlb_type == hypervisor)
1114                 sun4v_init_mondo_queues();
1115
1116         /* We need to clear any IRQ's pending in the soft interrupt
1117          * registers, a spurious one could be left around from the
1118          * PROM timer which we just disabled.
1119          */
1120         clear_softint(get_softint());
1121
1122         /* Now that ivector table is initialized, it is safe
1123          * to receive IRQ vector traps.  We will normally take
1124          * one or two right now, in case some device PROM used
1125          * to boot us wants to speak to us.  We just ignore them.
1126          */
1127         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1128                              "or        %%g1, %0, %%g1\n\t"
1129                              "wrpr      %%g1, 0x0, %%pstate"
1130                              : /* No outputs */
1131                              : "i" (PSTATE_IE)
1132                              : "g1");
1133
1134         irq_desc[0].action = &timer_irq_action;
1135 }