arch/sparc/kernel/irq_64.c

   1 /* irq.c: UltraSparc IRQ handling/init/registry.
   2  *
   3  * Copyright (C) 1997, 2007, 2008 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   5  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/sched.h>
  10 #include <linux/linkage.h>
  11 #include <linux/ptrace.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/signal.h>
  15 #include <linux/mm.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/slab.h>
  18 #include <linux/random.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/irq.h>
  25
  26 #include <asm/ptrace.h>
  27 #include <asm/processor.h>
  28 #include <asm/atomic.h>
  29 #include <asm/system.h>
  30 #include <asm/irq.h>
  31 #include <asm/io.h>
  32 #include <asm/iommu.h>
  33 #include <asm/upa.h>
  34 #include <asm/oplib.h>
  35 #include <asm/prom.h>
  36 #include <asm/timer.h>
  37 #include <asm/smp.h>
  38 #include <asm/starfire.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/cache.h>
  41 #include <asm/cpudata.h>
  42 #include <asm/auxio.h>
  43 #include <asm/head.h>
  44 #include <asm/hypervisor.h>
  45 #include <asm/cacheflush.h>
  46
  47 #include "entry.h"
  48
  49 #define NUM_IVECS       (IMAP_INR + 1)
  50
  51 struct ino_bucket *ivector_table;
  52 unsigned long ivector_table_pa;
  53
  54 /* On several sun4u processors, it is illegal to mix bypass and
  55  * non-bypass accesses.  Therefore we access all INO buckets
  56  * using bypass accesses only.
  57  */
  58 static unsigned long bucket_get_chain_pa(unsigned long bucket_pa)
  59 {
  60         unsigned long ret;
  61
  62         __asm__ __volatile__("ldxa      [%1] %2, %0"
  63                              : "=&r" (ret)
  64                              : "r" (bucket_pa +
  65                                     offsetof(struct ino_bucket,
  66                                              __irq_chain_pa)),
  67                                "i" (ASI_PHYS_USE_EC));
  68
  69         return ret;
  70 }
  71
  72 static void bucket_clear_chain_pa(unsigned long bucket_pa)
  73 {
  74         __asm__ __volatile__("stxa      %%g0, [%0] %1"
  75                              : /* no outputs */
  76                              : "r" (bucket_pa +
  77                                     offsetof(struct ino_bucket,
  78                                              __irq_chain_pa)),
  79                                "i" (ASI_PHYS_USE_EC));
  80 }
  81
  82 static unsigned int bucket_get_virt_irq(unsigned long bucket_pa)
  83 {
  84         unsigned int ret;
  85
  86         __asm__ __volatile__("lduwa     [%1] %2, %0"
  87                              : "=&r" (ret)
  88                              : "r" (bucket_pa +
  89                                     offsetof(struct ino_bucket,
  90                                              __virt_irq)),
  91                                "i" (ASI_PHYS_USE_EC));
  92
  93         return ret;
  94 }
  95
  96 static void bucket_set_virt_irq(unsigned long bucket_pa,
  97                                 unsigned int virt_irq)
  98 {
  99         __asm__ __volatile__("stwa      %0, [%1] %2"
 100                              : /* no outputs */
 101                              : "r" (virt_irq),
 102                                "r" (bucket_pa +
 103                                     offsetof(struct ino_bucket,
 104                                              __virt_irq)),
 105                                "i" (ASI_PHYS_USE_EC));
 106 }
 107
 108 #define irq_work_pa(__cpu)      &(trap_block[(__cpu)].irq_worklist_pa)
 109
 110 static struct {
 111         unsigned int dev_handle;
 112         unsigned int dev_ino;
 113         unsigned int in_use;
 114 } virt_irq_table[NR_IRQS];
 115 static DEFINE_SPINLOCK(virt_irq_alloc_lock);
 116
 117 unsigned char virt_irq_alloc(unsigned int dev_handle,
 118                              unsigned int dev_ino)
 119 {
 120         unsigned long flags;
 121         unsigned char ent;
 122
 123         BUILD_BUG_ON(NR_IRQS >= 256);
 124
 125         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 126
 127         for (ent = 1; ent < NR_IRQS; ent++) {
 128                 if (!virt_irq_table[ent].in_use)
 129                         break;
 130         }
 131         if (ent >= NR_IRQS) {
 132                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 133                 ent = 0;
 134         } else {
 135                 virt_irq_table[ent].dev_handle = dev_handle;
 136                 virt_irq_table[ent].dev_ino = dev_ino;
 137                 virt_irq_table[ent].in_use = 1;
 138         }
 139
 140         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 141
 142         return ent;
 143 }
 144
 145 #ifdef CONFIG_PCI_MSI
 146 void virt_irq_free(unsigned int virt_irq)
 147 {
 148         unsigned long flags;
 149
 150         if (virt_irq >= NR_IRQS)
 151                 return;
 152
 153         spin_lock_irqsave(&virt_irq_alloc_lock, flags);
 154
 155         virt_irq_table[virt_irq].in_use = 0;
 156
 157         spin_unlock_irqrestore(&virt_irq_alloc_lock, flags);
 158 }
 159 #endif
 160
 161 /*
 162  * /proc/interrupts printing:
 163  */
 164
 165 int show_interrupts(struct seq_file *p, void *v)
 166 {
 167         int i = *(loff_t *) v, j;
 168         struct irqaction * action;
 169         unsigned long flags;
 170
 171         if (i == 0) {
 172                 seq_printf(p, "           ");
 173                 for_each_online_cpu(j)
 174                         seq_printf(p, "CPU%d       ",j);
 175                 seq_putc(p, '\n');
 176         }
 177
 178         if (i < NR_IRQS) {
 179                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 180                 action = irq_desc[i].action;
 181                 if (!action)
 182                         goto skip;
 183                 seq_printf(p, "%3d: ",i);
 184 #ifndef CONFIG_SMP
 185                 seq_printf(p, "%10u ", kstat_irqs(i));
 186 #else
 187                 for_each_online_cpu(j)
 188                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 189 #endif
 190                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 191                 seq_printf(p, "  %s", action->name);
 192
 193                 for (action=action->next; action; action = action->next)
 194                         seq_printf(p, ", %s", action->name);
 195
 196                 seq_putc(p, '\n');
 197 skip:
 198                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 199         } else if (i == NR_IRQS) {
 200                 seq_printf(p, "NMI: ");
 201                 for_each_online_cpu(j)
 202                         seq_printf(p, "%10u ", cpu_data(j).__nmi_count);
 203                 seq_printf(p, "     Non-maskable interrupts\n");
 204         }
 205         return 0;
 206 }
 207
 208 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 209 {
 210         unsigned int tid;
 211
 212         if (this_is_starfire) {
 213                 tid = starfire_translate(imap, cpuid);
 214                 tid <<= IMAP_TID_SHIFT;
 215                 tid &= IMAP_TID_UPA;
 216         } else {
 217                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 218                         unsigned long ver;
 219
 220                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 221                         if ((ver >> 32UL) == __JALAPENO_ID ||
 222                             (ver >> 32UL) == __SERRANO_ID) {
 223                                 tid = cpuid << IMAP_TID_SHIFT;
 224                                 tid &= IMAP_TID_JBUS;
 225                         } else {
 226                                 unsigned int a = cpuid & 0x1f;
 227                                 unsigned int n = (cpuid >> 5) & 0x1f;
 228
 229                                 tid = ((a << IMAP_AID_SHIFT) |
 230                                        (n << IMAP_NID_SHIFT));
 231                                 tid &= (IMAP_AID_SAFARI |
 232                                         IMAP_NID_SAFARI);;
 233                         }
 234                 } else {
 235                         tid = cpuid << IMAP_TID_SHIFT;
 236                         tid &= IMAP_TID_UPA;
 237                 }
 238         }
 239
 240         return tid;
 241 }
 242
 243 struct irq_handler_data {
 244         unsigned long   iclr;
 245         unsigned long   imap;
 246
 247         void            (*pre_handler)(unsigned int, void *, void *);
 248         void            *arg1;
 249         void            *arg2;
 250 };
 251
 252 #ifdef CONFIG_SMP
 253 static int irq_choose_cpu(unsigned int virt_irq)
 254 {
 255         cpumask_t mask;
 256         int cpuid;
 257
 258         cpumask_copy(&mask, irq_desc[virt_irq].affinity);
 259         if (cpus_equal(mask, CPU_MASK_ALL)) {
 260                 static int irq_rover;
 261                 static DEFINE_SPINLOCK(irq_rover_lock);
 262                 unsigned long flags;
 263
 264                 /* Round-robin distribution... */
 265         do_round_robin:
 266                 spin_lock_irqsave(&irq_rover_lock, flags);
 267
 268                 while (!cpu_online(irq_rover)) {
 269                         if (++irq_rover >= NR_CPUS)
 270                                 irq_rover = 0;
 271                 }
 272                 cpuid = irq_rover;
 273                 do {
 274                         if (++irq_rover >= NR_CPUS)
 275                                 irq_rover = 0;
 276                 } while (!cpu_online(irq_rover));
 277
 278                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 279         } else {
 280                 cpumask_t tmp;
 281
 282                 cpus_and(tmp, cpu_online_map, mask);
 283
 284                 if (cpus_empty(tmp))
 285                         goto do_round_robin;
 286
 287                 cpuid = first_cpu(tmp);
 288         }
 289
 290         return cpuid;
 291 }
 292 #else
 293 static int irq_choose_cpu(unsigned int virt_irq)
 294 {
 295         return real_hard_smp_processor_id();
 296 }
 297 #endif
 298
 299 static void sun4u_irq_enable(unsigned int virt_irq)
 300 {
 301         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 302
 303         if (likely(data)) {
 304                 unsigned long cpuid, imap, val;
 305                 unsigned int tid;
 306
 307                 cpuid = irq_choose_cpu(virt_irq);
 308                 imap = data->imap;
 309
 310                 tid = sun4u_compute_tid(imap, cpuid);
 311
 312                 val = upa_readq(imap);
 313                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 314                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 315                 val |= tid | IMAP_VALID;
 316                 upa_writeq(val, imap);
 317                 upa_writeq(ICLR_IDLE, data->iclr);
 318         }
 319 }
 320
 321 static void sun4u_set_affinity(unsigned int virt_irq,
 322                                const struct cpumask *mask)
 323 {
 324         sun4u_irq_enable(virt_irq);
 325 }
 326
 327 static void sun4u_irq_disable(unsigned int virt_irq)
 328 {
 329         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 330
 331         if (likely(data)) {
 332                 unsigned long imap = data->imap;
 333                 unsigned long tmp = upa_readq(imap);
 334
 335                 tmp &= ~IMAP_VALID;
 336                 upa_writeq(tmp, imap);
 337         }
 338 }
 339
 340 static void sun4u_irq_eoi(unsigned int virt_irq)
 341 {
 342         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 343         struct irq_desc *desc = irq_desc + virt_irq;
 344
 345         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 346                 return;
 347
 348         if (likely(data))
 349                 upa_writeq(ICLR_IDLE, data->iclr);
 350 }
 351
 352 static void sun4v_irq_enable(unsigned int virt_irq)
 353 {
 354         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 355         unsigned long cpuid = irq_choose_cpu(virt_irq);
 356         int err;
 357
 358         err = sun4v_intr_settarget(ino, cpuid);
 359         if (err != HV_EOK)
 360                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 361                        "err(%d)\n", ino, cpuid, err);
 362         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 363         if (err != HV_EOK)
 364                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 365                        "err(%d)\n", ino, err);
 366         err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 367         if (err != HV_EOK)
 368                 printk(KERN_ERR "sun4v_intr_setenabled(%x): err(%d)\n",
 369                        ino, err);
 370 }
 371
 372 static void sun4v_set_affinity(unsigned int virt_irq,
 373                                const struct cpumask *mask)
 374 {
 375         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 376         unsigned long cpuid = irq_choose_cpu(virt_irq);
 377         int err;
 378
 379         err = sun4v_intr_settarget(ino, cpuid);
 380         if (err != HV_EOK)
 381                 printk(KERN_ERR "sun4v_intr_settarget(%x,%lu): "
 382                        "err(%d)\n", ino, cpuid, err);
 383 }
 384
 385 static void sun4v_irq_disable(unsigned int virt_irq)
 386 {
 387         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 388         int err;
 389
 390         err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 391         if (err != HV_EOK)
 392                 printk(KERN_ERR "sun4v_intr_setenabled(%x): "
 393                        "err(%d)\n", ino, err);
 394 }
 395
 396 static void sun4v_irq_eoi(unsigned int virt_irq)
 397 {
 398         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 399         struct irq_desc *desc = irq_desc + virt_irq;
 400         int err;
 401
 402         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 403                 return;
 404
 405         err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 406         if (err != HV_EOK)
 407                 printk(KERN_ERR "sun4v_intr_setstate(%x): "
 408                        "err(%d)\n", ino, err);
 409 }
 410
 411 static void sun4v_virq_enable(unsigned int virt_irq)
 412 {
 413         unsigned long cpuid, dev_handle, dev_ino;
 414         int err;
 415
 416         cpuid = irq_choose_cpu(virt_irq);
 417
 418         dev_handle = virt_irq_table[virt_irq].dev_handle;
 419         dev_ino = virt_irq_table[virt_irq].dev_ino;
 420
 421         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 422         if (err != HV_EOK)
 423                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 424                        "err(%d)\n",
 425                        dev_handle, dev_ino, cpuid, err);
 426         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 427                                     HV_INTR_STATE_IDLE);
 428         if (err != HV_EOK)
 429                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 430                        "HV_INTR_STATE_IDLE): err(%d)\n",
 431                        dev_handle, dev_ino, err);
 432         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 433                                     HV_INTR_ENABLED);
 434         if (err != HV_EOK)
 435                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 436                        "HV_INTR_ENABLED): err(%d)\n",
 437                        dev_handle, dev_ino, err);
 438 }
 439
 440 static void sun4v_virt_set_affinity(unsigned int virt_irq,
 441                                     const struct cpumask *mask)
 442 {
 443         unsigned long cpuid, dev_handle, dev_ino;
 444         int err;
 445
 446         cpuid = irq_choose_cpu(virt_irq);
 447
 448         dev_handle = virt_irq_table[virt_irq].dev_handle;
 449         dev_ino = virt_irq_table[virt_irq].dev_ino;
 450
 451         err = sun4v_vintr_set_target(dev_handle, dev_ino, cpuid);
 452         if (err != HV_EOK)
 453                 printk(KERN_ERR "sun4v_vintr_set_target(%lx,%lx,%lu): "
 454                        "err(%d)\n",
 455                        dev_handle, dev_ino, cpuid, err);
 456 }
 457
 458 static void sun4v_virq_disable(unsigned int virt_irq)
 459 {
 460         unsigned long dev_handle, dev_ino;
 461         int err;
 462
 463         dev_handle = virt_irq_table[virt_irq].dev_handle;
 464         dev_ino = virt_irq_table[virt_irq].dev_ino;
 465
 466         err = sun4v_vintr_set_valid(dev_handle, dev_ino,
 467                                     HV_INTR_DISABLED);
 468         if (err != HV_EOK)
 469                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 470                        "HV_INTR_DISABLED): err(%d)\n",
 471                        dev_handle, dev_ino, err);
 472 }
 473
 474 static void sun4v_virq_eoi(unsigned int virt_irq)
 475 {
 476         struct irq_desc *desc = irq_desc + virt_irq;
 477         unsigned long dev_handle, dev_ino;
 478         int err;
 479
 480         if (unlikely(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
 481                 return;
 482
 483         dev_handle = virt_irq_table[virt_irq].dev_handle;
 484         dev_ino = virt_irq_table[virt_irq].dev_ino;
 485
 486         err = sun4v_vintr_set_state(dev_handle, dev_ino,
 487                                     HV_INTR_STATE_IDLE);
 488         if (err != HV_EOK)
 489                 printk(KERN_ERR "sun4v_vintr_set_state(%lx,%lx,"
 490                        "HV_INTR_STATE_IDLE): err(%d)\n",
 491                        dev_handle, dev_ino, err);
 492 }
 493
 494 static struct irq_chip sun4u_irq = {
 495         .typename       = "sun4u",
 496         .enable         = sun4u_irq_enable,
 497         .disable        = sun4u_irq_disable,
 498         .eoi            = sun4u_irq_eoi,
 499         .set_affinity   = sun4u_set_affinity,
 500 };
 501
 502 static struct irq_chip sun4v_irq = {
 503         .typename       = "sun4v",
 504         .enable         = sun4v_irq_enable,
 505         .disable        = sun4v_irq_disable,
 506         .eoi            = sun4v_irq_eoi,
 507         .set_affinity   = sun4v_set_affinity,
 508 };
 509
 510 static struct irq_chip sun4v_virq = {
 511         .typename       = "vsun4v",
 512         .enable         = sun4v_virq_enable,
 513         .disable        = sun4v_virq_disable,
 514         .eoi            = sun4v_virq_eoi,
 515         .set_affinity   = sun4v_virt_set_affinity,
 516 };
 517
 518 static void pre_flow_handler(unsigned int virt_irq,
 519                                       struct irq_desc *desc)
 520 {
 521         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 522         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 523
 524         data->pre_handler(ino, data->arg1, data->arg2);
 525
 526         handle_fasteoi_irq(virt_irq, desc);
 527 }
 528
 529 void irq_install_pre_handler(int virt_irq,
 530                              void (*func)(unsigned int, void *, void *),
 531                              void *arg1, void *arg2)
 532 {
 533         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 534         struct irq_desc *desc = irq_desc + virt_irq;
 535
 536         data->pre_handler = func;
 537         data->arg1 = arg1;
 538         data->arg2 = arg2;
 539
 540         desc->handle_irq = pre_flow_handler;
 541 }
 542
 543 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 544 {
 545         struct ino_bucket *bucket;
 546         struct irq_handler_data *data;
 547         unsigned int virt_irq;
 548         int ino;
 549
 550         BUG_ON(tlb_type == hypervisor);
 551
 552         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 553         bucket = &ivector_table[ino];
 554         virt_irq = bucket_get_virt_irq(__pa(bucket));
 555         if (!virt_irq) {
 556                 virt_irq = virt_irq_alloc(0, ino);
 557                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 558                 set_irq_chip_and_handler_name(virt_irq,
 559                                               &sun4u_irq,
 560                                               handle_fasteoi_irq,
 561                                               "IVEC");
 562         }
 563
 564         data = get_irq_chip_data(virt_irq);
 565         if (unlikely(data))
 566                 goto out;
 567
 568         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 569         if (unlikely(!data)) {
 570                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 571                 prom_halt();
 572         }
 573         set_irq_chip_data(virt_irq, data);
 574
 575         data->imap  = imap;
 576         data->iclr  = iclr;
 577
 578 out:
 579         return virt_irq;
 580 }
 581
 582 static unsigned int sun4v_build_common(unsigned long sysino,
 583                                        struct irq_chip *chip)
 584 {
 585         struct ino_bucket *bucket;
 586         struct irq_handler_data *data;
 587         unsigned int virt_irq;
 588
 589         BUG_ON(tlb_type != hypervisor);
 590
 591         bucket = &ivector_table[sysino];
 592         virt_irq = bucket_get_virt_irq(__pa(bucket));
 593         if (!virt_irq) {
 594                 virt_irq = virt_irq_alloc(0, sysino);
 595                 bucket_set_virt_irq(__pa(bucket), virt_irq);
 596                 set_irq_chip_and_handler_name(virt_irq, chip,
 597                                               handle_fasteoi_irq,
 598                                               "IVEC");
 599         }
 600
 601         data = get_irq_chip_data(virt_irq);
 602         if (unlikely(data))
 603                 goto out;
 604
 605         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 606         if (unlikely(!data)) {
 607                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 608                 prom_halt();
 609         }
 610         set_irq_chip_data(virt_irq, data);
 611
 612         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 613          * is done by hypervisor calls on sun4v platforms, not by direct
 614          * register accesses.
 615          */
 616         data->imap = ~0UL;
 617         data->iclr = ~0UL;
 618
 619 out:
 620         return virt_irq;
 621 }
 622
 623 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 624 {
 625         unsigned long sysino = sun4v_devino_to_sysino(devhandle, devino);
 626
 627         return sun4v_build_common(sysino, &sun4v_irq);
 628 }
 629
 630 unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino)
 631 {
 632         struct irq_handler_data *data;
 633         unsigned long hv_err, cookie;
 634         struct ino_bucket *bucket;
 635         struct irq_desc *desc;
 636         unsigned int virt_irq;
 637
 638         bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC);
 639         if (unlikely(!bucket))
 640                 return 0;
 641         __flush_dcache_range((unsigned long) bucket,
 642                              ((unsigned long) bucket +
 643                               sizeof(struct ino_bucket)));
 644
 645         virt_irq = virt_irq_alloc(devhandle, devino);
 646         bucket_set_virt_irq(__pa(bucket), virt_irq);
 647
 648         set_irq_chip_and_handler_name(virt_irq, &sun4v_virq,
 649                                       handle_fasteoi_irq,
 650                                       "IVEC");
 651
 652         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 653         if (unlikely(!data))
 654                 return 0;
 655
 656         /* In order to make the LDC channel startup sequence easier,
 657          * especially wrt. locking, we do not let request_irq() enable
 658          * the interrupt.
 659          */
 660         desc = irq_desc + virt_irq;
 661         desc->status |= IRQ_NOAUTOEN;
 662
 663         set_irq_chip_data(virt_irq, data);
 664
 665         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 666          * is done by hypervisor calls on sun4v platforms, not by direct
 667          * register accesses.
 668          */
 669         data->imap = ~0UL;
 670         data->iclr = ~0UL;
 671
 672         cookie = ~__pa(bucket);
 673         hv_err = sun4v_vintr_set_cookie(devhandle, devino, cookie);
 674         if (hv_err) {
 675                 prom_printf("IRQ: Fatal, cannot set cookie for [%x:%x] "
 676                             "err=%lu\n", devhandle, devino, hv_err);
 677                 prom_halt();
 678         }
 679
 680         return virt_irq;
 681 }
 682
 683 void ack_bad_irq(unsigned int virt_irq)
 684 {
 685         unsigned int ino = virt_irq_table[virt_irq].dev_ino;
 686
 687         if (!ino)
 688                 ino = 0xdeadbeef;
 689
 690         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 691                ino, virt_irq);
 692 }
 693
 694 void *hardirq_stack[NR_CPUS];
 695 void *softirq_stack[NR_CPUS];
 696
 697 static __attribute__((always_inline)) void *set_hardirq_stack(void)
 698 {
 699         void *orig_sp, *sp = hardirq_stack[smp_processor_id()];
 700
 701         __asm__ __volatile__("mov %%sp, %0" : "=r" (orig_sp));
 702         if (orig_sp < sp ||
 703             orig_sp > (sp + THREAD_SIZE)) {
 704                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 705                 __asm__ __volatile__("mov %0, %%sp" : : "r" (sp));
 706         }
 707
 708         return orig_sp;
 709 }
 710 static __attribute__((always_inline)) void restore_hardirq_stack(void *orig_sp)
 711 {
 712         __asm__ __volatile__("mov %0, %%sp" : : "r" (orig_sp));
 713 }
 714
 715 void handler_irq(int irq, struct pt_regs *regs)
 716 {
 717         unsigned long pstate, bucket_pa;
 718         struct pt_regs *old_regs;
 719         void *orig_sp;
 720
 721         clear_softint(1 << irq);
 722
 723         old_regs = set_irq_regs(regs);
 724         irq_enter();
 725
 726         /* Grab an atomic snapshot of the pending IVECs.  */
 727         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 728                              "wrpr      %0, %3, %%pstate\n\t"
 729                              "ldx       [%2], %1\n\t"
 730                              "stx       %%g0, [%2]\n\t"
 731                              "wrpr      %0, 0x0, %%pstate\n\t"
 732                              : "=&r" (pstate), "=&r" (bucket_pa)
 733                              : "r" (irq_work_pa(smp_processor_id())),
 734                                "i" (PSTATE_IE)
 735                              : "memory");
 736
 737         orig_sp = set_hardirq_stack();
 738
 739         while (bucket_pa) {
 740                 struct irq_desc *desc;
 741                 unsigned long next_pa;
 742                 unsigned int virt_irq;
 743
 744                 next_pa = bucket_get_chain_pa(bucket_pa);
 745                 virt_irq = bucket_get_virt_irq(bucket_pa);
 746                 bucket_clear_chain_pa(bucket_pa);
 747
 748                 desc = irq_desc + virt_irq;
 749
 750                 desc->handle_irq(virt_irq, desc);
 751
 752                 bucket_pa = next_pa;
 753         }
 754
 755         restore_hardirq_stack(orig_sp);
 756
 757         irq_exit();
 758         set_irq_regs(old_regs);
 759 }
 760
 761 void do_softirq(void)
 762 {
 763         unsigned long flags;
 764
 765         if (in_interrupt())
 766                 return;
 767
 768         local_irq_save(flags);
 769
 770         if (local_softirq_pending()) {
 771                 void *orig_sp, *sp = softirq_stack[smp_processor_id()];
 772
 773                 sp += THREAD_SIZE - 192 - STACK_BIAS;
 774
 775                 __asm__ __volatile__("mov %%sp, %0\n\t"
 776                                      "mov %1, %%sp"
 777                                      : "=&r" (orig_sp)
 778                                      : "r" (sp));
 779                 __do_softirq();
 780                 __asm__ __volatile__("mov %0, %%sp"
 781                                      : : "r" (orig_sp));
 782         }
 783
 784         local_irq_restore(flags);
 785 }
 786
 787 #ifdef CONFIG_HOTPLUG_CPU
 788 void fixup_irqs(void)
 789 {
 790         unsigned int irq;
 791
 792         for (irq = 0; irq < NR_IRQS; irq++) {
 793                 unsigned long flags;
 794
 795                 spin_lock_irqsave(&irq_desc[irq].lock, flags);
 796                 if (irq_desc[irq].action &&
 797                     !(irq_desc[irq].status & IRQ_PER_CPU)) {
 798                         if (irq_desc[irq].chip->set_affinity)
 799                                 irq_desc[irq].chip->set_affinity(irq,
 800                                         irq_desc[irq].affinity);
 801                 }
 802                 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
 803         }
 804
 805         tick_ops->disable_irq();
 806 }
 807 #endif
 808
 809 struct sun5_timer {
 810         u64     count0;
 811         u64     limit0;
 812         u64     count1;
 813         u64     limit1;
 814 };
 815
 816 static struct sun5_timer *prom_timers;
 817 static u64 prom_limit0, prom_limit1;
 818
 819 static void map_prom_timers(void)
 820 {
 821         struct device_node *dp;
 822         const unsigned int *addr;
 823
 824         /* PROM timer node hangs out in the top level of device siblings... */
 825         dp = of_find_node_by_path("/");
 826         dp = dp->child;
 827         while (dp) {
 828                 if (!strcmp(dp->name, "counter-timer"))
 829                         break;
 830                 dp = dp->sibling;
 831         }
 832
 833         /* Assume if node is not present, PROM uses different tick mechanism
 834          * which we should not care about.
 835          */
 836         if (!dp) {
 837                 prom_timers = (struct sun5_timer *) 0;
 838                 return;
 839         }
 840
 841         /* If PROM is really using this, it must be mapped by him. */
 842         addr = of_get_property(dp, "address", NULL);
 843         if (!addr) {
 844                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 845                 prom_timers = (struct sun5_timer *) 0;
 846                 return;
 847         }
 848         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 849 }
 850
 851 static void kill_prom_timer(void)
 852 {
 853         if (!prom_timers)
 854                 return;
 855
 856         /* Save them away for later. */
 857         prom_limit0 = prom_timers->limit0;
 858         prom_limit1 = prom_timers->limit1;
 859
 860         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 861          * We turn both off here just to be paranoid.
 862          */
 863         prom_timers->limit0 = 0;
 864         prom_timers->limit1 = 0;
 865
 866         /* Wheee, eat the interrupt packet too... */
 867         __asm__ __volatile__(
 868 "       mov     0x40, %%g2\n"
 869 "       ldxa    [%%g0] %0, %%g1\n"
 870 "       ldxa    [%%g2] %1, %%g1\n"
 871 "       stxa    %%g0, [%%g0] %0\n"
 872 "       membar  #Sync\n"
 873         : /* no outputs */
 874         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 875         : "g1", "g2");
 876 }
 877
 878 void notrace init_irqwork_curcpu(void)
 879 {
 880         int cpu = hard_smp_processor_id();
 881
 882         trap_block[cpu].irq_worklist_pa = 0UL;
 883 }
 884
 885 /* Please be very careful with register_one_mondo() and
 886  * sun4v_register_mondo_queues().
 887  *
 888  * On SMP this gets invoked from the CPU trampoline before
 889  * the cpu has fully taken over the trap table from OBP,
 890  * and it's kernel stack + %g6 thread register state is
 891  * not fully cooked yet.
 892  *
 893  * Therefore you cannot make any OBP calls, not even prom_printf,
 894  * from these two routines.
 895  */
 896 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type, unsigned long qmask)
 897 {
 898         unsigned long num_entries = (qmask + 1) / 64;
 899         unsigned long status;
 900
 901         status = sun4v_cpu_qconf(type, paddr, num_entries);
 902         if (status != HV_EOK) {
 903                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 904                             "err %lu\n", type, paddr, num_entries, status);
 905                 prom_halt();
 906         }
 907 }
 908
 909 void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
 910 {
 911         struct trap_per_cpu *tb = &trap_block[this_cpu];
 912
 913         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO,
 914                            tb->cpu_mondo_qmask);
 915         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO,
 916                            tb->dev_mondo_qmask);
 917         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR,
 918                            tb->resum_qmask);
 919         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR,
 920                            tb->nonresum_qmask);
 921 }
 922
 923 static void __init alloc_one_mondo(unsigned long *pa_ptr, unsigned long qmask)
 924 {
 925         unsigned long size = PAGE_ALIGN(qmask + 1);
 926         void *p = __alloc_bootmem(size, size, 0);
 927         if (!p) {
 928                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 929                 prom_halt();
 930         }
 931
 932         *pa_ptr = __pa(p);
 933 }
 934
 935 static void __init alloc_one_kbuf(unsigned long *pa_ptr, unsigned long qmask)
 936 {
 937         unsigned long size = PAGE_ALIGN(qmask + 1);
 938         void *p = __alloc_bootmem(size, size, 0);
 939
 940         if (!p) {
 941                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 942                 prom_halt();
 943         }
 944
 945         *pa_ptr = __pa(p);
 946 }
 947
 948 static void __init init_cpu_send_mondo_info(struct trap_per_cpu *tb)
 949 {
 950 #ifdef CONFIG_SMP
 951         void *page;
 952
 953         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 954
 955         page = alloc_bootmem_pages(PAGE_SIZE);
 956         if (!page) {
 957                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 958                 prom_halt();
 959         }
 960
 961         tb->cpu_mondo_block_pa = __pa(page);
 962         tb->cpu_list_pa = __pa(page + 64);
 963 #endif
 964 }
 965
 966 /* Allocate mondo and error queues for all possible cpus.  */
 967 static void __init sun4v_init_mondo_queues(void)
 968 {
 969         int cpu;
 970
 971         for_each_possible_cpu(cpu) {
 972                 struct trap_per_cpu *tb = &trap_block[cpu];
 973
 974                 alloc_one_mondo(&tb->cpu_mondo_pa, tb->cpu_mondo_qmask);
 975                 alloc_one_mondo(&tb->dev_mondo_pa, tb->dev_mondo_qmask);
 976                 alloc_one_mondo(&tb->resum_mondo_pa, tb->resum_qmask);
 977                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, tb->resum_qmask);
 978                 alloc_one_mondo(&tb->nonresum_mondo_pa, tb->nonresum_qmask);
 979                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa,
 980                                tb->nonresum_qmask);
 981         }
 982 }
 983
 984 static void __init init_send_mondo_info(void)
 985 {
 986         int cpu;
 987
 988         for_each_possible_cpu(cpu) {
 989                 struct trap_per_cpu *tb = &trap_block[cpu];
 990
 991                 init_cpu_send_mondo_info(tb);
 992         }
 993 }
 994
 995 static struct irqaction timer_irq_action = {
 996         .name = "timer",
 997 };
 998
 999 /* Only invoked on boot processor. */
1000 void __init init_IRQ(void)
1001 {
1002         unsigned long size;
1003
1004         map_prom_timers();
1005         kill_prom_timer();
1006
1007         size = sizeof(struct ino_bucket) * NUM_IVECS;
1008         ivector_table = alloc_bootmem(size);
1009         if (!ivector_table) {
1010                 prom_printf("Fatal error, cannot allocate ivector_table\n");
1011                 prom_halt();
1012         }
1013         __flush_dcache_range((unsigned long) ivector_table,
1014                              ((unsigned long) ivector_table) + size);
1015
1016         ivector_table_pa = __pa(ivector_table);
1017
1018         if (tlb_type == hypervisor)
1019                 sun4v_init_mondo_queues();
1020
1021         init_send_mondo_info();
1022
1023         if (tlb_type == hypervisor) {
1024                 /* Load up the boot cpu's entries.  */
1025                 sun4v_register_mondo_queues(hard_smp_processor_id());
1026         }
1027
1028         /* We need to clear any IRQ's pending in the soft interrupt
1029          * registers, a spurious one could be left around from the
1030          * PROM timer which we just disabled.
1031          */
1032         clear_softint(get_softint());
1033
1034         /* Now that ivector table is initialized, it is safe
1035          * to receive IRQ vector traps.  We will normally take
1036          * one or two right now, in case some device PROM used
1037          * to boot us wants to speak to us.  We just ignore them.
1038          */
1039         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
1040                              "or        %%g1, %0, %%g1\n\t"
1041                              "wrpr      %%g1, 0x0, %%pstate"
1042                              : /* No outputs */
1043                              : "i" (PSTATE_IE)
1044                              : "g1");
1045
1046         irq_desc[0].action = &timer_irq_action;
1047 }