Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux...
[pandora-kernel.git] / arch / sh / cchips / hd6446x / hd64465 / setup.c
1 /*
2  * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
3  *
4  * Setup and IRQ handling code for the HD64465 companion chip.
5  * by Greg Banks <gbanks@pocketpenguins.com>
6  * Copyright (c) 2000 PocketPenguins Inc
7  *
8  * Derived from setup_hd64461.c which bore the message:
9  * Copyright (C) 2000 YAEGASHI Takeshi
10  */
11
12 #include <linux/sched.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/param.h>
16 #include <linux/ioport.h>
17 #include <linux/interrupt.h>
18 #include <linux/init.h>
19 #include <linux/irq.h>
20
21 #include <asm/io.h>
22 #include <asm/irq.h>
23
24 #include <asm/hd64465/hd64465.h>
25
26 static void disable_hd64465_irq(unsigned int irq)
27 {
28         unsigned long flags;
29         unsigned short nimr;
30         unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
31
32         pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
33         local_irq_save(flags);
34         nimr = inw(HD64465_REG_NIMR);
35         nimr |= mask;
36         outw(nimr, HD64465_REG_NIMR);
37         local_irq_restore(flags);
38 }
39
40
41 static void enable_hd64465_irq(unsigned int irq)
42 {
43         unsigned long flags;
44         unsigned short nimr;
45         unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
46
47         pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
48         local_irq_save(flags);
49         nimr = inw(HD64465_REG_NIMR);
50         nimr &= ~mask;
51         outw(nimr, HD64465_REG_NIMR);
52         local_irq_restore(flags);
53 }
54
55
56 static void mask_and_ack_hd64465(unsigned int irq)
57 {
58         disable_hd64465_irq(irq);
59 }
60
61
62 static void end_hd64465_irq(unsigned int irq)
63 {
64         if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
65                 enable_hd64465_irq(irq);
66 }
67
68
69 static unsigned int startup_hd64465_irq(unsigned int irq)
70
71         enable_hd64465_irq(irq);
72         return 0;
73 }
74
75
76 static void shutdown_hd64465_irq(unsigned int irq)
77 {
78         disable_hd64465_irq(irq);
79 }
80
81
82 static struct hw_interrupt_type hd64465_irq_type = {
83         .typename       = "HD64465-IRQ",
84         .startup        = startup_hd64465_irq,
85         .shutdown       = shutdown_hd64465_irq,
86         .enable         = enable_hd64465_irq,
87         .disable        = disable_hd64465_irq,
88         .ack            = mask_and_ack_hd64465,
89         .end            = end_hd64465_irq,
90 };
91
92
93 static irqreturn_t hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs)
94 {
95         printk(KERN_INFO
96                "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
97                inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
98
99         return IRQ_NONE;
100 }
101
102
103 /*====================================================*/
104
105 /*
106  * Support for a secondary IRQ demux step.  This is necessary
107  * because the HD64465 presents a very thin interface to the
108  * PCMCIA bus; a lot of features (such as remapping interrupts)
109  * normally done in hardware by other PCMCIA host bridges is
110  * instead done in software.
111  */
112 static struct
113 {
114     int (*func)(int, void *);
115     void *dev;
116 } hd64465_demux[HD64465_IRQ_NUM];
117
118 void hd64465_register_irq_demux(int irq,
119                 int (*demux)(int irq, void *dev), void *dev)
120 {
121         hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
122         hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
123 }
124 EXPORT_SYMBOL(hd64465_register_irq_demux);
125
126 void hd64465_unregister_irq_demux(int irq)
127 {
128         hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
129 }
130 EXPORT_SYMBOL(hd64465_unregister_irq_demux);
131
132
133
134 int hd64465_irq_demux(int irq)
135 {
136         if (irq == CONFIG_HD64465_IRQ) {
137                 unsigned short i, bit;
138                 unsigned short nirr = inw(HD64465_REG_NIRR);
139                 unsigned short nimr = inw(HD64465_REG_NIMR);
140
141                 pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
142                 nirr &= ~nimr;
143                 for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
144                     if (nirr & bit)
145                         break;
146
147                 if (i < HD64465_IRQ_NUM) {
148                     irq = HD64465_IRQ_BASE + i;
149                     if (hd64465_demux[i].func != 0)
150                         irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
151                 }
152         }
153         return irq;
154 }
155
156 static struct irqaction irq0  = { hd64465_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64465", NULL, NULL};
157
158
159 static int __init setup_hd64465(void)
160 {
161         int i;
162         unsigned short rev;
163         unsigned short smscr;
164
165         if (!MACH_HD64465)
166                 return 0;
167
168         printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
169                CONFIG_HD64465_IOBASE,
170                CONFIG_HD64465_IRQ,
171                HD64465_IRQ_BASE,
172                HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
173
174         if (inw(HD64465_REG_SDID) != HD64465_SDID) {
175                 printk(KERN_ERR "HD64465 device ID not found, check base address\n");
176         }
177
178         rev = inw(HD64465_REG_SRR);
179         printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
180                
181         outw(0xffff, HD64465_REG_NIMR);         /* mask all interrupts */
182
183         for (i = 0; i < HD64465_IRQ_NUM ; i++) {
184                 irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
185         }
186
187         setup_irq(CONFIG_HD64465_IRQ, &irq0);
188
189 #ifdef CONFIG_SERIAL
190         /* wake up the UART from STANDBY at this point */
191         smscr = inw(HD64465_REG_SMSCR);
192         outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
193
194         /* remap IO ports for first ISA serial port to HD64465 UART */
195         hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
196 #endif
197
198         return 0;
199 }
200
201 module_init(setup_hd64465);