2 * linux/arch/sh/boards/se/7206/irq.c
4 * Copyright (C) 2005,2006 Yoshinori Sato
6 * Hitachi SolutionEngine Support.
9 #include <linux/init.h>
10 #include <linux/irq.h>
12 #include <linux/interrupt.h>
13 #include <mach-se/mach/se7206.h>
15 #define INTSTS0 0x31800000
16 #define INTSTS1 0x31800002
17 #define INTMSK0 0x31800004
18 #define INTMSK1 0x31800006
19 #define INTSEL 0x31800008
25 #define INTC_IPR01 0xfffe0818
26 #define INTC_ICR1 0xfffe0802
28 static void disable_se7206_irq(unsigned int irq)
31 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
32 unsigned short msk0,msk1;
34 /* Set the priority in IPR to 0 */
35 val = __raw_readw(INTC_IPR01);
37 __raw_writew(val, INTC_IPR01);
39 msk0 = __raw_readw(INTMSK0);
40 msk1 = __raw_readw(INTMSK1);
54 __raw_writew(msk0, INTMSK0);
55 __raw_writew(msk1, INTMSK1);
58 static void enable_se7206_irq(unsigned int irq)
61 unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
62 unsigned short msk0,msk1;
64 /* Set priority in IPR back to original value */
65 val = __raw_readw(INTC_IPR01);
67 __raw_writew(val, INTC_IPR01);
70 msk0 = __raw_readw(INTMSK0);
71 msk1 = __raw_readw(INTMSK1);
85 __raw_writew(msk0, INTMSK0);
86 __raw_writew(msk1, INTMSK1);
89 static void eoi_se7206_irq(unsigned int irq)
91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
95 enable_se7206_irq(irq);
97 sts0 = __raw_readw(INTSTS0);
98 sts1 = __raw_readw(INTSTS1);
112 __raw_writew(sts0, INTSTS0);
113 __raw_writew(sts1, INTSTS1);
116 static struct irq_chip se7206_irq_chip __read_mostly = {
117 .name = "SE7206-FPGA",
118 .mask = disable_se7206_irq,
119 .unmask = enable_se7206_irq,
120 .mask_ack = disable_se7206_irq,
121 .eoi = eoi_se7206_irq,
124 static void make_se7206_irq(unsigned int irq)
126 disable_irq_nosync(irq);
127 set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
128 handle_level_irq, "level");
129 disable_se7206_irq(irq);
133 * Initialize IRQ setting
135 void __init init_se7206_IRQ(void)
137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
138 make_se7206_irq(IRQ1_IRQ); /* ATA */
139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
142 /* FPGA System register setup*/
143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
146 __raw_writew(0x0001,INTSEL);