[MTD ONENAND] Check OneNAND lock scheme & all block unlock command support
[pandora-kernel.git] / arch / sh / boards / cqreek / setup.c
1 /* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $
2  *
3  * arch/sh/kernel/setup_cqreek.c
4  *
5  * Copyright (C) 2000  Niibe Yutaka
6  *
7  * CqREEK IDE/ISA Bridge Support.
8  *
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14
15 #include <asm/mach/cqreek.h>
16 #include <asm/machvec.h>
17 #include <asm/io.h>
18 #include <asm/io_generic.h>
19 #include <asm/irq.h>
20 #include <asm/rtc.h>
21
22 #define IDE_OFFSET 0xA4000000UL
23 #define ISA_OFFSET 0xA4A00000UL
24
25 const char *get_system_type(void)
26 {
27         return "CqREEK";
28 }
29
30 static unsigned long cqreek_port2addr(unsigned long port)
31 {
32         if (0x0000<=port && port<=0x0040)
33                 return IDE_OFFSET + port;
34         if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
35                 return IDE_OFFSET + port;
36
37         return ISA_OFFSET + port;
38 }
39
40 /*
41  * The Machine Vector
42  */
43 struct sh_machine_vector mv_cqreek __initmv = {
44 #if defined(CONFIG_CPU_SH4)
45         .mv_nr_irqs             = 48,
46 #elif defined(CONFIG_CPU_SUBTYPE_SH7708)
47         .mv_nr_irqs             = 32,
48 #elif defined(CONFIG_CPU_SUBTYPE_SH7709)
49         .mv_nr_irqs             = 61,
50 #endif
51
52         .mv_init_irq            = init_cqreek_IRQ,
53
54         .mv_isa_port2addr       = cqreek_port2addr,
55 };
56 ALIAS_MV(cqreek)
57
58 /*
59  * Initialize the board
60  */
61 void __init platform_setup(void)
62 {
63         int i;
64 /* udelay is not available at setup time yet... */
65 #define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
66
67         if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
68                 outw_p(0, BRIDGE_IDE_INTR_LVL);
69                 outw_p(0, BRIDGE_IDE_INTR_MASK);
70
71                 outw_p(0, BRIDGE_IDE_CTRL);
72                 DELAY();
73
74                 outw_p(0x8000, BRIDGE_IDE_CTRL);
75                 DELAY();
76
77                 outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
78                 outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
79                 outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
80                 cqreek_has_ide=1;
81         }
82
83         if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
84                 outw_p(0, BRIDGE_ISA_INTR_LVL);
85                 outw_p(0, BRIDGE_ISA_INTR_MASK);
86
87                 outw_p(0, BRIDGE_ISA_CTRL);
88                 DELAY();
89                 outw_p(0x8000, BRIDGE_ISA_CTRL);
90                 DELAY();
91
92                 outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
93                 outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
94                 outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
95                 cqreek_has_isa=1;
96         }
97
98         printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);
99 }
100