arch/sh/boards/board-sh7785lcr.c

   1 /*
   2  * Renesas Technology Corp. R0P7785LC0011RL Support.
   3  *
   4  * Copyright (C) 2008  Yoshihiro Shimoda
   5  * Copyright (C) 2009  Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/sm501.h>
  14 #include <linux/sm501-regs.h>
  15 #include <linux/fb.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/delay.h>
  18 #include <linux/i2c.h>
  19 #include <linux/i2c-pca-platform.h>
  20 #include <linux/i2c-algo-pca.h>
  21 #include <linux/irq.h>
  22 #include <linux/clk.h>
  23 #include <linux/errno.h>
  24 #include <mach/sh7785lcr.h>
  25 #include <asm/heartbeat.h>
  26 #include <asm/clock.h>
  27 #include <cpu/sh7785.h>
  28
  29 /*
  30  * NOTE: This board has 2 physical memory maps.
  31  *       Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  32  */
  33 static struct resource heartbeat_resources[] = {
  34         [0] = {
  35                 .start  = PLD_LEDCR,
  36                 .end    = PLD_LEDCR,
  37                 .flags  = IORESOURCE_MEM,
  38         },
  39 };
  40
  41 static struct heartbeat_data heartbeat_data = {
  42         .regsize = 8,
  43 };
  44
  45 static struct platform_device heartbeat_device = {
  46         .name           = "heartbeat",
  47         .id             = -1,
  48         .dev    = {
  49                 .platform_data  = &heartbeat_data,
  50         },
  51         .num_resources  = ARRAY_SIZE(heartbeat_resources),
  52         .resource       = heartbeat_resources,
  53 };
  54
  55 static struct mtd_partition nor_flash_partitions[] = {
  56         {
  57                 .name           = "loader",
  58                 .offset         = 0x00000000,
  59                 .size           = 512 * 1024,
  60         },
  61         {
  62                 .name           = "bootenv",
  63                 .offset         = MTDPART_OFS_APPEND,
  64                 .size           = 512 * 1024,
  65         },
  66         {
  67                 .name           = "kernel",
  68                 .offset         = MTDPART_OFS_APPEND,
  69                 .size           = 4 * 1024 * 1024,
  70         },
  71         {
  72                 .name           = "data",
  73                 .offset         = MTDPART_OFS_APPEND,
  74                 .size           = MTDPART_SIZ_FULL,
  75         },
  76 };
  77
  78 static struct physmap_flash_data nor_flash_data = {
  79         .width          = 4,
  80         .parts          = nor_flash_partitions,
  81         .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
  82 };
  83
  84 static struct resource nor_flash_resources[] = {
  85         [0]     = {
  86                 .start  = NOR_FLASH_ADDR,
  87                 .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  88                 .flags  = IORESOURCE_MEM,
  89         }
  90 };
  91
  92 static struct platform_device nor_flash_device = {
  93         .name           = "physmap-flash",
  94         .dev            = {
  95                 .platform_data  = &nor_flash_data,
  96         },
  97         .num_resources  = ARRAY_SIZE(nor_flash_resources),
  98         .resource       = nor_flash_resources,
  99 };
 100
 101 static struct resource r8a66597_usb_host_resources[] = {
 102         [0] = {
 103                 .name   = "r8a66597_hcd",
 104                 .start  = R8A66597_ADDR,
 105                 .end    = R8A66597_ADDR + R8A66597_SIZE - 1,
 106                 .flags  = IORESOURCE_MEM,
 107         },
 108         [1] = {
 109                 .name   = "r8a66597_hcd",
 110                 .start  = 2,
 111                 .end    = 2,
 112                 .flags  = IORESOURCE_IRQ,
 113         },
 114 };
 115
 116 static struct platform_device r8a66597_usb_host_device = {
 117         .name           = "r8a66597_hcd",
 118         .id             = -1,
 119         .dev = {
 120                 .dma_mask               = NULL,
 121                 .coherent_dma_mask      = 0xffffffff,
 122         },
 123         .num_resources  = ARRAY_SIZE(r8a66597_usb_host_resources),
 124         .resource       = r8a66597_usb_host_resources,
 125 };
 126
 127 static struct resource sm501_resources[] = {
 128         [0]     = {
 129                 .start  = SM107_MEM_ADDR,
 130                 .end    = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
 131                 .flags  = IORESOURCE_MEM,
 132         },
 133         [1]     = {
 134                 .start  = SM107_REG_ADDR,
 135                 .end    = SM107_REG_ADDR + SM107_REG_SIZE - 1,
 136                 .flags  = IORESOURCE_MEM,
 137         },
 138         [2]     = {
 139                 .start  = 10,
 140                 .flags  = IORESOURCE_IRQ,
 141         },
 142 };
 143
 144 static struct fb_videomode sm501_default_mode_crt = {
 145         .pixclock       = 35714,        /* 28MHz */
 146         .xres           = 640,
 147         .yres           = 480,
 148         .left_margin    = 105,
 149         .right_margin   = 16,
 150         .upper_margin   = 33,
 151         .lower_margin   = 10,
 152         .hsync_len      = 39,
 153         .vsync_len      = 2,
 154         .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 155 };
 156
 157 static struct fb_videomode sm501_default_mode_pnl = {
 158         .pixclock       = 40000,        /* 25MHz */
 159         .xres           = 640,
 160         .yres           = 480,
 161         .left_margin    = 2,
 162         .right_margin   = 16,
 163         .upper_margin   = 33,
 164         .lower_margin   = 10,
 165         .hsync_len      = 39,
 166         .vsync_len      = 2,
 167         .sync           = 0,
 168 };
 169
 170 static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
 171         .def_bpp        = 16,
 172         .def_mode       = &sm501_default_mode_pnl,
 173         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 174                           SM501FB_FLAG_USE_HWCURSOR |
 175                           SM501FB_FLAG_USE_HWACCEL |
 176                           SM501FB_FLAG_DISABLE_AT_EXIT |
 177                           SM501FB_FLAG_PANEL_NO_VBIASEN,
 178 };
 179
 180 static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
 181         .def_bpp        = 16,
 182         .def_mode       = &sm501_default_mode_crt,
 183         .flags          = SM501FB_FLAG_USE_INIT_MODE |
 184                           SM501FB_FLAG_USE_HWCURSOR |
 185                           SM501FB_FLAG_USE_HWACCEL |
 186                           SM501FB_FLAG_DISABLE_AT_EXIT,
 187 };
 188
 189 static struct sm501_platdata_fb sm501_fb_pdata = {
 190         .fb_route       = SM501_FB_OWN,
 191         .fb_crt         = &sm501_pdata_fbsub_crt,
 192         .fb_pnl         = &sm501_pdata_fbsub_pnl,
 193 };
 194
 195 static struct sm501_initdata sm501_initdata = {
 196         .gpio_high      = {
 197                 .set    = 0x00001fe0,
 198                 .mask   = 0x0,
 199         },
 200         .devices        = 0,
 201         .mclk           = 84 * 1000000,
 202         .m1xclk         = 112 * 1000000,
 203 };
 204
 205 static struct sm501_platdata sm501_platform_data = {
 206         .init           = &sm501_initdata,
 207         .fb             = &sm501_fb_pdata,
 208 };
 209
 210 static struct platform_device sm501_device = {
 211         .name           = "sm501",
 212         .id             = -1,
 213         .dev            = {
 214                 .platform_data  = &sm501_platform_data,
 215         },
 216         .num_resources  = ARRAY_SIZE(sm501_resources),
 217         .resource       = sm501_resources,
 218 };
 219
 220 static struct resource i2c_resources[] = {
 221         [0] = {
 222                 .start  = PCA9564_ADDR,
 223                 .end    = PCA9564_ADDR + PCA9564_SIZE - 1,
 224                 .flags  = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
 225         },
 226         [1] = {
 227                 .start  = 12,
 228                 .end    = 12,
 229                 .flags  = IORESOURCE_IRQ,
 230         },
 231 };
 232
 233 static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
 234         .gpio                   = 0,
 235         .i2c_clock_speed        = I2C_PCA_CON_330kHz,
 236         .timeout                = HZ,
 237 };
 238
 239 static struct platform_device i2c_device = {
 240         .name           = "i2c-pca-platform",
 241         .id             = -1,
 242         .dev            = {
 243                 .platform_data  = &i2c_platform_data,
 244         },
 245         .num_resources  = ARRAY_SIZE(i2c_resources),
 246         .resource       = i2c_resources,
 247 };
 248
 249 static struct platform_device *sh7785lcr_devices[] __initdata = {
 250         &heartbeat_device,
 251         &nor_flash_device,
 252         &r8a66597_usb_host_device,
 253         &sm501_device,
 254         &i2c_device,
 255 };
 256
 257 static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
 258         {
 259                 I2C_BOARD_INFO("r2025sd", 0x32),
 260         },
 261 };
 262
 263 static int __init sh7785lcr_devices_setup(void)
 264 {
 265         i2c_register_board_info(0, sh7785lcr_i2c_devices,
 266                                 ARRAY_SIZE(sh7785lcr_i2c_devices));
 267
 268         return platform_add_devices(sh7785lcr_devices,
 269                                     ARRAY_SIZE(sh7785lcr_devices));
 270 }
 271 __initcall(sh7785lcr_devices_setup);
 272
 273 /* Initialize IRQ setting */
 274 void __init init_sh7785lcr_IRQ(void)
 275 {
 276         plat_irq_setup_pins(IRQ_MODE_IRQ7654);
 277         plat_irq_setup_pins(IRQ_MODE_IRQ3210);
 278 }
 279
 280 static int sh7785lcr_clk_init(void)
 281 {
 282         struct clk *clk;
 283         int ret;
 284
 285         clk = clk_get(NULL, "extal");
 286         if (!clk || IS_ERR(clk))
 287                 return PTR_ERR(clk);
 288         ret = clk_set_rate(clk, 33333333);
 289         clk_put(clk);
 290
 291         return ret;
 292 }
 293
 294 static void sh7785lcr_power_off(void)
 295 {
 296         unsigned char *p;
 297
 298         p = ioremap(PLD_POFCR, PLD_POFCR + 1);
 299         if (!p) {
 300                 printk(KERN_ERR "%s: ioremap error.\n", __func__);
 301                 return;
 302         }
 303         *p = 0x01;
 304         iounmap(p);
 305         set_bl_bit();
 306         while (1)
 307                 cpu_relax();
 308 }
 309
 310 /* Initialize the board */
 311 static void __init sh7785lcr_setup(char **cmdline_p)
 312 {
 313         void __iomem *sm501_reg;
 314
 315         printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
 316
 317         pm_power_off = sh7785lcr_power_off;
 318
 319         /* sm501 DRAM configuration */
 320         sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
 321         writel(0x000307c2, sm501_reg);
 322 }
 323
 324 /* Return the board specific boot mode pin configuration */
 325 static int sh7785lcr_mode_pins(void)
 326 {
 327         int value = 0;
 328
 329         /* These are the factory default settings of S1 and S2.
 330          * If you change these dip switches then you will need to
 331          * adjust the values below as well.
 332          */
 333         value |= 1 << MODE_PIN_MODE4; /* Clock Mode 16 */
 334         value |= 1 << MODE_PIN_MODE5; /* 32-bit Area0 bus width */
 335         value |= 1 << MODE_PIN_MODE6; /* 32-bit Area0 bus width */
 336         value |= 1 << MODE_PIN_MODE7; /* Area 0 SRAM interface [fixed] */
 337         value |= 1 << MODE_PIN_MODE8; /* Little Endian */
 338         value |= 1 << MODE_PIN_MODE9; /* Master Mode */
 339         value |= 1 << MODE_PIN_MODE14; /* No PLL step-up */
 340
 341         return value;
 342 }
 343
 344 /*
 345  * The Machine Vector
 346  */
 347 static struct sh_machine_vector mv_sh7785lcr __initmv = {
 348         .mv_name                = "SH7785LCR",
 349         .mv_setup               = sh7785lcr_setup,
 350         .mv_clk_init            = sh7785lcr_clk_init,
 351         .mv_init_irq            = init_sh7785lcr_IRQ,
 352         .mv_mode_pins           = sh7785lcr_mode_pins,
 353 };
 354