2 * include/asm-s390/pgtable.h
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
10 * Derived from "include/asm-i386/pgtable.h"
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
17 * The Linux memory management assumes a three-level page table setup. For
18 * s390 31 bit we "fold" the mid level into the top-level page table, so
19 * that we physically have the same two-level page table as the s390 mmu
20 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
21 * the hardware provides (region first and region second tables are not
24 * The "pgd_xxx()" functions are trivial for a folded two-level
25 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * This file contains the functions and defines necessary to modify and use
29 * the S390 page table tree.
32 #include <linux/sched.h>
33 #include <linux/mm_types.h>
37 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
38 extern void paging_init(void);
39 extern void vmem_map_init(void);
40 extern void fault_init(void);
43 * The S390 doesn't have any external MMU info: the kernel page
44 * tables contain all the necessary information.
46 #define update_mmu_cache(vma, address, ptep) do { } while (0)
49 * ZERO_PAGE is a global shared page that is always zero; used
50 * for zero-mapped memory areas etc..
53 extern unsigned long empty_zero_page;
54 extern unsigned long zero_page_mask;
56 #define ZERO_PAGE(vaddr) \
57 (virt_to_page((void *)(empty_zero_page + \
58 (((unsigned long)(vaddr)) &zero_page_mask))))
60 #define is_zero_pfn is_zero_pfn
61 static inline int is_zero_pfn(unsigned long pfn)
63 extern unsigned long zero_pfn;
64 unsigned long offset_from_zero_pfn = pfn - zero_pfn;
65 return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
68 #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
70 /* TODO: s390 cannot support io_remap_pfn_range... */
71 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
72 remap_pfn_range(vma, vaddr, pfn, size, prot)
74 #endif /* !__ASSEMBLY__ */
77 * PMD_SHIFT determines the size of the area a second-level page
79 * PGDIR_SHIFT determines what a third-level page table entry can map
84 # define PGDIR_SHIFT 20
88 # define PGDIR_SHIFT 42
89 #endif /* __s390x__ */
91 #define PMD_SIZE (1UL << PMD_SHIFT)
92 #define PMD_MASK (~(PMD_SIZE-1))
93 #define PUD_SIZE (1UL << PUD_SHIFT)
94 #define PUD_MASK (~(PUD_SIZE-1))
95 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96 #define PGDIR_MASK (~(PGDIR_SIZE-1))
99 * entries per page directory level: the S390 is two-level, so
100 * we don't really have any PMD directory physically.
101 * for S390 segment-table entries are combined to one PGD
102 * that leads to 1024 pte per pgd
104 #define PTRS_PER_PTE 256
106 #define PTRS_PER_PMD 1
107 #define PTRS_PER_PUD 1
108 #else /* __s390x__ */
109 #define PTRS_PER_PMD 2048
110 #define PTRS_PER_PUD 2048
111 #endif /* __s390x__ */
112 #define PTRS_PER_PGD 2048
114 #define FIRST_USER_ADDRESS 0
116 #define pte_ERROR(e) \
117 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
118 #define pmd_ERROR(e) \
119 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
120 #define pud_ERROR(e) \
121 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
122 #define pgd_ERROR(e) \
123 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
127 * The vmalloc area will always be on the topmost area of the kernel
128 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc,
129 * which should be enough for any sane case.
130 * By putting vmalloc at the top, we maximise the gap between physical
131 * memory and vmalloc to catch misplaced memory accesses. As a side
132 * effect, this also makes sure that 64 bit module code cannot be used
133 * as system call address.
136 extern unsigned long VMALLOC_START;
139 #define VMALLOC_SIZE (96UL << 20)
140 #define VMALLOC_END 0x7e000000UL
141 #define VMEM_MAP_END 0x80000000UL
142 #else /* __s390x__ */
143 #define VMALLOC_SIZE (128UL << 30)
144 #define VMALLOC_END 0x3e000000000UL
145 #define VMEM_MAP_END 0x40000000000UL
146 #endif /* __s390x__ */
149 * VMEM_MAX_PHYS is the highest physical address that can be added to the 1:1
150 * mapping. This needs to be calculated at compile time since the size of the
151 * VMEM_MAP is static but the size of struct page can change.
153 #define VMEM_MAX_PAGES ((VMEM_MAP_END - VMALLOC_END) / sizeof(struct page))
154 #define VMEM_MAX_PFN min(VMALLOC_START >> PAGE_SHIFT, VMEM_MAX_PAGES)
155 #define VMEM_MAX_PHYS ((VMEM_MAX_PFN << PAGE_SHIFT) & ~((16 << 20) - 1))
156 #define vmemmap ((struct page *) VMALLOC_END)
159 * A 31 bit pagetable entry of S390 has following format:
162 * 00000000001111111111222222222233
163 * 01234567890123456789012345678901
165 * I Page-Invalid Bit: Page is not available for address-translation
166 * P Page-Protection Bit: Store access not possible for page
168 * A 31 bit segmenttable entry of S390 has following format:
169 * | P-table origin | |PTL
171 * 00000000001111111111222222222233
172 * 01234567890123456789012345678901
174 * I Segment-Invalid Bit: Segment is not available for address-translation
175 * C Common-Segment Bit: Segment is not private (PoP 3-30)
176 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
178 * The 31 bit segmenttable origin of S390 has following format:
180 * |S-table origin | | STL |
182 * 00000000001111111111222222222233
183 * 01234567890123456789012345678901
185 * X Space-Switch event:
186 * G Segment-Invalid Bit: *
187 * P Private-Space Bit: Segment is not private (PoP 3-30)
188 * S Storage-Alteration:
189 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
191 * A 64 bit pagetable entry of S390 has following format:
193 * 0000000000111111111122222222223333333333444444444455555555556666
194 * 0123456789012345678901234567890123456789012345678901234567890123
196 * I Page-Invalid Bit: Page is not available for address-translation
197 * P Page-Protection Bit: Store access not possible for page
198 * C Change-bit override: HW is not required to set change bit
200 * A 64 bit segmenttable entry of S390 has following format:
201 * | P-table origin | TT
202 * 0000000000111111111122222222223333333333444444444455555555556666
203 * 0123456789012345678901234567890123456789012345678901234567890123
205 * I Segment-Invalid Bit: Segment is not available for address-translation
206 * C Common-Segment Bit: Segment is not private (PoP 3-30)
207 * P Page-Protection Bit: Store access not possible for page
210 * A 64 bit region table entry of S390 has following format:
211 * | S-table origin | TF TTTL
212 * 0000000000111111111122222222223333333333444444444455555555556666
213 * 0123456789012345678901234567890123456789012345678901234567890123
215 * I Segment-Invalid Bit: Segment is not available for address-translation
220 * The 64 bit regiontable origin of S390 has following format:
221 * | region table origon | DTTL
222 * 0000000000111111111122222222223333333333444444444455555555556666
223 * 0123456789012345678901234567890123456789012345678901234567890123
225 * X Space-Switch event:
226 * G Segment-Invalid Bit:
227 * P Private-Space Bit:
228 * S Storage-Alteration:
232 * A storage key has the following format:
236 * F : fetch protection bit
241 /* Hardware bits in the page table entry */
242 #define _PAGE_CO 0x100 /* HW Change-bit override */
243 #define _PAGE_RO 0x200 /* HW read-only bit */
244 #define _PAGE_INVALID 0x400 /* HW invalid bit */
246 /* Software bits in the page table entry */
247 #define _PAGE_SWT 0x001 /* SW pte type bit t */
248 #define _PAGE_SWX 0x002 /* SW pte type bit x */
249 #define _PAGE_SWC 0x004 /* SW pte changed bit (for KVM) */
250 #define _PAGE_SWR 0x008 /* SW pte referenced bit (for KVM) */
251 #define _PAGE_SPECIAL 0x010 /* SW associated with special page */
252 #define __HAVE_ARCH_PTE_SPECIAL
254 /* Set of bits not changed in pte_modify */
255 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_SWC | _PAGE_SWR)
257 /* Six different types of pages. */
258 #define _PAGE_TYPE_EMPTY 0x400
259 #define _PAGE_TYPE_NONE 0x401
260 #define _PAGE_TYPE_SWAP 0x403
261 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
262 #define _PAGE_TYPE_RO 0x200
263 #define _PAGE_TYPE_RW 0x000
266 * Only four types for huge pages, using the invalid bit and protection bit
267 * of a segment table entry.
269 #define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
270 #define _HPAGE_TYPE_NONE 0x220
271 #define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
272 #define _HPAGE_TYPE_RW 0x000
275 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
276 * pte_none and pte_file to find out the pte type WITHOUT holding the page
277 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
278 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
279 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
280 * This change is done while holding the lock, but the intermediate step
281 * of a previously valid pte with the hw invalid bit set can be observed by
282 * handle_pte_fault. That makes it necessary that all valid pte types with
283 * the hw invalid bit set must be distinguishable from the four pte types
284 * empty, none, swap and file.
287 * _PAGE_TYPE_EMPTY 1000 -> 1000
288 * _PAGE_TYPE_NONE 1001 -> 1001
289 * _PAGE_TYPE_SWAP 1011 -> 1011
290 * _PAGE_TYPE_FILE 11?1 -> 11?1
291 * _PAGE_TYPE_RO 0100 -> 1100
292 * _PAGE_TYPE_RW 0000 -> 1000
294 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
295 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
296 * pte_file is true for bits combinations 1101, 1111
297 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
302 /* Bits in the segment table address-space-control-element */
303 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
304 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
305 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
306 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
307 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
309 /* Bits in the segment table entry */
310 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
311 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
312 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
313 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
314 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
316 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
317 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
319 /* Page status table bits for virtualization */
320 #define RCP_ACC_BITS 0xf0000000UL
321 #define RCP_FP_BIT 0x08000000UL
322 #define RCP_PCL_BIT 0x00800000UL
323 #define RCP_HR_BIT 0x00400000UL
324 #define RCP_HC_BIT 0x00200000UL
325 #define RCP_GR_BIT 0x00040000UL
326 #define RCP_GC_BIT 0x00020000UL
328 /* User dirty / referenced bit for KVM's migration feature */
329 #define KVM_UR_BIT 0x00008000UL
330 #define KVM_UC_BIT 0x00004000UL
332 #else /* __s390x__ */
334 /* Bits in the segment/region table address-space-control-element */
335 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
336 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
337 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
338 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
339 #define _ASCE_REAL_SPACE 0x20 /* real space control */
340 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
341 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
342 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
343 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
344 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
345 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
347 /* Bits in the region table entry */
348 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
349 #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
350 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
351 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
352 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
353 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
354 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
356 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
357 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
358 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
359 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
360 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
361 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
363 /* Bits in the segment table entry */
364 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
365 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
366 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
368 #define _SEGMENT_ENTRY (0)
369 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
371 #define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
372 #define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
374 /* Page status table bits for virtualization */
375 #define RCP_ACC_BITS 0xf000000000000000UL
376 #define RCP_FP_BIT 0x0800000000000000UL
377 #define RCP_PCL_BIT 0x0080000000000000UL
378 #define RCP_HR_BIT 0x0040000000000000UL
379 #define RCP_HC_BIT 0x0020000000000000UL
380 #define RCP_GR_BIT 0x0004000000000000UL
381 #define RCP_GC_BIT 0x0002000000000000UL
383 /* User dirty / referenced bit for KVM's migration feature */
384 #define KVM_UR_BIT 0x0000800000000000UL
385 #define KVM_UC_BIT 0x0000400000000000UL
387 #endif /* __s390x__ */
390 * A user page table pointer has the space-switch-event bit, the
391 * private-space-control bit and the storage-alteration-event-control
392 * bit set. A kernel page table pointer doesn't need them.
394 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
398 * Page protection definitions.
400 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
401 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
402 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
404 #define PAGE_KERNEL PAGE_RW
405 #define PAGE_COPY PAGE_RO
408 * On s390 the page table entry has an invalid bit and a read-only bit.
409 * Read permission implies execute permission and write permission
410 * implies read permission.
413 #define __P000 PAGE_NONE
414 #define __P001 PAGE_RO
415 #define __P010 PAGE_RO
416 #define __P011 PAGE_RO
417 #define __P100 PAGE_RO
418 #define __P101 PAGE_RO
419 #define __P110 PAGE_RO
420 #define __P111 PAGE_RO
422 #define __S000 PAGE_NONE
423 #define __S001 PAGE_RO
424 #define __S010 PAGE_RW
425 #define __S011 PAGE_RW
426 #define __S100 PAGE_RO
427 #define __S101 PAGE_RO
428 #define __S110 PAGE_RW
429 #define __S111 PAGE_RW
431 static inline int mm_exclusive(struct mm_struct *mm)
433 return likely(mm == current->active_mm &&
434 atomic_read(&mm->context.attach_count) <= 1);
437 static inline int mm_has_pgste(struct mm_struct *mm)
440 if (unlikely(mm->context.has_pgste))
446 * pgd/pmd/pte query functions
450 static inline int pgd_present(pgd_t pgd) { return 1; }
451 static inline int pgd_none(pgd_t pgd) { return 0; }
452 static inline int pgd_bad(pgd_t pgd) { return 0; }
454 static inline int pud_present(pud_t pud) { return 1; }
455 static inline int pud_none(pud_t pud) { return 0; }
456 static inline int pud_bad(pud_t pud) { return 0; }
458 #else /* __s390x__ */
460 static inline int pgd_present(pgd_t pgd)
462 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
464 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
467 static inline int pgd_none(pgd_t pgd)
469 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
471 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
474 static inline int pgd_bad(pgd_t pgd)
477 * With dynamic page table levels the pgd can be a region table
478 * entry or a segment table entry. Check for the bit that are
479 * invalid for either table entry.
482 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
483 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
484 return (pgd_val(pgd) & mask) != 0;
487 static inline int pud_present(pud_t pud)
489 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
491 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
494 static inline int pud_none(pud_t pud)
496 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
498 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
501 static inline int pud_bad(pud_t pud)
504 * With dynamic page table levels the pud can be a region table
505 * entry or a segment table entry. Check for the bit that are
506 * invalid for either table entry.
509 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
510 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
511 return (pud_val(pud) & mask) != 0;
514 #endif /* __s390x__ */
516 static inline int pmd_present(pmd_t pmd)
518 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
521 static inline int pmd_none(pmd_t pmd)
523 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
526 static inline int pmd_bad(pmd_t pmd)
528 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
529 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
532 static inline int pte_none(pte_t pte)
534 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
537 static inline int pte_present(pte_t pte)
539 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
540 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
541 (!(pte_val(pte) & _PAGE_INVALID) &&
542 !(pte_val(pte) & _PAGE_SWT));
545 static inline int pte_file(pte_t pte)
547 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
548 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
551 static inline int pte_special(pte_t pte)
553 return (pte_val(pte) & _PAGE_SPECIAL);
556 #define __HAVE_ARCH_PTE_SAME
557 static inline int pte_same(pte_t a, pte_t b)
559 return pte_val(a) == pte_val(b);
562 static inline pgste_t pgste_get_lock(pte_t *ptep)
564 unsigned long new = 0;
572 " nihh %0,0xff7f\n" /* clear RCP_PCL_BIT in old */
573 " oihh %1,0x0080\n" /* set RCP_PCL_BIT in new */
576 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
577 : "Q" (ptep[PTRS_PER_PTE]) : "cc");
582 static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
586 " nihh %1,0xff7f\n" /* clear RCP_PCL_BIT */
588 : "=Q" (ptep[PTRS_PER_PTE])
589 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE]) : "cc");
594 static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
597 unsigned long address, bits;
600 if (!pte_present(*ptep))
602 address = pte_val(*ptep) & PAGE_MASK;
603 skey = page_get_storage_key(address);
604 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
605 /* Clear page changed & referenced bit in the storage key */
606 if (bits & _PAGE_CHANGED)
607 page_set_storage_key(address, skey ^ bits, 1);
609 page_reset_referenced(address);
610 /* Transfer page changed & referenced bit to guest bits in pgste */
611 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
612 /* Get host changed & referenced bits from pgste */
613 bits |= (pgste_val(pgste) & (RCP_HR_BIT | RCP_HC_BIT)) >> 52;
614 /* Clear host bits in pgste. */
615 pgste_val(pgste) &= ~(RCP_HR_BIT | RCP_HC_BIT);
616 pgste_val(pgste) &= ~(RCP_ACC_BITS | RCP_FP_BIT);
617 /* Copy page access key and fetch protection bit to pgste */
619 (unsigned long) (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
620 /* Transfer changed and referenced to kvm user bits */
621 pgste_val(pgste) |= bits << 45; /* KVM_UR_BIT & KVM_UC_BIT */
622 /* Transfer changed & referenced to pte sofware bits */
623 pte_val(*ptep) |= bits << 1; /* _PAGE_SWR & _PAGE_SWC */
629 static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
634 if (!pte_present(*ptep))
636 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
637 /* Transfer page referenced bit to pte software bit (host view) */
638 if (young || (pgste_val(pgste) & RCP_HR_BIT))
639 pte_val(*ptep) |= _PAGE_SWR;
640 /* Clear host referenced bit in pgste. */
641 pgste_val(pgste) &= ~RCP_HR_BIT;
642 /* Transfer page referenced bit to guest bit in pgste */
643 pgste_val(pgste) |= (unsigned long) young << 50; /* set RCP_GR_BIT */
649 static inline void pgste_set_pte(pte_t *ptep, pgste_t pgste, pte_t entry)
652 unsigned long address;
653 unsigned long okey, nkey;
655 if (!pte_present(entry))
657 address = pte_val(entry) & PAGE_MASK;
658 okey = nkey = page_get_storage_key(address);
659 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT);
660 /* Set page access key and fetch protection bit from pgste */
661 nkey |= (pgste_val(pgste) & (RCP_ACC_BITS | RCP_FP_BIT)) >> 56;
663 page_set_storage_key(address, nkey, 1);
668 * struct gmap_struct - guest address space
669 * @mm: pointer to the parent mm_struct
670 * @table: pointer to the page directory
671 * @asce: address space control element for gmap page table
672 * @crst_list: list of all crst tables used in the guest address space
675 struct list_head list;
676 struct mm_struct *mm;
677 unsigned long *table;
679 struct list_head crst_list;
683 * struct gmap_rmap - reverse mapping for segment table entries
684 * @next: pointer to the next gmap_rmap structure in the list
685 * @entry: pointer to a segment table entry
688 struct list_head list;
689 unsigned long *entry;
693 * struct gmap_pgtable - gmap information attached to a page table
694 * @vmaddr: address of the 1MB segment in the process virtual memory
695 * @mapper: list of segment table entries maping a page table
697 struct gmap_pgtable {
698 unsigned long vmaddr;
699 struct list_head mapper;
702 struct gmap *gmap_alloc(struct mm_struct *mm);
703 void gmap_free(struct gmap *gmap);
704 void gmap_enable(struct gmap *gmap);
705 void gmap_disable(struct gmap *gmap);
706 int gmap_map_segment(struct gmap *gmap, unsigned long from,
707 unsigned long to, unsigned long length);
708 int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
709 unsigned long __gmap_fault(unsigned long address, struct gmap *);
710 unsigned long gmap_fault(unsigned long address, struct gmap *);
711 void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
714 * Certain architectures need to do special things when PTEs
715 * within a page table are directly modified. Thus, the following
716 * hook is made available.
718 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
719 pte_t *ptep, pte_t entry)
723 if (mm_has_pgste(mm)) {
724 pgste = pgste_get_lock(ptep);
725 pgste_set_pte(ptep, pgste, entry);
727 pgste_set_unlock(ptep, pgste);
733 * query functions pte_write/pte_dirty/pte_young only work if
734 * pte_present() is true. Undefined behaviour if not..
736 static inline int pte_write(pte_t pte)
738 return (pte_val(pte) & _PAGE_RO) == 0;
741 static inline int pte_dirty(pte_t pte)
744 if (pte_val(pte) & _PAGE_SWC)
750 static inline int pte_young(pte_t pte)
753 if (pte_val(pte) & _PAGE_SWR)
760 * pgd/pmd/pte modification functions
763 static inline void pgd_clear(pgd_t *pgd)
766 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
767 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
771 static inline void pud_clear(pud_t *pud)
774 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
775 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
779 static inline void pmd_clear(pmd_t *pmdp)
781 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
784 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
786 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
790 * The following pte modification functions only work if
791 * pte_present() is true. Undefined behaviour if not..
793 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
795 pte_val(pte) &= _PAGE_CHG_MASK;
796 pte_val(pte) |= pgprot_val(newprot);
800 static inline pte_t pte_wrprotect(pte_t pte)
802 /* Do not clobber _PAGE_TYPE_NONE pages! */
803 if (!(pte_val(pte) & _PAGE_INVALID))
804 pte_val(pte) |= _PAGE_RO;
808 static inline pte_t pte_mkwrite(pte_t pte)
810 pte_val(pte) &= ~_PAGE_RO;
814 static inline pte_t pte_mkclean(pte_t pte)
817 pte_val(pte) &= ~_PAGE_SWC;
822 static inline pte_t pte_mkdirty(pte_t pte)
827 static inline pte_t pte_mkold(pte_t pte)
830 pte_val(pte) &= ~_PAGE_SWR;
835 static inline pte_t pte_mkyoung(pte_t pte)
840 static inline pte_t pte_mkspecial(pte_t pte)
842 pte_val(pte) |= _PAGE_SPECIAL;
846 #ifdef CONFIG_HUGETLB_PAGE
847 static inline pte_t pte_mkhuge(pte_t pte)
850 * PROT_NONE needs to be remapped from the pte type to the ste type.
851 * The HW invalid bit is also different for pte and ste. The pte
852 * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE
853 * bit, so we don't have to clear it.
855 if (pte_val(pte) & _PAGE_INVALID) {
856 if (pte_val(pte) & _PAGE_SWT)
857 pte_val(pte) |= _HPAGE_TYPE_NONE;
858 pte_val(pte) |= _SEGMENT_ENTRY_INV;
861 * Clear SW pte bits SWT and SWX, there are no SW bits in a segment
864 pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX);
866 * Also set the change-override bit because we don't need dirty bit
867 * tracking for hugetlbfs pages.
869 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
875 * Get (and clear) the user dirty bit for a pte.
877 static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
883 if (mm_has_pgste(mm)) {
884 pgste = pgste_get_lock(ptep);
885 pgste = pgste_update_all(ptep, pgste);
886 dirty = !!(pgste_val(pgste) & KVM_UC_BIT);
887 pgste_val(pgste) &= ~KVM_UC_BIT;
888 pgste_set_unlock(ptep, pgste);
895 * Get (and clear) the user referenced bit for a pte.
897 static inline int ptep_test_and_clear_user_young(struct mm_struct *mm,
903 if (mm_has_pgste(mm)) {
904 pgste = pgste_get_lock(ptep);
905 pgste = pgste_update_young(ptep, pgste);
906 young = !!(pgste_val(pgste) & KVM_UR_BIT);
907 pgste_val(pgste) &= ~KVM_UR_BIT;
908 pgste_set_unlock(ptep, pgste);
913 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
914 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
915 unsigned long addr, pte_t *ptep)
920 if (mm_has_pgste(vma->vm_mm)) {
921 pgste = pgste_get_lock(ptep);
922 pgste = pgste_update_young(ptep, pgste);
924 *ptep = pte_mkold(pte);
925 pgste_set_unlock(ptep, pgste);
926 return pte_young(pte);
931 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
932 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
933 unsigned long address, pte_t *ptep)
935 /* No need to flush TLB
936 * On s390 reference bits are in storage key and never in TLB
937 * With virtualization we handle the reference bit, without we
938 * we can simply return */
939 return ptep_test_and_clear_young(vma, address, ptep);
942 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
944 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
946 /* pto must point to the start of the segment table */
947 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
949 /* ipte in zarch mode can do the math */
954 : "=m" (*ptep) : "m" (*ptep),
955 "a" (pto), "a" (address));
960 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
961 * both clear the TLB for the unmapped pte. The reason is that
962 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
963 * to modify an active pte. The sequence is
964 * 1) ptep_get_and_clear
967 * On s390 the tlb needs to get flushed with the modification of the pte
968 * if the pte is active. The only way how this can be implemented is to
969 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
972 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
973 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
974 unsigned long address, pte_t *ptep)
979 mm->context.flush_mm = 1;
980 if (mm_has_pgste(mm))
981 pgste = pgste_get_lock(ptep);
984 if (!mm_exclusive(mm))
985 __ptep_ipte(address, ptep);
986 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
988 if (mm_has_pgste(mm)) {
989 pgste = pgste_update_all(&pte, pgste);
990 pgste_set_unlock(ptep, pgste);
995 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
996 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
997 unsigned long address,
1002 mm->context.flush_mm = 1;
1003 if (mm_has_pgste(mm))
1004 pgste_get_lock(ptep);
1007 if (!mm_exclusive(mm))
1008 __ptep_ipte(address, ptep);
1012 static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1013 unsigned long address,
1014 pte_t *ptep, pte_t pte)
1017 if (mm_has_pgste(mm))
1018 pgste_set_unlock(ptep, *(pgste_t *)(ptep + PTRS_PER_PTE));
1021 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1022 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1023 unsigned long address, pte_t *ptep)
1028 if (mm_has_pgste(vma->vm_mm))
1029 pgste = pgste_get_lock(ptep);
1032 __ptep_ipte(address, ptep);
1033 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1035 if (mm_has_pgste(vma->vm_mm)) {
1036 pgste = pgste_update_all(&pte, pgste);
1037 pgste_set_unlock(ptep, pgste);
1043 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1044 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1045 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1046 * cannot be accessed while the batched unmap is running. In this case
1047 * full==1 and a simple pte_clear is enough. See tlb.h.
1049 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1050 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1051 unsigned long address,
1052 pte_t *ptep, int full)
1057 if (mm_has_pgste(mm))
1058 pgste = pgste_get_lock(ptep);
1062 __ptep_ipte(address, ptep);
1063 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1065 if (mm_has_pgste(mm)) {
1066 pgste = pgste_update_all(&pte, pgste);
1067 pgste_set_unlock(ptep, pgste);
1072 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1073 static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1074 unsigned long address, pte_t *ptep)
1079 if (pte_write(pte)) {
1080 mm->context.flush_mm = 1;
1081 if (mm_has_pgste(mm))
1082 pgste = pgste_get_lock(ptep);
1084 if (!mm_exclusive(mm))
1085 __ptep_ipte(address, ptep);
1086 *ptep = pte_wrprotect(pte);
1088 if (mm_has_pgste(mm))
1089 pgste_set_unlock(ptep, pgste);
1094 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1095 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1096 unsigned long address, pte_t *ptep,
1097 pte_t entry, int dirty)
1101 if (pte_same(*ptep, entry))
1103 if (mm_has_pgste(vma->vm_mm))
1104 pgste = pgste_get_lock(ptep);
1106 __ptep_ipte(address, ptep);
1109 if (mm_has_pgste(vma->vm_mm))
1110 pgste_set_unlock(ptep, pgste);
1115 * Conversion functions: convert a page and protection to a page entry,
1116 * and a page entry and page directory to the page they refer to.
1118 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1121 pte_val(__pte) = physpage + pgprot_val(pgprot);
1125 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1127 unsigned long physpage = page_to_phys(page);
1129 return mk_pte_phys(physpage, pgprot);
1132 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1133 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1134 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1135 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1137 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1138 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1142 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1143 #define pud_deref(pmd) ({ BUG(); 0UL; })
1144 #define pgd_deref(pmd) ({ BUG(); 0UL; })
1146 #define pud_offset(pgd, address) ((pud_t *) pgd)
1147 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1149 #else /* __s390x__ */
1151 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1152 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1153 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1155 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1157 pud_t *pud = (pud_t *) pgd;
1158 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1159 pud = (pud_t *) pgd_deref(*pgd);
1160 return pud + pud_index(address);
1163 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1165 pmd_t *pmd = (pmd_t *) pud;
1166 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1167 pmd = (pmd_t *) pud_deref(*pud);
1168 return pmd + pmd_index(address);
1171 #endif /* __s390x__ */
1173 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1174 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1175 #define pte_page(x) pfn_to_page(pte_pfn(x))
1177 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1179 /* Find an entry in the lowest level page table.. */
1180 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1181 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1182 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1183 #define pte_unmap(pte) do { } while (0)
1186 * 31 bit swap entry format:
1187 * A page-table entry has some bits we have to treat in a special way.
1188 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1189 * exception will occur instead of a page translation exception. The
1190 * specifiation exception has the bad habit not to store necessary
1191 * information in the lowcore.
1192 * Bit 21 and bit 22 are the page invalid bit and the page protection
1193 * bit. We set both to indicate a swapped page.
1194 * Bit 30 and 31 are used to distinguish the different page types. For
1195 * a swapped page these bits need to be zero.
1196 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1197 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1198 * plus 24 for the offset.
1199 * 0| offset |0110|o|type |00|
1200 * 0 0000000001111111111 2222 2 22222 33
1201 * 0 1234567890123456789 0123 4 56789 01
1203 * 64 bit swap entry format:
1204 * A page-table entry has some bits we have to treat in a special way.
1205 * Bits 52 and bit 55 have to be zero, otherwise an specification
1206 * exception will occur instead of a page translation exception. The
1207 * specifiation exception has the bad habit not to store necessary
1208 * information in the lowcore.
1209 * Bit 53 and bit 54 are the page invalid bit and the page protection
1210 * bit. We set both to indicate a swapped page.
1211 * Bit 62 and 63 are used to distinguish the different page types. For
1212 * a swapped page these bits need to be zero.
1213 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1214 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1215 * plus 56 for the offset.
1216 * | offset |0110|o|type |00|
1217 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1218 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1221 #define __SWP_OFFSET_MASK (~0UL >> 12)
1223 #define __SWP_OFFSET_MASK (~0UL >> 11)
1225 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1228 offset &= __SWP_OFFSET_MASK;
1229 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1230 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1234 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1235 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1236 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1238 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1239 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1242 # define PTE_FILE_MAX_BITS 26
1243 #else /* __s390x__ */
1244 # define PTE_FILE_MAX_BITS 59
1245 #endif /* __s390x__ */
1247 #define pte_to_pgoff(__pte) \
1248 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1250 #define pgoff_to_pte(__off) \
1251 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1252 | _PAGE_TYPE_FILE })
1254 #endif /* !__ASSEMBLY__ */
1256 #define kern_addr_valid(addr) (1)
1258 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1259 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1260 extern int s390_enable_sie(void);
1263 * No page table caches to initialise
1265 #define pgtable_cache_init() do { } while (0)
1267 #include <asm-generic/pgtable.h>
1269 #endif /* _S390_PAGE_H */